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IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences
Online ISSN : 1745-1337
Print ISSN : 0916-8508
Special Section on VLSI Design and CAD Algorithms
A 197mW 70ms-Latency Full-HD 12-Channel Video-Processing SoC in 16nm CMOS for In-Vehicle Information Systems
Seiji MOCHIZUKIKatsushige MATSUBARAKeisuke MATSUMOTOChi Lan Phuong NGUYENTetsuya SHIBAYAMAKenichi IWATAKatsuya MIZUMOTOTakahiro IRITAHirotaka HARAToshihiro HATTORI
Author information
  • Seiji MOCHIZUKI

    Renesas Electronics Corporation

  • Katsushige MATSUBARA

    Renesas Electronics Corporation

  • Keisuke MATSUMOTO

    Renesas Electronics Corporation

  • Chi Lan Phuong NGUYEN

    Renesas Design Vietnam

  • Tetsuya SHIBAYAMA

    Renesas Electronics Corporation

  • Kenichi IWATA

    Renesas Electronics Corporation

  • Katsuya MIZUMOTO

    Renesas Electronics Corporation

  • Takahiro IRITA

    Renesas Design Vietnam

  • Hirotaka HARA

    Renesas Design Vietnam

  • Toshihiro HATTORI

    Renesas Electronics Corporation

Corresponding author

ORCID
Keywords:video processing,automotive,low latency,memory-access-data compression
JOURNALRESTRICTED ACCESS

2017 Volume E100.AIssue 12Pages 2878-2887

DOIhttps://doi.org/10.1587/transfun.E100.A.2878
Details
  • Published: December 01, 2017Manuscript Received: March 09, 2017Released on J-STAGE: December 01, 2017Accepted: -Advance online publication: -Manuscript Revised: July 10, 2017
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Abstract

A 197mW 70ms-latency Full-HD 12-channel video-processing SoC for in-vehicle information systems has been implemented in 16nm CMOS. The SoC integrates 17 video processors of 6 types to operate video processing independently of other processing in CPU/GPU. The synchronous scheme between the video processors achieves 70ms low-latency for driver assistance. The optimized implementation of lossy and lossless video-data compression reduces memory access data by half and power consumption by 20%.

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© 2017 The Institute of Electronics, Information and Communication Engineers
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