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    RTC - Parallel interface (Timekeepers)

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    ST's parallelreal-time clock ICs, also called Timekeepers, combine a SRAM with up to 256 Kbits of memory and a byte-wide interface along with a quartz-based very-low-power oscillator with a clock/calendar circuit to provide real-time data.

    RTC – Parallel interface generic block diagram
    RTC – Parallel interface generic block diagram

    Advanced RTC ICs include additional features such as programmable alarms,watchdog timers, system reset outputs, and battery-low warning flags.

    Applications:

    Product types:

    Products in through-hole packages (CAPHAT) embed the battery and crystal, while SOIC packages are connected with the battery and crystal using ST’sSNAPHAT detachable top.

    Key features

    M48T201V andM48T201Y devices include a supervisor function that converts external standard low-power SRAM devices into nonvolatile memory (NVRAM). They provide control and battery backup (switchover) to an external low-power SRAM with from 1 to 16 Mbits and with up to 10 years of data retention, as well as real-time clock (RTC), programmable alarms, a watchdog timer, and a square wave output.
    The 16 TIMEKEEPERS® registers offer year, month, date, day, hour, minute, second, calibration, alarm, century, watchdog, and square wave output data.

    Typical 5 V (M48T201Y) or 3.3 V (M48T201V) system
    Typical 5 V (M48T201Y) or 3.3 V (M48T201V) system

    Benefits

    • Both devices have asmart power-fail detection circuit.
    • The control circuitry constantly monitors the single VCC supply for an out-of-tolerance condition.
    • When VCC is out of tolerance, the circuit write protects the SRAM, providing a high degree of data security during unpredictable system operation brought on by low VCC. As VCC falls below the battery backup switchover voltage (VSO), the control circuitry connects the battery, which maintains data and clock operation until valid power returns.
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