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Pipelining, processors, risc and cisc

Pipelining allows multiple instructions to be processed simultaneously by splitting the fetch-decode-execute cycle into stages so different instructions can be at different stages. Array or vector processors can perform the same operation on multiple data elements in parallel using multiple ALUs. Parallel processing can happen at different levels from pipelining within a CPU to multi-core and multiprocessor systems that distribute work across CPUs. RISC processors use simpler instructions that can complete in one cycle while CISC processors have more complex instructions implemented in hardware.

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PIPELINING, PROCESSORS,RISC AND CISC. (PPRC)F453 COMPUTER SCIENCE 3.3.3 COMPUTER ARCHITECTURES
PIPELINING• The main idea behind pipelining, is to allow multiple programsto use the FDE cycle at one time.• In the FDE cycle, there are 3 main processes, Fetch, Decode,Execute.• Each one of these 3 sections, use only 1 part of the processorat a time.• When 1 instruction is ‘executed’, it goes through all 3 sectionsone after another, which always leaves parts of the processorinactive.
DIAGRAM• In this diagram, when the program is started, instruction 1starts in F, then moves to D, when instruction 1 moves,instruction 2 moves into F. This continues with all subsequentinstructions as well, and maximises processor use.Fetch Decode ExecuteInstruction 1Instruction 2 Instruction 1Instruction 3 Instruction 2 Instruction 1Instruction 4 Instruction 3 Instruction 2Instruction 5 Instruction 4 Instruction 3Instruction 6 Instruction 5 Instruction 4Instruction 7 Instruction 6 Instruction 5
ARRAY OR VECTOR PROCESSING• Some types of data can be processed individually of each other,for example processing pixels on a screen.• For example, if you wanted to make all red pixels blue, and allblue pixels green, and leave green pixels alone.• A sequential processor would examine each pixel one at a time,and apply the change.
ARRAY OR VECTOR PROCESSING• But the data for this process can be arranged into an array, likethis:• {element 1, element 2, …}• This is known as a one dimensional array or vector, anothertype of array looks like this:• {element 1, element 2• Element 3, element 4}• This is called a two dimensional array or matrix, which isfundamental to graphics work.
ARRAY PROCESSOR• An array (vector) processor has a number of ALU’s that allow allthe elements of an array to be processed at the same time.• With an array processor, a single instruction is issued by acontrol unit, and that instruction is applied to a number of datasets at the same time.• An array processor is a single instruction multiple datacomputer (SIMD).
DIAGRAMControl unitALU 1ALU 3 ALU 4ALU 2DATADATADATADATA
MULTIPLE PROCESSORS• The next level of parallel processing, is to have multipleinstructions acting upon multiple data sets.• This is achieved by having a number of CPU’s being applied toa single problem, with each CPU carrying out part of the overallproblem.
DIAGRAMJob SchedulerCPU 1CPU 3 CPU 4CPU 2DATADATADATADATA
MULTIPLE PROCESSORS• A good example of this architecture, is a supercomputer. Forexample the IBM Blue Gene supercomputer has 4098processors, allowing a lot of processing. It is used to solvecomplex problems, such as predicting climate change, orrunning simulations (any large problem that can be brokendown into smaller problems).• But even normal CPU chips in personal computers will normallyhave multiple cores, for example your (my) Toshiba laptop hasquad core processing ( ͡° ͜ʖ ͡°).• A multi-core computer is a multiple instruction multiple data
TYPES OF PARALLEL PROCESSING• There are a number of ways to carry out parallel processing:Types of parallelprocessingClass of computer ApplicationPipeline Single instructionsingle data (SISD)Inside a CPUArray processor SIMD Graphics card, gamesconsolesMulti-core MIMD Super computers,modern multi-corechips
ADVANTAGES AND DISADVANTAGES OFPARALLEL PROCESSING• Advantages of parallel processing (over Von Neumannarchitecture):• Faster when handling large amounts of data, with each data set requiringthe same processing.• Is not limited by the bus transfer rate (Von Neumann bottleneck).• Can make maximum use of the CPU (pipeline method) in spite of thebottleneck.• Disadvantages:• Only certain types of data are suitable for parallel processing. Data thatrelies on the result of a previous operation cannot be made parallel. Forparallel processing, each data set must be independent of each other.
CO PROCESSOR• So far, we have discussed parallel processing as a means ofspeeding up data processing. This is fine, but it does make anassumption that the ALU within the CPU is perfect for handlingall kinds of data. And this is not always true.• There are two basic ways of doing calculations within a CPU:• Integer maths which only deal with whole numbers.
RISC AND CISC• CISC stands for complex instruction set computers, and RISCstands for reduced instruction set computers, and they bothdescribe the thought behind designing a new computer chip.• Until recently, most chips were made using the CISC approach.Each iteration of their computer chips offered larger and richerinstruction sets than the last one. But now chips are beingcreated using the RISC approach.
CISC• In a CISC chip, a single instruction such as MULT a,b isavailable. The chip-maker adds more complex circuits withinthe CPU to carry out these instructions. So the trade-off ismore complex hardware to support simpler software coding.• The compiler when seeing a MULT command written in a highlevel language source code, can generate a single machinecode instruction to carry out the task.
RISC• In a RISC chip, it is the other way round (keep the hardwaresimple and let the software be more complicated). There maybe no single MULT instruction available, so the compiler has togenerate more line of codes, such as multiple ADD commands.• But each of those instructions can be carried out in a singlecycle. You can also use the pipeline method to speed it up evenmore (since a and b do not depend on each other). So overallthe RISC approach may be faster.

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Pipelining, processors, risc and cisc

  • 1.
    PIPELINING, PROCESSORS,RISC ANDCISC. (PPRC)F453 COMPUTER SCIENCE 3.3.3 COMPUTER ARCHITECTURES
  • 2.
    PIPELINING• The mainidea behind pipelining, is to allow multiple programsto use the FDE cycle at one time.• In the FDE cycle, there are 3 main processes, Fetch, Decode,Execute.• Each one of these 3 sections, use only 1 part of the processorat a time.• When 1 instruction is ‘executed’, it goes through all 3 sectionsone after another, which always leaves parts of the processorinactive.
  • 3.
    DIAGRAM• In thisdiagram, when the program is started, instruction 1starts in F, then moves to D, when instruction 1 moves,instruction 2 moves into F. This continues with all subsequentinstructions as well, and maximises processor use.Fetch Decode ExecuteInstruction 1Instruction 2 Instruction 1Instruction 3 Instruction 2 Instruction 1Instruction 4 Instruction 3 Instruction 2Instruction 5 Instruction 4 Instruction 3Instruction 6 Instruction 5 Instruction 4Instruction 7 Instruction 6 Instruction 5
  • 4.
    ARRAY OR VECTORPROCESSING• Some types of data can be processed individually of each other,for example processing pixels on a screen.• For example, if you wanted to make all red pixels blue, and allblue pixels green, and leave green pixels alone.• A sequential processor would examine each pixel one at a time,and apply the change.
  • 5.
    ARRAY OR VECTORPROCESSING• But the data for this process can be arranged into an array, likethis:• {element 1, element 2, …}• This is known as a one dimensional array or vector, anothertype of array looks like this:• {element 1, element 2• Element 3, element 4}• This is called a two dimensional array or matrix, which isfundamental to graphics work.
  • 6.
    ARRAY PROCESSOR• Anarray (vector) processor has a number of ALU’s that allow allthe elements of an array to be processed at the same time.• With an array processor, a single instruction is issued by acontrol unit, and that instruction is applied to a number of datasets at the same time.• An array processor is a single instruction multiple datacomputer (SIMD).
  • 7.
    DIAGRAMControl unitALU 1ALU3 ALU 4ALU 2DATADATADATADATA
  • 8.
    MULTIPLE PROCESSORS• Thenext level of parallel processing, is to have multipleinstructions acting upon multiple data sets.• This is achieved by having a number of CPU’s being applied toa single problem, with each CPU carrying out part of the overallproblem.
  • 9.
    DIAGRAMJob SchedulerCPU 1CPU3 CPU 4CPU 2DATADATADATADATA
  • 10.
    MULTIPLE PROCESSORS• Agood example of this architecture, is a supercomputer. Forexample the IBM Blue Gene supercomputer has 4098processors, allowing a lot of processing. It is used to solvecomplex problems, such as predicting climate change, orrunning simulations (any large problem that can be brokendown into smaller problems).• But even normal CPU chips in personal computers will normallyhave multiple cores, for example your (my) Toshiba laptop hasquad core processing ( ͡° ͜ʖ ͡°).• A multi-core computer is a multiple instruction multiple data
  • 11.
    TYPES OF PARALLELPROCESSING• There are a number of ways to carry out parallel processing:Types of parallelprocessingClass of computer ApplicationPipeline Single instructionsingle data (SISD)Inside a CPUArray processor SIMD Graphics card, gamesconsolesMulti-core MIMD Super computers,modern multi-corechips
  • 12.
    ADVANTAGES AND DISADVANTAGESOFPARALLEL PROCESSING• Advantages of parallel processing (over Von Neumannarchitecture):• Faster when handling large amounts of data, with each data set requiringthe same processing.• Is not limited by the bus transfer rate (Von Neumann bottleneck).• Can make maximum use of the CPU (pipeline method) in spite of thebottleneck.• Disadvantages:• Only certain types of data are suitable for parallel processing. Data thatrelies on the result of a previous operation cannot be made parallel. Forparallel processing, each data set must be independent of each other.
  • 13.
    CO PROCESSOR• Sofar, we have discussed parallel processing as a means ofspeeding up data processing. This is fine, but it does make anassumption that the ALU within the CPU is perfect for handlingall kinds of data. And this is not always true.• There are two basic ways of doing calculations within a CPU:• Integer maths which only deal with whole numbers.
  • 14.
    RISC AND CISC•CISC stands for complex instruction set computers, and RISCstands for reduced instruction set computers, and they bothdescribe the thought behind designing a new computer chip.• Until recently, most chips were made using the CISC approach.Each iteration of their computer chips offered larger and richerinstruction sets than the last one. But now chips are beingcreated using the RISC approach.
  • 15.
    CISC• In aCISC chip, a single instruction such as MULT a,b isavailable. The chip-maker adds more complex circuits withinthe CPU to carry out these instructions. So the trade-off ismore complex hardware to support simpler software coding.• The compiler when seeing a MULT command written in a highlevel language source code, can generate a single machinecode instruction to carry out the task.
  • 16.
    RISC• In aRISC chip, it is the other way round (keep the hardwaresimple and let the software be more complicated). There maybe no single MULT instruction available, so the compiler has togenerate more line of codes, such as multiple ADD commands.• But each of those instructions can be carried out in a singlecycle. You can also use the pipeline method to speed it up evenmore (since a and b do not depend on each other). So overallthe RISC approach may be faster.

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