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9.2 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionChapter 9: Memory Management Background Contiguous Memory Allocation Paging Structure of the Page Table Swapping Example: The Intel 32 and 64-bit Architectures Example: ARMv8 Architecture

9.3 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionObjectives To provide a detailed description of various ways of organizing memoryhardware To discuss various memory-management techniques, To provide a detailed description of the Intel Pentium, which supportsboth pure segmentation and segmentation with paging

9.4 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionBackground Program must be brought (from disk) into memory and placed within aprocess for it to be run Main memory and registers are only storage CPU can access directly Memory unit only sees a stream of:• addresses + read requests, or• address + data and write requests Register access is done in one CPU clock (or less) Main memory can take many cycles, causing a stall Cache sits between main memory and CPU registers Protection of memory required to ensure correct operation

9.5 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionProtection Need to ensure that a process can access only those addresses inits address space. We can provide this protection by using a pair of base and limitregisters define the logical address space of a process

9.6 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionHardware Address Protection CPU must check every memory access generated in user mode tobe sure it is between base and limit for that user the instructions to loading the base and limit registers are privileged

9.7 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionAddress Binding Programs on disk, ready to be brought into memory to execute form aninput queue• Without support, must be loaded into address 0000 Inconvenient to have first user process physical address always at0000• How can it not be? Addresses represented in different ways at different stages of aprogram’s life• Source code addresses usually symbolic• Compiled code addresses bind to relocatable addresses i.e., “14 bytes from beginning of this module”• Linker or loader will bind relocatable addresses to absoluteaddresses i.e., 74014• Each binding maps one address space to another

9.8 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionBinding of Instructions and Data to Memory Address binding of instructions and data to memory addresses canhappen at three different stages• Compile time: If memory location known a priori, absolute codecan be generated; must recompile code if starting locationchanges• Load time: Must generate relocatable code if memory location isnot known at compile time• Execution time: Binding delayed until run time if the process canbe moved during its execution from one memory segment toanother Need hardware support for address maps (e.g., base and limitregisters)

9.10 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionLogical vs. Physical Address Space The concept of a logical address space that is bound to a separatephysical address space is central to proper memory management• Logical address – generated by the CPU; also referred to asvirtual address• Physical address – address seen by the memory unit Logical and physical addresses are the same in compile-time and load-time address-binding schemes; logical (virtual) and physical addressesdiffer in execution-time address-binding scheme Logical address space is the set of all logical addresses generatedby a program Physical address space is the set of all physical addresses generatedby a program

9.11 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionMemory-Management Unit (MMU) Hardware device that at run time maps virtual to physical address Many methods possible, covered in the rest of this chapter

9.12 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionMemory-Management Unit (Cont.) Consider simple scheme. which is a generalization of the base-register scheme. The base register now called relocation register The value in the relocation register is added to every addressgenerated by a user process at the time it is sent to memory The user program deals with logical addresses; it never sees the realphysical addresses• Execution-time binding occurs when reference is made to locationin memory• Logical address bound to physical addresses

9.13 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionMemory-Management Unit (Cont.) Consider simple scheme. which is a generalization of the base-register scheme. The base register now called relocation register The value in the relocation register is added to every addressgenerated by a user process at the time it is sent to memory

9.14 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionDynamic Loading The entire program does need to be in memory to execute Routine is not loaded until it is called Better memory-space utilization; unused routine is never loaded All routines kept on disk in relocatable load format Useful when large amounts of code are needed to handle infrequentlyoccurring cases No special support from the operating system is required• Implemented through program design• OS can help by providing libraries to implement dynamicloading

9.15 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionDynamic Linking Static linking – system libraries and program code combined by theloader into the binary program image Dynamic linking –linking postponed until execution time Small piece of code, stub, used to locate the appropriate memory-resident library routine Stub replaces itself with the address of the routine, and executes theroutine Operating system checks if routine is in processes’ memory address• If not in address space, add to address space Dynamic linking is particularly useful for libraries System also known as shared libraries Consider applicability to patching system libraries• Versioning may be needed

9.16 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionContiguous Allocation Main memory must support both OS and user processes Limited resource, must allocate efficiently Contiguous allocation is one early method Main memory usually into two partitions:• Resident operating system, usually held in low memory withinterrupt vector• User processes then held in high memory• Each process contained in single contiguous section of memory

9.17 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionContiguous Allocation (Cont.) Relocation registers used to protect user processes from each other,and from changing operating-system code and data• Base register contains value of smallest physical address• Limit register contains range of logical addresses – each logicaladdress must be less than the limit register• MMU maps logical address dynamically• Can then allow actions such as kernel code being transient andkernel changing size

9.19 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionVariable Partition Multiple-partition allocation• Degree of multiprogramming limited by number of partitions• Variable-partition sizes for efficiency (sized to a given process’ needs)• Hole – block of available memory; holes of various size are scatteredthroughout memory• When a process arrives, it is allocated memory from a hole large enough toaccommodate it• Process exiting frees its partition, adjacent free partitions combined• Operating system maintains information about:a) allocated partitions b) free partitions (hole)

9.20 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionDynamic Storage-Allocation Problem First-fit: Allocate the first hole that is big enough Best-fit: Allocate the smallest hole that is big enough; mustsearch entire list, unless ordered by size• Produces the smallest leftover hole Worst-fit: Allocate the largest hole; must also search entire list• Produces the largest leftover holeHow to satisfy a request of size n from a list of free holes?First-fit and best-fit better than worst-fit in terms of speed and storageutilization

9.21 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionFragmentation External Fragmentation – total memory space exists to satisfy arequest, but it is not contiguous Internal Fragmentation – allocated memory may be slightly largerthan requested memory; this size difference is memory internal to apartition, but not being used First fit analysis reveals that given N blocks allocated, 0.5 N blocks lostto fragmentation• 1/3 may be unusable -> 50-percent rule

9.22 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionFragmentation (Cont.) Reduce external fragmentation by compaction• Shuffle memory contents to place all free memory together in onelarge block• Compaction is possible only if relocation is dynamic, and is doneat execution time• I/O problem Latch job in memory while it is involved in I/O Do I/O only into OS buffers Now consider that backing store has same fragmentation problems

9.23 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionPaging Physical address space of a process can be noncontiguous;process is allocated physical memory whenever the latter is available• Avoids external fragmentation• Avoids problem of varying sized memory chunks Divide physical memory into fixed-sized blocks called frames• Size is power of 2, between 512 bytes and 16 Mbytes Divide logical memory into blocks of same size called pages Keep track of all free frames To run a program of size N pages, need to find N free frames andload program Set up a page table to translate logical to physical addresses Backing store likewise split into pages Still have Internal fragmentation

9.24 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionAddress Translation Scheme Address generated by CPU is divided into:• Page number (p) – used as an index into a page table whichcontains base address of each page in physical memory• Page offset (d) – combined with base address to define thephysical memory address that is sent to the memory unit• For given logical address space 2mand page size 2npage number page offsetp dm -n n

9.27 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionPaging Example Logical address: n = 2 and m = 4. Using a page size of 4 bytes and aphysical memory of 32 bytes (8 pages)

9.28 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionPaging -- Calculating internal fragmentation Page size = 2,048 bytes Process size = 72,766 bytes 35 pages + 1,086 bytes Internal fragmentation of 2,048 - 1,086 = 962 bytes Worst case fragmentation = 1 frame – 1 byte On average fragmentation = 1 / 2 frame size So small frame sizes desirable? But each page table entry takes memory to track Page sizes growing over time• Solaris supports two page sizes – 8 KB and 4 MB

9.30 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionImplementation of Page Table Page table is kept in main memory• Page-table base register (PTBR) points to the page table• Page-table length register (PTLR) indicates size of the pagetable In this scheme every data/instruction access requires two memoryaccesses• One for the page table and one for the data / instruction The two-memory access problem can be solved by the use of a specialfast-lookup hardware cache called translation look-aside buffers(TLBs) (also called associative memory).

9.31 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionTranslation Look-Aside Buffer Some TLBs store address-space identifiers (ASIDs) in eachTLB entry – uniquely identifies each process to provide address-space protection for that process• Otherwise need to flush at every context switch TLBs typically small (64 to 1,024 entries) On a TLB miss, value is loaded into the TLB for faster accessnext time• Replacement policies must be considered• Some entries can be wired down for permanent fast access

9.32 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionHardware Associative memory – parallel search Address translation (p, d)• If p is in associative register, get frame # out• Otherwise get frame # from page table in memoryP age # F rame #

9.34 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionEffective Access Time Hit ratio – percentage of times that a page number is found in the TLB An 80% hit ratio means that we find the desired page number in theTLB 80% of the time. Suppose that 10 nanoseconds to access memory.• If we find the desired page in TLB then a mapped-memory accesstake 10 ns• Otherwise we need two memory access so it is 20 ns Effective Access Time (EAT)EAT = 0.80 x 10 + 0.20 x 20 = 12 nanosecondsimplying 20% slowdown in access time Consider amore realistic hit ratio of 99%,EAT = 0.99 x 10 + 0.01 x 20 = 10.1nsimplying only 1% slowdown in access time.

9.35 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionMemory Protection Memory protection implemented by associating protection bit witheach frame to indicate if read-only or read-write access is allowed• Can also add more bits to indicate page execute-only, and so on Valid-invalid bit attached to each entry in the page table:• “valid” indicates that the associated page is in the process’ logicaladdress space, and is thus a legal page• “invalid” indicates that the page is not in the process’ logicaladdress space• Or use page-table length register (PTLR) Any violations result in a trap to the kernel

9.37 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionShared Pages Shared code• One copy of read-only (reentrant) code shared among processes(i.e., text editors, compilers, window systems)• Similar to multiple threads sharing the same process space• Also useful for interprocess communication if sharing of read-writepages is allowed Private code and data• Each process keeps a separate copy of the code and data• The pages for the private code and data can appear anywhere inthe logical address space

9.39 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionSwapping A process can be swapped temporarily out of memory to a backingstore, and then brought back into memory for continued execution• Total physical memory space of processes can exceed physicalmemory Backing store – fast disk large enough to accommodate copies of allmemory images for all users; must provide direct access to thesememory images Roll out, roll in – swapping variant used for priority-based schedulingalgorithms; lower-priority process is swapped out so higher-priorityprocess can be loaded and executed Major part of swap time is transfer time; total transfer time is directlyproportional to the amount of memory swapped System maintains a ready queue of ready-to-run processes whichhave memory images on disk

9.40 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionSwapping (Cont.) Does the swapped out process need to swap back in to same physicaladdresses? Depends on address binding method• Plus consider pending I/O to / from process memory space Modified versions of swapping are found on many systems (i.e., UNIX,Linux, and Windows)• Swapping normally disabled• Started if more than threshold amount of memory allocated• Disabled again once memory demand reduced below threshold

9.42 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionContext Switch Time including Swapping If next processes to be put on CPU is not in memory, need to swap outa process and swap in target process Context switch time can then be very high 100MB process swapping to hard disk with transfer rate of 50MB/sec• Swap out time of 2000 ms• Plus swap in of same sized process• Total context switch swapping component time of 4000ms (4seconds) Can reduce if reduce size of memory swapped – by knowing howmuch memory really being used• System calls to inform OS of memory use viarequest_memory() and release_memory()

9.43 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionContext Switch Time and Swapping (Cont.) Other constraints as well on swapping• Pending I/O – can’t swap out as I/O would occur to wrong process• Or always transfer I/O to kernel space, then to I/O device Known as double buffering, adds overhead Standard swapping not used in modern operating systems• But modified version common Swap only when free memory extremely low

9.44 Silberschatz, Galvin and Gagne ©2018Operating System Concepts – 10thEditionSwapping on Mobile Systems Not typically supported• Flash memory based Small amount of space Limited number of write cycles Poor throughput between flash memory and CPU on mobileplatform Instead use other methods to free memory if low• iOS asks apps to voluntarily relinquish allocated memory Read-only data thrown out and reloaded from flash if needed Failure to free can result in termination• Android terminates apps if low free memory, but first writesapplication state to flash for fast restart• Both OSes support paging as discussed below

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