VkAccessFlagBits2(3)
C Specification
Bits whichcan be set in thesrcAccessMask anddstAccessMaskmembers ofVkMemoryBarrier2KHR,VkImageMemoryBarrier2KHR, andVkBufferMemoryBarrier2KHR, specifying access behavior, are:
// Provided by VK_VERSION_1_3// Flag bits for VkAccessFlagBits2typedef VkFlags64 VkAccessFlagBits2;static const VkAccessFlagBits2 VK_ACCESS_2_NONE = 0ULL;static const VkAccessFlagBits2 VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT = 0x00000001ULL;static const VkAccessFlagBits2 VK_ACCESS_2_INDEX_READ_BIT = 0x00000002ULL;static const VkAccessFlagBits2 VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT = 0x00000004ULL;static const VkAccessFlagBits2 VK_ACCESS_2_UNIFORM_READ_BIT = 0x00000008ULL;static const VkAccessFlagBits2 VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT = 0x00000010ULL;static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_READ_BIT = 0x00000020ULL;static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_WRITE_BIT = 0x00000040ULL;static const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT = 0x00000080ULL;static const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT = 0x00000100ULL;static const VkAccessFlagBits2 VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT = 0x00000200ULL;static const VkAccessFlagBits2 VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT = 0x00000400ULL;static const VkAccessFlagBits2 VK_ACCESS_2_TRANSFER_READ_BIT = 0x00000800ULL;static const VkAccessFlagBits2 VK_ACCESS_2_TRANSFER_WRITE_BIT = 0x00001000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_HOST_READ_BIT = 0x00002000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_HOST_WRITE_BIT = 0x00004000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_READ_BIT = 0x00008000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_WRITE_BIT = 0x00010000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_SAMPLED_READ_BIT = 0x100000000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_STORAGE_READ_BIT = 0x200000000ULL;static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT = 0x400000000ULL;// Provided by VK_KHR_video_decode_queuestatic const VkAccessFlagBits2 VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR = 0x800000000ULL;// Provided by VK_KHR_video_decode_queuestatic const VkAccessFlagBits2 VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR = 0x1000000000ULL;// Provided by VK_EXT_descriptor_heapstatic const VkAccessFlagBits2 VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT = 0x200000000000000ULL;// Provided by VK_EXT_descriptor_heapstatic const VkAccessFlagBits2 VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT = 0x400000000000000ULL;// Provided by VK_KHR_video_encode_queuestatic const VkAccessFlagBits2 VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR = 0x2000000000ULL;// Provided by VK_KHR_video_encode_queuestatic const VkAccessFlagBits2 VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR = 0x4000000000ULL;// Provided by VK_QCOM_tile_shadingstatic const VkAccessFlagBits2 VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM = 0x8000000000000ULL;// Provided by VK_QCOM_tile_shadingstatic const VkAccessFlagBits2 VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM = 0x10000000000000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_NONE_KHR = 0ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT_KHR = 0x00000001ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_INDEX_READ_BIT_KHR = 0x00000002ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT_KHR = 0x00000004ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_UNIFORM_READ_BIT_KHR = 0x00000008ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT_KHR = 0x00000010ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_READ_BIT_KHR = 0x00000020ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_WRITE_BIT_KHR = 0x00000040ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT_KHR = 0x00000080ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT_KHR = 0x00000100ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT_KHR = 0x00000200ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT_KHR = 0x00000400ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_TRANSFER_READ_BIT_KHR = 0x00000800ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_TRANSFER_WRITE_BIT_KHR = 0x00001000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_HOST_READ_BIT_KHR = 0x00002000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_HOST_WRITE_BIT_KHR = 0x00004000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_READ_BIT_KHR = 0x00008000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_WRITE_BIT_KHR = 0x00010000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_SAMPLED_READ_BIT_KHR = 0x100000000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_STORAGE_READ_BIT_KHR = 0x200000000ULL;// Provided by VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT_KHR = 0x400000000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_transform_feedbackstatic const VkAccessFlagBits2 VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT = 0x02000000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_transform_feedbackstatic const VkAccessFlagBits2 VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT = 0x04000000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_transform_feedbackstatic const VkAccessFlagBits2 VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT = 0x08000000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_conditional_renderingstatic const VkAccessFlagBits2 VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT = 0x00100000ULL;// Provided by VK_KHR_synchronization2 with VK_NV_device_generated_commandsstatic const VkAccessFlagBits2 VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV = 0x00020000ULL;// Provided by VK_KHR_synchronization2 with VK_NV_device_generated_commandsstatic const VkAccessFlagBits2 VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV = 0x00040000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_device_generated_commandsstatic const VkAccessFlagBits2 VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_EXT = 0x00020000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_device_generated_commandsstatic const VkAccessFlagBits2 VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_EXT = 0x00040000ULL;// Provided by VK_KHR_fragment_shading_rate with VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT_KHR = 0x00800000ULL;// Provided by VK_KHR_synchronization2 with VK_NV_shading_rate_imagestatic const VkAccessFlagBits2 VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV = 0x00800000ULL;// Provided by VK_KHR_acceleration_structure with VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR = 0x00200000ULL;// Provided by VK_KHR_acceleration_structure with VK_KHR_synchronization2static const VkAccessFlagBits2 VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR = 0x00400000ULL;// Provided by VK_KHR_synchronization2 with VK_NV_ray_tracingstatic const VkAccessFlagBits2 VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_NV = 0x00200000ULL;// Provided by VK_KHR_synchronization2 with VK_NV_ray_tracingstatic const VkAccessFlagBits2 VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_NV = 0x00400000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_fragment_density_mapstatic const VkAccessFlagBits2 VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT = 0x01000000ULL;// Provided by VK_KHR_synchronization2 with VK_EXT_blend_operation_advancedstatic const VkAccessFlagBits2 VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT = 0x00080000ULL;// Provided by VK_EXT_descriptor_bufferstatic const VkAccessFlagBits2 VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT = 0x20000000000ULL;// Provided by VK_HUAWEI_invocation_maskstatic const VkAccessFlagBits2 VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI = 0x8000000000ULL;// Provided by VK_KHR_ray_tracing_maintenance1 with (VK_KHR_synchronization2 or VK_VERSION_1_3) and VK_KHR_ray_tracing_pipelinestatic const VkAccessFlagBits2 VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR = 0x10000000000ULL;// Provided by VK_EXT_opacity_micromapstatic const VkAccessFlagBits2 VK_ACCESS_2_MICROMAP_READ_BIT_EXT = 0x100000000000ULL;// Provided by VK_EXT_opacity_micromapstatic const VkAccessFlagBits2 VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT = 0x200000000000ULL;// Provided by VK_NV_optical_flowstatic const VkAccessFlagBits2 VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV = 0x40000000000ULL;// Provided by VK_NV_optical_flowstatic const VkAccessFlagBits2 VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV = 0x80000000000ULL;// Provided by VK_ARM_data_graphstatic const VkAccessFlagBits2 VK_ACCESS_2_DATA_GRAPH_READ_BIT_ARM = 0x800000000000ULL;// Provided by VK_ARM_data_graphstatic const VkAccessFlagBits2 VK_ACCESS_2_DATA_GRAPH_WRITE_BIT_ARM = 0x1000000000000ULL;// Provided by VK_EXT_memory_decompressionstatic const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT = 0x80000000000000ULL;// Provided by VK_EXT_memory_decompressionstatic const VkAccessFlagBits2 VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT = 0x100000000000000ULL;// Provided by VK_KHR_synchronization2// Equivalent to VkAccessFlagBits2typedef VkAccessFlagBits2 VkAccessFlagBits2KHR;Description
VK_ACCESS_2_NONE specifies no accesses.
VK_ACCESS_2_MEMORY_READ_BIT specifies all read accesses.It is always valid in any access mask, and is treated as equivalent tosetting all
READaccess flags that are valid where it is used.VK_ACCESS_2_MEMORY_WRITE_BIT specifies all write accesses.It is always valid in any access mask, and is treated as equivalent tosetting all
WRITEaccess flags that are valid where it is used.VK_ACCESS_2_INDIRECT_COMMAND_READ_BIT specifies read access to command data read from indirect buffers as part of an indirectbuild,trace, drawing or dispatch command. Such access occurs in theVK_PIPELINE_STAGE_2_DRAW_INDIRECT_BIT pipeline stage. It also specifies read access to command data read from indirect buffers as part of a copy command with access occurring in theVK_PIPELINE_STAGE_2_COPY_INDIRECT_BIT_KHR pipeline stage.
VK_ACCESS_2_INDEX_READ_BIT specifies read access to an index buffer as part of an indexed drawing command, bound byvkCmdBindIndexBuffer2 andvkCmdBindIndexBuffer. Such access occurs in theVK_PIPELINE_STAGE_2_INDEX_INPUT_BIT pipeline stage.
VK_ACCESS_2_VERTEX_ATTRIBUTE_READ_BIT specifies read access to avertex buffer as part of a drawing command, bound byvkCmdBindVertexBuffers.Such access occurs in theVK_PIPELINE_STAGE_2_VERTEX_ATTRIBUTE_INPUT_BIT pipeline stage.
VK_ACCESS_2_UNIFORM_READ_BIT specifies read access to auniform buffer in any shader pipelinestage.
VK_ACCESS_2_INPUT_ATTACHMENT_READ_BIT specifies read access to aninput attachment within a render pass duringsubpass shading orfragment shading.Such access occurs in theVK_PIPELINE_STAGE_2_SUBPASS_SHADER_BIT_HUAWEI orVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT pipeline stage.
VK_ACCESS_2_SHADER_SAMPLED_READ_BIT specifies read access to auniform texel buffer orsampled image in any shader pipelinestage.
VK_ACCESS_2_SHADER_STORAGE_READ_BIT specifies read access to astorage buffer,physical storage buffer,storage texel buffer, orstorage image in any shader pipelinestage.
VK_ACCESS_2_SHADER_BINDING_TABLE_READ_BIT_KHR specifies readaccess to ashader binding table in any shaderpipeline stage.
VK_ACCESS_2_SHADER_READ_BITis equivalent to the logical OR of:
VK_ACCESS_2_SHADER_STORAGE_WRITE_BIT specifies write access to astorage buffer,physical storage buffer,storage texel buffer, orstorage image in any shader pipelinestage.
VK_ACCESS_2_SHADER_WRITE_BIT is equivalent toVK_ACCESS_2_SHADER_STORAGE_WRITE_BIT.
VK_ACCESS_2_COLOR_ATTACHMENT_READ_BIT specifies read access to acolor attachment, such as viablending (other thanadvanced blend operations),logic operations or certainrender pass load operations in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT pipeline stage orviafragment shader tile image readsin theVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT pipeline stage.
VK_ACCESS_2_COLOR_ATTACHMENT_WRITE_BIT specifies write access to acolor attachment during arender pass orvia certain render passload,store, andmultisample resolve operations.This includesmultisample resolveoperations for depth/stencil resolve attachments.Such access occurs in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT pipeline stage.
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_READ_BIT specifies readaccess to adepth/stencil attachment, viadepth or stencil operations or certainrender pass load operations in theVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT orVK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT pipeline stages or viafragment shader tile image reads intheVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BIT pipeline stage.
VK_ACCESS_2_DEPTH_STENCIL_ATTACHMENT_WRITE_BIT specifies writeaccess to adepth/stencil attachment, viadepth or stencil operations or certain render passload and store operations.Such access occurs in theVK_PIPELINE_STAGE_2_EARLY_FRAGMENT_TESTS_BIT orVK_PIPELINE_STAGE_2_LATE_FRAGMENT_TESTS_BIT pipeline stages.
VK_ACCESS_2_TRANSFER_READ_BIT specifies read access to an image orbuffer in acopy operation.Such access occurs in theVK_PIPELINE_STAGE_2_COPY_BIT,VK_PIPELINE_STAGE_2_BLIT_BIT, orVK_PIPELINE_STAGE_2_RESOLVE_BIT pipeline stages.
VK_ACCESS_2_TRANSFER_WRITE_BIT specifies write access to an imageor buffer in aclear orcopy operation.Such access occurs in theVK_PIPELINE_STAGE_2_COPY_BIT,VK_PIPELINE_STAGE_2_BLIT_BIT,VK_PIPELINE_STAGE_2_CLEAR_BIT,orVK_PIPELINE_STAGE_2_RESOLVE_BIT pipeline stages.
VK_ACCESS_2_HOST_READ_BIT specifies read access by a hostoperation.Accesses of this type are not performed through a resource, but directlyon memory.Such access occurs in theVK_PIPELINE_STAGE_2_HOST_BIT pipelinestage.
VK_ACCESS_2_HOST_WRITE_BIT specifies write access by a hostoperation.Accesses of this type are not performed through a resource, but directlyon memory.Such access occurs in theVK_PIPELINE_STAGE_2_HOST_BIT pipelinestage.
VK_ACCESS_2_CONDITIONAL_RENDERING_READ_BIT_EXT specifies readaccess to a predicate as part of conditional rendering.Such access occurs in theVK_PIPELINE_STAGE_2_CONDITIONAL_RENDERING_BIT_EXT pipeline stage.
VK_ACCESS_2_TRANSFORM_FEEDBACK_WRITE_BIT_EXT specifies writeaccess to a transform feedback buffer made when transform feedback isactive.Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT pipeline stage.
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_READ_BIT_EXT specifies readaccess to a transform feedback counter buffer which is read whenvkCmdBeginTransformFeedbackEXT executes.Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT pipeline stage.
VK_ACCESS_2_TRANSFORM_FEEDBACK_COUNTER_WRITE_BIT_EXT specifieswrite access to a transform feedback counter buffer which is writtenwhenvkCmdEndTransformFeedbackEXT executes.Such access occurs in theVK_PIPELINE_STAGE_2_TRANSFORM_FEEDBACK_BIT_EXT pipeline stage.
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_NV specifies reads frombuffer inputs tovkCmdPreprocessGeneratedCommandsNV.Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV pipeline stage.
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_NV specifies writes tothe target command buffer preprocess outputs.Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_NV pipeline stage.
VK_ACCESS_2_COMMAND_PREPROCESS_READ_BIT_EXT specifies reads frombuffer inputs tovkCmdPreprocessGeneratedCommandsEXT.Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_EXT pipeline stage.
VK_ACCESS_2_COMMAND_PREPROCESS_WRITE_BIT_EXT specifies writes tothe target command buffer preprocess outputs.Such access occurs in theVK_PIPELINE_STAGE_2_COMMAND_PREPROCESS_BIT_EXT pipeline stage.
VK_ACCESS_2_MEMORY_DECOMPRESSION_READ_BIT_EXT specifies readaccess to memory in decompression commandsvkCmdDecompressMemoryEXT andvkCmdDecompressMemoryIndirectCountEXT.Such access occurs inVK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT pipeline stage.
VK_ACCESS_2_MEMORY_DECOMPRESSION_WRITE_BIT_EXT specifies writeaccess to memory in decompression commandsvkCmdDecompressMemoryEXT andvkCmdDecompressMemoryIndirectCountEXT.Such access occurs inVK_PIPELINE_STAGE_2_MEMORY_DECOMPRESSION_BIT_EXT pipeline stage.
VK_ACCESS_2_COLOR_ATTACHMENT_READ_NONCOHERENT_BIT_EXT specifiesread access tocolor attachments, includingadvanced blend operations.Such access occurs in theVK_PIPELINE_STAGE_2_COLOR_ATTACHMENT_OUTPUT_BIT pipeline stage.
VK_ACCESS_2_INVOCATION_MASK_READ_BIT_HUAWEI specifies read accessto an invocation mask image in theVK_PIPELINE_STAGE_2_INVOCATION_MASK_BIT_HUAWEI pipeline stage.
VK_ACCESS_2_ACCELERATION_STRUCTURE_READ_BIT_KHR specifies readaccess to an acceleration structure as part of a trace, build, or copycommand, or to anacceleration structure scratch buffer as part of a build command.Such access occurs in theVK_PIPELINE_STAGE_2_RAY_TRACING_SHADER_BIT_KHR pipeline stage orVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR pipelinestage.
VK_ACCESS_2_ACCELERATION_STRUCTURE_WRITE_BIT_KHR specifies writeaccess to an acceleration structure or acceleration structure scratch buffer as part of a build or copycommand.Such access occurs in theVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR pipelinestage.
VK_ACCESS_2_FRAGMENT_DENSITY_MAP_READ_BIT_EXT specifies readaccess to afragment density map attachment during dynamicfragment density map operations.Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_DENSITY_PROCESS_BIT_EXT pipelinestage.
VK_ACCESS_2_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT_KHRspecifies read access to a fragment shading rate attachment duringrasterization.Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADING_RATE_ATTACHMENT_BIT_KHRpipeline stage.
VK_ACCESS_2_SHADING_RATE_IMAGE_READ_BIT_NV specifies read accessto a shading rate image during rasterization.Such access occurs in theVK_PIPELINE_STAGE_2_SHADING_RATE_IMAGE_BIT_NV pipeline stage.It is equivalent toVK_ACCESS_2_FRAGMENT_SHADING_RATE_ATTACHMENT_READ_BIT_KHR.
VK_ACCESS_2_VIDEO_DECODE_READ_BIT_KHR specifies read access to animage or buffer resource in avideo decode operation.Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHRpipeline stage.
VK_ACCESS_2_VIDEO_DECODE_WRITE_BIT_KHR specifies write access toan image or buffer resource in avideo decode operation.Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_DECODE_BIT_KHRpipeline stage.
VK_ACCESS_2_VIDEO_ENCODE_READ_BIT_KHR specifies read access to animage or buffer resource in avideo encode operation.Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHRpipeline stage.
VK_ACCESS_2_VIDEO_ENCODE_WRITE_BIT_KHR specifies write access toan image or buffer resource in avideo encode operation.Such access occurs in theVK_PIPELINE_STAGE_2_VIDEO_ENCODE_BIT_KHRpipeline stage.
VK_ACCESS_2_DESCRIPTOR_BUFFER_READ_BIT_EXT specifies read accessto adescriptor buffer in any shader pipelinestage.
VK_ACCESS_2_OPTICAL_FLOW_READ_BIT_NV specifies read access to animage or buffer resource as part of aoptical flow operation.Such access occurs in theVK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NVpipeline stage.
VK_ACCESS_2_OPTICAL_FLOW_WRITE_BIT_NV specifies write access to animage or buffer resource as part of aoptical flow operation.Such access occurs in theVK_PIPELINE_STAGE_2_OPTICAL_FLOW_BIT_NVpipeline stage.
VK_ACCESS_2_MICROMAP_WRITE_BIT_EXT specifies write access to amicromap object.Such access occurs in theVK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT pipeline stage.
VK_ACCESS_2_MICROMAP_READ_BIT_EXT specifies read access to amicromap object.Such access occurs in theVK_PIPELINE_STAGE_2_MICROMAP_BUILD_BIT_EXT andVK_PIPELINE_STAGE_2_ACCELERATION_STRUCTURE_BUILD_BIT_KHR pipelinestages.
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_READ_BIT_QCOM specifies readaccess to atile attachment.Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BITorVK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT pipeline stages.
VK_ACCESS_2_SHADER_TILE_ATTACHMENT_WRITE_BIT_QCOM specifies writeaccess to atile attachment.Such access occurs in theVK_PIPELINE_STAGE_2_FRAGMENT_SHADER_BITorVK_PIPELINE_STAGE_2_COMPUTE_SHADER_BIT pipeline stages.
VK_ACCESS_2_DATA_GRAPH_READ_BIT_ARM specifies read access toresources in theVK_PIPELINE_STAGE_2_DATA_GRAPH_BIT_ARM pipelinestage.
VK_ACCESS_2_DATA_GRAPH_WRITE_BIT_ARM specifies write access toresources in theVK_PIPELINE_STAGE_2_DATA_GRAPH_BIT_ARM pipelinestage.
VK_ACCESS_2_SAMPLER_HEAP_READ_BIT_EXT specifies read access to asampler heap in any shader pipeline stage.
VK_ACCESS_2_RESOURCE_HEAP_READ_BIT_EXT specifies read access to aresource heap in any shader pipeline stage.
In situations where an application wishes to select all access types for agiven set of pipeline stages,VK_ACCESS_2_MEMORY_READ_BIT orVK_ACCESS_2_MEMORY_WRITE_BIT can be used.This is particularly useful when specifying stages that only have a singleaccess type. |
The |
Document Notes
For more information, see theVulkan Specification.
This page is extracted from the Vulkan Specification.Fixes and changes should be made to the Specification, not directly.