Software emulation of deprecated SWP instruction (CONFIG_SWP_EMULATE)

ARMv6 architecture deprecates use of the SWP/SWPB instructions, and recommedsmoving to the load-locked/store-conditional instructions LDREX and STREX.

ARMv7 multiprocessing extensions introduce the ability to disable theseinstructions, triggering an undefined instruction exception when executed.Trapped instructions are emulated using an LDREX/STREX or LDREXB/STREXBsequence. If a memory access fault (an abort) occurs, a segmentation fault issignalled to the triggering process.

/proc/cpu/swp_emulation holds some statistics/information, including the PID ofthe last process to trigger the emulation to be invocated. For example:

Emulated SWP:         12Emulated SWPB:                0Aborted SWP{B}:               1Last process:         314
NOTE:
when accessing uncached shared regions, LDREX/STREX rely on an externaltransaction monitoring block called a global monitor to maintain updateatomicity. If your system does not implement a global monitor, this option cancause programs that perform SWP operations to uncached memory to deadlock, asthe STREX operation will always fail.