Amiga Buddha and Catweasel IDE Driver¶

The Amiga Buddha and Catweasel IDE Driver (part of ide.c) was written byGeert Uytterhoeven based on the following specifications:

Register map of the Buddha IDE controller and theBuddha-part of the Catweasel Zorro-II version

The Autoconfiguration has been implemented just as Commodoredescribed in their manuals, no tricks have been used (forexample leaving some address lines out of the equations…).If you want to configure the board yourself (for example leta Linux kernel configure the card), look at the CommodoreDocs. Reading the nibbles should give this information:

Vendor number: 4626 ($1212)product number: 0 (42 for Catweasel Z-II)Serial number: 0Rom-vector: $1000

The card should be a Z-II board, size 64K, not for freememlist, Rom-Vektor is valid, no second Autoconfig-board on thesame card, no space preference, supports “Shutup_forever”.

Setting the base address should be done in two steps, justas the Amiga Kickstart does: The lower nibble of the 8-Bitaddress is written to $4a, then the whole Byte is written to$48, while it doesn’t matter how often you’re writing to $4aas long as $48 is not touched. After $48 has been written,the whole card disappears from $e8 and is mapped to the newaddress just written. Make sure $4a is written before $48,otherwise your chance is only 1:16 to find the board :-).

The local memory-map is even active when mapped to $e8:

The IDE ports issue an INT2. You can read the level of theIRQ-lines of the IDE-ports by reading from the three (twofor Buddha-only) registers $f00, $f40 and $f80. This waymore than one I/O request can be handled and you can easilydetermine what driver has to serve the INT2. Buddha andCatweasel expansion boards can issue an INT6. A separatememory map is available for the I/O module and the sysop’sI/O module.

The IDE ports are fed by the address lines A2 to A4, just asthe Amiga 1200 and Amiga 4000 IDE ports are. This wayexisting drivers can be easily ported to Buddha. A move.lpolls two words out of the same address of IDE port sinceevery word is mirrored once. movem is not possible, butit’s not necessary either, because you can only speedup68000 systems with this technique. A 68020 system withfastmem is faster with move.l.

If you’re using the mirrored registers of the IDE-ports withA6=1, the Buddha doesn’t care about the speed that you haveselected in the speed register (see further down). WithA6=1 (for example $840 for port 0, register set 0), a 780nsaccess is being made. These registers should be used for acommand access to the harddisk/CD-Rom, since commandaccesses are Byte-wide and have to be made slower accordingto the ATA-X3T9 manual.

Now for the speed-register: The register is byte-wide, andonly the upper three bits are used (Bits 7 to 5). Bit 4must always be set to 1 to be compatible with later Buddhaversions (if I’ll ever update this one). I presume thatI’ll never use the lower four bits, but they have to be setto 1 by definition.

The values in this table have to be shifted 5 bits to theleft and or’d with $1f (this sets the lower 5 bits).

All the timings have in common: Select and IOR/IOW rise atthe same time. IOR and IOW have a propagation delay ofabout 30ns to the clocks on the Zorro bus, that’s why thevalues are no multiple of 71. One clock-cycle is 71ns long(exactly 70,5 at 14,18 Mhz on PAL systems).

value 0 (Default after reset)

497ns Select (7 clock cycles) , IOR/IOW after 172ns (2 clock cycles)(same timing as the Amiga 1200 does on it’s IDE port withoutaccelerator card)

value 1

639ns Select (9 clock cycles), IOR/IOW after 243ns (3 clock cycles)

value 2

781ns Select (11 clock cycles), IOR/IOW after 314ns (4 clock cycles)

value 3

355ns Select (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)

value 4

355ns Select (5 clock cycles), IOR/IOW after 172ns (2 clock cycles)

value 5

355ns Select (5 clock cycles), IOR/IOW after 243ns (3 clock cycles)

value 6

1065ns Select (15 clock cycles), IOR/IOW after 314ns (4 clock cycles)

value 7

355ns Select, (5 clock cycles), IOR/IOW after 101ns (1 clock cycle)

When accessing IDE registers with A6=1 (for example $84x),the timing will always be mode 0 8-bit compatible, no matterwhat you have selected in the speed register:

781ns select, IOR/IOW after 4 clock cycles (=314ns) aktive.

All the timings with a very short select-signal (the 355nsfast accesses) depend on the accelerator card used in thesystem: Sometimes two more clock cycles are inserted by thebus interface, making the whole access 497ns long. Thisdoesn’t affect the reliability of the controller nor theperformance of the card, since this doesn’t happen veryoften.

All the timings are calculated and only confirmed bymeasurements that allowed me to count the clock cycles. Ifthe system is clocked by an oscillator other than 28,37516Mhz (for example the NTSC-frequency 28,63636 Mhz), eachclock cycle is shortened to a bit less than 70ns (not worthmentioning). You could think of a small performance boostby overclocking the system, but you would either need amultisync monitor, or a graphics card, and your internaldiskdrive would go crazy, that’s why you shouldn’t tune yourAmiga this way.

Giving you the possibility to write software that iscompatible with both the Buddha and the Catweasel Z-II, TheBuddha acts just like a Catweasel Z-II with no deviceconnected to the third IDE-port. The IRQ-register $f80always shows a “no IRQ here” on the Buddha, and accesses tothe third IDE port are going into data’s Nirwana on theBuddha.

Jens Schönfeld february 19th, 1997

updated may 27th, 1997

eMail:sysop@nostlgic.tng.oche.de