Adaptec Aic7xxx Fast -> Ultra160 Family Manager Set v7.0

README for The Linux Operating System

The following information is available in this file:

  1. Supported Hardware
  2. Version History
  3. Command Line Options
  4. Contacting Adaptec

1. Supported Hardware

The following Adaptec SCSI Chips and Host Adapters are supported bythe aic7xxx driver.

ChipMIPSHost BusMaxSyncMaxWidthSCBsNotes
aic777010EISA/VL10MHz16Bit41
aic785010PCI/3210MHz8Bit3 
aic785510PCI/3210MHz8Bit3 
aic785610PCI/3210MHz8Bit3 
aic785910PCI/3220MHz8Bit3 
aic786010PCI/3220MHz8Bit3 
aic787010PCI/3210MHz16Bit16 
aic788010PCI/3220MHz16Bit16 
aic789020PCI/3240MHz16Bit163 4 5 6 7 8
aic789120PCI/6440MHz16Bit163 4 5 6 7 8
aic789220PCI/64-6680MHz16Bit163 4 5 6 7 8
aic789515PCI/3220MHz16Bit162 3 4 5
aic7895C15PCI/3220MHz16Bit162 3 4 5 8
aic789620PCI/3240MHz16Bit162 3 4 5 6 7 8
aic789720PCI/6440MHz16Bit162 3 4 5 6 7 8
aic789920PCI/64-6680MHz16Bit162 3 4 5 6 7 8
  1. Multiplexed Twin Channel Device - One controller servicing twobusses.
  2. Multi-function Twin Channel Device - Two controllers on one chip.
  3. Command Channel Secondary DMA Engine - Allows scatter gather listand SCB prefetch.
  4. 64 Byte SCB Support - Allows disconnected, untagged request tablefor all possible target/lun combinations.
  5. Block Move Instruction Support - Doubles the speed of certainsequencer operations.
  6. ‘Bayonet’ style Scatter Gather Engine - Improves S/G prefetchperformance.
  7. Queuing Registers - Allows queuing of new transactions withoutpausing the sequencer.
  8. Multiple Target IDs - Allows the controller to respond to selectionas a target on multiple SCSI IDs.
ControllerChipHost-BusInt-ConnectorsExt-ConnectorsNotes
AHA-274X[A]aic7770EISASE-50MSE-HD50F 
AHA-274X[A]Waic7770EISASE-HD68FSE-50MSE-HD68F 
AHA-274X[A]Taic7770EISA2 X SE-50MSE-HD50F 
AHA-2842aic7770VLSE-50MSE-HD50F 
AHA-2940AUaic7860PCI/32SE-50MSE-HD50F 
AVA-2902Iaic7860PCI/32SE-50M  
AVA-2902Eaic7860PCI/32SE-50M  
AVA-2906aic7856PCI/32SE-50MSE-DB25F 
APC-7850aic7850PCI/32SE-50M 1
AVA-2940aic7860PCI/32SE-50M  
AHA-2920Baic7860PCI/32SE-50M  
AHA-2930Baic7860PCI/32SE-50M  
AHA-2920Caic7856PCI/32SE-50MSE-HD50F 
AHA-2930Caic7860PCI/32SE-50M  
AHA-2930Caic7860PCI/32SE-50M  
AHA-2910Caic7860PCI/32SE-50M  
AHA-2915Caic7860PCI/32SE-50M  
AHA-2940AU/CNaic7860PCI/32SE-50MSE-HD50F 
AHA-2944Waic7870PCI/32HVD-HD68FHVD-50MHVD-HD68F 
AHA-3940Waic7870PCI/322 X SE-HD68FSE-HD68F2
AHA-2940UWaic7880PCI/32SE-HD68FSE-50MSE-HD68F 
AHA-2940Uaic7880PCI/32SE-50MSE-HD50F 
AHA-2940Daic7880PCI/32   
aHA-2940 A/Taic7880PCI/32   
AHA-2940D A/Taic7880PCI/32   
AHA-3940UWaic7880PCI/322 X SE-HD68FSE-HD68F3
AHA-3940UWDaic7880PCI/322 X SE-HD68F2 X SE-VHD68F3
AHA-3940Uaic7880PCI/322 X SE-50MSE-HD50F3
AHA-2944UWaic7880PCI/32HVD-HD68FHVD-50MHVD-HD68F 
AHA-3944UWDaic7880PCI/322 X HVD-HD68F2 X HVD-VHD68F3
AHA-4944UWaic7880PCI/32   
AHA-2930UWaic7880PCI/32   
AHA-2940UW Proaic7880PCI/32SE-HD68FSE-50MSE-HD68F4
AHA-2940UW/CNaic7880PCI/32   
AHA-2940UDualaic7895PCI/32   
AHA-2940UWDualaic7895PCI/32   
AHA-3940UWDaic7895PCI/32   
AHA-3940AUWaic7895PCI/32   
AHA-3940AUWDaic7895PCI/32   
AHA-3940AUaic7895PCI/32   
AHA-3944AUWDaic7895PCI/322 X HVD-HD68F2 X HVD-VHD68F 
AHA-2940U2Baic7890PCI/32LVD-HD68FLVD-HD68F 
AHA-2940U2 OEMaic7891PCI/64   
AHA-2940U2Waic7890PCI/32LVD-HD68FSE-HD68FSE-50MLVD-HD68F 
AHA-2950U2Baic7891PCI/64LVD-HD68FLVD-HD68F 
AHA-2930U2aic7890PCI/32LVD-HD68FSE-50MSE-HD50F 
AHA-3950U2Baic7897PCI/64   
AHA-3950U2Daic7897PCI/64   
AHA-29160aic7892PCI/64-66   
AHA-29160 CPQaic7892PCI/64-66   
AHA-29160Naic7892PCI/32LVD-HD68FSE-50MSE-HD50F 
AHA-29160LPaic7892PCI/64-66   
AHA-19160aic7892PCI/64-66   
AHA-29150LPaic7892PCI/64-66   
AHA-29130LPaic7892PCI/64-66   
AHA-3960Daic7899PCI/64-662 X LVD-HD68FLVD-50M2 X LVD-VHD68F 
AHA-3960D CPQaic7899PCI/64-662 X LVD-HD68FLVD-50M2 X LVD-VHD68F 
AHA-39160aic7899PCI/64-662 X LVD-HD68FLVD-50M2 X LVD-VHD68F 
  1. No BIOS support
  2. DEC21050 PCI-PCI bridge with multiple controller chips on secondary bus
  3. DEC2115X PCI-PCI bridge with multiple controller chips on secondary bus
  4. All three SCSI connectors may be used simultaneously withoutSCSI “stub” effects.

2. Version History

  • 7.0 (4th August, 2005)
    • Updated driver to use SCSI transport class infrastructure
    • Upported sequencer and core fixes from last adaptec releasedversion of the driver.
  • 6.2.36 (June 3rd, 2003)
    • Correct code that disables PCI parity error checking.
    • Correct and simplify handling of the ignore wide residuemessage. The previous code would fail to report a residualif the transaction data length was even and we receivedan IWR message.
    • Add support for the 2.5.X EISA framework.
    • Update for change in 2.5.X SCSI proc FS interface.
    • Correct Domain Validation command-line option parsing.
    • When negotiation async via an 8bit WDTR message, sendan SDTR with an offset of 0 to be sure the targetknows we are async. This works around a firmware defectin the Quantum Atlas 10K.
    • Clear PCI error state during driver attach so that wedon’t disable memory mapped I/O due to a stray writeby some other driver probe that occurred before weclaimed the controller.
  • 6.2.35 (May 14th, 2003)
    • Fix a few GCC 3.3 compiler warnings.
    • Correct operation on EISA Twin Channel controller.
    • Add support for 2.5.X’s scsi_report_device_reset().
  • 6.2.34 (May 5th, 2003)
    • Fix locking regression introduced in 6.2.29 thatcould cause a lock order reversal between the io_request_lockand our per-softc lock. This was only possible on RH9,SuSE, and kernel.org 2.4.X kernels.
  • 6.2.33 (April 30th, 2003)
    • Dynamically disable PCI parity error reporting after10 errors are reported to the user. These errors arethe result of some other device issuing PCI transactionswith bad parity. Once the user has been informed of theproblem, continuing to report the errors just degradesour performance.
  • 6.2.32 (March 28th, 2003)
    • Dynamically sized S/G lists to avoid SCSI mallocpool fragmentation and SCSI mid-layer deadlock.
  • 6.2.28 (January 20th, 2003)
    • Domain Validation Fixes
    • Add ability to disable PCI parity error checking.
    • Enhanced Memory Mapped I/O probe
  • 6.2.20 (November 7th, 2002)
    • Added Domain Validation.

3. Command Line Options

Warning

ALTERING OR ADDING THESE DRIVER PARAMETERSINCORRECTLY CAN RENDER YOUR SYSTEM INOPERABLE.USE THEM WITH CAUTION.

Put a .conf file in the /etc/modprobe.d directory and add/edit aline containingoptionsaic7xxxaic7xxx=[command[,command...]] wherecommand is one or more of the following:

verbose

Definition:enable additional informative messages during driver operation.
Possible Values:
 This option is a flag
Default Value:disabled

debug:[value]

Definition:Enables various levels of debugging information
Possible Values:
 0x0000 = no debugging, 0xffff = full debugging
Default Value:0x0000

no_probe

probe_eisa_vl

Definition:Do not probe for EISA/VLB controllers.This is a toggle. If the driver is compiledto not probe EISA/VLB controllers by default,specifying “no_probe” will enable this probing.If the driver is compiled to probe EISA/VLBcontrollers by default, specifying “no_probe”will disable this probing.
Possible Values:
 This option is a toggle
Default Value:EISA/VLB probing is disabled by default.

pci_parity

Definition:

Toggles the detection of PCI parity errors.On many motherboards with VIA chipsets,PCI parity is not generated correctly on thePCI bus. It is impossible for the hardware todifferentiate between these “spurious” parityerrors and real parity errors. The symptom ofthis problem is a stream of the message:

"scsi0:     Data Parity Error Detected during address or write data phase"

output by the driver.

Possible Values:
 

This option is a toggle

Default Value:

PCI Parity Error reporting is disabled

no_reset

Definition:Do not reset the bus during the initial probephase
Possible Values:
 This option is a flag
Default Value:disabled

extended

Definition:Force extended translation on the controller
Possible Values:
 This option is a flag
Default Value:disabled

periodic_otag

Definition:Send an ordered tag periodically to preventtag starvation. Needed for some older devices
Possible Values:
 This option is a flag
Default Value:disabled

reverse_scan

Definition:Probe the scsi bus in reverse order, startingwith target 15
Possible Values:
 This option is a flag
Default Value:disabled

global_tag_depth:[value]

Definition:Global tag depth for all targets on all busses.This option sets the default tag depth whichmay be selectively overridden vi the tag_infooption.
Possible Values:
 1 - 253
Default Value:32

tag_info:{{value[,value…]}[,{value[,value…]}…]}

Definition:Set the per-target tagged queue depth on aper controller basis. Both controllers and targetsmay be omitted indicating that they should retainthe default tag depth.
Possible Values:
 1 - 253
Default Value:32

Examples:

tag_info:{{16,32,32,64,8,8,,32,32,32,32,32,32,32,32,32}

On Controller 0:

  • specifies a tag depth of 16 for target 0
  • specifies a tag depth of 64 for target 3
  • specifies a tag depth of 8 for targets 4 and 5
  • leaves target 6 at the default
  • specifies a tag depth of 32 for targets 1,2,7-15
  • All other targets retain the default depth.
tag_info:{{},{32,,32}}

On Controller 1:

  • specifies a tag depth of 32 for targets 0 and 2
  • All other targets retain the default depth.

seltime:[value]

Definition:Specifies the selection timeout value
Possible Values:
 0 = 256ms, 1 = 128ms, 2 = 64ms, 3 = 32ms
Default Value:0

dv: {value[,value…]}

Definition:

Set Domain Validation Policy on a per-controller basis.Controllers may be omitted indicating thatthey should retain the default read streaming setting.

Possible Values:
 
< 0Use setting from serial EEPROM.
0Disable DV
> 0Enable DV
Default Value:

SCSI-Select setting on controllers with a SCSI Selectoption for DV. Otherwise, on for controllers supportingU160 speeds and off for all other controller types.

Example:

dv:{-1,0,,1,1,0}
  • On Controller 0 leave DV at its default setting.
  • On Controller 1 disable DV.
  • Skip configuration on Controller 2.
  • On Controllers 3 and 4 enable DV.
  • On Controller 5 disable DV.

Example:

options aic7xxx aic7xxx=verbose,no_probe,tag_info:{{},{,,10}},seltime:1

enables verbose logging, Disable EISA/VLB probing,and set tag depth on Controller 1/Target 2 to 10 tags.

4. Adaptec Customer Support

A Technical Support Identification (TSID) Number is required forAdaptec technical support.

  • The 12-digit TSID can be found on the white barcode-type labelincluded inside the box with your product. The TSID helps usprovide more efficient service by accurately identifying yourproduct and support status.
Support Options
  • Search the Adaptec Support Knowledgebase (ASK) athttp://ask.adaptec.com for articles, troubleshooting tips, andfrequently asked questions about your product.
  • For support via Email, submit your question to Adaptec’sTechnical Support Specialists athttp://ask.adaptec.com/.
North America
  • Visit our Web site athttp://www.adaptec.com/.

  • For information about Adaptec’s support options, call408-957-2550, 24 hours a day, 7 days a week.

  • To speak with a Technical Support Specialist,

    • For hardware products, call 408-934-7274,Monday to Friday, 3:00 am to 5:00 pm, PDT.
    • For RAID and Fibre Channel products, call 321-207-2000,Monday to Friday, 3:00 am to 5:00 pm, PDT.

    To expedite your service, have your computer with you.

  • To order Adaptec products, including accessories and cables,call 408-957-7274. To order cables online go tohttp://www.adaptec.com/buy-cables/.

Europe
Japan
  • Visit our web site athttp://www.adaptec.co.jp/.
  • To speak with a Technical Support Specialist, call+81 3 5308 6120, Monday-Friday, 9:00 a.m. to 12:00 p.m.,1:00 p.m. to 6:00 p.m.

Copyright © 2003 Adaptec Inc. 691 S. Milpitas Blvd., Milpitas CA 95035 USA.

All rights reserved.

You are permitted to redistribute, use and modify this README file in wholeor in part in conjunction with redistribution of software governed by theGeneral Public License, provided that the following conditions are met:

  1. Redistributions of README file must retain the above copyrightnotice, this list of conditions, and the following disclaimer,without modification.
  2. The name of the author may not be used to endorse or promote productsderived from this software without specific prior written permission.
  3. Modifications or new contributions must be attributed in a copyrightnotice identifying the author (“Contributor”) and added below theoriginal copyright notice. The copyright notice is for purposes ofidentifying contributors and should not be deemed as permission to alterthe permissions given by Adaptec.

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