MTD NAND Driver Programming Interface¶
| Author: | Thomas Gleixner |
|---|
Introduction¶
The generic NAND driver supports almost all NAND and AG-AND based chipsand connects them to the Memory Technology Devices (MTD) subsystem ofthe Linux Kernel.
This documentation is provided for developers who want to implementboard drivers or filesystem drivers suitable for NAND devices.
Known Bugs And Assumptions¶
None.
Documentation hints¶
The function and structure docs are autogenerated. Each function andstruct member has a short description which is marked with an [XXX]identifier. The following chapters explain the meaning of thoseidentifiers.
Function identifiers [XXX]¶
The functions are marked with [XXX] identifiers in the short comment.The identifiers explain the usage and scope of the functions. Followingidentifiers are used:
[MTD Interface]
These functions provide the interface to the MTD kernel API. They arenot replaceable and provide functionality which is complete hardwareindependent.
[NAND Interface]
These functions are exported and provide the interface to the NANDkernel API.
[GENERIC]
Generic functions are not replaceable and provide functionality whichis complete hardware independent.
[DEFAULT]
Default functions provide hardware related functionality which issuitable for most of the implementations. These functions can bereplaced by the board driver if necessary. Those functions are calledvia pointers in the NAND chip description structure. The board drivercan set the functions which should be replaced by board dependentfunctions before calling nand_scan(). If the function pointer isNULL on entry to nand_scan() then the pointer is set to the defaultfunction which is suitable for the detected chip type.
Struct member identifiers [XXX]¶
The struct members are marked with [XXX] identifiers in the comment. Theidentifiers explain the usage and scope of the members. Followingidentifiers are used:
[INTERN]
These members are for NAND driver internal use only and must not bemodified. Most of these values are calculated from the chip geometryinformation which is evaluated during nand_scan().
[REPLACEABLE]
Replaceable members hold hardware related functions which can beprovided by the board driver. The board driver can set the functionswhich should be replaced by board dependent functions before callingnand_scan(). If the function pointer is NULL on entry tonand_scan() then the pointer is set to the default function which issuitable for the detected chip type.
[BOARDSPECIFIC]
Board specific members hold hardware related information which mustbe provided by the board driver. The board driver must set thefunction pointers and datafields before calling nand_scan().
[OPTIONAL]
Optional members can hold information relevant for the board driver.The generic NAND driver code does not use this information.
Basic board driver¶
For most boards it will be sufficient to provide just the basicfunctions and fill out some really board dependent members in the nandchip description structure.
Basic defines¶
At least you have to provide a nand_chip structure and a storage forthe ioremap’ed chip address. You can allocate the nand_chip structureusing kmalloc or you can allocate it statically. The NAND chip structureembeds an mtd structure which will be registered to the MTD subsystem.You can extract a pointer to the mtd structure from a nand_chip pointerusing the nand_to_mtd() helper.
Kmalloc based example
static struct mtd_info *board_mtd;static void __iomem *baseaddr;
Static example
static struct nand_chip board_chip;static void __iomem *baseaddr;
Partition defines¶
If you want to divide your device into partitions, then define apartitioning scheme suitable to your board.
#define NUM_PARTITIONS 2static struct mtd_partition partition_info[] = { { .name = "Flash partition 1", .offset = 0, .size = 8 * 1024 * 1024 }, { .name = "Flash partition 2", .offset = MTDPART_OFS_NEXT, .size = MTDPART_SIZ_FULL },};Hardware control function¶
The hardware control function provides access to the control pins of theNAND chip(s). The access can be done by GPIO pins or by address lines.If you use address lines, make sure that the timing requirements aremet.
GPIO based example
static void board_hwcontrol(struct mtd_info *mtd, int cmd){ switch(cmd){ case NAND_CTL_SETCLE: /* Set CLE pin high */ break; case NAND_CTL_CLRCLE: /* Set CLE pin low */ break; case NAND_CTL_SETALE: /* Set ALE pin high */ break; case NAND_CTL_CLRALE: /* Set ALE pin low */ break; case NAND_CTL_SETNCE: /* Set nCE pin low */ break; case NAND_CTL_CLRNCE: /* Set nCE pin high */ break; }}Address lines based example. It’s assumed that the nCE pin is drivenby a chip select decoder.
static void board_hwcontrol(struct mtd_info *mtd, int cmd){ struct nand_chip *this = mtd_to_nand(mtd); switch(cmd){ case NAND_CTL_SETCLE: this->legacy.IO_ADDR_W |= CLE_ADRR_BIT; break; case NAND_CTL_CLRCLE: this->legacy.IO_ADDR_W &= ~CLE_ADRR_BIT; break; case NAND_CTL_SETALE: this->legacy.IO_ADDR_W |= ALE_ADRR_BIT; break; case NAND_CTL_CLRALE: this->legacy.IO_ADDR_W &= ~ALE_ADRR_BIT; break; }}Device ready function¶
If the hardware interface has the ready busy pin of the NAND chipconnected to a GPIO or other accessible I/O pin, this function is usedto read back the state of the pin. The function has no arguments andshould return 0, if the device is busy (R/B pin is low) and 1, if thedevice is ready (R/B pin is high). If the hardware interface does notgive access to the ready busy pin, then the function must not be definedand the function pointer this->legacy.dev_ready is set to NULL.
Init function¶
The init function allocates memory and sets up all the board specificparameters and function pointers. When everything is set up nand_scan()is called. This function tries to detect and identify then chip. If achip is found all the internal data fields are initialized accordingly.The structure(s) have to be zeroed out first and then filled with thenecessary information about the device.
static int __init board_init (void){ struct nand_chip *this; int err = 0; /* Allocate memory for MTD device structure and private data */ this = kzalloc(sizeof(struct nand_chip), GFP_KERNEL); if (!this) { printk ("Unable to allocate NAND MTD device structure.\n"); err = -ENOMEM; goto out; } board_mtd = nand_to_mtd(this); /* map physical address */ baseaddr = ioremap(CHIP_PHYSICAL_ADDRESS, 1024); if (!baseaddr) { printk("Ioremap to access NAND chip failed\n"); err = -EIO; goto out_mtd; } /* Set address of NAND IO lines */ this->legacy.IO_ADDR_R = baseaddr; this->legacy.IO_ADDR_W = baseaddr; /* Reference hardware control function */ this->hwcontrol = board_hwcontrol; /* Set command delay time, see datasheet for correct value */ this->legacy.chip_delay = CHIP_DEPENDEND_COMMAND_DELAY; /* Assign the device ready function, if available */ this->legacy.dev_ready = board_dev_ready; this->eccmode = NAND_ECC_SOFT; /* Scan to find existence of the device */ if (nand_scan (this, 1)) { err = -ENXIO; goto out_ior; } add_mtd_partitions(board_mtd, partition_info, NUM_PARTITIONS); goto out;out_ior: iounmap(baseaddr);out_mtd: kfree (this);out: return err;}module_init(board_init);Exit function¶
The exit function is only necessary if the driver is compiled as amodule. It releases all resources which are held by the chip driver andunregisters the partitions in the MTD layer.
#ifdef MODULEstatic void __exit board_cleanup (void){ /* Unregister device */ WARN_ON(mtd_device_unregister(board_mtd)); /* Release resources */ nand_cleanup(mtd_to_nand(board_mtd)); /* unmap physical address */ iounmap(baseaddr); /* Free the MTD device structure */ kfree (mtd_to_nand(board_mtd));}module_exit(board_cleanup);#endifAdvanced board driver functions¶
This chapter describes the advanced functionality of the NAND driver.For a list of functions which can be overridden by the board driver seethe documentation of the nand_chip structure.
Multiple chip control¶
The nand driver can control chip arrays. Therefore the board driver mustprovide an own select_chip function. This function must (de)select therequested chip. The function pointer in the nand_chip structure must beset before calling nand_scan(). The maxchip parameter of nand_scan()defines the maximum number of chips to scan for. Make sure that theselect_chip function can handle the requested number of chips.
The nand driver concatenates the chips to one virtual chip and providesthis virtual chip to the MTD layer.
Note: The driver can only handle linear chip arrays of equally sizedchips. There is no support for parallel arrays which extend thebuswidth.
GPIO based example
static void board_select_chip (struct mtd_info *mtd, int chip){ /* Deselect all chips, set all nCE pins high */ GPIO(BOARD_NAND_NCE) |= 0xff; if (chip >= 0) GPIO(BOARD_NAND_NCE) &= ~ (1 << chip);}Address lines based example. Its assumed that the nCE pins areconnected to an address decoder.
static void board_select_chip (struct mtd_info *mtd, int chip){ struct nand_chip *this = mtd_to_nand(mtd); /* Deselect all chips */ this->legacy.IO_ADDR_R &= ~BOARD_NAND_ADDR_MASK; this->legacy.IO_ADDR_W &= ~BOARD_NAND_ADDR_MASK; switch (chip) { case 0: this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIP0; this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIP0; break; .... case n: this->legacy.IO_ADDR_R |= BOARD_NAND_ADDR_CHIPn; this->legacy.IO_ADDR_W |= BOARD_NAND_ADDR_CHIPn; break; }}Hardware ECC support¶
Functions and constants¶
The nand driver supports three different types of hardware ECC.
NAND_ECC_HW3_256
Hardware ECC generator providing 3 bytes ECC per 256 byte.
NAND_ECC_HW3_512
Hardware ECC generator providing 3 bytes ECC per 512 byte.
NAND_ECC_HW6_512
Hardware ECC generator providing 6 bytes ECC per 512 byte.
NAND_ECC_HW8_512
Hardware ECC generator providing 8 bytes ECC per 512 byte.
If your hardware generator has a different functionality add it at theappropriate place in nand_base.c
The board driver must provide following functions:
enable_hwecc
This function is called before reading / writing to the chip. Resetor initialize the hardware generator in this function. The functionis called with an argument which let you distinguish between read andwrite operations.
calculate_ecc
This function is called after read / write from / to the chip.Transfer the ECC from the hardware to the buffer. If the optionNAND_HWECC_SYNDROME is set then the function is only called onwrite. See below.
correct_data
In case of an ECC error this function is called for error detectionand correction. Return 1 respectively 2 in case the error can becorrected. If the error is not correctable return -1. If yourhardware generator matches the default algorithm of the nand_eccsoftware generator then use the correction function provided bynand_ecc instead of implementing duplicated code.
Hardware ECC with syndrome calculation¶
Many hardware ECC implementations provide Reed-Solomon codes andcalculate an error syndrome on read. The syndrome must be converted to astandard Reed-Solomon syndrome before calling the error correction codein the generic Reed-Solomon library.
The ECC bytes must be placed immediately after the data bytes in orderto make the syndrome generator work. This is contrary to the usuallayout used by software ECC. The separation of data and out of band areais not longer possible. The nand driver code handles this layout and theremaining free bytes in the oob area are managed by the autoplacementcode. Provide a matching oob-layout in this case. See rts_from4.c anddiskonchip.c for implementation reference. In those cases we must alsouse bad block tables on FLASH, because the ECC layout is interferingwith the bad block marker positions. See bad block table support fordetails.
Bad block table support¶
Most NAND chips mark the bad blocks at a defined position in the sparearea. Those blocks must not be erased under any circumstances as the badblock information would be lost. It is possible to check the bad blockmark each time when the blocks are accessed by reading the spare area ofthe first page in the block. This is time consuming so a bad block tableis used.
The nand driver supports various types of bad block tables.
Per device
The bad block table contains all bad block information of the devicewhich can consist of multiple chips.
Per chip
A bad block table is used per chip and contains the bad blockinformation for this particular chip.
Fixed offset
The bad block table is located at a fixed offset in the chip(device). This applies to various DiskOnChip devices.
Automatic placed
The bad block table is automatically placed and detected either atthe end or at the beginning of a chip (device)
Mirrored tables
The bad block table is mirrored on the chip (device) to allow updatesof the bad block table without data loss.
nand_scan() calls the function nand_default_bbt().nand_default_bbt() selects appropriate default bad block tabledescriptors depending on the chip information which was retrieved bynand_scan().
The standard policy is scanning the device for bad blocks and build aram based bad block table which allows faster access than alwayschecking the bad block information on the flash chip itself.
Flash based tables¶
It may be desired or necessary to keep a bad block table in FLASH. ForAG-AND chips this is mandatory, as they have no factory marked badblocks. They have factory marked good blocks. The marker pattern iserased when the block is erased to be reused. So in case of powerlossbefore writing the pattern back to the chip this block would be lost andadded to the bad blocks. Therefore we scan the chip(s) when we detectthem the first time for good blocks and store this information in a badblock table before erasing any of the blocks.
The blocks in which the tables are stored are protected againstaccidental access by marking them bad in the memory bad block table. Thebad block table management functions are allowed to circumvent thisprotection.
The simplest way to activate the FLASH based bad block table support isto set the option NAND_BBT_USE_FLASH in the bbt_option field of thenand chip structure before calling nand_scan(). For AG-AND chips isthis done by default. This activates the default FLASH based bad blocktable functionality of the NAND driver. The default bad block tableoptions are
- Store bad block table per chip
- Use 2 bits per block
- Automatic placement at the end of the chip
- Use mirrored tables with version numbers
- Reserve 4 blocks at the end of the chip
User defined tables¶
User defined tables are created by filling out a nand_bbt_descrstructure and storing the pointer in the nand_chip structure memberbbt_td before calling nand_scan(). If a mirror table is necessary asecond structure must be created and a pointer to this structure must bestored in bbt_md inside the nand_chip structure. If the bbt_md memberis set to NULL then only the main table is used and no scan for themirrored table is performed.
The most important field in the nand_bbt_descr structure is theoptions field. The options define most of the table properties. Use thepredefined constants from rawnand.h to define the options.
Number of bits per block
The supported number of bits is 1, 2, 4, 8.
Table per chip
Setting the constant NAND_BBT_PERCHIP selects that a bad blocktable is managed for each chip in a chip array. If this option is notset then a per device bad block table is used.
Table location is absolute
Use the option constant NAND_BBT_ABSPAGE and define the absolutepage number where the bad block table starts in the field pages. Ifyou have selected bad block tables per chip and you have a multi chiparray then the start page must be given for each chip in the chiparray. Note: there is no scan for a table ident pattern performed, sothe fields pattern, veroffs, offs, len can be left uninitialized
Table location is automatically detected
The table can either be located in the first or the last good blocksof the chip (device). Set NAND_BBT_LASTBLOCK to place the bad blocktable at the end of the chip (device). The bad block tables aremarked and identified by a pattern which is stored in the spare areaof the first page in the block which holds the bad block table. Storea pointer to the pattern in the pattern field. Further the length ofthe pattern has to be stored in len and the offset in the spare areamust be given in the offs member of the nand_bbt_descr structure.For mirrored bad block tables different patterns are mandatory.
Table creation
Set the option NAND_BBT_CREATE to enable the table creation if notable can be found during the scan. Usually this is done only once ifa new chip is found.
Table write support
Set the option NAND_BBT_WRITE to enable the table write support.This allows the update of the bad block table(s) in case a block hasto be marked bad due to wear. The MTD interface functionblock_markbad is calling the update function of the bad block table.If the write support is enabled then the table is updated on FLASH.
Note: Write support should only be enabled for mirrored tables withversion control.
Table version control
Set the option NAND_BBT_VERSION to enable the table versioncontrol. It’s highly recommended to enable this for mirrored tableswith write support. It makes sure that the risk of losing the badblock table information is reduced to the loss of the informationabout the one worn out block which should be marked bad. The versionis stored in 4 consecutive bytes in the spare area of the device. Theposition of the version number is defined by the member veroffs inthe bad block table descriptor.
Save block contents on write
In case that the block which holds the bad block table does containother useful information, set the option NAND_BBT_SAVECONTENT. Whenthe bad block table is written then the whole block is read the badblock table is updated and the block is erased and everything iswritten back. If this option is not set only the bad block table iswritten and everything else in the block is ignored and erased.
Number of reserved blocks
For automatic placement some blocks must be reserved for bad blocktable storage. The number of reserved blocks is defined in themaxblocks member of the bad block table description structure.Reserving 4 blocks for mirrored tables should be a reasonable number.This also limits the number of blocks which are scanned for the badblock table ident pattern.
Spare area (auto)placement¶
The nand driver implements different possibilities for placement offilesystem data in the spare area,
- Placement defined by fs driver
- Automatic placement
The default placement function is automatic placement. The nand driverhas built in default placement schemes for the various chiptypes. If dueto hardware ECC functionality the default placement does not fit thenthe board driver can provide a own placement scheme.
File system drivers can provide a own placement scheme which is usedinstead of the default placement scheme.
Placement schemes are defined by a nand_oobinfo structure
struct nand_oobinfo { int useecc; int eccbytes; int eccpos[24]; int oobfree[8][2];};useecc
The useecc member controls the ecc and placement function. The headerfile include/mtd/mtd-abi.h contains constants to select ecc andplacement. MTD_NANDECC_OFF switches off the ecc complete. This isnot recommended and available for testing and diagnosis only.MTD_NANDECC_PLACE selects caller defined placement,MTD_NANDECC_AUTOPLACE selects automatic placement.
eccbytes
The eccbytes member defines the number of ecc bytes per page.
eccpos
The eccpos array holds the byte offsets in the spare area where theecc codes are placed.
oobfree
The oobfree array defines the areas in the spare area which can beused for automatic placement. The information is given in the format{offset, size}. offset defines the start of the usable area, size thelength in bytes. More than one area can be defined. The list isterminated by an {0, 0} entry.
Placement defined by fs driver¶
The calling function provides a pointer to a nand_oobinfo structurewhich defines the ecc placement. For writes the caller must provide aspare area buffer along with the data buffer. The spare area buffer sizeis (number of pages) * (size of spare area). For reads the buffer sizeis (number of pages) * ((size of spare area) + (number of ecc steps perpage) * sizeof (int)). The driver stores the result of the ecc checkfor each tuple in the spare buffer. The storage sequence is:
<spare data page 0><ecc result 0>...<ecc result n>...<spare data page n><ecc result 0>...<ecc result n>
This is a legacy mode used by YAFFS1.
If the spare area buffer is NULL then only the ECC placement is doneaccording to the given scheme in the nand_oobinfo structure.
Automatic placement¶
Automatic placement uses the built in defaults to place the ecc bytes inthe spare area. If filesystem data have to be stored / read into thespare area then the calling function must provide a buffer. The buffersize per page is determined by the oobfree array in the nand_oobinfostructure.
If the spare area buffer is NULL then only the ECC placement is doneaccording to the default builtin scheme.
Spare area autoplacement default schemes¶
256 byte pagesize¶
| Offset | Content | Comment |
|---|---|---|
| 0x00 | ECC byte 0 | Error correction code byte 0 |
| 0x01 | ECC byte 1 | Error correction code byte 1 |
| 0x02 | ECC byte 2 | Error correction code byte 2 |
| 0x03 | Autoplace 0 | |
| 0x04 | Autoplace 1 | |
| 0x05 | Bad block marker | If any bit in this byte is zero, then thisblock is bad. This applies only to the firstpage in a block. In the remaining pages thisbyte is reserved |
| 0x06 | Autoplace 2 | |
| 0x07 | Autoplace 3 |
512 byte pagesize¶
| Offset | Content | Comment |
|---|---|---|
| 0x00 | ECC byte 0 | Error correction code byte 0 of the lower256 Byte data in this page |
| 0x01 | ECC byte 1 | Error correction code byte 1 of the lower256 Bytes of data in this page |
| 0x02 | ECC byte 2 | Error correction code byte 2 of the lower256 Bytes of data in this page |
| 0x03 | ECC byte 3 | Error correction code byte 0 of the upper256 Bytes of data in this page |
| 0x04 | reserved | reserved |
| 0x05 | Bad block marker | If any bit in this byte is zero, then thisblock is bad. This applies only to the firstpage in a block. In the remaining pages thisbyte is reserved |
| 0x06 | ECC byte 4 | Error correction code byte 1 of the upper256 Bytes of data in this page |
| 0x07 | ECC byte 5 | Error correction code byte 2 of the upper256 Bytes of data in this page |
| 0x08 - 0x0F | Autoplace 0 - 7 |
2048 byte pagesize¶
| Offset | Content | Comment |
|---|---|---|
| 0x00 | Bad block marker | If any bit in this byte is zero, then this blockis bad. This applies only to the first page in ablock. In the remaining pages this byte isreserved |
| 0x01 | Reserved | Reserved |
| 0x02-0x27 | Autoplace 0 - 37 | |
| 0x28 | ECC byte 0 | Error correction code byte 0 of the first256 Byte data in this page |
| 0x29 | ECC byte 1 | Error correction code byte 1 of the first256 Bytes of data in this page |
| 0x2A | ECC byte 2 | Error correction code byte 2 of the first256 Bytes data in this page |
| 0x2B | ECC byte 3 | Error correction code byte 0 of the second256 Bytes of data in this page |
| 0x2C | ECC byte 4 | Error correction code byte 1 of the second256 Bytes of data in this page |
| 0x2D | ECC byte 5 | Error correction code byte 2 of the second256 Bytes of data in this page |
| 0x2E | ECC byte 6 | Error correction code byte 0 of the third256 Bytes of data in this page |
| 0x2F | ECC byte 7 | Error correction code byte 1 of the third256 Bytes of data in this page |
| 0x30 | ECC byte 8 | Error correction code byte 2 of the third256 Bytes of data in this page |
| 0x31 | ECC byte 9 | Error correction code byte 0 of the fourth256 Bytes of data in this page |
| 0x32 | ECC byte 10 | Error correction code byte 1 of the fourth256 Bytes of data in this page |
| 0x33 | ECC byte 11 | Error correction code byte 2 of the fourth256 Bytes of data in this page |
| 0x34 | ECC byte 12 | Error correction code byte 0 of the fifth256 Bytes of data in this page |
| 0x35 | ECC byte 13 | Error correction code byte 1 of the fifth256 Bytes of data in this page |
| 0x36 | ECC byte 14 | Error correction code byte 2 of the fifth256 Bytes of data in this page |
| 0x37 | ECC byte 15 | Error correction code byte 0 of the sixth256 Bytes of data in this page |
| 0x38 | ECC byte 16 | Error correction code byte 1 of the sixth256 Bytes of data in this page |
| 0x39 | ECC byte 17 | Error correction code byte 2 of the sixth256 Bytes of data in this page |
| 0x3A | ECC byte 18 | Error correction code byte 0 of the seventh256 Bytes of data in this page |
| 0x3B | ECC byte 19 | Error correction code byte 1 of the seventh256 Bytes of data in this page |
| 0x3C | ECC byte 20 | Error correction code byte 2 of the seventh256 Bytes of data in this page |
| 0x3D | ECC byte 21 | Error correction code byte 0 of the eighth256 Bytes of data in this page |
| 0x3E | ECC byte 22 | Error correction code byte 1 of the eighth256 Bytes of data in this page |
| 0x3F | ECC byte 23 | Error correction code byte 2 of the eighth256 Bytes of data in this page |
Filesystem support¶
The NAND driver provides all necessary functions for a filesystem viathe MTD interface.
Filesystems must be aware of the NAND peculiarities and restrictions.One major restrictions of NAND Flash is, that you cannot write as oftenas you want to a page. The consecutive writes to a page, before erasingit again, are restricted to 1-3 writes, depending on the manufacturersspecifications. This applies similar to the spare area.
Therefore NAND aware filesystems must either write in page size chunksor hold a writebuffer to collect smaller writes until they sum up topagesize. Available NAND aware filesystems: JFFS2, YAFFS.
The spare area usage to store filesystem data is controlled by the sparearea placement functionality which is described in one of the earlierchapters.
Tools¶
The MTD project provides a couple of helpful tools to handle NAND Flash.
- flasherase, flasheraseall: Erase and format FLASH partitions
- nandwrite: write filesystem images to NAND FLASH
- nanddump: dump the contents of a NAND FLASH partitions
These tools are aware of the NAND restrictions. Please use those toolsinstead of complaining about errors which are caused by non NAND awareaccess methods.
Constants¶
This chapter describes the constants which might be relevant for adriver developer.
Chip option constants¶
Constants for chip id table¶
These constants are defined in rawnand.h. They are OR-ed together todescribe the chip functionality:
/* Buswitdh is 16 bit */#define NAND_BUSWIDTH_16 0x00000002/* Device supports partial programming without padding */#define NAND_NO_PADDING 0x00000004/* Chip has cache program function */#define NAND_CACHEPRG 0x00000008/* Chip has copy back function */#define NAND_COPYBACK 0x00000010/* AND Chip which has 4 banks and a confusing page / block * assignment. See Renesas datasheet for further information */#define NAND_IS_AND 0x00000020/* Chip has a array of 4 pages which can be read without * additional ready /busy waits */#define NAND_4PAGE_ARRAY 0x00000040
Constants for runtime options¶
These constants are defined in rawnand.h. They are OR-ed together todescribe the functionality:
/* The hw ecc generator provides a syndrome instead a ecc value on read * This can only work if we have the ecc bytes directly behind the * data bytes. Applies for DOC and AG-AND Renesas HW Reed Solomon generators */#define NAND_HWECC_SYNDROME 0x00020000
ECC selection constants¶
Use these constants to select the ECC algorithm:
/* No ECC. Usage is not recommended ! */#define NAND_ECC_NONE 0/* Software ECC 3 byte ECC per 256 Byte data */#define NAND_ECC_SOFT 1/* Hardware ECC 3 byte ECC per 256 Byte data */#define NAND_ECC_HW3_256 2/* Hardware ECC 3 byte ECC per 512 Byte data */#define NAND_ECC_HW3_512 3/* Hardware ECC 6 byte ECC per 512 Byte data */#define NAND_ECC_HW6_512 4/* Hardware ECC 8 byte ECC per 512 Byte data */#define NAND_ECC_HW8_512 6
Hardware control related constants¶
These constants describe the requested hardware access function when theboardspecific hardware control function is called:
/* Select the chip by setting nCE to low */#define NAND_CTL_SETNCE 1/* Deselect the chip by setting nCE to high */#define NAND_CTL_CLRNCE 2/* Select the command latch by setting CLE to high */#define NAND_CTL_SETCLE 3/* Deselect the command latch by setting CLE to low */#define NAND_CTL_CLRCLE 4/* Select the address latch by setting ALE to high */#define NAND_CTL_SETALE 5/* Deselect the address latch by setting ALE to low */#define NAND_CTL_CLRALE 6/* Set write protection by setting WP to high. Not used! */#define NAND_CTL_SETWP 7/* Clear write protection by setting WP to low. Not used! */#define NAND_CTL_CLRWP 8
Bad block table related constants¶
These constants describe the options used for bad block tabledescriptors:
/* Options for the bad block table descriptors *//* The number of bits used per block in the bbt on the device */#define NAND_BBT_NRBITS_MSK 0x0000000F#define NAND_BBT_1BIT 0x00000001#define NAND_BBT_2BIT 0x00000002#define NAND_BBT_4BIT 0x00000004#define NAND_BBT_8BIT 0x00000008/* The bad block table is in the last good block of the device */#define NAND_BBT_LASTBLOCK 0x00000010/* The bbt is at the given page, else we must scan for the bbt */#define NAND_BBT_ABSPAGE 0x00000020/* bbt is stored per chip on multichip devices */#define NAND_BBT_PERCHIP 0x00000080/* bbt has a version counter at offset veroffs */#define NAND_BBT_VERSION 0x00000100/* Create a bbt if none axists */#define NAND_BBT_CREATE 0x00000200/* Write bbt if necessary */#define NAND_BBT_WRITE 0x00001000/* Read and write back block contents when writing bbt */#define NAND_BBT_SAVECONTENT 0x00002000
Structures¶
This chapter contains the autogenerated documentation of the structureswhich are used in the NAND driver and might be relevant for a driverdeveloper. Each struct member has a short description which is markedwith an [XXX] identifier. See the chapter “Documentation hints” for anexplanation.
- struct
nand_parameters¶ NAND generic parameters from the parameter page
Definition
struct nand_parameters { const char *model; bool supports_set_get_features; unsigned long set_feature_list[BITS_TO_LONGS(ONFI_FEATURE_NUMBER)]; unsigned long get_feature_list[BITS_TO_LONGS(ONFI_FEATURE_NUMBER)]; struct onfi_params *onfi;};Members
model- Model name
supports_set_get_features- The NAND chip supports setting/getting features
set_feature_list- Bitmap of features that can be set
get_feature_list- Bitmap of features that can be get
onfi- ONFI specific parameters
- struct
nand_id¶ NAND id structure
Definition
struct nand_id { u8 data[NAND_MAX_ID_LEN]; int len;};Members
data- buffer containing the id bytes.
len- ID length.
- struct
nand_ecc_step_info¶ ECC step information of ECC engine
Definition
struct nand_ecc_step_info { int stepsize; const int *strengths; int nstrengths;};Members
stepsize- data bytes per ECC step
strengths- array of supported strengths
nstrengths- number of supported strengths
- struct
nand_ecc_caps¶ capability of ECC engine
Definition
struct nand_ecc_caps { const struct nand_ecc_step_info *stepinfos; int nstepinfos; int (*calc_ecc_bytes)(int step_size, int strength);};Members
stepinfos- array of ECC step information
nstepinfos- number of ECC step information
calc_ecc_bytes- driver’s hook to calculate ECC bytes per step
- struct
nand_ecc_ctrl¶ Control structure for ECC
Definition
struct nand_ecc_ctrl { enum nand_ecc_mode mode; enum nand_ecc_algo algo; int steps; int size; int bytes; int total; int strength; int prepad; int postpad; unsigned int options; void *priv; u8 *calc_buf; u8 *code_buf; void (*hwctl)(struct nand_chip *chip, int mode); int (*calculate)(struct nand_chip *chip, const uint8_t *dat, uint8_t *ecc_code); int (*correct)(struct nand_chip *chip, uint8_t *dat, uint8_t *read_ecc, uint8_t *calc_ecc); int (*read_page_raw)(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); int (*write_page_raw)(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); int (*read_page)(struct nand_chip *chip, uint8_t *buf, int oob_required, int page); int (*read_subpage)(struct nand_chip *chip, uint32_t offs, uint32_t len, uint8_t *buf, int page); int (*write_subpage)(struct nand_chip *chip, uint32_t offset,uint32_t data_len, const uint8_t *data_buf, int oob_required, int page); int (*write_page)(struct nand_chip *chip, const uint8_t *buf, int oob_required, int page); int (*write_oob_raw)(struct nand_chip *chip, int page); int (*read_oob_raw)(struct nand_chip *chip, int page); int (*read_oob)(struct nand_chip *chip, int page); int (*write_oob)(struct nand_chip *chip, int page);};Members
mode- ECC mode
algo- ECC algorithm
steps- number of ECC steps per page
size- data bytes per ECC step
bytes- ECC bytes per step
total- total number of ECC bytes per page
strength- max number of correctible bits per ECC step
prepad- padding information for syndrome based ECC generators
postpad- padding information for syndrome based ECC generators
options- ECC specific options (see NAND_ECC_XXX flags defined above)
priv- pointer to private ECC control data
calc_buf- buffer for calculated ECC, size is oobsize.
code_buf- buffer for ECC read from flash, size is oobsize.
hwctl- function to control hardware ECC generator. Must onlybe provided if an hardware ECC is available
calculate- function for ECC calculation or readback from ECC hardware
correct- function for ECC correction, matching to ECC generator (sw/hw).Should return a positive number representing the number ofcorrected bitflips, -EBADMSG if the number of bitflips exceedECC strength, or any other error code if the error is notdirectly related to correction.If -EBADMSG is returned the input buffers should be leftuntouched.
read_page_raw- function to read a raw page without ECC. This functionshould hide the specific layout used by the ECCcontroller and always return contiguous in-band andout-of-band data even if they’re not storedcontiguously on the NAND chip (e.g.NAND_ECC_HW_SYNDROME interleaves in-band andout-of-band data).
write_page_raw- function to write a raw page without ECC. This functionshould hide the specific layout used by the ECCcontroller and consider the passed data as contiguousin-band and out-of-band data. ECC controller isresponsible for doing the appropriate transformationsto adapt to its specific layout (e.g.NAND_ECC_HW_SYNDROME interleaves in-band andout-of-band data).
read_page- function to read a page according to the ECC generatorrequirements; returns maximum number of bitflips corrected inany single ECC step, -EIO hw error
read_subpage- function to read parts of the page covered by ECC;returns same as read_page()
write_subpage- function to write parts of the page covered by ECC.
write_page- function to write a page according to the ECC generatorrequirements.
write_oob_raw- function to write chip OOB data without ECC
read_oob_raw- function to read chip OOB data without ECC
read_oob- function to read chip OOB data
write_oob- function to write chip OOB data
- struct
nand_sdr_timings¶ SDR NAND chip timings
Definition
struct nand_sdr_timings { u64 tBERS_max; u32 tCCS_min; u64 tPROG_max; u64 tR_max; u32 tALH_min; u32 tADL_min; u32 tALS_min; u32 tAR_min; u32 tCEA_max; u32 tCEH_min; u32 tCH_min; u32 tCHZ_max; u32 tCLH_min; u32 tCLR_min; u32 tCLS_min; u32 tCOH_min; u32 tCS_min; u32 tDH_min; u32 tDS_min; u32 tFEAT_max; u32 tIR_min; u32 tITC_max; u32 tRC_min; u32 tREA_max; u32 tREH_min; u32 tRHOH_min; u32 tRHW_min; u32 tRHZ_max; u32 tRLOH_min; u32 tRP_min; u32 tRR_min; u64 tRST_max; u32 tWB_max; u32 tWC_min; u32 tWH_min; u32 tWHR_min; u32 tWP_min; u32 tWW_min;};Members
tBERS_max- Block erase time
tCCS_min- Change column setup time
tPROG_max- Page program time
tR_max- Page read time
tALH_min- ALE hold time
tADL_min- ALE to data loading time
tALS_min- ALE setup time
tAR_min- ALE to RE# delay
tCEA_max- CE# access time
tCEH_min- CE# high hold time
tCH_min- CE# hold time
tCHZ_max- CE# high to output hi-Z
tCLH_min- CLE hold time
tCLR_min- CLE to RE# delay
tCLS_min- CLE setup time
tCOH_min- CE# high to output hold
tCS_min- CE# setup time
tDH_min- Data hold time
tDS_min- Data setup time
tFEAT_max- Busy time for Set Features and Get Features
tIR_min- Output hi-Z to RE# low
tITC_max- Interface and Timing Mode Change time
tRC_min- RE# cycle time
tREA_max- RE# access time
tREH_min- RE# high hold time
tRHOH_min- RE# high to output hold
tRHW_min- RE# high to WE# low
tRHZ_max- RE# high to output hi-Z
tRLOH_min- RE# low to output hold
tRP_min- RE# pulse width
tRR_min- Ready to RE# low (data only)
tRST_max- Device reset time, measured from the falling edge of R/B# to therising edge of R/B#.
tWB_max- WE# high to SR[6] low
tWC_min- WE# cycle time
tWH_min- WE# high hold time
tWHR_min- WE# high to RE# low
tWP_min- WE# pulse width
tWW_min- WP# transition to WE# low
Description
This struct defines the timing requirements of a SDR NAND chip.These information can be found in every NAND datasheets and the timingsmeaning are described in the ONFI specifications:www.onfi.org/~/media/ONFI/specs/onfi_3_1_spec.pdf (chapter 4.15 TimingParameters)
All these timings are expressed in picoseconds.
- enum
nand_data_interface_type¶ NAND interface timing type
Constants
NAND_SDR_IFACE- Single Data Rate interface
- struct
nand_data_interface¶ NAND interface timing
Definition
struct nand_data_interface { enum nand_data_interface_type type; struct nand_timings { unsigned int mode; union { struct nand_sdr_timings sdr; }; } timings;};Members
type- type of the timing
timings- The timing information
timings.mode- Timing mode as defined in the specification
{unnamed_union}- anonymous
timings.sdr- Use it whentype is
NAND_SDR_IFACE.
- const structnand_sdr_timings *
nand_get_sdr_timings(const structnand_data_interface * conf)¶ get SDR timing from data interface
Parameters
conststructnand_data_interface*conf- The data interface
- struct
nand_op_cmd_instr¶ Definition of a command instruction
Definition
struct nand_op_cmd_instr { u8 opcode;};Members
opcode- the command to issue in one cycle
- struct
nand_op_addr_instr¶ Definition of an address instruction
Definition
struct nand_op_addr_instr { unsigned int naddrs; const u8 *addrs;};Members
naddrs- length of theaddrs array
addrs- array containing the address cycles to issue
- struct
nand_op_data_instr¶ Definition of a data instruction
Definition
struct nand_op_data_instr { unsigned int len; union { void *in; const void *out; } buf; bool force_8bit;};Members
len- number of data bytes to move
buf- buffer to fill
buf.in- buffer to fill when reading from the NAND chip
buf.out- buffer to read from when writing to the NAND chip
force_8bit- force 8-bit access
Description
Please note that “in” and “out” are inverted from the ONFI specificationand are from the controller perspective, so a “in” is a read from the NANDchip while a “out” is a write to the NAND chip.
- struct
nand_op_waitrdy_instr¶ Definition of a wait ready instruction
Definition
struct nand_op_waitrdy_instr { unsigned int timeout_ms;};Members
timeout_ms- maximum delay while waiting for the ready/busy pin in ms
- enum
nand_op_instr_type¶ Definition of all instruction types
Constants
NAND_OP_CMD_INSTR- command instruction
NAND_OP_ADDR_INSTR- address instruction
NAND_OP_DATA_IN_INSTR- data in instruction
NAND_OP_DATA_OUT_INSTR- data out instruction
NAND_OP_WAITRDY_INSTR- wait ready instruction
- struct
nand_op_instr¶ Instruction object
Definition
struct nand_op_instr { enum nand_op_instr_type type; union { struct nand_op_cmd_instr cmd; struct nand_op_addr_instr addr; struct nand_op_data_instr data; struct nand_op_waitrdy_instr waitrdy; } ctx; unsigned int delay_ns;};Members
type- the instruction type
ctx- extra data associated to the instruction. You’ll have to use theappropriate element depending ontype
ctx.cmd- use it iftype is
NAND_OP_CMD_INSTR ctx.addr- use it iftype is
NAND_OP_ADDR_INSTR ctx.data- use it iftype is
NAND_OP_DATA_IN_INSTRorNAND_OP_DATA_OUT_INSTR ctx.waitrdy- use it iftype is
NAND_OP_WAITRDY_INSTR delay_ns- delay the controller should apply after the instruction has beenissued on the bus. Most modern controllers have internal timingscontrol logic, and in this case, the controller driver can ignorethis field.
- struct
nand_subop¶ a sub operation
Definition
struct nand_subop { unsigned int cs; const struct nand_op_instr *instrs; unsigned int ninstrs; unsigned int first_instr_start_off; unsigned int last_instr_end_off;};Members
cs- the CS line to select for this NAND sub-operation
instrs- array of instructions
ninstrs- length of theinstrs array
first_instr_start_off- offset to start from for the first instructionof the sub-operation
last_instr_end_off- offset to end at (excluded) for the last instructionof the sub-operation
Description
Bothfirst_instr_start_off andlast_instr_end_off only apply to data oraddress instructions.
When an operation cannot be handled as is by the NAND controller, it willbe split by the parser into sub-operations which will be passed to thecontroller driver.
- struct
nand_op_parser_addr_constraints¶ Constraints for address instructions
Definition
struct nand_op_parser_addr_constraints { unsigned int maxcycles;};Members
maxcycles- maximum number of address cycles the controller can issue in asingle step
- struct
nand_op_parser_data_constraints¶ Constraints for data instructions
Definition
struct nand_op_parser_data_constraints { unsigned int maxlen;};Members
maxlen- maximum data length that the controller can handle in a single step
- struct
nand_op_parser_pattern_elem¶ One element of a pattern
Definition
struct nand_op_parser_pattern_elem { enum nand_op_instr_type type; bool optional; union { struct nand_op_parser_addr_constraints addr; struct nand_op_parser_data_constraints data; } ctx;};Members
type- the instructuction type
optional- whether this element of the pattern is optional or mandatory
ctx- address or data constraint
ctx.addr- address constraint (number of cycles)
ctx.data- data constraint (data length)
- struct
nand_op_parser_pattern¶ NAND sub-operation pattern descriptor
Definition
struct nand_op_parser_pattern { const struct nand_op_parser_pattern_elem *elems; unsigned int nelems; int (*exec)(struct nand_chip *chip, const struct nand_subop *subop);};Members
elems- array of pattern elements
nelems- number of pattern elements inelems array
exec- the function that will issue a sub-operation
Description
A pattern is a list of elements, each element reprensenting one instructionwith its constraints. The pattern itself is used by the core to match NANDchip operation with NAND controller operations.Once a match between a NAND controller operation pattern and a NAND chipoperation (or a sub-set of a NAND operation) is found, the pattern ->exec()hook is called so that the controller driver can issue the operation on thebus.
Controller drivers should declare as many patterns as they support and passthis list of patterns (created with the help of the following macro) tothenand_op_parser_exec_op() helper.
- struct
nand_op_parser¶ NAND controller operation parser descriptor
Definition
struct nand_op_parser { const struct nand_op_parser_pattern *patterns; unsigned int npatterns;};Members
patterns- array of supported patterns
npatterns- length of thepatterns array
Description
The parser descriptor is just an array of supported patterns which will beiterated bynand_op_parser_exec_op() everytime it tries to execute anNAND operation (or tries to determine if a specific operation is supported).
It is worth mentioning that patterns will be tested in their declarationorder, and the first match will be taken, so it’s important to order patternsappropriately so that simple/inefficient patterns are placed at the end ofthe list. Usually, this is where you put single instruction patterns.
- struct
nand_operation¶ NAND operation descriptor
Definition
struct nand_operation { unsigned int cs; const struct nand_op_instr *instrs; unsigned int ninstrs;};Members
cs- the CS line to select for this NAND operation
instrs- array of instructions to execute
ninstrs- length of theinstrs array
Description
The actual operation structure that will be passed to chip->exec_op().
- struct
nand_controller_ops¶ Controller operations
Definition
struct nand_controller_ops { int (*attach_chip)(struct nand_chip *chip); void (*detach_chip)(struct nand_chip *chip); int (*exec_op)(struct nand_chip *chip,const struct nand_operation *op, bool check_only); int (*setup_data_interface)(struct nand_chip *chip, int chipnr, const struct nand_data_interface *conf);};Members
attach_chip- this method is called after the NAND detection phase afterflash ID and MTD fields such as erase size, page size and OOBsize have been set up. ECC requirements are available ifprovided by the NAND chip or device tree. Typically used tochoose the appropriate ECC configuration and allocateassociated resources.This hook is optional.
detach_chip- free all resources allocated/claimed innand_controller_ops->attach_chip().This hook is optional.
exec_op- controller specific method to execute NAND operations.This method replaces chip->legacy.cmdfunc(),chip->legacy.{read,write}_{buf,byte,word}(),chip->legacy.dev_ready() and chip->legacy.waifunc().
setup_data_interface- setup the data interface and timing. Ifchipnr is set to
NAND_DATA_IFACE_CHECK_ONLYthismeans the configuration should not be applied butonly checked.This hook is optional.
- struct
nand_controller¶ Structure used to describe a NAND controller
Definition
struct nand_controller { struct mutex lock; const struct nand_controller_ops *ops;};Members
lock- lock used to serialize accesses to the NAND controller
ops- NAND controller operations.
- struct
nand_legacy¶ NAND chip legacy fields/hooks
Definition
struct nand_legacy { void __iomem *IO_ADDR_R; void __iomem *IO_ADDR_W; void (*select_chip)(struct nand_chip *chip, int cs); u8 (*read_byte)(struct nand_chip *chip); void (*write_byte)(struct nand_chip *chip, u8 byte); void (*write_buf)(struct nand_chip *chip, const u8 *buf, int len); void (*read_buf)(struct nand_chip *chip, u8 *buf, int len); void (*cmd_ctrl)(struct nand_chip *chip, int dat, unsigned int ctrl); void (*cmdfunc)(struct nand_chip *chip, unsigned command, int column, int page_addr); int (*dev_ready)(struct nand_chip *chip); int (*waitfunc)(struct nand_chip *chip); int (*block_bad)(struct nand_chip *chip, loff_t ofs); int (*block_markbad)(struct nand_chip *chip, loff_t ofs); int (*set_features)(struct nand_chip *chip, int feature_addr, u8 *subfeature_para); int (*get_features)(struct nand_chip *chip, int feature_addr, u8 *subfeature_para); int chip_delay; struct nand_controller dummy_controller;};Members
IO_ADDR_R- address to read the 8 I/O lines of the flash device
IO_ADDR_W- address to write the 8 I/O lines of the flash device
select_chip- select/deselect a specific target/die
read_byte- read one byte from the chip
write_byte- write a single byte to the chip on the low 8 I/O lines
write_buf- write data from the buffer to the chip
read_buf- read data from the chip into the buffer
cmd_ctrl- hardware specific function for controlling ALE/CLE/nCE. Also usedto write command and address
cmdfunc- hardware specific function for writing commands to the chip.
dev_ready- hardware specific function for accessing device ready/busy line.If set to NULL no access to ready/busy is available and theready/busy information is read from the chip status register.
waitfunc- hardware specific function for wait on ready.
block_bad- check if a block is bad, using OOB markers
block_markbad- mark a block bad
set_features- set the NAND chip features
get_features- get the NAND chip features
chip_delay- chip dependent delay for transferring data from array to readregs (tR).
dummy_controller- dummy controller implementation for drivers that canonly control a single chip
Description
If you look at this structure you’re already wrong. These fields/hooks areall deprecated.
- struct
nand_chip¶ NAND Private Flash Chip Data
Definition
struct nand_chip { struct nand_device base; struct nand_legacy legacy; int (*setup_read_retry)(struct nand_chip *chip, int retry_mode); unsigned int options; unsigned int bbt_options; int page_shift; int phys_erase_shift; int bbt_erase_shift; int chip_shift; int pagemask; u8 *data_buf; struct { unsigned int bitflips; int page; } pagecache; int subpagesize; int onfi_timing_mode_default; unsigned int badblockpos; int badblockbits; struct nand_id id; struct nand_parameters parameters; struct nand_data_interface data_interface; int cur_cs; int read_retries; struct mutex lock; unsigned int suspended : 1; int (*suspend)(struct nand_chip *chip); void (*resume)(struct nand_chip *chip); uint8_t *oob_poi; struct nand_controller *controller; struct nand_ecc_ctrl ecc; unsigned long buf_align; uint8_t *bbt; struct nand_bbt_descr *bbt_td; struct nand_bbt_descr *bbt_md; struct nand_bbt_descr *badblock_pattern; void *priv; struct { const struct nand_manufacturer *desc; void *priv; } manufacturer; int (*lock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len); int (*unlock_area)(struct nand_chip *chip, loff_t ofs, uint64_t len);};Members
base- Inherit from the generic NAND device
legacy- All legacy fields/hooks. If you develop a new driver,don’t even try to use any of these fields/hooks, and ifyou’re modifying an existing driver that is using thosefields/hooks, you should consider reworking the driveravoid using them.
setup_read_retry- [FLASHSPECIFIC] flash (vendor) specific function forsetting the read-retry mode. Mostly needed for MLC NAND.
options- [BOARDSPECIFIC] various chip options. They can partlybe set to inform nand_scan about special functionality.See the defines for further explanation.
bbt_options- [INTERN] bad block specific options. All options usedhere must come from bbm.h. By default, these optionswill be copied to the appropriate nand_bbt_descr’s.
page_shift- [INTERN] number of address bits in a page (columnaddress bits).
phys_erase_shift- [INTERN] number of address bits in a physical eraseblock
bbt_erase_shift- [INTERN] number of address bits in a bbt entry
chip_shift- [INTERN] number of address bits in one chip
pagemask- [INTERN] page number mask = number of (pages / chip) - 1
data_buf- [INTERN] buffer for data, size is (page size + oobsize).
pagecache- Structure containing page cache related fields
pagecache.bitflips- Number of bitflips of the cached page
pagecache.page- Page number currently in the cache. -1 means no page iscurrently cached
subpagesize- [INTERN] holds the subpagesize
onfi_timing_mode_default- [INTERN] default ONFI timing mode. This field isset to the actually used ONFI mode if the chip isONFI compliant or deduced from the datasheet ifthe NAND chip is not ONFI compliant.
badblockpos- [INTERN] position of the bad block marker in the oobarea.
badblockbits- [INTERN] minimum number of set bits in a good block’sbad block marker position; i.e., BBM == 11110111b isnot bad when badblockbits == 7
id- [INTERN] holds NAND ID
parameters- [INTERN] holds generic parameters under an easilyreadable form.
data_interface- [INTERN] NAND interface timing information
cur_cs- currently selected target. -1 means no target selected,otherwise we should always have cur_cs >= 0 &&cur_cs < nanddev_ntargets(). NAND Controller driversshould not modify this value, but they’re allowed toread it.
read_retries- [INTERN] the number of read retry modes supported
lock- lock protecting the suspended field. Also used toserialize accesses to the NAND device.
suspended- set to 1 when the device is suspended, 0 when it’s not.
suspend- [REPLACEABLE] specific NAND device suspend operation
resume- [REPLACEABLE] specific NAND device resume operation
oob_poi- “poison value buffer,” used for laying out OOB databefore writing
controller- [REPLACEABLE] a pointer to a hardware controllerstructure which is shared among multiple independentdevices.
ecc- [BOARDSPECIFIC] ECC control structure
buf_align- minimum buffer alignment required by a platform
bbt- [INTERN] bad block table pointer
bbt_td- [REPLACEABLE] bad block table descriptor for flashlookup.
bbt_md- [REPLACEABLE] bad block table mirror descriptor
badblock_pattern- [REPLACEABLE] bad block scan pattern used for initialbad block scan.
priv- [OPTIONAL] pointer to private chip data
manufacturer- [INTERN] Contains manufacturer information
manufacturer.desc- [INTERN] Contains manufacturer’s description
manufacturer.priv- [INTERN] Contains manufacturer private information
lock_area- [REPLACEABLE] specific NAND chip lock operation
unlock_area- [REPLACEABLE] specific NAND chip unlock operation
- struct
nand_flash_dev¶ NAND Flash Device ID Structure
Definition
struct nand_flash_dev { char *name; union { struct { uint8_t mfr_id; uint8_t dev_id; }; uint8_t id[NAND_MAX_ID_LEN]; }; unsigned int pagesize; unsigned int chipsize; unsigned int erasesize; unsigned int options; uint16_t id_len; uint16_t oobsize; struct { uint16_t strength_ds; uint16_t step_ds; } ecc; int onfi_timing_mode_default;};Members
name- a human-readable name of the NAND chip
{unnamed_union}- anonymous
{unnamed_struct}- anonymous
mfr_id- manufacturer ID part of the full chip ID array (refers the samememory address as
id[0]) dev_id- device ID part of the full chip ID array (refers the same memoryaddress as
id[1]) id- full device ID array
pagesize- size of the NAND page in bytes; if 0, then the real page size (aswell as the eraseblock size) is determined from the extended NANDchip ID array)
chipsize- total chip size in MiB
erasesize- eraseblock size in bytes (determined from the extended ID if 0)
options- stores various chip bit options
id_len- The valid length of theid.
oobsize- OOB size
ecc- ECC correctability and step information from the datasheet.
ecc.strength_ds- The ECC correctability from the datasheet, same as theecc_strength_ds in nand_chip{}.
ecc.step_ds- The ECC step required by theecc.strength_ds, same as theecc_step_ds in nand_chip{}, also from the datasheet.For example, the “4bit ECC for each 512Byte” can be set withNAND_ECC_INFO(4, 512).
onfi_timing_mode_default- the default ONFI timing mode entered after a NANDreset. Should be deduced from timings describedin the datasheet.
- int
nand_opcode_8bits(unsigned int command)¶
Parameters
unsignedintcommand- opcode to check
Parameters
structnand_chip*chip- NAND chip object
Description
Returns the pre-allocated page buffer after invalidating the cache. Thisfunction should be used by drivers that do not want to allocate their ownbounce buffer and still need such a buffer for specific operations (mostcommonly when reading OOB data only).
Be careful to never call this function in the write/write_oob path, becausethe core may have placed the data to be written out in this buffer.
Return
pointer to the page cache buffer
Public Functions Provided¶
This chapter contains the autogenerated documentation of the NAND kernelAPI functions which are exported. Each function has a short descriptionwhich is marked with an [XXX] identifier. See the chapter “Documentationhints” for an explanation.
- void
nand_extract_bits(u8 * dst, unsigned int dst_off, const u8 * src, unsigned int src_off, unsigned int nbits)¶ Copy unaligned bits from one buffer to another one
Parameters
u8*dst- destination buffer
unsignedintdst_off- bit offset at which the writing starts
constu8*src- source buffer
unsignedintsrc_off- bit offset at which the reading starts
unsignedintnbits- number of bits to copy fromsrc todst
Description
Copy bits from one memory region to another (overlap authorized).
Parameters
structnand_chip*chip- NAND chip object
unsignedintcs- the CS line to select. Note that this CS id is always from the chipPoV, not the controller one
Description
Select a NAND target so that further operations executed onchip go to theselected NAND target.
Parameters
structnand_chip*chip- NAND chip object
Description
Deselect the currently selected NAND target. The result of operationsexecuted onchip after the target has been deselected is undefined.
- int
nand_soft_waitrdy(structnand_chip * chip, unsigned long timeout_ms)¶ Poll STATUS reg until RDY bit is set to 1
Parameters
structnand_chip*chip- NAND chip structure
unsignedlongtimeout_ms- Timeout in ms
Description
Poll the STATUS register using ->exec_op() until the RDY bit becomes 1.If that does not happen whitin the specified timeout, -ETIMEDOUT isreturned.
This helper is intended to be used when the controller does not have accessto the NAND R/B pin.
Be aware that calling this helper from an ->exec_op() implementation means->exec_op() must be re-entrant.
Return 0 if the NAND chip is ready, a negative error otherwise.
- int
nand_gpio_waitrdy(structnand_chip * chip, struct gpio_desc * gpiod, unsigned long timeout_ms)¶ Poll R/B GPIO pin until ready
Parameters
structnand_chip*chip- NAND chip structure
structgpio_desc*gpiod- GPIO descriptor of R/B pin
unsignedlongtimeout_ms- Timeout in ms
Description
Poll the R/B GPIO pin until it becomes ready. If that does not happenwhitin the specified timeout, -ETIMEDOUT is returned.
This helper is intended to be used when the controller has access to theNAND R/B pin over GPIO.
Return 0 if the R/B pin indicates chip is ready, a negative error otherwise.
- int
nand_read_page_op(structnand_chip * chip, unsigned int page, unsigned int offset_in_page, void * buf, unsigned int len)¶ Do a READ PAGE operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintpage- page to read
unsignedintoffset_in_page- offset within the page
void*buf- buffer used to store the data
unsignedintlen- length of the buffer
Description
This function issues a READ PAGE operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_change_read_column_op(structnand_chip * chip, unsigned int offset_in_page, void * buf, unsigned int len, bool force_8bit)¶ Do a CHANGE READ COLUMN operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintoffset_in_page- offset within the page
void*buf- buffer used to store the data
unsignedintlen- length of the buffer
boolforce_8bit- force 8-bit bus access
Description
This function issues a CHANGE READ COLUMN operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_read_oob_op(structnand_chip * chip, unsigned int page, unsigned int offset_in_oob, void * buf, unsigned int len)¶ Do a READ OOB operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintpage- page to read
unsignedintoffset_in_oob- offset within the OOB area
void*buf- buffer used to store the data
unsignedintlen- length of the buffer
Description
This function issues a READ OOB operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_prog_page_begin_op(structnand_chip * chip, unsigned int page, unsigned int offset_in_page, const void * buf, unsigned int len)¶ starts a PROG PAGE operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintpage- page to write
unsignedintoffset_in_page- offset within the page
constvoid*buf- buffer containing the data to write to the page
unsignedintlen- length of the buffer
Description
This function issues the first half of a PROG PAGE operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
Description
This function issues the second half of a PROG PAGE operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_prog_page_op(structnand_chip * chip, unsigned int page, unsigned int offset_in_page, const void * buf, unsigned int len)¶ Do a full PROG PAGE operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintpage- page to write
unsignedintoffset_in_page- offset within the page
constvoid*buf- buffer containing the data to write to the page
unsignedintlen- length of the buffer
Description
This function issues a full PROG PAGE operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_change_write_column_op(structnand_chip * chip, unsigned int offset_in_page, const void * buf, unsigned int len, bool force_8bit)¶ Do a CHANGE WRITE COLUMN operation
Parameters
structnand_chip*chip- The NAND chip
unsignedintoffset_in_page- offset within the page
constvoid*buf- buffer containing the data to send to the NAND
unsignedintlen- length of the buffer
boolforce_8bit- force 8-bit bus access
Description
This function issues a CHANGE WRITE COLUMN operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_readid_op(structnand_chip * chip, u8 addr, void * buf, unsigned int len)¶ Do a READID operation
Parameters
structnand_chip*chip- The NAND chip
u8addr- address cycle to pass after the READID command
void*buf- buffer used to store the ID
unsignedintlen- length of the buffer
Description
This function sends a READID command and reads back the ID returned by theNAND.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
u8*status- out variable to store the NAND status
Description
This function sends a STATUS command and reads back the status returned bythe NAND.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
unsignedinteraseblock- block to erase
Description
This function sends an ERASE command and waits for the NAND to be readybefore returning.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
Description
This function sends a RESET command and waits for the NAND to be readybefore returning.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_read_data_op(structnand_chip * chip, void * buf, unsigned int len, bool force_8bit, bool check_only)¶ Read data from the NAND
Parameters
structnand_chip*chip- The NAND chip
void*buf- buffer used to store the data
unsignedintlen- length of the buffer
boolforce_8bit- force 8-bit bus access
boolcheck_only- do not actually run the command, only checks if thecontroller driver supports it
Description
This function does a raw data read on the bus. Usually used after launchinganother NAND operation likenand_read_page_op().This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_write_data_op(structnand_chip * chip, const void * buf, unsigned int len, bool force_8bit)¶ Write data from the NAND
Parameters
structnand_chip*chip- The NAND chip
constvoid*buf- buffer containing the data to send on the bus
unsignedintlen- length of the buffer
boolforce_8bit- force 8-bit bus access
Description
This function does a raw data write on the bus. Usually used after launchinganother NAND operation like nand_write_page_begin_op().This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_op_parser_exec_op(structnand_chip * chip, const structnand_op_parser * parser, const structnand_operation * op, bool check_only)¶ exec_op parser
Parameters
structnand_chip*chip- the NAND chip
conststructnand_op_parser*parser- patterns description provided by the controller driver
conststructnand_operation*op- the NAND operation to address
boolcheck_only- when true, the function only checks ifop can be handled butdoes not execute the operation
Description
Helper function designed to ease integration of NAND controller drivers thatonly support a limited set of instruction sequences. The supported sequencesare described inparser, and the framework takes care of splittingop intomultiple sub-operations (if required) and pass them back to the ->exec()callback of the matching pattern ifcheck_only is set to false.
NAND controller drivers should call this function from their own ->exec_op()implementation.
Returns 0 on success, a negative error code otherwise. A failure can becaused by an unsupported operation (none of the supported patterns is ableto handle the requested operation), or an error returned by one of thematching pattern->exec() hook.
- unsigned int
nand_subop_get_addr_start_off(const structnand_subop * subop, unsigned int instr_idx)¶ Get the start offset in an address array
Parameters
conststructnand_subop*subop- The entire sub-operation
unsignedintinstr_idx- Index of the instruction inside the sub-operation
Description
During driver development, one could be tempted to directly use the->addr.addrs field of address instructions. This is wrong as addressinstructions might be split.
Given an address instruction, returns the offset of the first cycle to issue.
- unsigned int
nand_subop_get_num_addr_cyc(const structnand_subop * subop, unsigned int instr_idx)¶ Get the remaining address cycles to assert
Parameters
conststructnand_subop*subop- The entire sub-operation
unsignedintinstr_idx- Index of the instruction inside the sub-operation
Description
During driver development, one could be tempted to directly use the->addr->naddrs field of a data instruction. This is wrong as instructionsmight be split.
Given an address instruction, returns the number of address cycle to issue.
- unsigned int
nand_subop_get_data_start_off(const structnand_subop * subop, unsigned int instr_idx)¶ Get the start offset in a data array
Parameters
conststructnand_subop*subop- The entire sub-operation
unsignedintinstr_idx- Index of the instruction inside the sub-operation
Description
During driver development, one could be tempted to directly use the->data->buf.{in,out} field of data instructions. This is wrong as datainstructions might be split.
Given a data instruction, returns the offset to start from.
- unsigned int
nand_subop_get_data_len(const structnand_subop * subop, unsigned int instr_idx)¶ Get the number of bytes to retrieve
Parameters
conststructnand_subop*subop- The entire sub-operation
unsignedintinstr_idx- Index of the instruction inside the sub-operation
Description
During driver development, one could be tempted to directly use the->data->len field of a data instruction. This is wrong as data instructionsmight be split.
Returns the length of the chunk of data to send/receive.
Parameters
structnand_chip*chip- The NAND chip
intchipnr- Internal die id
Description
Save the timings data structure, then apply SDR timings mode 0 (seenand_reset_data_interface for details), do the reset operation, andapply back the previous timings.
Returns 0 on success, a negative error code otherwise.
- int
nand_check_erased_ecc_chunk(void * data, int datalen, void * ecc, int ecclen, void * extraoob, int extraooblen, int bitflips_threshold)¶ check if an ECC chunk contains (almost) only 0xff data
Parameters
void*data- data buffer to test
intdatalen- data length
void*ecc- ECC buffer
intecclen- ECC length
void*extraoob- extra OOB buffer
intextraooblen- extra OOB length
intbitflips_threshold- maximum number of bitflips
Description
Check if a data buffer and its associated ECC and OOB data contains only0xff pattern, which means the underlying region has been erased and isready to be programmed.The bitflips_threshold specify the maximum number of bitflips beforeconsidering the region as not erased.
Returns a positive number of bitflips less than or equal tobitflips_threshold, or -ERROR_CODE for bitflips in excess of thethreshold. In case of success, the passed buffers are filled with 0xff.
Note
- 1/ ECC algorithms are working on pre-defined block sizes which are usually
- different from the NAND page size. When fixing bitflips, ECC engines willreport the number of errors per chunk, and the NAND core infrastructureexpect you to return the maximum number of bitflips for the whole page.This is why you should always use this function on a single chunk andnot on the whole page. After checking each chunk you should update yourmax_bitflips value accordingly.
- 2/ When checking for bitflips in erased pages you should not only check
- the payload data but also their associated ECC data, because a user mighthave programmed almost all bits to 1 but a few. In this case, weshouldn’t consider the chunk as erased, and checking ECC bytes preventthis case.
- 3/ The extraoob argument is optional, and should be used if some of your OOB
- data are protected by the ECC engine.It could also be used if you support subpages and want to attach someextra OOB data to an ECC chunk.
- int
nand_read_page_raw(structnand_chip * chip, uint8_t * buf, int oob_required, int page)¶ [INTERN] read raw page data without ecc
Parameters
structnand_chip*chip- nand chip info structure
uint8_t*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
Not for syndrome calculating ECC controllers, which use a special oob layout.
- int
nand_monolithic_read_page_raw(structnand_chip * chip, u8 * buf, int oob_required, int page)¶ Monolithic page read in raw mode
Parameters
structnand_chip*chip- NAND chip info structure
u8*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
This is a raw page read, ie. without any error detection/correction.Monolithic means we are requesting all the relevant data (main pluseventually OOB) to be loaded in the NAND cache and sent over thebus (from the NAND chip to the NAND controller) in a singleoperation. This is an alternative tonand_read_page_raw(), whichfirst reads the main data, and if the OOB data is requested too,then reads more data on the bus.
- int
nand_read_oob_std(structnand_chip * chip, int page)¶ [REPLACEABLE] the most common OOB data read function
Parameters
structnand_chip*chip- nand chip info structure
intpage- page number to read
- int
nand_write_oob_std(structnand_chip * chip, int page)¶ [REPLACEABLE] the most common OOB data write function
Parameters
structnand_chip*chip- nand chip info structure
intpage- page number to write
- int
nand_write_page_raw(structnand_chip * chip, const uint8_t * buf, int oob_required, int page)¶ [INTERN] raw page write function
Parameters
structnand_chip*chip- nand chip info structure
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
Description
Not for syndrome calculating ECC controllers, which use a special oob layout.
- int
nand_monolithic_write_page_raw(structnand_chip * chip, const u8 * buf, int oob_required, int page)¶ Monolithic page write in raw mode
Parameters
structnand_chip*chip- NAND chip info structure
constu8*buf- data buffer to write
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
Description
This is a raw page write, ie. without any error detection/correction.Monolithic means we are requesting all the relevant data (main pluseventually OOB) to be sent over the bus and effectively programmedinto the NAND chip arrays in a single operation. This is analternative tonand_write_page_raw(), which first sends the maindata, then eventually send the OOB data by latching more datacycles on the NAND bus, and finally sends the program command tosynchronyze the NAND chip cache.
- int
nand_ecc_choose_conf(structnand_chip * chip, const structnand_ecc_caps * caps, int oobavail)¶ Set the ECC strength and ECC step size
Parameters
structnand_chip*chip- nand chip info structure
conststructnand_ecc_caps*caps- ECC engine caps info structure
intoobavail- OOB size that the ECC engine can use
Description
Choose the ECC configuration according to following logic
- If both ECC step size and ECC strength are already set (usually by DT)then check if it is supported by this controller.
- If NAND_ECC_MAXIMIZE is set, then select maximum ECC strength.
- Otherwise, try to match the ECC step size and ECC strength closestto the chip’s requirement. If available OOB size can’t fit the chiprequirement then fallback to the maximum ECC step size and ECC strength.
On success, the chosen ECC settings are set.
- int
nand_scan_with_ids(structnand_chip * chip, unsigned int maxchips, structnand_flash_dev * ids)¶ [NAND Interface] Scan for the NAND device
Parameters
structnand_chip*chip- NAND chip object
unsignedintmaxchips- number of chips to scan for.
structnand_flash_dev*ids- optional flash IDs table
Description
This fills out all the uninitialized function pointers with the defaults.The flash ID is read and the mtd/chip structures are filled with theappropriate values.
Parameters
structnand_chip*chip- NAND chip object
- void
__nand_calculate_ecc(const unsigned char * buf, unsigned int eccsize, unsigned char * code, bool sm_order)¶ [NAND Interface] Calculate 3-byte ECC for 256/512-byte block
Parameters
constunsignedchar*buf- input buffer with raw data
unsignedinteccsize- data bytes per ECC step (256 or 512)
unsignedchar*code- output buffer with ECC
boolsm_order- Smart Media byte ordering
- int
nand_calculate_ecc(structnand_chip * chip, const unsigned char * buf, unsigned char * code)¶ [NAND Interface] Calculate 3-byte ECC for 256/512-byte block
Parameters
structnand_chip*chip- NAND chip object
constunsignedchar*buf- input buffer with raw data
unsignedchar*code- output buffer with ECC
- int
__nand_correct_data(unsigned char * buf, unsigned char * read_ecc, unsigned char * calc_ecc, unsigned int eccsize, bool sm_order)¶ [NAND Interface] Detect and correct bit error(s)
Parameters
unsignedchar*buf- raw data read from the chip
unsignedchar*read_ecc- ECC from the chip
unsignedchar*calc_ecc- the ECC calculated from raw data
unsignedinteccsize- data bytes per ECC step (256 or 512)
boolsm_order- Smart Media byte order
Description
Detect and correct a 1 bit error for eccsize byte block
- int
nand_correct_data(structnand_chip * chip, unsigned char * buf, unsigned char * read_ecc, unsigned char * calc_ecc)¶ [NAND Interface] Detect and correct bit error(s)
Parameters
structnand_chip*chip- NAND chip object
unsignedchar*buf- raw data read from the chip
unsignedchar*read_ecc- ECC from the chip
unsignedchar*calc_ecc- the ECC calculated from raw data
Description
Detect and correct a 1 bit error for 256/512 byte block
Internal Functions Provided¶
This chapter contains the autogenerated documentation of the NAND driverinternal functions. Each function has a short description which ismarked with an [XXX] identifier. See the chapter “Documentation hints”for an explanation. The functions marked with [DEFAULT] might berelevant for a board driver developer.
Parameters
structnand_chip*chip- NAND chip object
Description
Release chip lock and wake up anyone waiting on the device.
Parameters
structnand_chip*chip- NAND chip object
intpage- First page to start checking for bad block marker usage
Description
Returns an integer that corresponds to the page offset within a block, fora page that is used to store bad block markers. If no more pages areavailable, -EINVAL is returned.
Parameters
structnand_chip*chip- NAND chip object
loff_tofs- offset from device start
Description
Check, if the block is bad.
Parameters
structnand_chip*chip- NAND chip structure
Description
Lock the device and its controller for exclusive access
Return
-EBUSY if the chip has been suspended, 0 otherwise
Parameters
structnand_chip*chip- NAND chip object
Description
Check, if the device is write protected. The function expects, that thedevice is already selected.
- uint8_t *
nand_fill_oob(structnand_chip * chip, uint8_t * oob, size_t len, struct mtd_oob_ops * ops)¶ [INTERN] Transfer client buffer to oob
Parameters
structnand_chip*chip- NAND chip object
uint8_t*oob- oob data buffer
size_tlen- oob data write length
structmtd_oob_ops*ops- oob ops structure
- int
nand_do_write_oob(structnand_chip * chip, loff_t to, struct mtd_oob_ops * ops)¶ [MTD Interface] NAND write out-of-band
Parameters
structnand_chip*chip- NAND chip object
loff_tto- offset to write to
structmtd_oob_ops*ops- oob operation description structure
Description
NAND write out-of-band.
- int
nand_default_block_markbad(structnand_chip * chip, loff_t ofs)¶ [DEFAULT] mark a block bad via bad block marker
Parameters
structnand_chip*chip- NAND chip object
loff_tofs- offset from device start
Description
This is the default implementation, which can be overridden by a hardwarespecific driver. It provides the details for writing a bad block marker to ablock.
Parameters
structnand_chip*chip- NAND chip object
loff_tofs- offset of the block to mark bad
Parameters
structnand_chip*chip- NAND chip object
loff_tofs- offset from device start
Description
This function performs the generic NAND bad block marking steps (i.e., badblock table(s) and/or marker(s)). We only allow the hardware driver tospecify how to write bad block markers to OOB (chip->legacy.block_markbad).
We try operations in the following order:
- erase the affected block, to allow OOB marker to be written cleanly
- write bad block marker to OOB area of affected block (unless flagNAND_BBT_NO_OOB_BBM is present)
- update the BBT
Note that we retain the first error encountered in (2) or (3), finish theprocedures, and dump the error in the end.
- int
nand_block_isreserved(struct mtd_info * mtd, loff_t ofs)¶ [GENERIC] Check if a block is marked reserved.
Parameters
structmtd_info*mtd- MTD device structure
loff_tofs- offset from device start
Description
Check if the block is marked as reserved.
- int
nand_block_checkbad(structnand_chip * chip, loff_t ofs, int allowbbt)¶ [GENERIC] Check if a block is marked bad
Parameters
structnand_chip*chip- NAND chip object
loff_tofs- offset from device start
intallowbbt- 1, if its allowed to access the bbt area
Description
Check, if the block is bad. Either by reading the bad block table orcalling of the scan function.
- void
panic_nand_wait(structnand_chip * chip, unsigned long timeo)¶ [GENERIC] wait until the command is done
Parameters
structnand_chip*chip- NAND chip structure
unsignedlongtimeo- timeout
Description
Wait for command done. This is a helper function for nand_wait used whenwe are in interrupt context. May happen when in panic and trying to writean oops through mtdoops.
Parameters
structnand_chip*chip- The NAND chip
intchipnr- Internal die id
Description
Reset the Data interface and timings to ONFI mode 0.
Returns 0 for success or negative error code otherwise.
- int
nand_setup_data_interface(structnand_chip * chip, int chipnr)¶ Setup the best data interface and timings
Parameters
structnand_chip*chip- The NAND chip
intchipnr- Internal die id
Description
Find and configure the best data interface and NAND timings supported bythe chip and the driver.First tries to retrieve supported timing modes from ONFI information,and if the NAND chip does not support ONFI, relies on the->onfi_timing_mode_default specified in the nand_ids table.
Returns 0 for success or negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
Description
Find the best data interface and NAND timings supported by the chipand the driver.First tries to retrieve supported timing modes from ONFI information,and if the NAND chip does not support ONFI, relies on the->onfi_timing_mode_default specified in the nand_ids table. After thisfunction nand_chip->data_interface is initialized with the best timing modeavailable.
Returns 0 for success or negative error code otherwise.
- int
nand_fill_column_cycles(structnand_chip * chip, u8 * addrs, unsigned int offset_in_page)¶ fill the column cycles of an address
Parameters
structnand_chip*chip- The NAND chip
u8*addrs- Array of address cycles to fill
unsignedintoffset_in_page- The offset in the page
Description
Fills the first or the first two bytes of theaddrs field dependingon the NAND bus width and the page size.
Returns the number of cycles needed to encode the column, or a negativeerror code in case one of the arguments is invalid.
- int
nand_read_param_page_op(structnand_chip * chip, u8 page, void * buf, unsigned int len)¶ Do a READ PARAMETER PAGE operation
Parameters
structnand_chip*chip- The NAND chip
u8page- parameter page to read
void*buf- buffer used to store the data
unsignedintlen- length of the buffer
Description
This function issues a READ PARAMETER PAGE operation.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
Parameters
structnand_chip*chip- The NAND chip
Description
This function sends a READ0 command to cancel the effect of the STATUScommand to avoid reading only the status until a new read command is sent.
This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_set_features_op(structnand_chip * chip, u8 feature, const void * data)¶ Do a SET FEATURES operation
Parameters
structnand_chip*chip- The NAND chip
u8feature- feature id
constvoid*data- 4 bytes of data
Description
This function sends a SET FEATURES command and waits for the NAND to beready before returning.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- int
nand_get_features_op(structnand_chip * chip, u8 feature, void * data)¶ Do a GET FEATURES operation
Parameters
structnand_chip*chip- The NAND chip
u8feature- feature id
void*data- 4 bytes of data
Description
This function sends a GET FEATURES command and waits for the NAND to beready before returning.This function does not select/unselect the CS line.
Returns 0 on success, a negative error code otherwise.
- struct
nand_op_parser_ctx¶ Context used by the parser
Definition
struct nand_op_parser_ctx { const struct nand_op_instr *instrs; unsigned int ninstrs; struct nand_subop subop;};Members
instrs- array of all the instructions that must be addressed
ninstrs- length of theinstrs array
subop- Sub-operation to be passed to the NAND controller
Description
This structure is used by the core to split NAND operations intosub-operations that can be handled by the NAND controller.
- bool
nand_op_parser_must_split_instr(const structnand_op_parser_pattern_elem * pat, const structnand_op_instr * instr, unsigned int * start_offset)¶ Checks if an instruction must be split
Parameters
conststructnand_op_parser_pattern_elem*pat- the parser pattern element that matchesinstr
conststructnand_op_instr*instr- pointer to the instruction to check
unsignedint*start_offset- this is an in/out parameter. Ifinstr has already beensplit, thenstart_offset is the offset from which to start(either an address cycle or an offset in the data buffer).Conversely, if the function returns true (ie. instr must besplit), this parameter is updated to point to the firstdata/address cycle that has not been taken care of.
Description
Some NAND controllers are limited and cannot send X address cycles with aunique operation, or cannot read/write more than Y bytes at the same time.In this case, split the instruction that does not fit in a singlecontroller-operation into two or more chunks.
Returns true if the instruction must be split, false otherwise.Thestart_offset parameter is also updated to the offset at which the nextbundle of instruction must start (if an address or a data instruction).
- bool
nand_op_parser_match_pat(const structnand_op_parser_pattern * pat, structnand_op_parser_ctx * ctx)¶ Checks if a pattern matches the instructions remaining in the parser context
Parameters
conststructnand_op_parser_pattern*pat- the pattern to test
structnand_op_parser_ctx*ctx- the parser context structure to match with the patternpat
Description
Check ifpat matches the set or a sub-set of instructions remaining inctx.Returns true if this is the case, false ortherwise. When true is returned,ctx->subop is updated with the set of instructions to be passed to thecontroller driver.
- int
nand_get_features(structnand_chip * chip, int addr, u8 * subfeature_param)¶ wrapper to perform a GET_FEATURE
Parameters
structnand_chip*chip- NAND chip info structure
intaddr- feature address
u8*subfeature_param- the subfeature parameters, a four bytes array
Description
Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if theoperation cannot be handled.
- int
nand_set_features(structnand_chip * chip, int addr, u8 * subfeature_param)¶ wrapper to perform a SET_FEATURE
Parameters
structnand_chip*chip- NAND chip info structure
intaddr- feature address
u8*subfeature_param- the subfeature parameters, a four bytes array
Description
Returns 0 for success, a negative error otherwise. Returns -ENOTSUPP if theoperation cannot be handled.
- int
nand_check_erased_buf(void * buf, int len, int bitflips_threshold)¶ check if a buffer contains (almost) only 0xff data
Parameters
void*buf- buffer to test
intlen- buffer length
intbitflips_threshold- maximum number of bitflips
Description
Check if a buffer contains only 0xff, which means the underlying regionhas been erased and is ready to be programmed.The bitflips_threshold specify the maximum number of bitflips beforeconsidering the region is not erased.Returns a positive number of bitflips less than or equal tobitflips_threshold, or -ERROR_CODE for bitflips in excess of thethreshold.
Note
The logic of this function has been extracted from the memweightimplementation, except that nand_check_erased_buf function exit beforetesting the whole buffer if the number of bitflips exceed thebitflips_threshold value.
- int
nand_read_page_raw_notsupp(structnand_chip * chip, u8 * buf, int oob_required, int page)¶ dummy read raw page function
Parameters
structnand_chip*chip- nand chip info structure
u8*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
Returns -ENOTSUPP unconditionally.
- int
nand_read_page_raw_syndrome(structnand_chip * chip, uint8_t * buf, int oob_required, int page)¶ [INTERN] read raw page data without ecc
Parameters
structnand_chip*chip- nand chip info structure
uint8_t*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
We need a special oob layout and handling even when OOB isn’t used.
- int
nand_read_page_swecc(structnand_chip * chip, uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] software ECC based page read function
Parameters
structnand_chip*chip- nand chip info structure
uint8_t*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
- int
nand_read_subpage(structnand_chip * chip, uint32_t data_offs, uint32_t readlen, uint8_t * bufpoi, int page)¶ [REPLACEABLE] ECC based sub-page read function
Parameters
structnand_chip*chip- nand chip info structure
uint32_tdata_offs- offset of requested data within the page
uint32_treadlen- data length
uint8_t*bufpoi- buffer to store read data
intpage- page number to read
- int
nand_read_page_hwecc(structnand_chip * chip, uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] hardware ECC based page read function
Parameters
structnand_chip*chip- nand chip info structure
uint8_t*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
Not for syndrome calculating ECC controllers which need a special oob layout.
- int
nand_read_page_syndrome(structnand_chip * chip, uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] hardware ECC syndrome based page read
Parameters
structnand_chip*chip- nand chip info structure
uint8_t*buf- buffer to store read data
intoob_required- caller requires OOB data read to chip->oob_poi
intpage- page number to read
Description
The hw generator calculates the error syndrome automatically. Therefore weneed a special oob layout and handling.
- uint8_t *
nand_transfer_oob(structnand_chip * chip, uint8_t * oob, struct mtd_oob_ops * ops, size_t len)¶ [INTERN] Transfer oob to client buffer
Parameters
structnand_chip*chip- NAND chip object
uint8_t*oob- oob destination address
structmtd_oob_ops*ops- oob ops structure
size_tlen- size of oob to transfer
Parameters
structnand_chip*chip- NAND chip object
intretry_mode- the retry mode to use
Description
Some vendors supply a special command to shift the Vt threshold, to be usedwhen there are too many bitflips in a page (i.e., ECC error). After settinga new threshold, the host should retry reading the page.
- int
nand_do_read_ops(structnand_chip * chip, loff_t from, struct mtd_oob_ops * ops)¶ [INTERN] Read data with ECC
Parameters
structnand_chip*chip- NAND chip object
loff_tfrom- offset to read from
structmtd_oob_ops*ops- oob ops structure
Description
Internal function. Called with chip held.
- int
nand_read_oob_syndrome(structnand_chip * chip, int page)¶ [REPLACEABLE] OOB data read function for HW ECC with syndromes
Parameters
structnand_chip*chip- nand chip info structure
intpage- page number to read
- int
nand_write_oob_syndrome(structnand_chip * chip, int page)¶ [REPLACEABLE] OOB data write function for HW ECC with syndrome - only for large page flash
Parameters
structnand_chip*chip- nand chip info structure
intpage- page number to write
- int
nand_do_read_oob(structnand_chip * chip, loff_t from, struct mtd_oob_ops * ops)¶ [INTERN] NAND read out-of-band
Parameters
structnand_chip*chip- NAND chip object
loff_tfrom- offset to read from
structmtd_oob_ops*ops- oob operations description structure
Description
NAND read out-of-band data from the spare area.
- int
nand_read_oob(struct mtd_info * mtd, loff_t from, struct mtd_oob_ops * ops)¶ [MTD Interface] NAND read data and/or out-of-band
Parameters
structmtd_info*mtd- MTD device structure
loff_tfrom- offset to read from
structmtd_oob_ops*ops- oob operation description structure
Description
NAND read data and/or out-of-band data.
- int
nand_write_page_raw_notsupp(structnand_chip * chip, const u8 * buf, int oob_required, int page)¶ dummy raw page write function
Parameters
structnand_chip*chip- nand chip info structure
constu8*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
Description
Returns -ENOTSUPP unconditionally.
- int
nand_write_page_raw_syndrome(structnand_chip * chip, const uint8_t * buf, int oob_required, int page)¶ [INTERN] raw page write function
Parameters
structnand_chip*chip- nand chip info structure
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
Description
We need a special oob layout and handling even when ECC isn’t checked.
- int
nand_write_page_swecc(structnand_chip * chip, const uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] software ECC based page write function
Parameters
structnand_chip*chip- nand chip info structure
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
- int
nand_write_page_hwecc(structnand_chip * chip, const uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] hardware ECC based page write function
Parameters
structnand_chip*chip- nand chip info structure
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
- int
nand_write_subpage_hwecc(structnand_chip * chip, uint32_t offset, uint32_t data_len, const uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] hardware ECC based subpage write
Parameters
structnand_chip*chip- nand chip info structure
uint32_toffset- column address of subpage within the page
uint32_tdata_len- data length
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
- int
nand_write_page_syndrome(structnand_chip * chip, const uint8_t * buf, int oob_required, int page)¶ [REPLACEABLE] hardware ECC syndrome based page write
Parameters
structnand_chip*chip- nand chip info structure
constuint8_t*buf- data buffer
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
Description
The hw generator calculates the error syndrome automatically. Therefore weneed a special oob layout and handling.
- int
nand_write_page(structnand_chip * chip, uint32_t offset, int data_len, const uint8_t * buf, int oob_required, int page, int raw)¶ write one page
Parameters
structnand_chip*chip- NAND chip descriptor
uint32_toffset- address offset within the page
intdata_len- length of actual data to be written
constuint8_t*buf- the data to write
intoob_required- must write chip->oob_poi to OOB
intpage- page number to write
intraw- use _raw version of write_page
- int
nand_do_write_ops(structnand_chip * chip, loff_t to, struct mtd_oob_ops * ops)¶ [INTERN] NAND write with ECC
Parameters
structnand_chip*chip- NAND chip object
loff_tto- offset to write to
structmtd_oob_ops*ops- oob operations description structure
Description
NAND write with ECC.
- int
panic_nand_write(struct mtd_info * mtd, loff_t to, size_t len, size_t * retlen, const uint8_t * buf)¶ [MTD Interface] NAND write with ECC
Parameters
structmtd_info*mtd- MTD device structure
loff_tto- offset to write to
size_tlen- number of bytes to write
size_t*retlen- pointer to variable to store the number of written bytes
constuint8_t*buf- the data to write
Description
NAND write with ECC. Used when performing writes in interrupt context, thismay for example be called by mtdoops when writing an oops while in panic.
- int
nand_write_oob(struct mtd_info * mtd, loff_t to, struct mtd_oob_ops * ops)¶ [MTD Interface] NAND write data and/or out-of-band
Parameters
structmtd_info*mtd- MTD device structure
loff_tto- offset to write to
structmtd_oob_ops*ops- oob operation description structure
- int
nand_erase(struct mtd_info * mtd, struct erase_info * instr)¶ [MTD Interface] erase block(s)
Parameters
structmtd_info*mtd- MTD device structure
structerase_info*instr- erase instruction
Description
Erase one ore more blocks.
- int
nand_erase_nand(structnand_chip * chip, struct erase_info * instr, int allowbbt)¶ [INTERN] erase block(s)
Parameters
structnand_chip*chip- NAND chip object
structerase_info*instr- erase instruction
intallowbbt- allow erasing the bbt area
Description
Erase one ore more blocks.
- void
nand_sync(struct mtd_info * mtd)¶ [MTD Interface] sync
Parameters
structmtd_info*mtd- MTD device structure
Description
Sync is actually a wait for chip ready function.
- int
nand_block_isbad(struct mtd_info * mtd, loff_t offs)¶ [MTD Interface] Check if block at offset is bad
Parameters
structmtd_info*mtd- MTD device structure
loff_toffs- offset relative to mtd start
- int
nand_block_markbad(struct mtd_info * mtd, loff_t ofs)¶ [MTD Interface] Mark block at the given offset as bad
Parameters
structmtd_info*mtd- MTD device structure
loff_tofs- offset relative to mtd start
- int
nand_suspend(struct mtd_info * mtd)¶ [MTD Interface] Suspend the NAND flash
Parameters
structmtd_info*mtd- MTD device structure
Description
Returns 0 for success or negative error code otherwise.
- void
nand_resume(struct mtd_info * mtd)¶ [MTD Interface] Resume the NAND flash
Parameters
structmtd_info*mtd- MTD device structure
- void
nand_shutdown(struct mtd_info * mtd)¶ [MTD Interface] Finish the current NAND operation and prevent further operations
Parameters
structmtd_info*mtd- MTD device structure
- int
nand_lock(struct mtd_info * mtd, loff_t ofs, uint64_t len)¶ [MTD Interface] Lock the NAND flash
Parameters
structmtd_info*mtd- MTD device structure
loff_tofs- offset byte address
uint64_tlen- number of bytes to lock (must be a multiple of block/page size)
- int
nand_unlock(struct mtd_info * mtd, loff_t ofs, uint64_t len)¶ [MTD Interface] Unlock the NAND flash
Parameters
structmtd_info*mtd- MTD device structure
loff_tofs- offset byte address
uint64_tlen- number of bytes to unlock (must be a multiple of block/page size)
- int
nand_scan_ident(structnand_chip * chip, unsigned int maxchips, structnand_flash_dev * table)¶ Scan for the NAND device
Parameters
structnand_chip*chip- NAND chip object
unsignedintmaxchips- number of chips to scan for
structnand_flash_dev*table- alternative NAND ID table
Description
This is the first phase of the normal nand_scan() function. It reads theflash ID and sets up MTD fields accordingly.
This helper used to be called directly from controller drivers that neededto tweak some ECC-related parameters beforenand_scan_tail(). This separationprevented dynamic allocations during this phase which was unconvenient andas been banned for the benefit of the ->init_ecc()/cleanup_ecc() hooks.
- int
nand_check_ecc_caps(structnand_chip * chip, const structnand_ecc_caps * caps, int oobavail)¶ check the sanity of preset ECC settings
Parameters
structnand_chip*chip- nand chip info structure
conststructnand_ecc_caps*caps- ECC caps info structure
intoobavail- OOB size that the ECC engine can use
Description
When ECC step size and strength are already set, check if they are supportedby the controller and the calculated ECC bytes fit within the chip’s OOB.On success, the calculated ECC bytes is set.
- int
nand_match_ecc_req(structnand_chip * chip, const structnand_ecc_caps * caps, int oobavail)¶ meet the chip’s requirement with least ECC bytes
Parameters
structnand_chip*chip- nand chip info structure
conststructnand_ecc_caps*caps- ECC engine caps info structure
intoobavail- OOB size that the ECC engine can use
Description
If a chip’s ECC requirement is provided, try to meet it with the leastnumber of ECC bytes (i.e. with the largest number of OOB-free bytes).On success, the chosen ECC settings are set.
- int
nand_maximize_ecc(structnand_chip * chip, const structnand_ecc_caps * caps, int oobavail)¶ choose the max ECC strength available
Parameters
structnand_chip*chip- nand chip info structure
conststructnand_ecc_caps*caps- ECC engine caps info structure
intoobavail- OOB size that the ECC engine can use
Description
Choose the max ECC strength that is supported on the controller, and can fitwithin the chip’s OOB. On success, the chosen ECC settings are set.
Parameters
structnand_chip*chip- NAND chip object
Description
This is the second phase of the normal nand_scan() function. It fills outall the uninitialized function pointers with the defaults and scans for abad block table if appropriate.
- int
check_pattern(uint8_t * buf, int len, int paglen, struct nand_bbt_descr * td)¶ [GENERIC] check if a pattern is in the buffer
Parameters
uint8_t*buf- the buffer to search
intlen- the length of buffer to search
intpaglen- the pagelength
structnand_bbt_descr*td- search pattern descriptor
Description
Check for a pattern at the given place. Used to search bad block tables andgood / bad block identifiers.
- int
check_short_pattern(uint8_t * buf, struct nand_bbt_descr * td)¶ [GENERIC] check if a pattern is in the buffer
Parameters
uint8_t*buf- the buffer to search
structnand_bbt_descr*td- search pattern descriptor
Description
Check for a pattern at the given place. Used to search bad block tables andgood / bad block identifiers. Same as check_pattern, but no optional emptycheck.
- u32
add_marker_len(struct nand_bbt_descr * td)¶ compute the length of the marker in data area
Parameters
structnand_bbt_descr*td- BBT descriptor used for computation
Description
The length will be 0 if the marker is located in OOB area.
- int
read_bbt(structnand_chip * this, uint8_t * buf, int page, int num, struct nand_bbt_descr * td, int offs)¶ [GENERIC] Read the bad block table starting from page
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
intpage- the starting page
intnum- the number of bbt descriptors to read
structnand_bbt_descr*td- the bbt describtion table
intoffs- block number offset in the table
Description
Read the bad block table starting from page.
- int
read_abs_bbt(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * td, int chip)¶ [GENERIC] Read the bad block table starting at a given page
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*td- descriptor for the bad block table
intchip- read the table for a specific chip, -1 read all chips; applies only ifNAND_BBT_PERCHIP option is set
Description
Read the bad block table for all chips starting at a given page. We assumethat the bbt bits are in consecutive order.
- int
scan_read_oob(structnand_chip * this, uint8_t * buf, loff_t offs, size_t len)¶ [GENERIC] Scan data+OOB region to buffer
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
loff_toffs- offset at which to scan
size_tlen- length of data region to read
Description
Scan read data from data+OOB. May traverse multiple pages, interleavingpage,OOB,page,OOB,… in buf. Completes transfer and returns the “strongest”ECC condition (error or bitflip). May quit on the first (non-ECC) error.
- void
read_abs_bbts(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * td, struct nand_bbt_descr * md)¶ [GENERIC] Read the bad block table(s) for all chips starting at a given page
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*td- descriptor for the bad block table
structnand_bbt_descr*md- descriptor for the bad block table mirror
Description
Read the bad block table(s) for all chips starting at a given page. Weassume that the bbt bits are in consecutive order.
- int
create_bbt(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * bd, int chip)¶ [GENERIC] Create a bad block table by scanning the device
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*bd- descriptor for the good/bad block search pattern
intchip- create the table for a specific chip, -1 read all chips; applies onlyif NAND_BBT_PERCHIP option is set
Description
Create a bad block table by scanning the device for the given good/bad blockidentify pattern.
- int
search_bbt(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * td)¶ [GENERIC] scan the device for a specific bad block table
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*td- descriptor for the bad block table
Description
Read the bad block table by searching for a given ident pattern. Search ispreformed either from the beginning up or from the end of the devicedownwards. The search starts always at the start of a block. If the optionNAND_BBT_PERCHIP is given, each chip is searched for a bbt, which containsthe bad block information of this chip. This is necessary to provide supportfor certain DOC devices.
The bbt ident pattern resides in the oob area of the first page in a block.
- void
search_read_bbts(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * td, struct nand_bbt_descr * md)¶ [GENERIC] scan the device for bad block table(s)
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*td- descriptor for the bad block table
structnand_bbt_descr*md- descriptor for the bad block table mirror
Description
Search and read the bad block table(s).
- int
get_bbt_block(structnand_chip * this, struct nand_bbt_descr * td, struct nand_bbt_descr * md, int chip)¶ Get the first valid eraseblock suitable to store a BBT
Parameters
structnand_chip*this- the NAND device
structnand_bbt_descr*td- the BBT description
structnand_bbt_descr*md- the mirror BBT descriptor
intchip- the CHIP selector
Description
This functions returns a positive block number pointing a valid eraseblocksuitable to store a BBT (i.e. in the range reserved for BBT), or -ENOSPC ifall blocks are already used of marked bad. If td->pages[chip] was alreadypointing to a valid block we re-use it, otherwise we search for the nextvalid one.
- void
mark_bbt_block_bad(structnand_chip * this, struct nand_bbt_descr * td, int chip, int block)¶ Mark one of the block reserved for BBT bad
Parameters
structnand_chip*this- the NAND device
structnand_bbt_descr*td- the BBT description
intchip- the CHIP selector
intblock- the BBT block to mark
Description
Blocks reserved for BBT can become bad. This functions is an helper to marksuch blocks as bad. It takes care of updating the in-memory BBT, marking theblock as bad using a bad block marker and invalidating the associatedtd->pages[] entry.
- int
write_bbt(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * td, struct nand_bbt_descr * md, int chipsel)¶ [GENERIC] (Re)write the bad block table
Parameters
structnand_chip*this- NAND chip object
uint8_t*buf- temporary buffer
structnand_bbt_descr*td- descriptor for the bad block table
structnand_bbt_descr*md- descriptor for the bad block table mirror
intchipsel- selector for a specific chip, -1 for all
Description
(Re)write the bad block table.
- int
nand_memory_bbt(structnand_chip * this, struct nand_bbt_descr * bd)¶ [GENERIC] create a memory based bad block table
Parameters
structnand_chip*this- NAND chip object
structnand_bbt_descr*bd- descriptor for the good/bad block search pattern
Description
The function creates a memory based bbt by scanning the device formanufacturer / software marked good / bad blocks.
- int
check_create(structnand_chip * this, uint8_t * buf, struct nand_bbt_descr * bd)¶ [GENERIC] create and write bbt(s) if necessary
Parameters
structnand_chip*this- the NAND device
uint8_t*buf- temporary buffer
structnand_bbt_descr*bd- descriptor for the good/bad block search pattern
Description
The function checks the results of the previous call to read_bbt and creates/ updates the bbt(s) if necessary. Creation is necessary if no bbt was foundfor the chip/device. Update is necessary if one of the tables is missing orthe version nr. of one table is less than the other.
Parameters
structnand_chip*this- the NAND device
loff_toffs- the offset of the newly marked block
Description
The function updates the bad block table(s).
- void
mark_bbt_region(structnand_chip * this, struct nand_bbt_descr * td)¶ [GENERIC] mark the bad block table regions
Parameters
structnand_chip*this- the NAND device
structnand_bbt_descr*td- bad block table descriptor
Description
The bad block table regions are marked as “bad” to prevent accidentalerasures / writes. The regions are identified by the mark 0x02.
- void
verify_bbt_descr(structnand_chip * this, struct nand_bbt_descr * bd)¶ verify the bad block description
Parameters
structnand_chip*this- the NAND device
structnand_bbt_descr*bd- the table to verify
Description
This functions performs a few sanity checks on the bad block descriptiontable.
- int
nand_scan_bbt(structnand_chip * this, struct nand_bbt_descr * bd)¶ [NAND Interface] scan, find, read and maybe create bad block table(s)
Parameters
structnand_chip*this- the NAND device
structnand_bbt_descr*bd- descriptor for the good/bad block search pattern
Description
The function checks, if a bad block table(s) is/are already available. Ifnot it scans the device for manufacturer marked good / bad blocks and writesthe bad block table(s) to the selected place.
The bad block table memory is allocated here. It must be freed by callingthe nand_free_bbt function.
Parameters
structnand_chip*this- NAND chip to create descriptor for
Description
This function allocates and initializes a nand_bbt_descr for BBM detectionbased on the properties ofthis. The new descriptor is stored inthis->badblock_pattern. Thus, this->badblock_pattern should be NULL whenpassed to this function.
- int
nand_isreserved_bbt(structnand_chip * this, loff_t offs)¶ [NAND Interface] Check if a block is reserved
Parameters
structnand_chip*this- NAND chip object
loff_toffs- offset in the device
- int
nand_isbad_bbt(structnand_chip * this, loff_t offs, int allowbbt)¶ [NAND Interface] Check if a block is bad
Parameters
structnand_chip*this- NAND chip object
loff_toffs- offset in the device
intallowbbt- allow access to bad block table region
- int
nand_markbad_bbt(structnand_chip * this, loff_t offs)¶ [NAND Interface] Mark a block bad in the BBT
Parameters
structnand_chip*this- NAND chip object
loff_toffs- offset of the bad block
Credits¶
The following people have contributed to the NAND driver:
- Steven J. Hillsjhill@realitydiluted.com
- David Woodhousedwmw2@infradead.org
- Thomas Gleixnertglx@linutronix.de
A lot of users have provided bugfixes, improvements and helping handsfor testing. Thanks a lot.
The following people have contributed to this document:
- Thomas Gleixnertglx@linutronix.de