Apple II FPGA Co-Processor

• UpdatedJan 22, 2025
• HTML

Вектор-06ц в ПЛИС / Vector-06c in FPGA

• UpdatedOct 22, 2024
• Verilog

RISC-V implementation of RV32I for FPGA board Tang Nano 9K utilizing on-board burst PSRAM, flash and SD card

• UpdatedMar 23, 2025
• SystemVerilog

Atari 2600 VCS core for the Tang Nano 9k Nano 20K Primer 20k Primer 25K, Mega 60k and Mega 138K Pro FPGA

• UpdatedMar 10, 2025
• VHDL

USB PD cc pin monitor implemented in a Tang Nano 9K FPGA.

• UpdatedFeb 11, 2024
• SystemVerilog

Commodore VIC20 core for the Tang Nano 9K FPGA with LCD Output

• UpdatedFeb 16, 2025
• VHDL

Commodore VIC-20 core for the Tang Nano 9k FPGA

• UpdatedFeb 16, 2025
• VHDL

6502 SBC in a Gowin GW1NR-9 FPGA on a Sipeed Tang Nano 9k

• UpdatedNov 14, 2023
• VHDL

Zilog Z8 softcore in verilog

• UpdatedMay 19, 2024
• SystemVerilog

experiments with simple CPU design

• UpdatedJun 18, 2024
• Verilog

UART interface to a block ram in the Tang Nano 9k FPGA. No pin connections needed, just use the USB UART.

• UpdatedJan 2, 2023
• SystemVerilog

HDMI for Tang Nano 9K

• UpdatedAug 20, 2023
• SystemVerilog

A small and cheap triggering system for side channel attacks using Gowin FPGA

• UpdatedOct 24, 2024
• Verilog

This is a re-write of my previous trigger project. This time Tang Nano 9k is the target hardware and the USB UART is used to configure and enable triggering.

• UpdatedJul 7, 2023
• SystemVerilog

8-bit CPU with custom ISA + assembler

• UpdatedOct 12, 2024
• Verilog