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The-OpenROAD-Project /OpenLane

Star1.4k

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

UpdatedFeb 26, 2025
Python

arm-university /Advanced-System-on-Chip-Design-Education-Kit

Star94

Design, implement, and test an Arm Cortex-A-based SoCs on FPGA hardware using functional specifications, standard hardware description and software programming languages

arm fpga armv7 hardware-designs cortex-a amba cortex-a9 arm-cortex-a9 soc-design system-on-chip-design zybo-z7-10

UpdatedJul 26, 2024
HTML

arm-university /Fundamentals-of-System-on-Chip-Design-on-Arm-Cortex-M-Microcontrollers

Star32

A textbook on understanding system on chip design

fpga embedded-systems textbook cmsis soc fpga-soc trustzone amba cpu-architecture arm-cortex-m soc-design system-on-chip-design bus-architecture

UpdatedJul 19, 2023

nekosilverfox /ZYNQ

Star31

⚙️ 基于 Zynq-7 全可编程 SoC 的设计

sdk fpga zynq verilog xilinx vivado zynq-7010 zynq-7000 soc-fpga zynq-7020 soc-design

UpdatedDec 31, 2021
HTML

arm-university /System-on-Chip-Design-with-Arm-Cortex-M-Processors

Star25

A reference book on System-on-Chip Design

cortex-m embedded-systems software-design amba arm-cortex-m soc-design keil-mdk system-on-chip-design bus-architecture cortex-m-processors reference-book

UpdatedApr 5, 2024

arm-university /Modern-System-on-Chip-Design-on-Arm

Star24

A textbook on system on chip design using Arm Cortex-A

textbook hardware-designs computer-architecture soc fpga-soc system-design soc-design system-on-chip-design arm-cortex-a

UpdatedMay 14, 2024

RISMicroDevices /OpenNCB

Star9

Open-source Non-coherent CHI Bridge (CHI SN-F to AXI-4 bridge)

bus chisel chisel3 soc chi axi amba protocol-converter axi4 amba-axi soc-design amba-chi protocol-bridge

UpdatedOct 9, 2024
Scala

Vor-Art /DCD_MultiBankMemory

Star7

SystemVerilog implementation of a multi-bank memory as part of "[F23] Digital Circuit Design" course

fpga throughput systemverilog innopolis-university soc-design multibank-memory

UpdatedDec 19, 2023
SystemVerilog

iamstan13y /fomalhaut-microservices

Star6

bootstrap docker redis mongodb postgresql web-api asp-net-core dapper grpc-service microservices-architecture solid-principles fluentvalidation rabbit-mq mediator-pattern razor-pages cqrs-pattern soc-design aggregator-services ocelot-api-gateway

UpdatedMay 9, 2024
C#

Entries for the 2023 5th National College Student Integrated Circuit EDA Elite Challenge. SoC chip physical layout static IR drop prediction project based on methods such as image processing and NLP unsupervised learning.

machine-learning word2vec cnn power-network unsupervised-learning pix2pix vlsi-physical-design signoff u-net electronic-design-automation soc-design u-net-pytorch physical-layout-analysis ir-drop