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shawntsai0312 /NTUEE_DIGITAL_CIRCUIT_LAB_24FALL

NTUEE Digital Circuit Lab 24Fall

fpga rtl verilog ntu ic-design ntuee quartus2

UpdatedJan 13, 2025
SystemVerilog

1075224835 /MyDigitalClock

2019年UPC应用物理专业《数字电子技术课程设计》任务内容：数字时钟设计

verilog upc verilog-hdl quartus digitalclock quartus2

UpdatedJul 2, 2019
Verilog

tocache /Altera-Cyclone-II-FPGA

Repositorio de proyectos hechos en el Quartus II para el FPGA Cyclone II

fpga vhdl altera vhdl-modules quartus vhdl-code vhdl-examples quartus2

UpdatedJun 10, 2024
C

topofkeks /arilla

Arilla - a RISC-V based microcomputer system, with a PS2 mouse controller and 12-bit RGB SVGA graphics card, running Arilla Paint.

riscv computer-architecture paint-application risc-v vga-controller quartus2 de0-board ps2-mouse

UpdatedSep 7, 2021
VHDL

NeilNie /LC-3

Verilog Implementation of the LC-3 Processor. DA CS 603

verilog quartus lc-3 quartus2

UpdatedMar 6, 2019
HTML

DavidRosero /FPGAWorldCodes

Ejemplos de codigo con implementación en hardware para la tarjeta Cyclone IV lenguaje VHDL

fpga cyclone-iv vhdl-code quartus2

UpdatedApr 15, 2024
VHDL

joonicks /BizzasCPU

Bizzas CPU design

fpga quartus 8-bit-cpu quartus2 cpu-design

UpdatedOct 31, 2021
C

furkankayar /DEUARC

DEUARC RISC computer design in Quartus II 13.0

processor-architecture risc quartus2

UpdatedFeb 23, 2020
VHDL

pa-tiq /DE0_FIR_Filter

FIR filter for Altera DE0 EP3C16F484C6N Created on top of SURF VHDL FIR Filter

UpdatedDec 6, 2020
VHDL

LoicKonan /Logic-Design

Logic Design.

vhdl boolean-expression logic-gates boolean-algebra quartus2

UpdatedApr 16, 2022
VHDL

Chrisdeleon91 /Altera-DE1-VGA-Interface

Integrated and programmed a VGA Interface using the Altera DE1 to output in synchronization with a custom programmed finite-state machine.

fsm vhdl intel finite-state-machine quartus-prime vga-driver vga-controller altera-fpga vhdl-coursework quartus2 altera-de1

UpdatedFeb 7, 2023
VHDL

errray /fpga-spaceship

This space ship game project, where the spaceship is positioned at the center and objects coming from different directions can be hit using FPGA buttons, has been implemented with Verilog coding in quartus environment for Altera System-on-Chip (SoC) FPGA and VGA for display.

altera de1-soc verilog-project quartus2 fpga-programming

UpdatedAug 28, 2024
Verilog

Everloom-129 /ECE385-Digital-Systems-Lab

The goal of ECE 385 course is to teach students to design, build, and test/debug a digital system, which can be a 16-bit microprocessor, a dedicated logic core, or a system-on-a-chip (SoC) platform

systemverilog system-programming system-on-chip quartus2 ece385

UpdatedMay 28, 2024
Verilog

jimfangx /DE2-70-Bringup

Assorted Verilog that brings up different elements (VGA, Ethernet, Switches, LED, LCD, etc.) of the terasIC DE2-70 Development Board.

fpga verilog ethernet altera modelsim vga nios2 vga-controller quartus2 terasic de2-70

UpdatedJun 26, 2024
C

jrg94 /EECS301

CWRU's Logic Lab

fpga verilog quartus2

UpdatedAug 18, 2018
Verilog

KonstantinosVasilopoulos /aueb_processor

A 16 bit processor, following the RISC architecture. Made with Quartus and VHDL.

processor vhdl alu 16-bit quartus risc-processor processor-design quartus2

UpdatedJun 22, 2022
HTML

rusito-23 /arki

Quartus II Pipelined Processor

pipeline-processor system-verilog quartus2

UpdatedNov 14, 2019
SystemVerilog

marcelovalois /projetoULA

Projeto de uma ULA feito em Quartus II para a disciplina de Sistemas Digitais (2019.1)

UpdatedJul 17, 2020
HTML

jesusjimsa /Desarrollo-de-Hardware-Digital-UGR

Prácticas de la asignatura de Desarrollo de Hardware Digital en la UGR

fpga vhdl ugr altera quartus quartus2 dhd

UpdatedMay 30, 2019
VHDL

abdelrahman-alaa-10 /FIFO_Memory

A digital design implementation of a FIFO memory circuit using VHDL simulated in Quartus.

electronics vhdl hardware-designs quartus2

UpdatedJun 11, 2024
VHDL

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