Sunflower Full-System Hardware Emulator and Physical System Simulator for Sensor-Driven Systems. Built-in architecture modeling of Hitachi SH (j-core), RISC-V, and more.

• UpdatedJan 31, 2025
• C

FRISC processor simulator in JavaScript

• UpdatedDec 30, 2024
• JavaScript

Super scalar Processor design

• UpdatedSep 7, 2014
• Verilog

A simulation of the Tomasulo algorithm, a hardware algorithm for out-of-order scheduling and execution of computer instructions, written in C++.

• UpdatedApr 22, 2017
• C++

Modular Graphical Simulator for Teaching Microprogramming

• UpdatedDec 16, 2024
• Java

Common-Lisp simulation and FPGA implementation of MIT's Scheme-79 chip

• UpdatedOct 19, 2022
• Common Lisp

Single Bus Processor - Summer Project 2016

• UpdatedApr 8, 2018
• Verilog

A C++ pipeline based simulator of RSIC architecture.

• UpdatedJun 16, 2020
• C++

MIPS Pipelined CPU simulation using VHDL language

• UpdatedMay 30, 2020
• VHDL

CZ3001 Advanced Computer Architecture, AY 2015-16 Semester 1

• UpdatedApr 12, 2016
• Verilog

2021-22 Summer Project in Computer Science

• UpdatedNov 11, 2022
• Assembly

An 8-bit processor in VHDL based on a simple instruction set

• UpdatedMar 7, 2019
• VHDL

• UpdatedMar 24, 2024
• Java

An imaginary 16-bit CPU architecture with custom assembly language and instructions

• UpdatedDec 14, 2023
• Python

💻 MIPS Pipeline Processor simulator

• UpdatedJun 16, 2020
• Python

Processor emulator with assembler-type code

• UpdatedDec 11, 2020
• C++

A 6502 Microprocessor (accurately W65C02S) Simulator.

• UpdatedJan 1, 2023
• C++

SST Juno Processor Model

• UpdatedOct 16, 2024
• C++

A superscalar out-of‐order architectural simulator (With Memory Hierarchy).

• UpdatedDec 10, 2016
• Java

A superscalar processor in Python

• UpdatedJun 6, 2017
• Python