openroad

OpenLane is an automated RTL to GDSII flow based on several components including OpenROAD, Yosys, Magic, Netgen and custom methodology scripts for design exploration and optimization.

magic asic rtl verilog vlsi foundry yosys klayout caravel netgen system-on-chip openroad openram skywater 130nm soc-design rtl2gds

UpdatedFeb 26, 2025
Python

The-OpenROAD-Project /OpenROAD-flow-scripts

Star389

OpenROAD's scripts implementing an RTL-to-GDS Flow. Documentation athttps://openroad-flow-scripts.readthedocs.io/en/latest/

tcl eda rtl verilog def gdsii timing-analysis openroad lef opendb-database

UpdatedMar 19, 2025
Verilog

google /gf180mcu-pdk

Star388

PDK for GlobalFoundries' 180nm MCU bulk process technology (GF180MCU).

asic eda pdk openroad 180nm globalfoundries gf180mcu

UpdatedMay 31, 2023
Makefile

efabless /caravel

Star320

Caravel is a standard SoC template with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad vexriscv openram sky130

UpdatedFeb 26, 2025
Verilog

efabless /openlane2

Star276

The next generation of OpenLane, rewritten from scratch with a modular architecture

flow asic eda verilog vlsi pnr silicon lvs flows sta gdsii drc pdk openroad openlane sky130 gf180mcu rtl-to-gds

UpdatedFeb 26, 2025
Python

efabless /caravel_mpw-one

Star134

Caravel is a standard SoC hardness with on chip resources to control and read/write operations from a user-dedicated space.

magic yosys caravel picorv32 openroad openram sky130

UpdatedFeb 22, 2022
Verilog

google /open-source-pdks

Star92

Index of the fully open source process design kits (PDKs) maintained by Google.

asic eda silicon pdk openroad skywater 130nm sky130 180nm globalfoundries gf180mcu

UpdatedSep 4, 2022

google /globalfoundries-pdk-libs-gf180mcu_fd_pr

Star48

Primitives for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm globalfoundries gf180mcu

UpdatedAug 28, 2023
Python

daquintero /piel

Star45

Photonic Integrated ELectronics. Microservices to codesign photonics, electronics, quantum, and more.

system electronics optimization quantum codesign photonics openroad gdsfactory

UpdatedNov 28, 2024
Python

google /skywater-pdk-libs-sky130_fd_pr_reram

Star37

SKY130 ReRAM and examples (SkyWater Provided)

asic eda silicon ngspice xyce pdk openroad reram skywater 130nm

UpdatedApr 20, 2022

google /globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu7t5v0

Star26

7 track standard cells for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm standard-cells globalfoundries gf180mcu

UpdatedDec 1, 2022
Verilog

google /globalfoundries-pdk-ip-gf180mcu_fd_ip_sram

Star17

SRAM macros created for the GF180MCU provided by GlobalFoundries.

asic eda ip sram pdk openroad 180nm globalfoundries gf180mcu

UpdatedApr 10, 2023
Verilog

google /globalfoundries-pdk-libs-gf180mcu_fd_sc_mcu9t5v0

Star16

9 track standard cells for GF180MCU provided by GlobalFoundries.

asic eda pdk openroad 180nm standard-cells globalfoundries gf180mcu

UpdatedDec 5, 2022
Verilog

google /skywater-pdk-libs-sky130_fd_sc_hd

Star16

"High density" digital standard cells for SKY130 provided by SkyWater.

asic eda ic silicon integrated-circuits openroad sky130 standard-cells

UpdatedFeb 22, 2023
Verilog

aasthadave9 /Advanced-Physical-Design-Using-OpenLANE-Sky130

Star15

This repository documents my work on Advanced Physical Design Using OpenLANE/Sky130. The objective of this project was to implement an opensource RTL2GDS flow using OpenLANE and opensource PDK provided by Google/SkyWater130

linux open-source asic hardware vlsi-physical-design openroad rtl2gds openlane sky130