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high-level-synthesis

Here are 127 public repositories matching this topic...

XLS: Accelerated HW Synthesis

  • UpdatedMar 27, 2025
  • C++

A C-like hardware description language (HDL) adding high level synthesis(HLS)-like automatic pipelining as a language construct/compiler feature.

  • UpdatedMar 26, 2025
  • VHDL
calyx

Intermediate Language (IL) for Hardware Accelerator Generators

  • UpdatedMar 27, 2025
  • Rust

DaCe - Data Centric Parallel Programming

  • UpdatedMar 27, 2025
  • Python

NNgen: A Fully-Customizable Hardware Synthesis Compiler for Deep Neural Network

  • UpdatedOct 17, 2023
  • Python

HeteroCL: A Multi-Paradigm Programming Infrastructure for Software-Defined Heterogeneous Computing

  • UpdatedApr 20, 2024
  • Python

Scalable systolic array-based matrix-matrix multiplication implemented in Vivado HLS for Xilinx FPGAs.

  • UpdatedJan 20, 2025
  • C++

A collection of extensions for Vitis and Intel FPGA OpenCL to improve developer quality of life.

  • UpdatedJan 20, 2025
  • C++

FPGA Accelerator for CNN using Vivado HLS

  • UpdatedOct 25, 2021
  • C++

Veriloggen: A Mixed-Paradigm Hardware Construction Framework

  • UpdatedAug 10, 2024
  • Python

PandA-bambu public repository

  • UpdatedMar 27, 2025
  • C++
poprc

Allo: A Programming Model for Composable Accelerator Design

  • UpdatedMar 26, 2025
  • Python

Examples shown as part of the tutorial "Productive parallel programming on FPGA with high-level synthesis".

  • UpdatedNov 14, 2021
  • C++

Time-sensitive affine types for predictable hardware generation

  • UpdatedJul 18, 2024
  • Scala

Polyphony is Python based High-Level Synthesis compiler.

  • UpdatedJan 29, 2025
  • Python

A formally verified high-level synthesis tool based on CompCert and written in Coq.

  • UpdatedJun 20, 2024
  • Coq

High-Performance Sparse Linear Algebra on HBM-Equipped FPGAs Using HLS

  • UpdatedSep 27, 2024
  • C++

A graph linear algebra overlay

  • UpdatedApr 26, 2023
  • C++

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