hardware-accelerator

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cucapra /filament

Star176

Fearless hardware design

fpga type-system hardware-description-language hardware-accelerator

UpdatedApr 9, 2025
Verilog

BoooC /CNN-Accelerator-Based-on-Eyeriss-v2

Star63

A Flexible and Energy Efficient Accelerator For Sparse Convolution Neural Network

deep-neural-networks accelerator convolutional-neural-networks sparse-matrix gemm noc im2col hardware-accelerator eyeriss-v2

UpdatedFeb 22, 2025
Verilog

SneakySnake:snake: is the first and the only pre-alignment filtering algorithm that works efficiently and fast on modern CPU, FPGA, and GPU architectures. It greatly (by more than two orders of magnitude) expedites sequence alignment calculation for both short and long reads. Described in the Bioinformatics (2020) by Alser et al.https://arxiv.o…

fpga gpu smith-waterman needleman-wunsch sequence-alignment long-reads minimap2 short-reads hardware-accelerator sequence-aligner edlib pre-alignment-filtering wavefront-alignment

UpdatedMar 31, 2023
VHDL

yonseicasl /NPUsim

Star34

NPUsim: Full-Model, Cycle-Level, and Value-Aware Simulator for DNN Accelerators

machine-learning acceleration simulator deep-learning memory model accelerator architecture modeling hierarchy cycle-accurate deep-neural-network npu hardware-accelerator full-system value-aware functional-simulation timing-simulation

UpdatedJan 2, 2025
C++

phial3 /rsmedia

Star34

audio/video toolkit based FFmpeg 6.x, 7.x supported for multimedia with Hardware Acceleration.

video ffmpeg multimedia media video-streaming mux hardware-acceleration encoder-decoder muxer hardware-accelerator muxed-streams

UpdatedApr 11, 2025
Rust

Intuity /nexus

Star25

Open source RTL simulation acceleration on commodity hardware

hardware simulation rtl verilog systemverilog hardware-acceleration hardware-accelerator hardware-accelerators

UpdatedApr 13, 2023
Python

yonseicasl /NeuroSpector

Star20

NeuroSpector: Dataflow and Mapping Optimizer for Deep Neural Network Accelerators

machine-learning acceleration deep-learning mapping optimization accelerator scheduler architecture scheduling optimizer dataflow hierarchy deep-neural-network hardware-accelerator

UpdatedMar 20, 2025
C++

CMU-SAFARI /GenStore

Star13

GenStore is the first in-storage processing system designed for genome sequence analysis that greatly reduces both data movement and computational overheads of genome sequence analysis by exploiting low-cost and accurate in-storage filters. Described in the ASPLOS 2022 paper by Mansouri Ghiasi et al. athttps://people.inf.ethz.ch/omutlu/pub/GenS…

ftl ssd sequence-alignment read-mapping long-reads hardware-accelerator near-data-processing pre-alignment-filtering in-storage-processing exact-matching