Francisco Javier Reina Campo PacoReinaCampo

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Working from home

I am an Electronic Engineer specialized in digital design and verification, with emphasis on Hardware Description Languages ((System)Verilog, VHDL).

Achievements

MPSoC-DVMPSoC-DVPublic
Multi-Processor System on Chip verified with UVM/OSVVM/FV
SystemVerilog 28 15
MPSoC-NoCMPSoC-NoCPublic
Network on Chip for MPSoC
SystemVerilog 26 8
SoC-DVSoC-DVPublic
System on Chip verified with UVM/OSVVM/FV
SystemVerilog 23 7
SoC-RISCVSoC-RISCVPublic
System on Chip with RISCV-32 / RISCV-64 / RISCV-128
SystemVerilog 22 10
PU-RISCVPU-RISCVPublic
Processing Unit with RISCV-32 / RISCV-64 / RISCV-128
SystemVerilog 19 7
verilog2vhdlverilog2vhdlPublic
Hardware Description Language Translator
SystemVerilog 17 3