My LA is agilent 16702. When I use the 400MHz internal clock to samplethe clock pin and the data pin with probes, I can see them nicely on the...
My LA is agilent 16702. When I use the 400MHz internal clock to samplethe clock pin and the data pin with probes, I can see them nicely on the LA,and positive edge of the clock is right in the middle of the data. When Ichangeto sampling data with my external clock pin, LA told me the clock is tooweakand can not see a clock in the top-right banner. Of course, I don't see anydata.W...
hi, when i read rtl8139 driver's source, there's a macro like this:#define EE_SHIFT_CLK0x04/* EEPROM shift clock. */the comment say it is a...
hi, when i read rtl8139 driver's source, there's a macro like this:#define EE_SHIFT_CLK0x04/* EEPROM shift clock. */the comment say it is a eeprom shift clock.can any one tell me what is shift clock.and what it is used to do?
Hello,has anybody hard facts what the requirements for the ration between Jtag/SWDclock and MCU clock is. Main interest is for Cortex-M, but...
Hello,has anybody hard facts what the requirements for the ration between Jtag/SWDclock and MCU clock is. Main interest is for Cortex-M, but facts for otherarchs are welcome. Information floating aound in the net tells abound afactor of 6, but some people tell about successfull SWD communication evenwith a MCU clock much slower than the SWD clock.Thanks-- Uwe Bonnes ...
Hi all,I am trying to calculate clock cycles per instructions by running thetest cases and monitoring the waveforms.I am confused to...
Hi all,I am trying to calculate clock cycles per instructions by running thetest cases and monitoring the waveforms.I am confused to calculate the cycles for memory and IO relatedinstructions...For exampleMOV AL,33H ------> Took 3 clk cycles for my designOUT 32H,AL------> Fetching and decoding takes ----10 clock cycles write in to memory starts after three clock cycles of fetc
Hi all:I have been stuck on this problem for a while - can someone help me figurethis out? For the following instruction, the instruction set...
Hi all:I have been stuck on this problem for a while - can someone help me figurethis out? For the following instruction, the instruction set manual saysit should take 5 clock cycles, whereas according to my measurements usingan oscilloscope, I should get 4 clock cycles. What could be the reason forthe difference? I am using TelosB.add #1, -4(r4)-------------------------------...
helloi'm a quite newby to embedded systems and have some basic questions toyou.i'd like to build up a alarm clock which has some special...
helloi'm a quite newby to embedded systems and have some basic questions toyou.i'd like to build up a alarm clock which has some special features as:- radio controlled- LED projection on wall/ceiling- fully customizeable awake times (this is the main reason), eg. mo,fri, 14.4.2007 .....of course the clock needs to have a display with backlight (onkeypress)sounds like a ...
Hello all:I have a 6.144Mhz crystal and I am trying to generate the 9600*16 ~ 154k clock needed by the8251 UART and the ~ 1Mhz system...
Hello all:I have a 6.144Mhz crystal and I am trying to generate the 9600*16 ~ 154k clock needed by the8251 UART and the ~ 1Mhz system clock.I dont want to use the 74ls* series ripplecounters and I have a bunch of 22v10 PAL chipslying around.I have been thinking about how best to do this,using what I have.Basically I need to divide the 6.144Mhz by 40.First by 5 to real...
Hi,Here is my suggestion to turn your oscilloscope into a clock with a PIC a 4 resistors...
Hi,Here is my suggestion to turn your oscilloscope into a clock with a PIC a 4 resistors :http://www.micro-examples.com/public/microex-navig/doc/082-pic-oscillo-clockI'm opened to your destructive comments :)Bruno
hi,i am trying with SPI code provided for LPC2138 provided on philipssite.but its strange that i am not able to observe the clock output...
hi,i am trying with SPI code provided for LPC2138 provided on philipssite.but its strange that i am not able to observe the clock output onCRO. i have tried with a resistor connected in series with clockoutput before connecting on CRO probe.also i have provided high to theSSEL pin of LPC2138 to configure to as master. now i m observing clockoutput on its SPICLK pin with common ground....
I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS and use the PWM output to clock an external ADC without introducing the...
I'm trying to figure out if I can run the dsPIC33 at the maximum 40MIPS and use the PWM output to clock an external ADC without introducing the phase noise(into the ADC) associated with the internal clock PLL. Is there a way to have the dsPIC processor use the clock PLL but have the PWM circuitry directly referenced to the external clock?Thomas
I have an odd little problem, I'm hoping one of you could shed some light on it before I spend hours tracking it down.I'm working on a board...
I have an odd little problem, I'm hoping one of you could shed some light on it before I spend hours tracking it down.I'm working on a board with a PIC18F8722. We're setting it up to work in external clock mode with a 40MHz clock. This clock is, in turn, sourced by an integrated oscillator module from ECS (ECS-8FM).The problem that we're seeing is that sometimes the thing comes up ...
Hi,I need to use the USART in AT91SAM9260 working under Linux OS (quiteold 2.6.29.3 version, due to compatibility with some parts of...
Hi,I need to use the USART in AT91SAM9260 working under Linux OS (quiteold 2.6.29.3 version, due to compatibility with some parts of thesystem) to communicate with peripheral sending data in synchronousmode with clock 6MHz. The peripheral provides clock.The standard atmel_serial.c driver does not seem to support operationwith external clock neither the synchronous mode. (In fact it...
Hello I am new to AtmelI am trying to make a data collecting device and send data over GPRSbut problem is I need to integrate real time clock...
Hello I am new to AtmelI am trying to make a data collecting device and send data over GPRSbut problem is I need to integrate real time clock calender in the deviceto gather information when the data is collected?There are two options1.Use Atmega128 timer/clock2.Use separate chip with clock calenderBut i need to have separate battery powered system to keep the time up todate so...
comp.arch.embeddedatmega48 adc at faster than best clock speedsAtmel's atmega48 manual states the adc clock should run between 100 kcs &...
comp.arch.embeddedatmega48 adc at faster than best clock speedsAtmel's atmega48 manual states the adc clock should run between 100 kcs & 200 kcs for best, most accurate conversions. They also state that higher clock rates can be used, presumably when a higher sampling rate is to greater advantage than best accuracy.Has anyone checked the accuracy of these converters when used with ...
Hi Folks,altough brand new I hope someone already made some experience with Virtex-5. I just switched from Virtex-4 to Virtex-5 and I...
Hi Folks,altough brand new I hope someone already made some experience with Virtex-5. I just switched from Virtex-4 to Virtex-5 and I must admit that the clock managment is... and remains... somewhat unclear to me!It's plain to see that the clock management is handled a bit differently than Virtex-4. Virtex-5 clocking uses both DCM (digital clock managers) technology for delay ...
I have to generate digital PWM from UP-1 board.ALTERA UP-1 board hasinternal clock where the value is 25 MHz. These clock needs to be...
I have to generate digital PWM from UP-1 board.ALTERA UP-1 board hasinternal clock where the value is 25 MHz. These clock needs to be dividedfirst in order to can create PWM with 40 kHz frequency and 0.75 dutycycle.Can someone send me a VHDL CODE for a clock divider. Please show byexample, I'm new to logic design.Thanks,jebei
Followup to the message I posted the other week about Nokia 2260 LCDsfor my Babylonian clock... the electronics are now working.The clock...
Followup to the message I posted the other week about Nokia 2260 LCDsfor my Babylonian clock... the electronics are now working.The clock starts at 10:12:10 and ends at 10:13:08 in this video; youget to see most of the digits. It was slightly tricky to fit the 59 digits (at 32 x 22 pixels) intothe 2K MSP430; I wound up making a set of sub-
Hello,I have a design with 2 clocks provied to my FPGA (Spartan 3-A). The first one comes from an external oscillator @ 50MHZ. The second...
Hello,I have a design with 2 clocks provied to my FPGA (Spartan 3-A). The first one comes from an external oscillator @ 50MHZ. The second one also comes from an external BUS clock (75MHZ).The 75MHZ is the main system clock. It is used to feed an internal AMBAbus.The 50MHZ is needed to compute with precision a frame (customer need) witha very low BER.How can I synchronize those ...
hello,I am working on a cypress chip. I want the communication between endpointsand host to work on external clock. Is it possible for chip to...
hello,I am working on a cypress chip. I want the communication between endpointsand host to work on external clock. Is it possible for chip to work onexternal clock without being in Slave FIFO or GPIF mode?RegardsSanika
If you have more than one (3 or 4) component that you want to run onthe same clock. What clock source is used in this case and what isthe...
If you have more than one (3 or 4) component that you want to run onthe same clock. What clock source is used in this case and what isthe best way to distribute it?Thank you,A
