Overview

AMD adaptive SoCs and FPGAs support many different memory technologies internal or external to the device. With programmable logic often being used as accelerators in processing platforms, many AMD devices support all cache coherent interfaces, including the CCIX open standard and CXL®.

  • Internal Memory: UltraScale+™ devices add 288 Kb UltraRAM to established internal memory types
  • High Bandwidth Memory: 3D IC memory for higher bandwidth relative to DDR4/DDR5 solutions
  • Parallel External Memory: Flexible interfaces to LPDDR5X, DDR5, LPDDR4, DDR4, RLDRAM3, and QDRIV
 Versal™ Adaptive SoCUltraScale+UltraScale™7 SeriesSpartan™ 6
Block RAM239 Mb94 Mb36 Kb50 Mb4 Mb
UltraRAM717 Mb360 Mb
High Bandwidth Memory (HBM)32 GB16 GB
External Max Data Rate8533 Mb/s2667 Mb/s2400 Mb/s1866 Mb/s800 Mb/s

 

Internal Memory (HBM, RAM)

Integrated HBM and RAM

AMD products contain different types of internal memory for different design needs.

  • Distributed RAM uses LUTs for coefficient storage, state machines, and small buffers
  • Block RAM is useful for fast, flexible data storage and buffering
  • UltraRAM blocks each provide 288 Kb and can be cascaded for large on-chip storage capacity
  • HBM (High Bandwidth Memory) is ideal for high capacity with higher bandwidth relative to discrete memory solutions
 Versal Adaptive SoCUltraScale+UltraScale7 SeriesSpartan 6
Distributed RAM Size64-bit64-bit64-bit64-bit64-bit
Distributed RAM Capacity Range0.6 – 258 Mb1.2 Mb – 48.3 Mb4.1 Mb – 28.7 Mb70 Kb – 21 Mb75 Kb – 1.3 Mb
Block RAM Size36 Kb36 Kb36 Kb36 Kb18 Kb
Block RAM Capacity Range0.8 Mb – 239 Mb5.3 Mb – 94.5 Mb12.7 – 132.9 Mb180 Kb – 66.1 Mb216 Kb – 4.7 Mb
UltraRAM Size288 Kb288 Kb
UltraRAM Capacity Range6.8 Mb – 717 Mb90 Mb – 360 Mb
HBM Stack Size8 GB – 16 GB4 GB – 8 GB
HBM Capacity Range8GB – 32 GB4 GB – 16 GB

External Memory Interfaces

AMD offers a comprehensive set of physical layer memory interfaces and memory controllers for varied bandwidth, efficiency, and low latency requirements. Based on a rigorous characterization process to determine specifications, supported interfaces include LPDDR5X, LPDDR5, and LPDDR4 components, DDR5, DDR4, and DDR3 multi-rank DIMMs, including UDIMM, SODIMM, and RDIMM. Refer to the following tools to plan your memory interface design and implementation:

AMD memory controllers are included in the Vivado™ IP Catalog at no extra charge.

Refer to the device data sheet for a full list of supported memory standards and maximum data rates.

Tools

AMD provides best-in-class tools to estimate memory performance, interface capacity, and power consumption to maximize performance-per-watt and accelerate design and implementation. Below are a variety of memory- and power-related tools to get started today.

Memory Selection Guide

Relative MeritDDR4 DIMMHMCRLDRAM 3QDR-IVLPDDR4Virtex UltraScale+ HBM DeviceVersal HBM Adaptive SoC
Bandwidth21 GB/s160 GB/s10.8 GB/s16.8 GB/s9.6 GB/s460 GB/s820 GB/s
Density32 GB2 GB280 MB
(0.280 GB)
18 MB
(0.018 GB)
4 GB16 GB32 GB
Price / GB$$$$$$$$$$$$$$
PCB RequirementHighMediumHighHighHigh
NoneNone
Power (pJ/bit)~27~30~40~27~19~7~6
LatencyMedHighLowLowMedMedMed

Resources

Versal Memory and Network on Chip (NoC) Tutorials

Learn how to build designs leveraging the network on chip and integrated memory controllers on Versal adaptive SoCs.

Tackle Memory Bottlenecks with the Versal HBM Series

Take five minutes and learn all you need to know about leveraging High Bandwidth Memory to tackle memory bottlenecks in your next embedded design.

UltraRAM: Breakthrough Embedded Memory

UltraRAM is a new memory block in UltraScale+ families that enables up to 500 Mb of total on-chip storage, equating to a 6X increase in on-chip memory vs. 28 nm AMD FPGAs.

Memory Interfaces with UltraScale Architecture FPGAs

Devices based on AMD UltraScale architecture, used in conjunction with DDR4 DRAMs, provide highly significant gains over previous generations in memory interface bandwidth, flexibility, and power use efficiency.

Visit Documentation Hub

Find solution briefs, product datasheets, and more on the AMD Documentation Hub.

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