PIC32MZ Oscillator - System Clock (SYSCLK)
System Clock (SYSCLK) Generation
The System Clock provides the time base for theperipheral clocks, DMA, interrupts, and Flash. SYSCLK is determined from one of the input clocks:SPLL,POSC,FRCDIV,LPRC,BFRC, andSOSC.
The PIC32MX uses SYSCLK to drive the core. This isNOT true for the PIC32MZ. The PIC32MZ core clock is provided by Peripheral Bus Clock #7 (PBCLK7).
You cannot choose to use the BFRC for SYSCLK. Only the hardware will use this when the Fail-Safe Clock Monitor (FSCM) detects a problem.
The default configuration for SYSCLK is programmable and can also be changed at run-time. See the code examples below.
// default system clock = FRCDIV#pragma config FNOSC = FRCDIV// default system clock = SPLL#pragma config FNOSC = SPLL... // run-time config SYSCLK = FRCDIVPLIB_OSC_SysClockSelect(OSC_ID_0, OSC_FRC_BY_FRCDIV);// run-time config SYSCLK = POSC with SPLLPLIB_OSC_SysClockSelect(OSC_ID_0, OSC_PRIMARY_WITH_PLL);