1

Initialization of SAM V71 system.

• Initialize the system clock by callingsysclk_init. This involves setting up of flash wait states and programming of the system/peripheral clock(s).
• Initialize the SAM V71 Xplained Ultra Evaluation Kit by callingboard_init. This involves setting up the watchdog, memories, and I/O port.

2

Initialization of UART interface used as a debug console.
The UART is initialized by callingconfigure_console. The debug message is printed on the console. The debug message prints the name of the application ("— Audio sine tone using SSC on WM8904 —"), board name (SAMV71-XLTRA) and the date and time of compilation.

3

Initialization of serial interface to the WM8904 module.
The serial interface to the CODEC WM8904 is through TWI (for commands) and SSC (for data) peripherals. The WM8904 serial interface initialization maps the multiplexed I/O pins to be used by peripheral. It also sets up and enables the clock to TWI peripheral by callingwm8904_twi_init.

4

Configuration of CODEC WM8904 module, SSC and XDMAC peripherals.

• CODEC WM8904 is configured by calling functionconfigure_codec. Based on the source of the reference clock (PCK2), CODEC WM8904 is configured in master or slave mode as discussed in thesection on implementation of Audio CODEC Configuration.
• SSC peripheral is configured to interact with an I2S interfaced Codec WM8904 module by calling functionconfigure_ssc. Based on the source of the reference clock (PCK2), SSC is configured to act as master or slave of the audio data transfer as discussed in thesection on implementation of SSC configuration.
• XDMAC peripheral is configured to facilitate SSC peripheral’s interaction with I2S interfaced CODEC WM8904 module by calling functionconfigure_xdma. XDMAC is configured to implement a circular linked list of two transfer descriptors acting as ping-pong buffers of audio data transfer as discussed in thesection on implementation of XDMAC configuration.

5

Enable the CODEC master Clock.
The CODEC WM8904 is provided a reference clock (acting as MCLK) based on the oversampling rates supported by the CODEC.
Before setting up the prescaler for the reference clock, PCK2 clock source is disabled by callingpmc_disable_pck.
Setup the prescaler for the reference clock source by callingpmc_pck_set_prescaler. Based on the value of configuration macro PCK2, either a slow clock of 32768 Hz or a 12 MHz clock from the main source is selected by callingpmc_pck_set_source. The master clock to the CODEC is enabled by callingpmc_enable_pck.

6

Start Audio Playback.
Enable the SSC transmission by callingssc_enable_tx, and enable the XDMAC to start the data transfer by callingxdmac_channel_enable.

Once started, the playback continues as the audio sine data is stored in the form of a lookup table in the arrayAudioBuffer. When XDMAC is enabled, it starts placing the contents ofAudioBuffer onto the SSC transmit register. The XDMAC trigger for the next data transmission is the completion status of the last transaction. When theAudioBuffer transmission is completed, the XMDAC switches to the next descriptor in the linked list. The source address of the audio data in the linked list descriptor is same (AudioBuffer) as earlier. Transmission completes, as with earlier linked list descriptors and XDMAC moves back to the first descriptor in the list. The XDMAC switches between the two descriptors while transmitting the sine tone data through SSC to the CODEC. The CODEC WM8904 plays back the received data.