MIPS-3D ASE
Imagination's MIPS-3D graphics and multimedia extension gives developers of digital entertainment and multimedia products a new tool that simultaneously lowers the cost and improves the performance of their designs. The MIPS-3D extension is intended for 64-bit consumer applications that need three-dimensional graphics but require minimal implementation costs for low-power or System-on-Chip (SOC) solutions.
- MIPS-3D technology achieves 37 million polygons/sec for transform, clip check and perspective divide operations and 15 million polygons/sec with complex lighting operations.
- MIPS-3D technology is both a cost-effective and an efficient way to achieve high-performance 3D geometry processing within the context of a MIPS64® architecture. It eliminates the need to deploy expensive, dedicated 3D geometry engines and provides excellent code reduction and execution times in common 3D geometry and lighting operations.
- MIPS-3D technology extends the MIPS64 architecture and leverages the established infrastructure of software, development systems, operating systems and other hardware and software development tools designed for the MIPS® architecture.
Instruction Usage
CVT.PS.PW and CVT.PW.PS
Paired-single and paired-word instructions provide fast data format conversions.
ADDR and MULR
Reduction add and multiply instructions accelerate matrix multiplication, an important operation in vertex transformation.
CABS and BC1ANYnx
The absolute compare instruction and the multiple-condition code branch instruction are useful in image clipping, which consists of identifying and eliminating vertices that are outside the view volume.
RECIP1 and RECIP2
The perspective divide operation assists in transforming verticles to screen coordinates.
RSQRT1 and RSQRT2
Reciporcal square root instructions are used in the normalization functions found in infinite and local lighting.
MIPS-3D floating-point instructions exploit the MIPS64 floating-point unit and the paired-single data type. The PS (paired-single) operations provide 2-way SIMD (single instruction multiple data) capability by operating on two 32-bit floating-point values packed into a single 64-bit register. The primary use for paired-single is to implement 3D geometry operations, such as transforms, clip checking and lighting, and shading calculations. It is also useful in boosting the performance of floating-point digital signal processing.
MIPS-3D Instructions
| Mnemonic | Description |
| CVT.PS.PW | Convert two 32-bit integers to floating point paired-single |
| CVT.PW.PS | Convert floating point paired-single to two 32-bot integers |
| CABS | Floating point absolute compare |
| ADDR | Floating point reduction add |
| MULR | Floating point reduction multiply |
| RECIP1 | Reciprocal with reduced precision result |
| RECIP2 | Reciprocal second step |
| RSQRT1 | Reciprocal square root with reduced precsion result |
| RSQRT2 | Reciprocal square root second step |
BC1ANY2F
BC1ANY2T
BC1ANY4F
BC1ANY4T | Multiple condition code branch |
MIPS 16e ASE Summary
- Additional floating point instructions added to increase performance while performing graphics geometry operations, such as:
- Triangle transform
- Lighting code
- MIPS-3D technology is both a cost-effective and an efficient way to achieve high-performance 3D geometry processing within the context of a MIPS64® architecture
- It eliminates the need to deploy expensive, dedicated 3D geometry engines and provides excellent code reduction and execution times in common 3D operations
MIPS 16e ASE Features
- Reduction operations for paired-single floating-point data-type
- Floating-point reciprocal and reciprocal-square-root step instructions to allow reduced precision operations
- Convert paired-single floating point data-type to pair of integer words
- Absolute compare of floating-point values
- Use multiple floating-point condition bits for branch condition
MIPS 16e ASE Specifications
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