Behavior of stochastic circuits under severe error conditions
- Te-Hsuan Chen
Te-Hsuan Chen isa Ph. D. candidate in Computer Scienceand Engineering at the University of Michigan. Hereceived his B. S. andM. S. degrees in electricalengineering from the National Tsing Hua University,Hsinchu, Taiwan. His researchinterests include computer-aideddesign, design and testing of VLSIcircuits, error-correcting codingand unconventional computing methods.
2260 HaywardStreet, University of Michigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-6411
,Armin AlaghiArmin Alaghi received hisB. Sc. degree in electricalengineering (2006) and M. Sc. degreein computer architecture (2009) from the University ofTehran, Iran. He is currentlya Ph. D. candidate at the University ofMichigan. His research interests include digital systemdesign and testing, approximatecomputing, and embedded computing.His current research focuses on stochastic computing.
2260 HaywardStreet, University ofMichigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-6411
Prof. John P. Hayes receivedthe B. E. degree from the NationalUniversity of Ireland, Dublin, andthe M. S. andPh. D. degrees from the University ofIllinois,Urbana-Champaign, all in electricalengineering. He is currently Professor of EECS andholder of the Claude E. Shannon Chair of EngineeringScience at the University of Michigan. His teaching andresearch interests include computer-aideddesign, verification and testing of VLSIcircuits, fault-tolerant computerarchitecture, and unconventional computingmethods.
2260 HaywardStreet, University ofMichigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-0386,Fax: +1 734763-4617
Abstract
Stochastic computing is an old andunconventional computing technique that is finding promising newapplications in image processing and the handling of complexerror-correcting codes. Stochasticcircuits offer an alternative to conventional digital circuits because oftheir extremely small size and inherent noise tolerance.They are also well-suited to meeting the requirementsof emerging nanoscale technologies wherenon-deterministic behavior due to manufacturing defectsand soft errors cannot be ignored. Error analysis ofstochastic circuits, however, hasreceived little attention and remains a largely openproblem, especially when multiple errors affecting boththe data sources and the stochastic circuits can occur in the course ofa computation. This paper attempts to analyze stochasticcircuits under various error conditions, and to comparetheir behavior to that of conventional circuits under similar errorconditions. We use probabilistic transfer matrices forthis analysis, complemented by circuitsimulation. Our results indicate that stochasticcircuits provide significantly better error tolerance under severe errorconditions.
About the authors
Te-Hsuan Chen isa Ph. D. candidate in Computer Scienceand Engineering at the University of Michigan. Hereceived his B. S. andM. S. degrees in electricalengineering from the National Tsing Hua University,Hsinchu, Taiwan. His researchinterests include computer-aideddesign, design and testing of VLSIcircuits, error-correcting codingand unconventional computing methods.
2260 HaywardStreet, University of Michigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-6411
Armin Alaghi received hisB. Sc. degree in electricalengineering (2006) and M. Sc. degreein computer architecture (2009) from the University ofTehran, Iran. He is currentlya Ph. D. candidate at the University ofMichigan. His research interests include digital systemdesign and testing, approximatecomputing, and embedded computing.His current research focuses on stochastic computing.
2260 HaywardStreet, University ofMichigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-6411
Prof. John P. Hayes receivedthe B. E. degree from the NationalUniversity of Ireland, Dublin, andthe M. S. andPh. D. degrees from the University ofIllinois,Urbana-Champaign, all in electricalengineering. He is currently Professor of EECS andholder of the Claude E. Shannon Chair of EngineeringScience at the University of Michigan. His teaching andresearch interests include computer-aideddesign, verification and testing of VLSIcircuits, fault-tolerant computerarchitecture, and unconventional computingmethods.
2260 HaywardStreet, University ofMichigan, AnnArbor, MI 48109,USA,Tel.:+1 734 763-0386,Fax: +1 734763-4617
©2014 Walter de Gruyter Berlin/Boston
Articles in the same Issue
- Frontmatter
- Editorial
- Preface
- Editorial
- Testing integrated circuits
- Special Issue
- On achieving minimal size test sets for scan designs
- An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
- SAT-based ATPG beyond stuck-at fault testing
- Testing for gate oxide short defects using the detectability interval paradigm
- Behavior of stochastic circuits under severe error conditions
- Hardware security and test: Friends or enemies?
Articles in the same Issue
- Frontmatter
- Editorial
- Preface
- Editorial
- Testing integrated circuits
- Special Issue
- On achieving minimal size test sets for scan designs
- An effective fault ordering heuristic for SAT-based dynamic test compaction techniques
- SAT-based ATPG beyond stuck-at fault testing
- Testing for gate oxide short defects using the detectability interval paradigm
- Behavior of stochastic circuits under severe error conditions
- Hardware security and test: Friends or enemies?
