7.43.1.1.Design

The STM32 MPU resets in the ROM code of the Cortex-A.The primary boot core (core 0) executes the boot sequence whilesecondary boot core (core 1) is kept in a holding pen loop.The ROM code boot sequence loads the TF-A binary image from boot deviceto embedded SRAM.

The TF-A image must be properly formatted with a STM32 header structurefor ROM code is able to load this image.Tool stm32image can be used to prepend this header to the generated TF-A binary.

7.43.1.2.Build Instructions

Boot media(s) supported by BL2 must be specified in the build command.Available storage medias are:

• STM32MP_SDMMC

• STM32MP_EMMC

• STM32MP_RAW_NAND

• STM32MP_SPI_NAND

• STM32MP_SPI_NOR

Serial boot devices:

• STM32MP_UART_PROGRAMMER

• STM32MP_USB_PROGRAMMER

Only one storage or serial device should be selected in the build command line,to save space and not overflow SYSRAM size, or else the platform won’t build or boot.

Other configuration flags:

• DTB_FILE_NAME: to precise board device-tree blob to be used.

  Default: stm32mp157c-ev1.dtb
• DWL_BUFFER_BASE: the ‘serial boot’ load address of FIP,

  default location (end of the first 128MB) is used when absent
• STM32MP_RECONFIGURE_CONSOLE: to re-configure crash console (especially after BL2).

  Default: 0 (disabled)
• STM32MP_UART_BAUDRATE: to select UART baud rate.

  Default: 115200

7.43.1.3.Populate SD-card