The eBeam Initiative conducted its 14th annual eBeam Initiative Luminaries survey in July and reported the results on September 23, 2025 to more than 200 attendees at its annual meeting during the BACUS SPIE Photomask Technology conference. Industry luminaries representing 51 companies from across the semiconductor ecosystem—including photomasks, electronic design automation (EDA), chip desig...» read more
The enormous computing demands of AI and high-performance computing (HPC) applications are putting intense pressure on every aspect of chip development. Challenges arise during architecture, design, and verification, persist through the manufacturing process, and extend to post-silicon lifecycle management as chips are deployed in the field.Lithography, the fabrication step of shining light...» read more
Beyond-EUV resistsResearchers from Johns Hopkins University, East China University of Science and Technology, École Polytechnique Fédérale de Lausanne (EPFL), Soochow University, Brookhaven National Laboratory, and Lawrence Berkeley National Laboratory propose a combination of new resist materials and a higher-powered EUV process that could enable smaller chip feature sizes.The "beyond...» read more
Advanced packaging often relies on silicon interposers to connect chiplets and other components inside a package. The problem is that interposers typically exceed the reticle limit, which adds both complexity and cost.An interposer is essential for 2.5D and 3.5D architectures. As device scaling runs out of steam, chipmakers are decomposing planar SoCs into chiplets and connecting them throu...» read more
Producing modern semiconductor devices is an immensely challenging process. Successful execution entails advanced process nodes, novel device architectures, new materials, and many fabrication steps. One especially challenging area is lithography, in which light is sent through a photomask, passes through a projection system of lenses and mirrors, and strikes the substrate to create the device ...» read more
Experts at the Table: Semiconductor Engineering sat down with four experts to explore the current state and future direction of mask-making, with insights from Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows ...» read more
Making high-NA EUV lithography work will take a manufacturing-worthy approach to stitching together circuits or a wholesale change to larger masks.Circuit stitching between the exposure fields is challenging the design, yield and manufacturability of the high-NA (0.55) EUV transition. The alternative is a radical change from 6x6-inch to 6x11-inch masks that would eliminate stitching, but it...» read more
A new technical paper titled "Unraveling the Reaction Mechanisms in a Chemically Amplified EUV Photoresist from a Combined Theoretical and Experimental Approach" was published by researchers at imec and KU Leuven."Our combined experimental and theoretical approach shows that EUV photoemission can simultaneously resolve chemical dynamics and the production of primary and secondary electrons,...» read more
A new technical paper titled "Statistics of EUV exposed nanopatterns: Photons to molecular dissolutions" was published by Hiroshi Fukuda, Hitachi High-Tech Corporation.Abstract"For higher computing power of semiconductor integrated circuits, pattern feature sizes below 10 nm are anticipated by introducing extreme ultraviolet (EUV) lithography with high numerical aperture (NA) optics. Ho...» read more
Experts at the Table: Semiconductor Engineering sat down to discuss the current state and future direction of mask-making, with Harry Levinson, principal lithographer at HJL Lithography; Aki Fujimura, CEO of D2S; Ezequiel Russell, senior director of mask technology at Micron; and Christopher Progler, executive vice president and CTO at Photronics. What follows are excerpts of that conversation....» read more
Workflows and the addition of new capabilities are happening much faster than with previous technologies, and new grads may be vital in that transition.
Workflows and the addition of new capabilities are happening much faster than with previous technologies, and new grads may be vital in that transition.
Companies and governments invested heavily in onshoring fabs and facilities over the past 12 months as tariffs threatened to upset the global supply chain.
Memory chip shortages prompt price increases; Israeli chip foundry; 2 acquisitions; Baidu's AI chips; IBM's new quantum processor; GF's GaN push; 3D NAND scaling boosters; U.S. policy recommendations; +$500M in fundings; SiPho and SiGe capacity; EV joint venture.
Growing use cases include life science AI, reducing memory and I/O bottlenecks, data prepping, wireless networking, and as insurance for evolving protocols.
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