Foryour convenience we have provided aglossary of many of the most commonly usedterms in thesemiconductor industry.

To use the glossary, simply click on the letter below that corresponds to the first letterof the term you are looking for. If there is a term that you would like to see added to theglossary please contact us at:customer.service@thresholdsystems.com

A
Absorption: The adherence of the atoms, ions, or molecules to the surface of another substance (i.e. gas/solid, or liquid/solid systems). The attractive force is small (e.g. van der Waal type of force). Adsorption is a surface phenomenon, and the adsorbed atoms are referred to as adatoms.
Acceleration: Term for imparting highly directed energy to a charged particle with an electric potential (voltage, electric field). The potential of the voltage relative to ground becomes kinetic energy as the charged particle falls through the potential. It is accelerated.
Acceptor:An impurity from column III of the periodic table, which adds a mobile hole to silicon, thereby making it more P-type and accepting of electrons. Boron is the primary acceptor used to dope silicon. Compare donor.
ACT-PTM: Applying Concurrent Teams to the Product-To-Market process. An Intersil program that has established a sector-wide procedure for new product development. The highlights of ACT-PTM are (1) the use of concurrent development teams (with representatives from engineering, manufacturing, marketing, and quality); (2) the direct participation of customers; and (3) the formalization of procedures to enhance the quality of product definition and market launch. See also concurrent engineering.
Active Si layer:silicon layer on top of the buried oxide (BOX) in SOI substrates.
ADC: ADC stands for Automatic Defect Classification. The image information of the defect stored in the image server is classified according to the cause of the defect by the classification software based on the predetermined rules and is then restored in the classification server. The classified information is sent to Yield Management System (YMS) and the host computer of the IC manufacturer so that it can be used in the failure and defect analysis. Some systems can classify defects using ADC in conjunction with the ADR function of the Defect Review SEM. The defect information obtained by ADR can also be classified collectively at a later stage.
A/D converter: Analog-to-Digital converter. A circuit board or integrated circuit that converts analog input signals to digital equivalent-weight output signals. Integrated circuit converters are a major product area for Intersil and an important element of signal processing. See D/A converter and signal processing.
ADR: ADR stands for Automatic Defect Review. The aim of the Defect Review is to observe, classify and analyze the shape and components of the defect and particles detected by wafer inspection system in greater detail. Automatic Defect Review automatically obtains image of the desired defect using the defect information (coordinates, etc.) obtained in defect inspection. The data is stored and arranged into a database. In Defect Review SEM, an image of the defect is automatically obtained and stored using the ADR function.
Adhesion: ability of materials to stick (adhere) to each other.
Adhesion promoter: material used to improve adhesion of materials, typically photoresist to the substrate in a photolithographic processes. Some metals are also used to promote adhesion of subsequent layers.
Adsorption: The binding of a gas in the interior of a solid or liquid. That is, the penetration of one substance into another, as distinguished from adsorption.
Advancell: Libraries of standard cells designed for high performance and a broad application range, developed by Intersil in partnership with Siemens and Toshiba. The Advancell library features high-performance, essential primitive functions such as simple gates, latches/flip-flops, buffers and input/output, as well as a broad family of macrocells. See standard cell.
Aligner: A processing tool used to transfer lithographic patterns from a photomask to a silicon wafer. Four types of aligners are in use within Intersil: contact, proximity, projection, and steppers. Contact aligners were the earliest type, and have the disadvantage of bringing the photomask in direct contact with the wafer, thereby inviting particulate contamination. The other types avoid direct mask contact and bring increasing line-width control and resolution. See also lithography, mask and stepper.
ALU:Arithmetic Logic Unit. One of the three essential components of a microprocessor, the other two being data registers and control. The ALU performs addition and subtraction, logic operations, masking, and shifting (multiplication and division).
Amorphous: Si, a-Si: non-crystalline thin-film silicon having no long-range crystallographic order; inferior electrical characteristics as compared to single-crystal and poly Si but cheaper and easier to manufacture; used primarily to fabricate solar cells.
Analog: A continuous representation of phenomena in terms of points along a scale, each point merging imperceptibly into the next. An analog voltage, for example, may take any value. Real world phenomena, such as heat and pressure, are analog. Compare digital.
Analog DI: Analog Dielectric Isolation. An analog integrated circuit technique using dielectric isolation technology. See dielectric isolation.
Analog semicustom: Analog integrated circuits that can be specified by a designer using semicustom design techniques to meet a specific design requirement. An area of Intersil specialization. Compare custom integrated circuit and see CAD.
Analog signal processing: Processing of analog signals in the analog domain. Includes the capability of amplification, filtering, signal conditioning, multiplication. and comparison of analog signals.
Analysis (Magnetic Analysis): The process of selecting desired ions for the ion implantation process and rejecting unwanted ions. It is accomplished through the use of a magnetic field applied transverse to the ion beam direction. This field disperses the ion beam into separate components with different mass-to-charge state ratios. Then the desired ion beam is allowed to pass through a limiting aperture, where the undesired ions are rejected (mass analysis aperture). Typical ion implantation machines have sufficient mass resolution that they can filter ions with a difference of about one AMU or more from the desired ion beam.
Angstrom: A unit of length. 10,000 angstroms equals 1 micron. 108 angstroms equals 1 cm. A silicon atom has a lattice spacing of 5.43 angstroms. Symbol: Å. See also micron.
Angstrom: unit of length commonly used in semiconductor industry, though it is not recognised as a standard international unit; 1 Angstrom = 10-8 cm = 10-4 micrometer = 0.1 nm; The dimentions of a typical atoms
Anisotropic Etching: Highly directional etching, in which the vertical etch rate (perpendicular to the substrate surface) is much higher than the lateral etch rate (parallel to the substrate surface). This enables etching of small, high aspect ratio features with sharply vertical sidewall angles, which is required in the manufacture of advanced technology circuits. Requires plasma etching with wafer bias (relative to the plasma).
Annealing: A thermal process in which a physical transformation (as opposed to a chemical reaction) of a material is induced by the application of thermal energy. An example is the transformation of the compound titanium silicide from the higher resistance C49 phase to the lower resistance C54 phase of this compound. It is a term borrowed from metallurgy, which defines annealing as manipulation of microstructure through the application of thermal energy and the control of peak temperature, time, ramp rate, quench rate, and ambient.
Annealing (Anneal): A thermal process in which a physical transformation (as opposed to a chemical reaction) of a material is induced by the application of thermal energy. Because the ion implantation process inherently (i.e. unavoidably) produces damage in the silicon substrate, it is necessary to follow the implantation process at some point with a high temperature annealing process. The high temperature annealing heals the silicon damage and produces high dopant activation fractions. Unfortunately, this high temperature annealing process can also produce unwanted re-distribution of the implanted dopants by diffusion. Annealing is a term borrowed from metallurgy, which defines annealing as manipulation of microstructure through the application of thermal energy and the control of peak temperature, time, ramp rate, quench rate, and ambient.
Application Specific Integrated Circuit: A type of semiconductor device customized or semi-customized to suit a customer’s particular requirements. Examples of semi-customized ASICs include gate arrays, standard cells, and field programmable gate arrays (FPGAs).
ARDE (Aspect Ratio Dependence Effects): For feature sizes <1 micron and aspect ratio >1, observed reactive ion etch rates may depend on aspect ratio and local feature pattern density on the wafer. This dependence is called ARDE. It is caused by local variations in ion transport, surface charging, and neutral species transport (microscopic transport dynamics). [Micro-loading effects occur from local depletion of reactive species.} Also see: micro-loading and loading.
Arrhenius plot: A graphical plotting technique that allows extraction of the activation energy (Ea) for thermally activated processes (whose reaction rates are exponentially dependent on the temperature). It is based on the use of the Arrhenius law (reaction rate R = Aexp[-Ea/kT]). It also enables visualization of the relative dominance of competing reactions at different temperatures. It is constructed by plotting experimental measurements of reactions as the inverse of the temperature (T) of the measurements (independent variable) against the logarithm of the measured reaction products (dependant variable) at that temperature.
Arrival Angle: The range of angles at which the reactant gases arrive at the surface of the wafer. The arrival angle plays an important role in determining the quality of the step coverage, and is a function of the geometry at the wafer's surface.
ASCII:American Standard Code for Information Interchange. An eight-bit code for alpha-numeric character transfer adopted by the American Standards Association to achieve universal compatibility among data devices. Pronounced "ask-ee."
ASIC: Application Specific Integrated Circuit. Semiconductor circuits specifically designed to suit a customer's particular requirement, as opposed to a DRAM or microcontroller, which are general-purpose parts. See custom integrated circuit.
ASP:Average Selling Price.
Assembly: The step in semiconductor manufacturing in which the device is encased in a plastic, ceramic, or other package. In some cases, the chip is assembled directly on a printed circuit board.
ASSP: Application Specific Standard Product. A standard product that has been designed to implement a specific application function, as opposed to a general-purpose product such as a RAM. Intersil offers numerous ASSPs, including SLICs, data communication ICs and power supply ICs.
ATPG: Automatic Test Program Generation. Automatic translation from a test description language into tester-specific format. The end result is a test program used by a specific IC tester to test a specific device. It can also describe an automated method of generating patterns for use in engineering workstation simulation of ASIC devices. See engineering workstation.
AVLSI: Advanced Very Large Scale Integration. A mainstream CMOS (complementary metal-oxide semiconductor) process technology used at Intersil's Research Triangle Park Microelectronics Center in North Carolina. This process provides high density by virtue of its 1.25-micron feature size, and is designed with inherent latch-up resistance. Analog and radiation-tolerant variants of AVLSI also are available.
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B
Back end: In semiconductor manufacturing, the package assembly and test stages of production. Includes burn-in and environmental test functions. Compare front end.
Ball Grid Array: A type of chip carrier used for IC packaging. It has a matrix of solder balls under the package that serves as output terminals. The device is placed on a printed circuit board and heated until the solder balls melt to form connections. Because a BGA can provide numerous interconnection pins, it is often used for packaging LSIs.
Bandwidth:The width measure of a signal or signal-carrying channel from the lowest to the highest frequency (or bit rate). For analog signals, the width is in the frequency domain, expressed in Hz. For digital signals, the width is in the time domain, expressed in bits per second. In semiconductor devices, the bandwidth is the range of frequency (or bit rate) in which the performance characteristics are within specified limits.
Bandgap, energy gap (Eg):forbidden energy levels separating the valence and conduction bands. no electrons are allowed to have energies at these levels. learn more.
Bandgap engineering: processes in which the chemical composition of a semiconductor is altered in a controlled way to achieve a specific energy gap; learn more.
Base: One of the three regions that form a bipolar transistor. It physically separates the emitter and collector regions. Minority carriers are injected from the emitter into the base, where they subsequently either recombine or diffuse into the collector. See also collector and emitter.
Base: The region of a bipolar transistor that separates the emitter and collector regions.
Batch process:process in which many wafers are processed simultaneously, as opposed to a single wafer process;
Behavioral simulation: The ability to simulate the behavior of a function described by a high-level descriptive language such as C, Pascal, Verilog HDL and VHDL.
BiCMOS:Bipolar Complementary Metal Oxide Semiconductor. An IC technology combining the linearity and speed advantages of bipolar and the low-power advantages of CMOS on a single IC. BiCMOS can operate at either ECL (emitter-coupled-logic) or TTL (transistor-transistor-logic) levels, and is ideal for mixed-signal devices. It has been predicted that BiCMOS will eclipse CMOS in the '90s, just as CMOS edged out MOS and bipolar circuits in the '80s. Intersil is developing a broad family of BiCMOS processes that combine analog, digital and power functions on a single chip. See also CMOS, ECL circuit, TTL, HBC-10 and Power BiMOS.
Binary number system: A number system employed in computers and digital systems, in which successive digits are coefficients of powers of the base 2, rather than the base 10. For example, the decimal number 13 is represented by the binary number 1101 (1 x 23 + 1 x 22 + 0 x 21 + 1 x 20). Since the only values in the binary system are "0" and "1," quantities, or BITS (binary digits) are represented electronically with either of two conditions, typically a high voltage representing a "1" and a low voltage representing a "0". See bit.
Bio Chip: A microfluidic device used for biomedical purposes, made with microfabrication technologies developed for semiconductors and MEMS. Micro total analysis system (μTAS) and DNA chip are among its subcategories. The chip’s applications include genomic analysis and blood analysis.
Bipolar transistor: An active semiconductor device formed by two P-N junctions whose function is amplification of an electric current. Bipolar transistors are of two types: NPN and PNP, depending on the manner in which the two P-N junctions are combined. Bipolar transistors have three sections: emitter, base, and collector. Operation of a bipolar transistor depends on the migration of both electrons and holes, in contrast to field-effect transistors, where only one polarity carrier predominates.
BIR: Building In Reliability.
Bit: Binary digit. A digit (1 or 0) in the representation of a number in binary notation. The smallest unit of information recognized by a digital computer. Used to represent two states in the binary number system. Eight bits make a byte. See binary number system.
Boat: 1. a device made of high purity temperature resistant materials such as fused silica, quartz, poly Si, or SiC. designed to hold many semiconductor wafers during thermal or other processes; 2. device designed to simultaneously contain source material during evaporation while at the same time heating the source to its melting point; made of highly conductive, temperature resistant material through which current is passed.
BOM: Bill of Materials. List of specifications that uniquely defines manufacturing sequence, materials and procedures utilized in the manufacture of a specific product.
Bonded SOI: SOI substrate formed by bonding two silicon wafers with oxidized surfaces such one wafer is formed with an oxide layer sandwiched between two layers of Si; one wafer is subsequently polished down to a specified thickness to form an active layer where devices will be fabricated.
Bonded wafer: A composite dielectrically isolated substrate formed by fusing together (at high temperature) the oxidized surfaces of two individual silicon substrates. Bonded wafers are being developed to extend the Intersil DI (dielectric isolation) technology to wafers as large as six inches in diameter. ICs formed in such wafers provide higher breakdown voltage and a higher level of radiation resistance than devices fabricated in conventional DI substrates.
Bonding: The process of connecting wires from the package leads to the chip (or die) bonding pads. Part of the assembly process. Alternately, the process of securing a semiconductor die to a lead frame or package. See bond pad.
Bond pad: An area (typically 100µm x 100µm) on the periphery of a silicon die for making connection to one of the package pins. A small-diameter gold or aluminum wire is bonded to the pad area by a combination of heat and ultrasonic energy. See bonding.
Boost converter: A boost converter is a DC-DC power converter which increases (steps up or boost) its input voltage to produce an output voltage with a higher magnitude. The boost converter is capable of increasing its input voltage by a factor of more than 5 times depending upon the switch duty cycle ratio and the circuit losses. The transfer ratio of the boost converter is proportional to: M(D) = 1/(1 – D) where D is the duty ratio when switch 1 is closed.
Boron: element from group III of the periodic table; acts as an acceptor in silicon; Boron is the only p-type dopant used in silicon device manufacturing.
Bow: Concavity, curvature, or deformation of the wafer centerline independent of any thickness variation present.
BOX: buried oxide in SOI substrates.
Burn In:A process by which components of a system are exercised for a certain period of time before placed in service. The process tests the reliability of ICs and LSIs and eliminates substandard or defective products. The test may be conducted in a high-temperature environment to obtain results in a relatively short time.
Boundary scan: The addition of a partitioning test circuit to the input/output boundary of an IC to control and monitor the logic state of its internal circuit nodes.
BPSG:BoroPhosphoSilicate Glass. BPSG is an oxide primarily used as a field dielectric. It is deposited in a PECVD reactor using a mixture of SiH4, B2H6, and PH3 with N2O in a temperature and pressure controlled environment. BPSG is used principally because of its' lower melting point (viscous flow temperature) compared to other oxides. BPSG can be deposited over delineated polysilicon and can 'flow' at temperatures low enough to not significantly alter the dopant profiles in the underlying device silicon. This smoothing improves metal-level step coverage. BPSG is not a good passivation material because it is hydroscopic in nature. See PECVD
Bread Loafing: The tendency of CVD films to establish thicker film coverage at the upper corners of metal lines. This occurs as a result of the fact that the arrival angle is greatest at these corners (270 degrees). The resulting film therefore exhibits a cross-sectional shape reminiscent of a loaf of bread.
Bridgman growth:A method of growing single-crystal semiconductors (typically III-V) using a multi-zone furnace in which the various elements are in contact with a seed; the melt is passed from higher to lower temperature zone, in a fassion similar to the float-zone (FZ) crystal growth method.
Buffer:
1. In electronics: a device that is used to provide compatibility between two signals. Typically the device is used to change the voltage or current level capability, e.g. interfacing the output of a CMOS device to the input of a TTL device. See also bus driver, TTL.
2. In computing: an area of memory used for temporary storage of information. Typically, the buffer is used to pass or share information between different processes.
3. In chemistry: a solution characterized by the ability to withstand changes in pH when limited amounts an acid or base are added.
Bus: Four or more parallel conductors in an information processing system along which information is transmitted from one part to another. The microprocessor, peripherals, memory and other components are interconnected by a common bus.
Bus driver: An integrated circuit added to the bus to facilitate sufficient drive to the CPU when several peripheral devices are tied to the bus. Drivers are necessary because of capacitive loading, which slows down the data rate and prevents proper time sequencing of system operation. See buffer.
Byte: From the expression "by eights." A group of eight contiguous bits (binary digits) handled as a unit in computer processing. A byte can store one alphanumeric character. A kilobyte (KB) is 1024 bytes or 8192 bits. A megabyte (MB) is 1024 kilobytes or 1,048,576 bytes or 8,388,608 bits.
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C
C (programming language): A general-purpose programming language developed in the 1970s by Dennis Ritchie of AT&T; Bell Labs. Its generality, machine independence, and efficiency have made C popular for many application areas. The Unix operating system is written in C and the close linking of Unix and C have made C the de facto standard language in engineering software development.
CAD:Computer-Aided Design. The use of computer aids (hardware and software) in the electrical and physical design and verification of new things. Historically, CAD has been more used to describe the physical design rather than the electrical design, although currently the distinction is so blurry as to be meaningless. As applied to Intersil products, this means single-chip and multi-chip electronic functions. CAD allows Intersil design engineers to design integrated circuits of continually increasing complexity with decreasing product-to-market times. Of increasing importance to Intersil is that because of the strength of our CAD capability, we can allow customers to do their own designs using Intersil's advanced analog and mixed-signal processes. Analog and mixed-signal design is a much more complex problem than pure digital design. (Neither is easy.) A strong CAD capability is an essential requirement for the types of designs produced by Intersil.
CAE: Computer-Aided Engineering. Traditionally, CAE has been used to describe the electrical design rather than the physical design, although these distinctions have blurred. See CAD.
CAM: Computer-Aided Manufacturing. The use of computer aids (hardware and software) in planning the construction, tracking the construction, analyzing, and implementing the construction of manufactured things. As applied to Intersil products, this means primarily the construction of single-chip and multi-chip electronic devices. CAM provides Intersil manufacturing engineers the control necessary to cost-effectively build our high-mix product portfolio. Most CAM systems track product flow, equipment usage, reasons for down time, change requests, rework, and the people involved. Intersil's systems, in addition, are known for their powerful planning and delivery capabilities. See IMPReSS.
Capacitor: An electrical component with a dielectric material sandwiched between two metal terminals. When a voltage is applied to a capacitor, it stores electrical charge proportionate to the voltage level, and this effect (called capacitance) is used to smooth out the rectified current and suppress electrical noise. In a DRAM, capacitors are used as a memory cell device, with charged capacitors representing “1” and uncharged capacitors representing “0.” Also, capacitors block direct current while allowing alternating current to pass
Carbon doping: Adding carbon to a semiconductor material to increase its conductivity. Other common dopants include silicon, beryllium, and zinc. The material and type and level of doping determine whether the semiconductor is N-type or P-type.
Carbon Nanotube: Carbon nanotubes refer to tubular microstructures formed by one or more layers of carbon sheet called graphene. Carbon nanotubes were discovered in 1991 by Sumio Iijima, who was a researcher at NEC’s lab in Tsukuba. Those with a single layer of graphene are called single-walled nanotubes (SWNTs), whereas those with two layers and those with more than one layer are referred to as double-walled nanotubes (DWNTs) and multi-walled nanotubes (MWNTs), respectively. Carbon nanotubes are highly promising as the next-generation semiconductor materials.
Carrier Gas: An An inert gas such as Hydrogen, Nitrogen, or Argon used to dilute the reactant gas in a CVD system. Also referred to as the dilutent gas.
Cathode Dark Space: A region close to the cathode that electrons traverse very quickly, but is too short a distance for them to acquire sufficient energy to generate an ionization event, or any light generating electron-atom excitation events.
CD: Critical Dimension. A feature size as in 0.25 micron.
CdsSPICE:Cadence Design System's version of the popular circuit simulator, SPICE. See SLICE and SPICE.
CD-SEM: CD-SEM stands for Critical Dimension-Scanning Electron Microscope. CD-SEM is application equipment for a scanning electron microscope. It is a dedicated system for measuring the dimensions of the fine patterns formed on a semiconductor wafer. It is mainly used in the manufacturing lines of electronic devices of semiconductors.
Central Processing Unit: A semiconductor chip that serves as the brain of a computer. It consists of a control unit, an arithmetic/logic unit, a register where the output of operations is temporarily stored, an interface with storage units, and input/output interfaces with peripherals. A CPU fulfills the first two of the five basic computer functions defined by John von Neumann (arithmetic/logic, control, memory, input, and output).
CERDIP: CERamic Dual-Inline Package. A package assembled with the leadframe sandwiched between two ceramic layers and sealed by firing a glass frit.
CERPACK: CERamic PACKage. A CERDIP-like package with the leadframe extended out on two or four sides, typically in surface-mounting format. Characteristics similar to CERDIP. Also known as CERQUAD (leads on all four sides), CERPAC, or CERPAK.
Channel: The region separating the source and drain of a field-effect transistor. The channel is designed to be normally "on" (conducting) for depletion-mode FETs, or normally "off" (insulating) for enhancement-mode FETs. With the application of a voltage to the gate electrode, the conducting properties of the channel are altered, thereby controlling the current across the channel. The length of the channel is an important parameter in determining the current of the FET, as well as its speed. See also drain, FET, gate, and source.
Channeled array: A gate array base die with basic cells arranged in rows or columns. This arrangement permits routing in the spaces (channels) between rows of gates. Routing efficiency is usually high, near 90% or more. Routing is generally achieved by placing macros along single rows or columns. TGC103, TGC105 and TGC108 are examples of a channeled array.
Channelless array: A gate array base die with basic cells covering the entire core with no row or column spacing. This array is often called a "sea-of-gates" (an LSI Logic, Inc. trademark) and is more difficult to route. Efficiencies are often 35% or less, due to complexity of the routing process. The advantage to this architecture is that macros can be placed in blocks, which increases macro performance. Larger TGC100 family members are channelless, and smaller members may be redesigned using this architecture.
Channeling (Ion Channeling): Single crystal silicon inherently has well ordered arrays of silicon atoms with very open directions in the crystal lattice. When an ion beam is well aligned to one of these very open directions, the ions will penetrate the silicon surface to a greater depth than would otherwise be expected (i.e. calculated). This effect is called channeling. In order to avoid process variations resulting from channeling, the silicon wafer is deliberately positioned in certain carefully selected orientations (wafer orientation) to the incoming ion beam.
Characterization node: A characterization node is a characterization parameter which impacts reliability and is measured during initial process or product characterization and at infrequent intervals, thereafter. See characterization parameter, performance node.
Characterization parameter: A characterization parameter is a measurement taken on a process, tool, or product during a process or product characterization and at infrequent intervals thereafter. See characterization node.
Charge-Coupled Device:An image sensing device that serves as an electronic eye. It has an array of light sensitive elements that generates electrical charges when exposed to light. The charges are consecutively transferred to adjacent elements until they reach the end of the line to be processed. CCDs are commonly used in digital cameras and scanners.
Charge Exchange (Reaction): An interaction between ions in the beam treating a substrate and the (inevitable) residual gases in the vacuum system. These interactions can produce charge state changes in beam ions. When this occurs, dose (and energy) errors can and do occur in the implantation process. Charge exchange reactions (e.g. neutralization) are the primary source of dose errors in ion implantation processes.
Charging: A build-up of charge on the substrate surface can occur during plasma etching. This is called charging. It typically occurs on floating structures, and is exacerbated by non-uniformity in the etching plasma. Charging can damage the substrate, particularly the gate oxide dielectric during polysilicon gate etch.
Charging: During the ion implantation process, a net positive charge can build up on the substrate being treated by the ion beam. This is referred to as charging. If the charge build up is sufficiently large, it can damage dielectric films on the wafer, degrading their insulating properties (e.g. the gate oxide dielectric capability). Charging is mitigated through the use of a flood gun, which provides low energy electrons to the ion beam near the substrate, which reduces the magnitude of the positive charging.
Chemical Mechanical Polishing, CMP: method of planarization, removing layers of solid by chemical-mechanical polishing.
Chemical Mechanical Polishing: A technology/tool for planarizing the wafer surface by combining chemical reactions and mechanical polishing. In a typical CMP process, a wafer is pressed against a rotating table covered with a polishing pad, while a slurry containing colloidal silica abrasives is deposited between the wafer and the pad. A non-abrasive slurry may be used depending on the wafer surface material to be removed.
Chemical Vapor Deposition: A chemical process for producing thin films of required materials on the surface of a substrate. Specifically, gases containing the desired materials are introduced in the reaction chamber, and chemical reactions are induced to deposit thin films on the substrate. In semiconductor production processes, CVD is used for depositing interconnect materials and dielectric films necessary to form circuits on a silicon wafer.
Chip: Also called a die. Popular term describing a section of a wafer that contains a discrete component or an integrated circuit. Many chips are made on a single wafer, then separated into dice and packaged individually.
Chip carrier: A low-profile component package, usually square, whose active chip cavity or mounting area is a large fraction of the package size, and whose external connections are usually on all four sides of the package.
Chip-level integration: The combination of two or more integrated-circuit functions and/or technologies on one IC to achieve miniaturization, reduce systems cost, and make new applications possible. Particularly important for signal processing and power control solutions, Intersil has placed great emphasis on this area.
CIM: Computer-Integrated Manufacturing. The integration of computer control and monitoring into a manufacturing process.
Circuit: A combination of electrical or electronic components, interconnected to perform one or more specific functions.
Circuit: An assemblage of interconnected electrical or electronic components.
Circuit simulation: An accurate means of verifying the behavior of a circuit before it is fabricated. Very accurate models of the circuit devices--such as transistors, resistors, and capacitors--are used in a simulator that applies efficient numerical analysis algorithms to solve fundamental circuit analysis equations.
CISC: Complex Instruction Set Computer. The Intersil 80C286 CMOS CPU is a CISC part. Considered the most common CPU architecture of the 1980s. More flexible and full-featured than RISC. Compare RISC.
Class 'B': A screening process for circuits that are intended for use in ground-based military electronic systems. Must conform with screening standards per MIL-std 883-C and MIL-M-38510. Compare Class 'S'.
Class 'S': A screening process for circuits that are intended for use in satellite systems for military space applications. Must conform with screening standards per MIL-std 883-C and MIL-M-38510. Compare Class 'B'.
Clean room: A confined area in which the humidity, temperature, and particulate matter are precisely controlled within specified units. The "class" of the clean room defines the maximum number of particles of 0.3 micron size or larger that may exist in one cubic foot of space anywhere in the designated area. For example, in a Class 1 clean room only one particle of any kind may exist in one cubic foot of space. Newer clean rooms are typically Class 1-10, and are needed for manufacturing ICs with feature size close to 1 micron.
Clean room: A room in which the climate and particulate matter are precisely controlled. Clean rooms are "classed" according to a maximum number of particles (0.3 micron or larger) that may exist in any one cubic foot of space within the defined area. A Class 1 clean room is limited to only one particle in a cubic foot of space.
Cleanroom:enclosed ultra-clean space necessary for semiconductor manufacturing. Airborne particles are removed from the space to specified minimum levels, room temperature and humidity are strictly controlled; clean rooms are rated and range from Class 1 to Class 10,000. The number corresponds to the number of particles per cubic foot.
Complementary Metal-Oxide Semiconductor: A device that combines a p-type MOSFET (PMOS) and an n-type MOSFET (NMOS) so they complement each other. Unlike single-type PMOS and NMOS devices, a CMOS conducts very little current except while switching between on and off states, which makes it ideal for implementing low-power logic circuits. CMOS is the mainstream of current LSI technology.
Compound Semiconductor:A compound semiconductor is a semiconductor composed of two or more elements. Examples include gallium arsenide (GaAs), gallium phosphide (GaP), indium phosphide (InP), and cadmium sulfide (CdS) semiconductors. Compound semiconductors are suitable for high-frequency, high-speed devices such as mobile phones.
Cosed architecture: A system whose characteristics are proprietary and therefore cannot be readily connected with other systems. Compare open architecture.
CLY:Circuit Limited Yield. See yield.
CMOS:Complementary Metal-Oxide Semiconductor. A MOS technology in which both P-channel and N-channel components are fabricated on the same die to provide integrated circuits that use less power than those made with other MOS (metal oxide semiconductor) or bipolar processes.
CMOS Image Sensor: A low-power image sensor based on CMOS sensor technology. A CIS consumes only about 1/10 of power needed for a CCD, operates with a single voltage supply, and can integrate peripheral circuits on the same chip.
CMOS2, CMOS3, CMOS3.5:A family of CMOS processes developed in Intersil's Findlay, Ohio facility. These processes are used to support a wide range of digital applications, including microprocessors, logic, automotive and semicustom. All of the processes use junction isolation and local oxidation (LOCOS) to separate individual devices within a circuit. Their gate length is 3m, 2m and 1.5m respectively.
CMP: Chemical-Mechanical Polish (for planarization of wafers). See wafer.
COB: Chip-On-Board. One of many configurations in which a chip is directly bonded to a circuit board or substrate. These approaches include wire bonding, TAB, or flip-chip interconnections. See wire bonding, TAB, flip-chip.
Cold Wall: A CVD reactor which features reactor walls that are cooler than the chamber interior and the wafers being processed. The advantage of this approach is that less material is deposited on the cool chamber walls.
Collector: One of the three regions that form a bipolar transistor. The base-collector P-N junction is usually reverse-biased so that minority carriers that are injected into the base from the emitter are efficiently extracted into the collector. See also base, bipolar transistor and emitter.
COMFET:See IGBT.
Comparator: A device that compares two inputs for equality. One type compares voltages and gives one of two outputs--less than or greater than. Another type compares binary numbers and has three outputs--less than, equal to, or greater than. A third type compares phase or frequency and gives an analog output voltage depending on the relationship between the inputs.
Compiler: (1) A software tool used to translate higher-level languages (e.g., C, FORTRAN, COBOL) into machine code, or, (2) A software tool used to translate specifications of circuit functions (e.g., RAM, ROM, ALU, controller) into schematics and layouts.
Complementary:A term describing integrated circuits that employ components of both polarity types connected in such a way that operation of either is complemented. A complementary bipolar circuit would employ both NPN and PNP transistors, and a complementary MOS circuit (CMOS) would employ both N-channel and P-channel devices. In general, complementary devices operate with opposite polarity voltages and currents--advantageous in many circuit applications.
Compound semiconductor: synthetic semiconductor formed using two or more elements mainly from groups II through VI of the periodic table; compound semiconductors do not appear in nature;
Compressive Film: A CVD film that is under compressive stress after it has been deposited, such as APCVD PSG.
COMSEC:COMmunications SECurity. In semiconductors, refers to devices (generally embedded modules) designed into a host communications system to prevent unauthorized access. Intersil serves this secure communications market with custom and build-to-print ICs.
Concurrent engineering: A parallel development approach for reducing time-to-market as well as improving the quality and market impact of new products. Concurrent teams are comprised of representatives from engineering, manufacturing, marketing, quality, etc., and make a special effort to involve the ultimate customer during product definition. See also ACT-PTM.
Condensation: The transformation of gas into a solid or liquid.
Condenser: A condenser is a device that stores a charge in a conductor and is used as an electrical circuit component. It conducts alternating current (high-frequency) but does not conduct direct current (low-frequency) (such as accumulating electricity). In circuit design, it is used together with other components such as resistors and coils to control charging and discharging. Condenser is also used as a component in the IC.
Conduction band: the upper energy band in a semiconductor separated from the valence band by the energy gap; The conduction band is not completely filled with electrons, hence, electrons are free to "conduct."
Conductor: Any material, such as aluminum, copper or gold, that offers little resistance to the flow of electrical current.
Consortium: A combination or group of organizations formed to undertake a common objective that is beyond the resources or capabilities of any single organization. Plural: consortia. Intersil participates in several industry consortia, specifically SRC, MCC, and SEMATECH. See SRC, MCC, and SEMATECH.
Contamination: The presence of unwanted particles, chemicals, or other substances.
Control block: The circuitry that performs the control functions of the CPU. It is responsible for decoding microprogrammed instructions and then generating the internal control signals that perform the operation requested.
Control parameter:A control parameter is a measurement taken for the purpose of controlling an in-line process or as a test on product. See critical node.
Converter: See A/D converter, D/A converter and DC-DC converter.
Converter: A converter is a device used to convert alternating current (AC) to direct current (DC). It also serve as a rectifier. When using a DC electronic device from a household AC power source, AC is converted to DC by a built-in converter (AC-DC converter circuit) or by an external AC adapter. A device that converts DC to AC is called an inverter.
Convolver: A circuit element that implements convolution, a mathematical process that is the basis for all filters and fundamental to DSP. Intersil DSP products include two-dimensional convolvers, which are used to filter images. Filtering suppresses unwanted elements of an image and accentuates the features that are needed to understand the content of the image. Common types of two-dimensional filters are low pass, high pass, and edge detection. Low pass filters reduce noise, high pass filters emphasize the details in an image, and edge detectors bring out the outlines of objects. This is a new product area for Intersil.
COP:COP stands for Crystal Originated Particle. One of the various silicon wafer surface defects. Their basic micro structure is octahedral void shape with the size of sub-micron scale.
Copper Interconnect: Copper interconnects were a technology which was introduced by IBM as a solution to the decrease in interconnect delay for highly scaled semiconductor devices, and have become the mainstream in interconnects for logic devices.
Core competencies: An area of unique strength or expertise. Intersil uses the term to refer to capabilities, process technologies, or product types that provide the company with a competitive advantage.
CPU: Central Processing Unit. The heart of any computer system. Basically, the CPU is made up of data registers, computational circuits, the control block, and I/O (input /output.) See microprocessor and MPU.
Critical node: A critical node is a control parameter which impacts the reliability of a circuit on a given technology. See performance node.
Current:The flow of electrons or holes. Usually measured in amperes (amp or A) or in fractions of an ampere (milli-amps or micro-amps). Current can be induced by application of an electric field through a conductor or by changing the electric field across a capacitor (displacement current.)
Custom cell synthesis (CCS): Similar to symbolic layout and compaction, CCS takes as its symbolic beginning the transistor schematic of the circuit. From there, the layout and compaction are equally dependent on the quality of the algorithm and the layout rules for the minimization of the area taken up by the circuit.
Customer satisfaction index: An objective measure of performance against customer expectations, as monitored through formal interviews with specific customers. Used by Intersil to identify problem areas and correct deficiencies.
Custom integrated circuit: An integrated circuit that requires a full set of masks specifically designed for a particular function or application. A custom IC is usually developed for a specific customer and may have to withstand harsh environments. Intersil offers a wide range of process technologies for analog, mixed signal and intelligent power applications. Intersil has more than 20 years experience in the custom market, specifically targeting applications requiring analog and radiation-hardening technologies.
CVD:Chemical Vapor Deposition. A gaseous process that deposits insulating films or metal onto a wafer at elevated temperature. Often, reduced pressure is used to promote the chemical reaction.
Czochralski (CZ):The Czochralski or CZ crystal growth technique is the most frequently used method for producing large single crystals of silicon (also germanium or gallium-arsenide). In the CZ method a cylindrical single crystal is pulled vertically from silicon melt in a heated crucible. The growth is initiated by dipping a small seed crystal in the melt, and after the thermal equilibrium is reached, the crystal is pulled upwards so that it grows with a constant diameter. At the same time, the crystal rod and the crucible are rotated in opposite directions. These crystal rods are cut into thin wafers and processed to be used in integrated circuit (IC) manufacturing. See Gallium Arsenide, integrated circuit, silicon.
Cryogenic pump: an efficient, clean high-vacuum pump operating in the pressure range from about 10-3 torr to 10-10 torr; removes gas molecules from vacuum by trapping them on cold surfaces; learn more.
Crystal:solid featuring periodic spatial arrangement of atoms throughout the entire piece of material learn more.
Crystal defects: imperfections of the crystallographic structure of a crystal. 1. point defects 2. line defects 3. planar defects 4. volume defects.
Czochralski Crystal Growth, CZ: process utilizing crystal pulling to obtain single-crystal solids; the most common method for obtaining large diameter semiconductor wafers (e.g. 300 mm Si wafers); desired conductivity type and doping level is accomplished by adding dopants to molten material. Wafers used in high-end Si microelectronics are almost uniquely CZ grown.
Crystal pulling:process in which single-crystal seed is slowly withdrawn from the melt and material condenses at the liquid-solid interface gradually forming a rod-shaped piece of single-crystal material. Crystal pulling is the foundation of the Czochralski (CZ) single-crystal growth technique;
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D
D/A converter: Digital-to-Analog converter. A circuit that converts digital input signals to analog output signals. D-to-A and A-to-D converters are a major product area for Intersil Semiconductor and an important element of signal processing. See A/D converter and signal processing.
Damage (Implant Damage): As energetic particles are injected into silicon by the ion implantation process, they create damage in the silicon single crystal structure (or any target material). These defects are produces as a result of the nuclear stopping power mechanism by which energetic particles come to rest in solids. This damage is eventually removed by an anneal process, subsequent to the implantation process. See also: annealing.
Data acquisition:The process by which events in the real world are translated to machine-readable signals. The term usually refers to automated systems in which sensors are attached to machinery.
DC operation: Direct Current (DC) is the mode of operation where a transistor is operated under constant, direct voltage bias. Also see RF Operation.
DC-DC converter: DC-DC converter or DC-to-DC converter is a broad term for any microcircuit, module, or board assembly which converts a source of direct current (DC) from one voltage level to another. A step-down or buck converter steps the voltage down so that the output voltage is lower than the input voltage. A step-up or boost converter boosts the voltage so that the output voltage is higher than the input voltage. A buck-boost converter can provide a constant output voltage when the input voltage range is above or below the output voltage. This is commonly used in battery applications. Most DC-DC converters also regulate the output voltage and can be referred to as "regulators." Two types of regulators are linear regulators and switching regulators.
DC parametrics: The operating characteristics of an integrated circuit or discrete device that can be measured with the device in a static condition. See parametric tests.
DC / RF properties:DC (direct current ) and RF (radio frequency) properties are determined by the vertical and horizontal dimensions of transistor layers.
DDD: Double Diffused Drain. See diffusion and drain.
DDM: Defect Diagnostic Matrix. See defect.
Deceleration (Decel): Term for reducing the energy of a charged particle (an ion, whose energy was obtained through acceleration). Decelerating an ion with an appropriately oriented potential (voltage, electric field) reduces the energy (velocity) of the charged particle.
Defect:A chemical or structural irregularity that degrades the crystal structure of silicon or of the deposited materials that reside on its surface. Defects can be active mobile impurities that impact the electrical device characteristics over time, or inactive particulates that interfere with the photolithographic patterning. The most common defects in semiconductor processing are those originating from people (oil, cosmetics, sneezing, skin flakes, etc.)
Defect Review-SEM: Defect Review-SEM is the application equipment for a scanning electron microscope (SEM). The wafer defect inspection equipment detects defects on a semiconductor wafer. Then, Review SEM is used to acquire the defect's image of high magnification enough to recognize using SEM capabilities.
Defects: Flaws in the single crystal structure of silicon. These may be point defects (e.g. interstitial silicon, vacancies at silicon lattice sites), clusters of point defects, precipitates (e.g. SiO2), or extended defects (e.g. stacking faults, dislocations).
Degenerate semiconductor: semiconductor that is so heavily doped that its Fermi level is closer to one of the band edges (either conduction or valence) than 2 kT/q; properties of degenerate semiconductors must be described using the Fermi-Dirac statistics instead of Maxwell-Boltzmann statistics.
Denuded zone:very thin region on a semiconductor substrate surface cleared from contaminants and/or defects by gettering;
Depletion-mode FET: A FET designed so that the channel is in the "on" state with no voltage applied to the gate. See also channel, enhancement-mode FET, FET, gate and source.
Deposition: The procedure in which materials are deposited onto a substrate. Usually refers to thin conducting or insulating films used to form MOS gates, capacitors, thin-film resistors, and the interconnect system for an IC.
DESC:Defense Electronic Supply Center. DESC, located in Dayton, Ohio, is the agency responsible for procurement of electronic supplies for the U.S. military. It certifies that semiconductor vendors are in compliance with military parts specifics, such as MIL-M-38510. DESC also stocks piece parts for spares. Pronounced "deh-see".
Desorbtion: The process of removing physically sorbed gases, e.g. by vaporization (liquid to gas), or sublimation (solid directly into a gas).
Device design: The operation in which a designer tailors the transistors exactly to their function in the circuit. In the Intersil FASTRACK design system, very specific and accurate sizings of transistors are made under the general categories of high speed, low noise, or high current transistor types. See FASTRACK.
DFM:Design For Manufacturability utilizes statistical information on manufacturing process characteristics to ensure that the circuit design falls within the parameters of normal manufacturing variances for each process element. This allows the designer to center the design for maximum performance and enhances yields, thereby reducing cost.
DFR:Design For Reliability.
DFT: Design For testability is a design technique and methodology that produces designs for which tests can be generated by known methods that will result in reduced test generation cost, reduced testing cost, and high-quality product. This is usually done at a cost of added overhead circuitry.
DI: See dielectric isolation.
DICMOS:Dielectric Isolated Complementary Metal Oxide Semiconductor. DICMOS ICs have proved to be an excellent solution for applications requiring very low leakage current or over-voltage protection.
Dicing:process of cutting semiconductor wafer into individual chips each containing a complete semiconductor device. Large diameter wafer dicing is carried out by partially cutting the wafer along preferred crystallographic planes using high precision saw with ultra-thin diamond blade. learn more.
Die: A single square or rectangular piece of semiconductor material into which a specific electrical circuit has been fabricated. Plural: dice. Also called a chip.
Die: a single piece of semiconductor containing entire integrated circuit which has not yet been packaged; A chip.
Die: Electronic circuit of the semiconductor device is arranged on a semiconductor wafer.
Dielectric: An insulator. Localized regions of dielectric materials are used in semiconductor devices, for example, to provide electrical isolation between dice, between metal interconnect layers, and between the gate electrode and the channel.
Dielectric isolation (DI): A fabrication technique by which components in an integrated circuit are electrically isolated from each other by an insulator (dielectric material).DI surrounds the sides and bottom of each transistor with a layer of silicon dioxide (glass). DI has proven particularly advantageous for fabricating high performance analog ICs. The conventional DI fabrication process for bipolar ICs begins with a wafer of N-type silicon. The side of the wafer that will eventually be the bottom is deeply etched (in V-shaped grooves) to form the sidewall pattern, then silicon dioxide and polycrystalline silicon are grown to fill the etched moats and to thicken the eventual DI substrate. The opposite side of the wafer is polished until the insulating sidewalls appear at the wafer surface. Conventional diffusion and metallization processes follow to complete the IC. Compare junction isolation and see bonded wafer.
Diffusion:A high temperature process in which chemical impurities (dopants) enter and move through the crystalline lattice structure of a semiconductor material to change its electrical characteristics. The process takes place in a diffusion furnace, usually at temperatures between 850oC and 1150oC.
Diffusion pump:high vacuum pump operating in the ranges from 10-3 torr to 10-7 torr featuring relatively high pumping speed; Removes molecules from vacumm by trapping them with oil vapor. Removed from high-end applications because of the oil vapor backstreaming into the vacuum system and contaminating the chamber. Pressure 10-5 Torr or better is refered to as high vacuum (HV). learn more.
Diffusion: A thermal process in which a chemical species (e.g. a desired dopant or an undesirable contaminant) redistributes itself from regions of higher concentration to regions of lower concentration. Fick's laws describe classical diffusion. Note that diffusion in semiconductors exhibits many anomalies that are not accurately described by these laws.
Digital:Represented in terms of discrete digits, each distinct from the next. A method of representing and manipulating information by switching current on or off. Compare analog.
Digital integrated circuit: A class of integrated circuits that process digital information (expressed in binary numbers). The processing operations are arithmetic (such as addition, subtraction, multiplication, and division) or logical (in which the circuit senses certain patterns of input binary information and indicates the presence or absence of those patterns by appropriate output binary signals).
Digital signal processing:See DSP.
Digital Signal Processor:A microprocessor capable of performing large numbers of multiplications at high speeds for quantization and other processes used in digitizing image and sound signals. A DSP typically has a high-speed data bus and a multiplier. Many advanced microprocessors today serve similar functions, however, making the conventional definition of DSP less pertinent.
Diode:A two-terminal semiconductor (rectifying) device that exhibits a non-linear current-voltage characteristic. The function of a diode is to allow current in one direction and to block current in the opposite direction. The terminals of a diode are called the anode and cathode. There are two kinds of semiconductor diodes: a P-N junction diode, which forms an electrical barrier at the interface between N- and P-type semiconductor layers, and a Schottky diode, whose barrier is formed between metal and semiconductor regions.
DIP:Dual In-line Package. The most common type of integrated-circuit package, which can be either plastic (DIP-Plastic) or ceramic (CERDIP). Circuit leads or pins extend symmetrically outward and downward from opposite sides of the rectangular package body. "DIP, side-brazed" is a dual in-line package with leads brazed externally, on the sides of the package.
Direct bandgap semiconductor:semiconductor in which the bottom of the conduction band and the top of the valence band coincide with the same value of momentum; the wavelength of any emitted radiation is determined by the energy gap of the semiconductor; examples include GaAs and InP.
Discrete:An adjective used to describe types of semiconductor devices that perform a single function, such as transistors and diodes as opposed to integrated circuits. It is also used to describe digital electric signals, because digital signals are sampled and quantized, meaning that they are not continuous either on the time or amplitude axis.
Discrete device: A class of electronic components, such as power MOSFETs, bipolar power transistors, surgectors, MOVs, optoelectronic devices, rectifiers, power hybrid circuits, intelligent power discretes, and transistors. Typically, these devices contain one active element, such as a transistor or diode. However, hybrids, optoelectronic devices, and intelligent discretes may contain more than one active element. In contrast, integrated circuits (ICs) typically contain hundreds, thousands, or even millions of active elements in a single die.
Distributed Feed Reactor: A type of LPCVD system, which uses a special injector to provide fresh reactant gas to numerous points along the furnace tube. This is done to overcome gas depletion effects.
DLM: Double-Level Metal. An IC metal interconnect process that employs two vertical levels of metal, separated by an insulating layer. DLM technology allows a designer to use a smaller die size (for a given level of design functionality) than does SLM. Compare SLM.
DLTS: Deep Level Transient Spectroscopy.
DLY: Design Limited Yield. See yield.
Donor:An impurity from column V of the periodic table, which adds a mobile electron to the conduction band of silicon, thereby making it more N-type. Commonly used donors are arsenic and phosphorous. Compare acceptor.
Dopant: element introduced intentionaly into a semiconductor to establish either p-type or n-type conductivity; Common dopants in silicon are: Boron (p-type) and phosphorous, arsenic, and antimony (n-type).
Doping:The intentional introduction of a selected chemical impurity (dopant) into the crystal structure of a semiconductor to modify its electrical properties. For example, adding boron to silicon makes the material more P-type. Doping concentrations range from a few parts per billion (for resistive semiconductor regions) to a fraction of a percent (for highly conductive regions).
Dose (Implant Dose): This is a key ion implantation process control parameter. A measure of the quantity of dopant injected into a wafer by an ion implantation process. Typically stated in units of (ions inferred) per cm2 in exponential notation (e.g. 3.5 x 1015 cm-2). It is controlled through the use of a sub-system called a Faraday, which measures the ion beam current, which is integrated over time to calculate the dose that is delivered during the implantation process.
Double crystal X-ray diffraction: The use of X-rays to determine the spacing between atoms in a semiconductor crystal.
Dosimetry: The technology embedded in an ion implantation machine to control the implantation dose delivered in the implant process. See also: dose and Faraday.
D-pack: An epoxy power discrete package for power MOSFETs, IGBTs, and bipolar transistors. The D-pack is available in a straight leaded version (TO-251) or a surface mountable version (TO-252).
Drain: One of the three regions that form a field-effect transistor. Majority carriers that originate at the source and traverse the channel are collected at the drain to complete the current path. The flow between source and drain is controlled by the voltage applied to the gate. See also channel, FET, gate and source.
DRAM: Dynamic Random Access Memory. The lowest cost and most popular type of semiconductor read/write memory chip, in which the presence or absence of a capacitive charge represents the state of a binary storage element (zero or one). The charge must be periodically refreshed. Pronounced "dee-ram".
DRC: Design Rule Check. DRCs measure spacing, overlap, and sizes of all masking dimensions on the layout. This is necessary to ensure that the circuit dimensions will conform to the capabilities of the fabrication process.
Driver: Typically, an electronic function used to provide amplification to drive high current loads. Term often used to denote bus drivers that rapidly charge and discharge capacitance. Also used to denote the ability to control power, such as when driving a solenoid or other high-current device.
Dry etching: Dry etching is an etching method to cut the film by the force of the mechanical and chemical reaction. It excites the etching gas (chemical gas) into the plasma and etches the wafer surface by hit with the accelerated ions in the plasma. It is also able to reduce contamination and to etch highly accurately.
DSP:Digital-Signal Processing. Digital circuits designed to address a broad class of problems in signal reception and analysis that have traditionally been solved using analog components. DSP is rapidly replacing analog signal processing functions where requirements for stability over time and temperature variations are critical. DSP is used to enhance, analyze, filter, modulate, or otherwise manipulate standard real-world functions, such as images, sounds, radar pulses, and other such signals by analyzing and transforming wave-forms (e.g., transmitting data over phone lines via modem). Intersil offers building blocks and special function chips for DSP, including fast multipliers, multiplier accumulators, image processors, histogrammers, and digital filters.
Dual in-line package:See DIP.
Dual Inline Package: A type of IC package with a rectangular housing and two parallel rows of electrical connecting pins, giving it a centipede-like appearance. It was the most common package type in the early days of ICs
DYM:Defect and Yield Management. See yield.
Dynamic Random Access Memory:A type of semiconductor memory used in the main storage unit of a computer or as large-capacity working memory of other electronic devices. It is the most common type of memory that allows data to be read or written instantly as needed. A DRAM stores each bit of data in a cell consisting of a pair of a MOS transistor and a capacitor. When a bit of data is stored, the capacitor in the cell changes its state to either charged or discharged, representing the value 0 or 1 in the binary numeral system. To prevent the capacitor charge from fading through data reading and natural leakage, DRAM needs periodical refreshing.
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E
E-beam: Electron beam. Refers to a machine that produces a stream of electrons (electron beam) that can be used to expose photo-resists that are sensitive to such beams. Can be used to expose resists directly on a wafer or on a mask. Electron-beam lithography is a direct-write microprinting technique.
EBHF: Enhanced Back-diffused High-Frequency. A Intersil standard bipolar process technology that is optimized for very high performance with semicustom tile arrays and semicustom parametric analog cell capabilities. It is available with either single- or double-level metal interconnects and can be used in either plastic or hermetic packages.
ECL circuit: Emitter-Coupled Logic circuit. ECL circuits use bipolar transistors biased in the active region. They are a very fast high-power digital technology commonly used in logic circuits.
Edge-emitting lasers: Semiconductor devices that have a region of optical gain that can emit light, or lase, from the edge of the gain region (as opposed to the suface-emitting, vertical cavity type, called VCSEL).
EDIF:Electronic Design Interchange Format. A standardized exchange language for design information.
EEPROM or E2PROM: Electrically-Erasable Programmable Read-Only Memory. Similar to PROM, but with the capability of selective erasure of information through special electrical stimulus. Information stored in EEPROM chips is retained when the power is turned off. Compare PROM.
Elastic Collision: An atomic collision that does not involve an exchange of energy.
Electrochemical C-V profiling: A method to determine the dopant profile in semiconductor devices by measuring the capacitance (C) of the material as a function of voltage (V).
Electromigration: Motion of ions of a metal conductor (such as aluminum) in response to the passage of high current through it. Such motion can lead to the formation of "voids" in the conductor, which can grow to a size where the conductor is unable to pass current. Electromigration is aggravated at high temperature and high current density and therefore is a reliability "wear-out" process. Electromigration is minimized by limiting current densities and by adding metal impurities such as copper or titanium to the aluminum.
Electron: An elementary atomic particle that carries the smallest negative electric charge (1.6x10-19 coulombs). Electrons are light in mass, (1/1837 of the mass of the hydrogen atom), highly mobile, and orbit the nucleus of an atom.
Electron beam (e-beam) evaporation: source material is evaporated as a result of highly localized heating by bombardment with high energy electrons; the electron beam is spacially confined and accelerated by electrostatic interactions. The direction and crosssection of the beam can be precicely controlled and rapidly altered to scan the target; vaporated material is very pure; bombardment of metal with electrons is accompanied by generation of low intensity X-rays which may create defects in the oxide present on the surface of the substrate; typically, an anneal is needed to eliminate those defects. learn more.
Electron Beam: An electron beam is a stream of electrons, which are typically induced thermally from a cathode and flow to an anode. In electron beam processing, the flow of electrons is accelerated by electric fields, and as it strikes the target the material is drilled or welded as appropriate.
Electronic Design Automation: A computer-assisted process for automatically designing semiconductors and electronic circuits. Also refers to dedicated tools (hardware and software) designed to serve this purpose. EDA covers the entire segments to be designed, including specifications, functions, logic, circuits, and layout.
Elemental semiconductor: single element semiconductor from group IV of the periodic table; Si, Ge, C, Sn.
Eleven Nines: Eleven nines means 99.999999999%. When used in reference to a material, it means having a purity of 99.999999999%. Production of semiconductor devices such as ICs requires materials that are “eleven nines” pure. Silicon, a representative semiconducting material, becomes nearly nonconductive at this level of purity.
EOS:Electrical OverStress is a transient or steady state electrical condition that exceeds the specifications and/or capabilities of a device. Both the magnitude and duration of an EOS event can vary. Examples of mild EOS are oxide ruptures and junction damage with signs of visual stress. Severe EOS may include massive vaporization of bond wires or aluminum interconnects and carbonizing of plastic packages. See ESD.
Epi Layer: The term epitaxial comes from the Greek word meaning 'arranged upon.' In semiconductor technology, it refers to the single crystalline structure of the film. The structure comes about when silicon atoms are deposited on a bare silicon wafer in a CVD reactor. When the chemical reactants are controlled and the system parameters are set correctly, the depositing atoms arrive at the wafer surface with sufficient energy to move around on the surface and orient themselves to the crystal arrangement of the wafer atoms. Thus an epitaxial film deposited on a <111>-oriented wafer will take on a <111> orientation.
Epitaxial Growth: Epitaxial growth, or epitaxy, refers to the deposition of a crystalline overlayer (epitaxial layer) on a crystalline substrate. The crystal orientation of the epitaxial layer depends on the structure of the substrate and seed crystals. Epitaxy is used for manufacturing Si ingots and for depositing suitable crystal layers on the wafer surface.
Epitaxial layer: layer grown in the course of epitaxy;
Epitaxy:process by which a thin "epitaxial" layer of single-crystal material is deposited on single-crystal substrate; epitaxial growth occurs in such way that the crystallographic structure of the substrate is reproduced in the growing material; also crystalline defects of the substrate are reproduced in the growing material. Although crystallographic structure of the substrate is reproduced, doping levels and the conductivity type of a epitaxial layer is controlled independently of the substrate; e.g. the epitaxial layer can be made more pure chemically than the substrate;
EPMA: Electron Probe MicroAnalysis.
Emitter: One of the three regions that form a bipolar transistor. Under forward bias of the emitter-base P-N junction, the emitter injects minority carriers (electrons or holes) into the base region where they either recombine or diffuse into the collector. The flow of minority carriers from the emitter to the collector is controlled by the base-emitter P-N junction, thereby giving rise to signal amplification. See also base, bipolar transistor and collector.
Energy: A key ion implantation process control parameter. It is a measure of the kinetic energy of a charged particle (e.g. a desired dopant being injected into a wafer), that determines the depth of penetration of the particle. Typically stated in terms of keV (thousands of electron volts) or MeV (millions of electron volts). Example: 100keV, which would be the energy of a singly charged particle that had been accelerated by a 100kV potential drop. See also: acceleration.
Engineering workstation: A desktop computer with application software for computer-aided engineering (CAE) or computer-aided design (CAD) applications, e.g., a Sun workstation with Cadence software and the Intersil FASTRACK design system. See CAD, CAE, and FASTRACK.
Enhancement-mode FET:An FET designed so that its channel is fully depleted. It is in the "off" state with zero voltage applied to the gate. This configuration is attractive for low quiescent power. See also channel, depletion-mode FET, FET, gate and source.
Epitaxy:The controlled growth on a crystalline substrate of a crystalline layer, called an epilayer. In "homo-epitaxy" (e.g., silicon layers on a silicon substrate) the epilayer exactly duplicates the properties and crystal structure of the substrate. In "hetero-epitaxy" (e.g., silicon on sapphire) the deposited epilayer is a different material with a different crystalline structure than that of the substrate.
EPROM: Erasable Programmable Read-Only Memory. Similar to PROM, but allows stored information to be erased. Refers to a non-volatile memory device whose contents can be erased by exposure to ultraviolet light. See also PROM, EEPROM.
Erasable Programmable Read Only Memory: A type of semiconductor memory chip on which data can be written and erased a certain number of times. An EPROM is basically a read-only memory that can be reprogrammed. The data can be typically erased by exposing the chip to intense ultraviolet light through a transparent opening on the package. In addition to this type of EPROM (referred to as UVEPROM), the Electrically Erasable Programmable Read-Only Memory (EEPROM) was also developed to provide an electrical erase function. Both types of EPROM were used widely, but have been replaced by flash memory in recent years.
ERC: Electrical Rules Check. Software that verifies that a schematic shows a reasonable connection of circuit elements. Compare DRC.
Esaki Diode (Tunnel Diode): A type of semiconductor that uses the quantum tunneling effect. It was invented by Leona (Leo) Esaki in 1957. When a forward-biased current flows through this diode and the voltage is gradually increased, negative resistance is produced at a certain voltage range, meaning the current decreases as the voltage gets higher. In fact, oscillators and amplifiers equipped with Esaki diodes delivered far superior performance than those with conventional diodes.
ESD: ElectroStatic Discharge as its name implies is a static buildup of electrons that is then discharged. The magnitude of ESD can vary widely, but the duration of a pulse is usually very short. An ESD event can result in junction failure, contact damage, filamentation, oxide thermal damage, oxide breakdown, charge injection and fusing (opening) of interconnects. Today there are three types of accepted ESD models: the human body model, the charge device model, and the machine model. The root cause of ESD typically is improper handling. This can be augmented by low humidity, ungrounded equipment and poor device design. See EOS.
Etch: The process of removing material from a wafer (such as oxides or other thin films) by chemical, electrolytic or plasma (ion bombardment) means. Examples: nitride etch, oxide etch.
Etch:To remove, in a controlled manner, selected material from a wafer by employing chemical, electrolytic, or plasma means.
Etch Bias: When there is some degree of horizontal etching in a target film during a plasma etch process, the feature transferred by the etching process into the film will be smaller than the feature was in the photoresist mask pattern. If this is not acceptable, the photoresist mask feature may be dimensionally increased (biased) to offset this effect. This is called etch bias. See also: under-cutting.
Etch system: An etch system shapes the thin film into a desired patterns using liquid chemicals, reaction gases or ion chemical reaction. It is used in manufacturing lines for semiconductors and other electronic devices.
Etching:A process of chemically removing from wafer surface part of the layers that is not covered by the patterned resist. There are two types of etching: liquid-based “wet” etching and plasma-based “dry” etching.
Evaporation: common method used to deposit thin film materials; material to be deposited is heated in vacuum (10-6: 10-7 Torr range) until it melts and starts evaporating; this vapor condenses on a cooler substrate inside the evaporation chamber forming very smooth and uniform thin films; not suitable for high melting point materials; PVD method of thin film formation. learn more.
Evaporative Deposition: An older PVD technology that was used to deposit thin metallic films. It featured very high deposition rates, but was largely abandoned because it could not effectively deposit alloy materials.
Excitation Event: A type II electron-atom impact event that excites an outer valence electron of the atom to a higher energy state, but which lack sufficient energy to ionize the electron. Shortly after the excitation occurs, the excited electron drops down to its original energy state, and in so doing, emits a photon of characteristic energy.
External, extrinsic gettering:process in which gettering of contaminants and defects in a semiconductor wafer is accomplished by stressing its back surface (by inducing damage or depositing material featuring different than semiconductor thermal expansion coefficient) and then thermaly treating the wafer; contaminants and/or defects are relocated toward back surface and away from the front surface where semiconductor devices can be formed.
Extraction: The process of forming a properly focussed ion beam from the ions created in the ion source of an implant machine. This is done through the use of a high voltage (intense electric field) region that extracts ions from the ion source, forming an ion beam of appropriate size and shape for use in the ion implantation process. The extraction process inherently accelerates the extracted ions, imparting a large amount of kinetic energy to them. They then may be accelerated (or decelerated) to the final desired implantation energy.
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FA: Failure Analysis.
Fab: Fabrication. In semiconductor manufacturing, fabrication usually refers to the front-end process of making devices and integrated circuits in semiconductor wafers, but does not include the package assembly (back-end) stages.
FAE: Field Application Engineer. A term used to describe a Intersil employee specifically engaged in helping customers apply Intersil products in various circuits and designs.
Faraday: An electrically isolated structure in an ion implantation machine whose function is to accurately measure the ion beam current (charge) during the ion implantation process. It is part of the dosimetry system in ion implantation machines, which controls the dose applied to the wafer in an ion implantation process. The dosimetry system integrates the measured ion beam current over time and calculates the dose delivered to the substrate. Named after Michael Faraday, who invented this type of structure. See also: dose and dosimetry.
FASTRACK^TM: Intersil's open-architecture design system, providing state-of-the-art capabilities for schematic capture, design verification and place and route functions based on Intersil analog, mixed signal, and digital process families. Extremely useful for Intersil and its customers to develop high-performance standard products and custom designs. The analog bipolar FASTRACK system won EDN Magazine's Product Innovation of the Year Award in 1990.
Fault: A defect in an IC that can cause a failure during operation. Usually caused by processing defects.
Fault coverage: The percent of all possible internal faults a circuit can have that are observable from the outside of the IC by a functional test vector set. Typically refers to those faults modelled by a signal stuck to power or ground.
Fault simulation: A logic-gate level simulation technique in which the circuit description is modified (faulted) to correspond to a processing defect, and the simulation is re-run to determine whether the test program would find this defect. After many faults are simulated, this gives an indication of the quality (fault coverage) of the test program.
FET:Field Effect Transistor. A solid-state device in which current is controlled between source and drain terminals by voltage applied to a non-conducting gate terminal. See also channel, drain, gate and source.
Fick's Laws: A set of closed form equations that describe classical diffusion. Note that diffusion in semiconductors exhibits many anomalies that are not accurately described by these laws.
Field Effect Transistor: A transistor that uses an electric field created by the gate terminal voltage to check the flow of electrons or holes, thereby controlling the current between the source and drain terminals.
Field Emission Display: A type of next-generation flat panel display that uses an array of submicron electron emitters to display an image on the screen. The operating principle is the same as that of a cathode ray tube. FEDs can be made flat and large-sized, and are self-light-emitting.
Field Programmable Gate Array:A type of semi-customized IC that is highly integrated, has excellent functionality and numerous I/Os, and can be easily configured by customers. Because FPGA's programmability feature significantly shortened the customers' product development cycle, FPGAs soon captured a large share of the gate array market.
Filament evaporation: thermal evaporation; source material is contacted to the filament (a refractory metal) and melted by high current flowing through the filament; alternativly, a "boat" which contains material to be evaporated may be made out of refractory metal; learn more.
Flash Memory: An advanced form of electrically erasable programmable read-only memory (EEPROM). Flash memory is non-volatile and the data on the device can be freely rewritten. Flash memory devices are more convenient to use than UVEPROMs that require ultraviolet light to erase data.
Flat pack: A package having leads that are parallel to the component body. Hermetic flat packs have leads on two or four sides. Plastic flat packs usually have leads on all four sides (plastic quad flat pack). Intersil supplies both plastic and hermetic ceramic flat packs to the military and commercial markets.
Flip-chip: Bonding of chips with contact pads, face down, by solder bump connections.
Float-zone Crystal Growth, FZ: method used to form single crystal semiconductor substrates (alternative to CZ); polycrystalline material is converted into single-crystal by localy melting the plane where a single crystal seed is contacting the polycrystalline material; used to make very pure, high resistance Si wafers; does not allow as large wafers (< 200mm) as CZ does; radial distribution of dopant in FZ wafer is not as uniform as in CZ wafer.
Flood Gun: An ion implant machine sub-system provides low energy electrons to the ion beam near the substrate, which reduces the magnitude of the positive charging on the substrate.
Floorplanning: Floorplanning is used at the chip planning stage to efficiently partition the space of the chip in order to minimize area. It is also used in the early stages of layout to investigate tradeoffs in pinout, block placement and rotation, and routing area construction.
Forward bias: A voltage applied across a rectifying junction with a polarity that provides a low-resistance conducting path. By contrast, reverse bias causes the junction to block normal current. See P-N junction.
Foundry: A wafer production and processing plant. Usually used to denote a facility that is available on a contract basis to companies that do not have wafer fab capability of their own, or that wish to supplement their own capabilities.
FOUP (Front Opening Unified Pod): FOUP is a closed-type wafer carrier (container) for the transport and storage, conforming to the SEMI Standard E47.1. It has an opening and closing mechanism on the front. It is commonly used in the semiconductor factory of mini-environment system of 300mm (12 inch) wafer. The inside of the FOUP keep the cleanliness of the same degree as the mini-environment system.
Frit: A term used interchangeably with "glass" as in frit or glass-sealed packages such as CERDIP and CERPACK.
Front end: In semiconductor manufacturing, the fabrication process in which the integrated circuit is formed in and on the wafer. Compare back end.
FTIR: Fourier Transform Infrared Spectrophotometry.
FTY: Final Test Yield. See yieid.
Fullerene:A term referring to a cluster of uniquely structured carbon atoms. The first fullerene molecule discovered in 1985 consisted of 60 carbon atoms in a shape of a soccer ball. Among those who discovered fullerene, Harold Kroto, Richard Smalley, and Robert Curl received the Nobel Prize in Chemistry in 1996.
Functional tests:The application of functional input vectors and the corresponding responses that assure proper operation of a digital IC.
Furnace Processing: A thermal processing employing standard tube furnaces (vertical or horizontal), which process large batches of wafers (50-100) at one time. It is the incumbent technology for most thermal processing at this time, and typically it has a cost advantage over competing thermal process technologies. However, furnace-based thermal processing inherently heats the wafers from their edges inward during the ramp up to process temperature, which unavoidably induces significant temperature gradients across the wafers (this gradient is reversed during quench, as the wafers cool down by losing heat from their edges). Consequently, greatly limited ramp (and quench) rates are required (~ 50C per minute) when using such tube batch furnaces.
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GaAs: Gallium Arsenide. A III-V compound semiconductor material used for making optoelectronic devices and high-frequency ICs. GaAs has a higher electron mobility than silicon, thus having the capability of producing higher-speed devices. Electrons in GaAs travel at twice the speed of those of silicon.
GaAs FET: Gallium Arsenide Field Effect Transistor. A high-frequency voltage-controlled current amplifier similar to a silicon MOSFET. Also called GaAs MESFET (gallium arsenide metal semiconductor field effect transistor).
Gallium Arsenide (GaAs): A representative III-V semiconductor compound. Electrons move within GaAs crystals 5-6 times faster than in silicon, which makes the compound a suitable material for high-frequency, high-speed analog devices. Representative GaAs applications include GaAs FETs, infrared LEDs, and laser diodes.
Gallium Arsenide Integrated Circuit (GaAs IC): A type of IC that uses GaAs as a substrate. When it was introduced, GaAs IC was considered to be potentially faster than silicon ICs, although the latter turned out to be the mainstream today. GaAs ICs are often used in mobile phones and high-frequency communication devices.
Gallium Nitride-Based Light Emitting Diode: An LED that uses semiconductor materials containing gallium nitride (GaN) (such as InGaN) for an epitaxial layer. It uses a sapphire substrate and emits blue and ultraviolet light at the wavelength of around 450 nm. A GaN LED can produce white light when overlaid with a fluorescent material or used with green and red LEDs.
Gas Depletion Effect: The reduction of gas concentrations as reactant gases are consumed by reactions on the wafer's surfaces. This effect is prevalent in end feed reactors and results in a serious gas concentration gradient across the furnace tube.
Gate: (1) The control electrode in a field-effect transistor (FET). A voltage applied to the gate regulates the conducting properties of the semiconductor channel region, which is usually located directly beneath the gate. In a MESFET (metal semiconductor field effect transistor), the gate is in intimate contact with the semiconductor. In a MOSFET (metal oxide semiconductor field effect transistor), it is separated from the semiconductor by a thin oxide, typically 100-1000 angstroms thick. (2) A combination of transistors which form a circuit that performs a logic function, such as NAND or NOR. See also channel, drain, FET, MESFET, MOSFET and source.
Gate: The control electrode in a field-effect transistor (FET). The application of a voltage to the gate varies the electrical diameter of the semiconductor path or channel, allowing the regulation of its conducting properties.
Gate array: A semicustom IC consisting of a regular arrangement of gates that are interconnected through one or more layers of metal to provide custom functions. Generally, gate arrays are preprocessed up to the first interconnect level so they can be quickly processed with final metal to meet a customer's specified function.
Gate length: Physical distance between source and drain of a MOS transistor measured on the photomask plate. Also called "patterned" or "drawn" gate length. When determined from the actual transistor characteristics, called "effective" gate length. See source and drain.
Gettering: process which moves contaminants and/or defects in a semiconductor away from its top surface into its bulk and traps them there, creating a denuded zone.
Glow Discharge: A self-sustaining plasma that consists of a partially ionized gas consisting of equal numbers of positive and negative charges as well as some number of neutral particles.
Graphene: A sheet of carbon consisting of a single layer of carbon atoms arranged in a hexagonal lattice. Graphene is the basic structural element of carbon allotropes including carbon nanotubes and fullerenes.
Growth process: The process of making device wafers by depositing, or "growing," layer by layer, on a substrate.
GTO （gate turn-off thyristor): GTO is a special type of thyristor that can completely control the switch. GTO can be turned on and off by the gate signal. Conventional thyristor is not a fully controllable switch. Thyristor can only be turned on, it cannot be turned off. GTO can be turned on by the gate signal, and also, it can be turned off by the negative polarity gate signal.
Gullwing: A common lead form used to interconnect surface mounted packages to the printed-circuit board.
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Hardware:The physical components of a circuit or system, both passive and active.
Harsh environment: Conditions such as radiation exposure, temperature extremes, vibration, and dirt encountered by the military, on factory floors, and under the hoods of automobiles. Addressed by radiation hardening ICs and other rugged process technologies, an area in which Intersil is a world leader. See radiation hardened circuit.
HBC-10: A Intersil BiCMOS mixed-signal wafer process developed to provide high integration of logic as well as precision analog capability. It has also been optimized for both A-to-D and D-to-A data conversion. See BiCMOS, A/D converter, D/A converter.
HBT: Heterojunction bipolar transistor. A vertical transistor used for high performance wireless and telecom circuits, such as circuits for digital cell phone handsets and high-bandwidth fiber-optic telecommunications systems. See bipolar transistor.
HDCVD: High Density Chemical Vapor Deposition; a CVD technology that addresses the gap-fill problem that occurs between adjacent metal lines. HDCVD is a plasma-enhanced technology that etches the corners of a CVD film around a metal line, as it is depositing the desired thin film. In this manner the bread loafing effect apparent in other CVD technologies is avoided, and the gaps between metal lines mitigated.
HEMT: High-electron-mobility transistor. A type of FET that utilizes a high-mobility layer to enhance performance. HFET: Heterojunction field-effect transistor. A type of FET with enhanced performance achieved by employing a
heterojunction between two semiconductors of different bandgap.
Heterogeneous Reactions: The reactions that occur at the wafer's surface, and are highly desirable for the formation of a particle free thin film.
High-K Material:A material with a high dielectric constant (k). High-k materials are used in dielectric films for logic gates and DRAM capacitors to improve transistor performance and DRAM capacitance.
High-level language:An application-oriented programming language, as distinguished from a machine-oriented programming language. The instruction approach is closer to the needs of the problems to be solved than it is to the language of the machine on which it is to be run. Examples are Ada, C, COBOL, FORTRAN, Lisp and Pascal.
HMDS: Hexamethyldisilizane; improves adhesion of photoresist to the surface of a wafer; especially designed for adhesion of photoresist to SiO2; deposited on wafer surface immediately prior to deposition of resist.
Hole: A mobile electron vacancy in a semiconductor that acts like a positive electron charge (+1.6x10-19 coulomb) with a positive mass. Unoccupied spot among the electrons that are bound in their orbits. Under the application of an electric field, holes move in the opposite direction from electrons, thereby producing an electric current. Holes are induced into an integrated circuit by adding small quantities of an acceptor dopant to the host silicon crystal. See acceptor.
Homogeneous Reaction: The reactions that occur in the gas phase and are highly undesirable. Gas phase reactions create low-density thin films that have poor adhesion to the wafer's surface. Such reactions also generate particulate contamination.
Hot Wall Reactor: A very common kind of LPCVD reactor which features horizontal or vertical tube reactors. The primary advantage of this kind of technology is that it facilitates batch processing, and is therefore is very economical. It also features superior throughput, good uniformity, and can accommodate large wafer diameters.
HVIC: High-Voltage Integrated Circuit. Utilizes DI (dielectric isolation) and JI (junction isolation) technologies to provide circuits that convert high-voltage incoming AC lines (120 and 240 volts, for example) to regulated DC output. A key point of Intersil's analog strategy in applying existing process capabilities to new markets, HVICs are cost-effective monolithic replacements for transformers, rectifiers and regulators. See DI and JI.
Hybrid circuit:(1) A combination of passive and active subminiature devices on an insulating substrate to perform a complete circuit function. (2) A combination of one or more integrated circuits with one or more discrete components. (3) The combination of more than one type of integrated circuit into a single package.
Hybrid Integrated Circuit: An electronic circuit consisting of semiconductor devices (such as transistors and diodes) and passive devices (such as capacitors and resistors) embedded on a single ceramic substrate. A hybrid circuit can take advantage of the features of its component devices, while enjoying greater reliability than when the components are discretely mounted on a printed circuit board. Hybrid integrated circuits are often used for high-voltage, high-frequency applications.
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IC:Integrated Circuit. Plural: ICs (no apostrophe). See integrated circuit.
IC (Integrated Circuit): An electronic device comprising numerous functional elements such as transistors, resistors, condensers, etc. on a piece of silicon semiconductor substrate, and is sealed inside a package with multiple terminals.
IGBT: Insulated Gate Bipolar Transistor. A four-layer discrete power device that combines the characteristics of a power MOS transistor and a thyristor. IGBT devices are usually found in high-voltage circuits (above 300V) because they can be prepared with significantly lower values of RDS(on) than a power MOSFET with the same die size. Also referred to as "COMFETs," "GEMFETs" and "IGTs". Intersil is the inventor of the basic IGBT mechanism, and is a world leader in advanced IGBT technology. See RDS(on).
IGFET: Insulated Gate Field Effect Transistor. See MOSFET.
ILM: In-Line Monitor.
Image processing: The use of computers and sophisticated mathematical algorithms to analyze, enhance, and interpret digitized images.
Immersion Lithography: A lithography technique in which the space between the optical imaging system and the wafer is filled with a liquid medium before exposure. Because the refractive index of a liquid medium is higher than that of air, the technique enhances the numerical aperture (NA) of the imaging apparatus and increases the resolution.
Implant Distribution (Dopant Distribution): The characteristic (one-, two-, or three-dimensional) distribution of the dopants introduced from the ion implantation process. It is usually presented as a one- or two-dimensional dopant concentration vs. position plot, using units of atoms (of dopant) per cubic centimeter of silicon (cm-3). This distribution is primarily determined by the species, energy, dose and anneal process (peak temperature, time) used for the implantation process. However, in modern integrated circuits, there are several other implantation process parameters that must also be properly controlled. This is necessary in order to obtain the required precision in amount and location of the desired dopants in the final device structure. Examples are wafer orientation to the ion beam vector, mask edge geometry, residual vacuum pressure, anneal ramp & quench rate, and anneal ambient, depending on the specific implantation process application.
IMPReSS:Integrated Manufacturing Production Resource Scheduling System. An Intersil software tool that produces production plans based upon customer demand forecasts and manufacturing capabilities. The system was developed by Intersil to integrate forecasting, material procurement, planning, and order-entry processes as they relate to worldwide manufacturing requirements. Customer delivery dates are generated interactively and are based upon a global manufacturing production plan.
Impurity: In semiconductor technology, a material such as boron, phosphorus or arsenic added in small quantities to a crystal to produce an excess of electrons (donor impurity) or holes (acceptor impurity). Also called "dopant".
Inelastic Collision: A type I electron-atom impact event that transfers sufficient energy to an outer valence electron to ionize it.
InGaP: Indium gallium phosphide. Used in HBT device wafers. A III-V compound semiconductor material used for making optoelectronic devices and high-frequency ICs. This material is often employed in very high-speed, reliable HBTs, FETs, and lasers.
integrated circuit (IC): Sometimes called a chip or microchip, an IC is a small electronic device (consisting of thousands or millions of tiny resistors, capacitors, and transistors) made from a semiconducting material. Devices containing integrated circuits have a variety of applications including microprocessors, audio and video equipment, and automobiles.
low noise amplifier (LNA): Integrated circuits (ICs) used to amplify lower-power, smaller signals into larger, more easily used signals. LNAs are designed to contribute very little noise.
Ingot: circular piece of single-crystal semiconductor material resulting from a crystal growth process; an ingot is ready to be shaped and sliced into wafers used to manufacture semiconductor devices. learn more.
Input/output: See I/O.
Insulator: A material that is a poor conductor of electricity or heat, and used to separate conductors from one another or to protect personnel from active electrical devices. Examples: silicon dioxide (glass), silicon nitride, rubber, ceramics, wood.
Insulated Gate Bipolar Transistor: A type of discrete semiconductor that combines a three-terminal bipolar transistor with a MOSFET. With the injection of minority carriers, its dynamic resistance can be made lower than that of a MOSFET. As a highly voltage-resistant yet relatively high-speed power transistor, IGBT is increasingly used in automobiles and air conditioners.
Integrated Circuit (IC): An electronic circuit in which many active or passive elements are fabricated and connected together on a continuous substrate, as opposed to discrete devices, such as transistors, resistors, capacitors and diodes.
Intelligent DiscreteTM: A power MOSFET that contains more than one active element or that allows non-intrusive current monitoring. Intersil intelligent discrete devices, for example, provide current-limiting and thermal-limiting functions to conventional power MOSFET capabilities. See MOSFET.
Intelligent Power ICTM:A circuit in which power, logic and analog functions are integrated on the same semiconductor chip. Intersil has an extensive library of general-function standard cells that are used to fabricate such circuits.
Interconnection: The conductive path required to achieve connection from one circuit element to others in a circuit.
Intrinsic gettering: process in which gettering of contaminants and/or defects in a semiconductor is accomplished (without any physical interactions with the wafer) by a series of heat treatments.
I/O:Input/Output. Generally refers to the external connections of an IC that tie it to the outside world. Supply pins and control pins are usually not considered I/O.
Ion:An atom that has either gained or lost electrons, making it a charged particle (either positive or negative).
Ion: An ion is a charged particle (atom or molecule). Positive ions, which have been stripped of one or more of their outer shell electrons, are generally employed for ion implantation processes, because they are easier to produce in abundance in an ion source.
Ion implantation:A means for adding dopants to semiconductor material. Charged atoms (ions) of elements such as boron, phosphorus or arsenic are accelerated by an electric field into the semiconductor material. Especially useful for very shallow (<1µm) distributions of dopants in a semiconductor. Ion implantation is usually done at room temperature, with the resulting implantation-induced lattice damage removed by annealing at temperatures of approximately 700oC. More precise than diffusion doping.
Ion Source: This important sub-system in ion implantation machines produces positive ions of atoms (or molecules) that contain the desired dopant. It produces these ions through a process called impact ionization, in which energetic electrons collide with the outer electrons of the dopant atoms (or molecules) and knock them out of their bound states. This process strips the dopant atoms of one (or more) electrons, producing ions. Ion implantation most commonly uses positive ions, because they are easier to create in abundance.
Island Growth: A PVD thin film formation phenomenon which occurs when the incident metal atoms are more closely bonded to each other than to the wafer's surface.
Isotropic Etching: Etching that is not directional, i.e the vertical and horizontal etch rates of the target film are very similar. This may be desirable if the feature being etched cannot tolerate sharply vertical sidewall angles (e.g. contact or via holes that are to be filled with aluminum). However, isotropic etching cannot create the small, high aspect ratio structures that are required by modern integrated circuits (e.g. gate, tungsten contact and via holes, silicon trenches for STI).
IYM:Integrated Yield Management. See yield.
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JFET:See junction field effect transistor.
JI:See junction isolation.
JIT: Just In Time. Term used in manufacturing to denote requirement for delivery of products to the customer exactly when specified--neither too soon nor too late. The objective is to reduce inventory level (work in process, as well as finished goods). Such inventory reductions, in turn, lower storage expense and reduce manufacturing cycle times.
JTAG: Joint Test Action Group. (1) Test standards group working on boundary scan and standard test interfaces. (2) Any of the standards approved by this group. Some Intersil design libraries provide cells to implement the chip-level standards, and design information is available for most other libraries.
Junction: The interface plane within a semiconductor crystal, at which the number of P- and N-type carriers are exactly equal, with a surplus of P-type on one side of the junction and N-type on the other.
Junction field effect transistor (JFET): A semiconductor device that operates by altering the conductivity of a region of the semiconductor (the channel) between two contacts (source and drain) by application of a voltage to a third terminal (gate). The current flow between source and drain is controlled by the gate voltage. In a JFET device, the gate voltage is applied to the channel across a P-N junction, in contrast to its application across an insulator in a conventional MOSFET. JFETs are of two types: P-channel and N-channel, depending on whether the channel is N-type or P-type. See FET, MOSFET.
Junction isolation (JI):A fabrication technique by which components in an integrated circuit are separated or electrically isolated from each other by P-N junctions. Bipolar ICs generally begin with a P-type wafer into which a buried layer pattern is first diffused. Then the N-type epitaxial layer is grown, and P-type isolation wells are diffused around each area that is to be electrically isolated from the other circuitry. Compare dielectric isolation.
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K
K, or kilo: Generally a prefix meaning a multiple of 1000 (x103). Symbol: k. In digital systems, a symbol for 210 or 1024 bits.
Kerf: The width of cut made by a saw or other means during the process of separating a wafer into individual integrated circuits or dice. Kerf and 'scribe line' are also used to denote the area between integrated circuits on a wafer. See die, IC, scribe and break and wafer.
Kilobit: 1024 bits.
Kilobyte:1024 bytes (8192 bits). Symbol: KB. See byte.
Known-Good-Die: Known-Good-Die (KGD) are bare ICs that are equivalent to packaged parts in testability and reliability, giving customers the same assurance that the device has been tested to the same specifications as its conventionally packaged counterparts. See IC.
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Laser Diode: A diode that emits laser light. When a forward-biased current passes through the diode’s p-n junction, incoming electrons are recombined with holes to induce light emission. Indium gallium arsenide (InGaAs)-based diodes emit light with wavelengths between 1.3-1.55 μm, and are used for optical communications. Gallium nitride (GaN)-based diodes with wavelengths of 0.4μm, 0.6μm, 0.68μm, 0.78μm are also commonly used.
Latch-up: An undesirable phenomenon in which either a PNPN or an NPNP thyristor-type parasitic structure suddenly turns to an "on" state, thereby bypassing or shorting out portions of an IC. To prevent latch-up, Intersil uses either epitaxy layers to avoid diffused pockets or a retrograde P-well, which is designed to specifically avoid latch-up. See epitaxy
Layer Growth: A PVD thin film formation phenomenon which occurs when the incident metal atoms are more closely bonded to the wafer's surface than they are to each other.
LCC:Leadless Chip Carrier. A surface-mounted package having metallized contacts (terminals) at its periphery. Usually made of ceramic material.
LDD: Lightly Doped Drain. See doping and drain.
Leadframe: A stamped or etched metal frame, usually connected to the bonding pads of a die by wire bonding, that provides external electrical connections for a packaged electrical device.
LEC: Liquid Encapsulated Czochralski growth.
LED: Light-Emitting Diode. A semiconductor P-N junction diode that emits light under forward-bias conditions. The wavelength of the emitted light is a function of the semiconductor material. The crystal structure of silicon does not provide useful levels of light emission, but the structure of GaAs does, with an infrared emission wavelength.
Library: The term used to designate the collection of representations required by the various design tools. These representations, such as symbol, simulation model, layout abstract, transistor schematic, are used by the different tools in the design system to create or analyze some portion of the IC or otherwise aid in the design process. Creating a design library is effectively inserting the fabrication technologies into the design system in a form that allows designers to create circuits in the most efficient manner.
Light Emitting Diode (LED): A semiconductor device that emits light when an electric current passes through it. An LED efficiently converts electrical energy into light without heat dissipation, which is a distinct advantage over a conventional light bulb. Also, LEDs are semi-permanently durable and can be made very small.
Light-emitting diode:A light-emitting diode is a kind of semiconductor device that emits light when an electric current passes through it. It is also known as an LED. LEDs have a long life compared with incandescent light bulbs, and emit light using a low voltage of a few volts. Since there are LEDs in three primary colors: red, green and blue, combining them can create various colors of light.
Line defect: dislocation.
Linear: (1) Having an output that varies in direct proportion to the input. (2) A ratio in which a change in one of two related quantities is accompanied by a directly proportional change in the other.
Linear device:An amplifying-type, analog device with a linear input/output relation, as opposed to a non-linear, digital device, which is either completely "on" or completely "off" over large ranges of input signals.
Linear IC: A type of analog ICs used for amplification, oscillation, frequency modulation, and/or processing of analog signals. Specifically, those analog ICs in which the input and output values are proportional are referred to as linear ICs. Linear ICs are classified into consumer grade and industrial grade devices.
Linear integrated circuit: A circuit whose output is an amplified, linear version of its input or whose output is a predetermined variation of its input. A class of integrated circuits that process analog information expressed as voltages or currents.
Linear regulators:Linear regulators use linear, non-switching techniques to regulate the voltage output from the power supply. The regulator’s resistance varies according to the load and results in a constant output voltage. All linear regulators require an input voltage at least some minimum amount higher than the desired output voltage. That minimum amount is called the dropout voltage. A low-dropout or LDO regulator is a DC linear regulator which can regulate the output voltage even when the supply voltage is very close to the output voltage. Linear regulators are a great choice for powering very low powered devices or applications where the difference between the input voltage and output voltage is small. They are a simple and cheap solution, but linear regulators are normally inefficient because the difference between the input voltage and regulated output voltage is continually dissipated as heat.
Liquid Crystal Display: Liquid crystals refer to materials consisting of specific organic molecules that are fluid yet retain the characteristics of crystals. When a voltage is applied, the orientation of liquid crystal molecules is aligned to polarize the light. An LCD uses this effect to control the pixels on the screen. Although liquid crystals themselves are not light-emitting, the screen image can be illuminated with backlight.
Lithography: The transfer of a pattern or image from one medium to another, as from a mask to a wafer. If light is used to effect the transfer, the term "photolithography" applies. "Microlithography" refers to the process as applied to images with features in the micrometer range. See also aligner, mask, stepper, and X-ray lithography.
Loading: Loading occurs when the etch rate is dependent on the amount of target etch surface area exposed to the plasma. It typically manifests as a reduction in etch rate as the plasma becomes locally depleted of the etching species where there is a larger area of target film. Loading is characteristic of batch (barrel) etch systems where gas flow dynamics are not well controlled. These effects degrade the throughput and uniformity of batch systems. See also: micro-loading.
LOCOS: LOCalized Oxidation Of Silicon. See silicon.
Logic: Mathematical treatment of formal logic in which a system of symbols is used to represent quantities and relationships. AND, OR and NOT are examples of symbols of logical functions. Each function can be translated into a switching circuit, or gate. Since a switch (or gate) has only two states--open or closed--it makes possible the application of binary numbers for solution of problems. The basic logic functions obtained from gate circuits is the foundation of computing machines. Intersil manufactures a broad line of logic circuits in CMOS technology.
Logic-level MOSFET: A MOSFET with low operating voltages that can operate directly from a microprocessor or 5V logic instead of from the 10V usually supplied by IC buffer stages. Logic-level MOSFETs can eliminate the need for buffers. See MOSFET.
Logic optimization: Optimization of logic circuits for either area or speed using a tool such as the Synopsys Design Compiler.
Logic synthesis: Synthesis of gate level logic circuits from behavioral descriptions using a tool such as the Synopsys Design Compiler.
Low-K Material:A material with a low dielectric constant (k). Low-k materials are used as insulator films for logic interconnects. They are effective in reducing the interconnect latency because low-k films have lower parasitic capacitance than conventional silicon oxide films.
LPCVD:Low Pressure Chemical Vapor Deposition. See deposition.
LPCVD: Low Pressure Chemical Vapor Deposition; a CVD technology that utilizes a reactor chamber that operates at a lower than atmospheric pressure, and is therefore not mass transport limited. The low pressure increases the gas diffusivity by a factor of 1,000X over an APCVD system. Such reactors operate in the reaction rate-limited regime.
LP-MOCVD: Low-pressure Metal Organic Chemical Vapor Deposition. LP-MOCVD is a method to deposit or "grow" semiconductor materials by allowing gaseous sources to react on the surface of a semiconductor and form another perfect crystal semiconductor on the surface.
LSI: Large-Scale Integration. Integrated circuits containing between 100 and 5000 gate equivalents, or 1000 to 16,000 bits of memory. Over the years, integration levels have progressed from SSI (small-scale integration), MSI (medium-scale integration), and LSI, to today's VLSI (very-large scale integration).
LVS: Layout Versus Schematic. Compares the electrical design (schematic) with the physical design (layout) to ensure what will be built is what was designed.
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M
Machine language:A machine-oriented programming language (as distinguished from a high-level, application-oriented programming language). Since the only language microprocessors can understand is binary, all other programming languages must be translated into binary instruction code before performing the desired instructions.
Magnetron: A PVD technology which incorporates a spinning permanent magnet behind the target to confine secondary electrons to a region close to the target. This technique greatly enhances the ionization of Argon atoms and dramatically increases the sputter rate.
Masking:When making integrated circuits, a process using photoresist or light-sensitive film applied to a wafer to define the pattern of the areas to be etched or metallized.
Mass Transport Limited: APCVD rectors are said to be mass transport limited because the limiting factor in the thin film deposition rate is the ability to transport reactant gas to the surface of the wafer.
MFR: Manufacturing For Reliability.
Mask: A transparent (glass or quartz) plate covered with an array of patterns used in making integrated circuits. Each pattern consists of opaque and transparent areas that define the size and shape of all circuit and device elements. The mask is used to expose selected areas of photoresist, which defines areas to be etched. Masks may use emulsion, chrome, iron oxide, silicon or other material to produce the opaque areas.
MCC: Microelectronics and Computer Technology Corporation. A cooperative R&D consortium whose mission is to strengthen and sustain the competitiveness of member companies who share common elements of a technical vision in information technology. MCC's membership currently includes 22 shareholders and 38 associate members. Research programs include projects in areas such as software technology, computer-aided design, advanced computing technology, displays, holographic storage, power sources, superconductivity, and distributed information systems. Intersil has been a member of MCC since its founding in 1985.
MCM: See multi-chip module.
MCT: MOS Controlled Thyristor. A power device that combines a MOS transistor as the gate and a thyristor as the power source. This composite device has the lowest forward voltage drop of any voltage-controlled power source, including power MOSFETs and IGBTs. Intersil is recognized as the world leader in MCT technology. See IGBT, power MOSFET and thyristor.
Mean Free Path: The average distance a particle travels before it interacts with another particle. In a high-pressure PVD systems the mean free path is very low; whereas in a low-pressure system, the mean free path is high.
Mean free path, MFP: average length traveled by a charge carrier or particle between two successive collisions; learn more.
Mega or M: A prefix meaning a multiple of one million (x106). Symbol: M.
Megabit: Roughly one million bits, or 1,048,576 bits.
Megabyte: 1024 kilobytes, or 1,048,576 bytes, or 8,388,608 bits. Symbol: MB. See byte.
MegaFET: A term used by Intersil to describe our latest generation of power MOSFETs that provide a cell density of 1.9 million cells per square inch. MegaFETs are available for voltages as high as 1200V and provide on-resistance values as low as 10 milliohm.
Megarad: A dose of radiation equal to 106 Rads. Sometimes stated as Megarad(Si) or Megarad(SiO2), indicating the equivalent material absorbing the radiation. See RAD.
Magnetoresistive Random Access Memory: A random access memory technology with a memory cell structure that uses magnetoresistive elements instead of DRAM capacitors. The magnetoresistive element consists of two magnetic layers (one is pinned and the other is free) separated by a non-magnetic barrier. The resistivity of the element changes depending on the spin direction of the free-moving layer. Either numerical value 0 or 1 is assigned to each cell according to its resistivity change status, enabling data to be stored and read. Because an MRAM stores the data magnetically, it is non-volatile and requires no electricity to maintain data.
Memory: General term for computer hardware that stores information in electrical or magnetic form. Memories accept and hold binary numbers only. Memory types are core and semiconductor.
Memory integrated circuit: An integrated circuit consisting of memory cells and usually including associated circuits such as those for address selection and amplification. A class of integrated circuits that store digital information, the information being expressed in binary numbers. Examples of memory ICs are ROMs, Dynamic and Static RAMs, EPROMs and EEPROMs.
MEMS: MEMS stands for Micro Electro Mechanical Systems. MEMS are ultra-compact systems composed of micro-mechanical components such as sensors, actuators and electronic circuits on a silicon wafer using the microfabrication technology of the LSI (semiconductor) manufacturing technology.
MESFET: MEtal-Semiconductor FET. A type of FET in which the channel is formed directly beneath a metal gate, which itself is in intimate contact with the semiconductor. Compare with MOSFET, where the gate is separated from the semiconductor by a thin insulating oxide layer. Commonly used in III-V materials, such as GaAs, where the gate oxide needed to form a MOSFET is inferior to that in silicon. See channel, GaAs and gate.
Metallization: The process of depositing a thin film of conductive metal onto a substrate and patterning it to form the desired interconnection arrangement. Metal layers are typically 1-2 micron thick in ICs, but several times thicker in power devices.
Metal-oxide varistor: See MOV.
Metal-Oxide-Semiconductor Field-Effect Transistor: A type of field-effect transistor (FET) that has the structure of a metal-oxide semiconductor (MOS). It is the most common transistor type in LSIs today. A MOSFET consists of a silicon substrate covered with a dielectric oxide film, on which a patterned conductive metal layer is deposited. When a voltage is applied to the gate terminal on top of the metal layer, electric current flows underneath the dielectric film
Metrology: Metrology generally means a method of measuring numbers and volumes, mainly by using equipment (ex. CD-SEM). Metrology, though often considered synonymous with measurement, is a more comprehensive concept that refers not only to an act of measurement itself but to measurement performed by factoring in errors and accuracy, as well as the performance and mechanisms of equipment.
Micro: A prefix meaning one-millionth (x10-6). Symbol: µ. Also jargon for microprocessor, microcomputer, microcontroller.
Micro Electro Mechanical System:The technology that enables microscopic devices with electro-mechanical systems. MEMS devices have minuscule moving parts that are built within a chip using semiconductor processing technologies. The diverse functions enabled by these moving parts give MEMS wide-ranging applications (e.g., accelerometers, gyroscopes, and so on).
Micro-Controller Unit: A type of LSI that integrates four basic elements of a microcomputer (data I/O, data processing, program memory [ROM], and data memory [RAM] units) on a single chip. In larger computing systems, the first two elements are combined in microprocessor units or MPUs, and ROM and RAM are provided as separate devices. MPUs are typically used for personal computers.
Micro-loading: Loading occurs when the etch rate is dependent on the amount of target etch surface area exposed to the plasma. It typically manifests as a reduction in etch rate as the plasma becomes locally depleted of the etching species where there is a larger area of target film. Loading is characteristic of batch (barrel) etch systems where gas flow dynamics are not well controlled. However, there are also micro-loading effects in single wafer systems, where the local etch rate on the wafer is dependent on feature size and local pattern density.
Microcomputer: (1) A computer system whose processing unit is a microprocessor; (2) A microprocessor, complete with stored program memory--read-only memory (ROM), random-access memory (RAM), and input/output (I/O) logic on a single chip. Microcomputers are capable of performing useful work without additional supporting logic.
Microcontroller: A single-chip microcomputer with on-board program ROM and I/O that can be programmed for various control functions.
Micrometer:One-millionth (x10-6) of a meter, or about 40 millionths of an inch. Synonymous with micron. Symbol: µm.
Micron: Older term for micrometer. A metric unit of linear measure which equals one millionth of a meter. Symbol: µm
Micron: A metric unit of linear measure that equals one millionth of a meter. Symbol: μm
Microprocessor: (1) A central processing unit (CPU) fabricated on one or more chips, containing the basic arithmetic, logic, and control elements of a computer that are required for processing data; (2) An integrated circuit that accepts coded instructions, executes the instructions received, and delivers signals that describe its internal status. The instructions may be entered or stored internally. Also called "MPU" (microprocessor unit). Widely used as control devices for household appliances, business machines, toys, etc., as well as for microcomputers. Intersil is the industry leader in 16-bit CMOS microprocessors.
Mil:One-thousandth of an inch (x10-3 inches). Equal to 25.4 microns.
Miller indices:combination of three integers (possibly four), used to define the orientation of crystallographic planes in a crystal; a set of coordinates defining specific crystallographic planes in the crystal. learn more.
Milli:Prefix meaning one-thousandth (x10-3). Symbol: m.
MIMIC:MIcrowave/millimeter wave Monolithic Integrated Circuit. Directed by the U.S. Department of Defense, the MIMIC program was established to enhance producibility and reduce the production cost of gallium arsenide (GaAs) microwave integrated circuits. In this sense, MIMIC is the GaAs microwave industry's equivalent of the VHSIC program.
MIPS: Million Instructions Per Second.
Mixed signal IC: An integrated circuit that has both digital and analog functions on the same semiconductor chip, permitting a high degree of system integration. Intersil mixed signal ICs are of three types: (1) In those optimized for analog, the major part of the design is analog with a small digital content; (2) In those optimized for power, the circuit has analog, digital and power functions; (3) In those optimized for digital, the major part of the design is digital with some analog content. Intersil recently introduced a cell library for mixed signal optimized for analog, called HBC2500. The library is supported by a double-metal, double-poly BiCMOS process with 3µm CMOS and 300-MHz bipolar transistors.
Mixed signal simulation: A mixed signal simulator simulates the analog portions of the circuit with a very accurate circuit simulator, the digital portions with an efficient event-driven simulator, and the switched capacitor portions with a special-purpose switched capacitor simulator. An example is the Verilog cdsSPICE.SCAN simulation in the Intersil FASTRACK Design System. See FASTRACK.
ML:See Multilayer TVS.
MMIC: Monolithic Microwave Integrated Circuit. Combining active elements (diodes and transistors) with passive elements (resistors, capacitors, inductors and transmission lines) on a single GaAs (gallium arsenide) substrate, MMICs replace conventional "chip and wire" microwave circuits. As amplifiers, attenuators or switches at microwave frequencies, MMICs offer benefits of reduced size, lower unit cost, and reliability.
Mobility: The velocity of a charged particle attained under the action of an applied electric field. Units are cm2/V-Sec.
MOCVD: Metal Organic Chemical Vapor Deposition. The same as LP-MOCVD, but with growth at higher pressures.
Module generation: The automatic construction of major pieces of circuit function by specifying parameters controlling the structure and/or performance of the function. Examples are RAM, ROM, PLA, datapath, state machine, registers, multiplexers, and standard logic families.
monolithic circuit: Same as integrated circuit. A circuit fabricated within a single body of semiconductor material. This single body of material is referred to as an integrated circuit die. Compare hybrid circuit.
MOS: Metal Oxide Semiconductor. A wafer process for fabricating MOSFET devices in either IC or discrete form. See MOSFET.
MOSFET: Metal Oxide Semiconductor Field Effect Transistor. A class of voltage-driven devices that do not require the large input drive currents of bipolar devices. MOSFETs are a type of field-effect transistor that operates and functions similar to a junction field effect transistor. The distinction is that in the MOS device the controlling gate voltage is applied to the channel region across an oxide insulating material, rather than across a P-N junction. The term can be applied either to transistors in an IC or to discrete power devices. The major advantage of a MOSFET is low power due to its insulation from source and drain. Other advantages are its process simplicity, savings in chip real estate, and the ease of interconnection on chip. MOSFETs are of both P-channel and N-channel types. Sometimes called "insulated gate field effect transistor" (IGFET). Although Intersil produces these devices with both metal or polycrystalline silicon as the gate electrode, the generic MOSFET term is used for both. See channel, drain, gate and source.
MOS transistor:Same as MOSFET.
MOV: Metal-Oxide Varistor. A varistor having a sintered zinc-oxide element and a symmetrical voltage-current characteristic. Such devices provide bi-directional transient suppression capability, enabling them to protect circuits against transient over-voltage occurring from opposite directions. These devices absorb very large amounts of energy--up to 10k joules. Intersil MOVs come with many different packaging options that address a variety of applications, from small circuit boards to lightning arresters. The majority of Intersil MOVs carry UL approval. All Intersil MOVs are manufactured in Dundalk, Ireland. See multilayer TVS and surgector.
MPU:MicroProcessor Unit. Sometimes used synonymously with microprocessor. See CPU.
MSI: Medium-Scale Integration. A term generally applied to integrated circuit chips containing ten or more gate equivalents, but less than 100. Also applies to memory devices with fewer than 1k (1024) bits of memory. See LSI, SSI, VLSI.
MSPS:Million Samples Per Second. Measurement of time used predominately in referencing data acquisition and DSP.
multi-chip module: A hybrid-type package containing a number of integrated circuits and other components. Used instead of printed circuit boards for applications calling for very high packing densities, high frequencies and high speeds of operation. Intersil, in conjunction with Harris' Electronic Systems Sector, is engaged in an advanced packaging development activity toward perfection of the technology.
MTBF: Mean Time Between Failure; the average time that a system will operate until it experiences a failure that requires it to be taken off-line for maintenance.
Multi-Chip Module (MCM): An electronic assembly integrating a number of bare chips, including a CPU and peripheral logic devices, on a substrate. Because MCMs can be built by putting proven bare chips together, they take less time to package than SOCs. MCMs are often used for mobile phones that require high integration levels with very short development lead times.
Multilayer TVS: Multilayer Transient Voltage Suppressor. A type of varistor composed of alternating layers of semiconducting ceramic and electrode material. This combination forms a "stack" that greatly enhances the available cross-sectional area and hence the device current handling capability.
Multiplexer (mux):A device that combines several input signals into a single output signal in such a manner that each of the input signals subsequently can be recovered. At Intersil, an IC consisting of multiple analog CMOS switches and digital decoding, allowing one of many inputs to be passed to the output.
Multiplexing:A process of transmitting more than one signal over a single link, route, or channel. Of the two methods in use, parallel processing frequency-shares the bandwidth of a channel in the same way hurdlers run and jump in their assigned lanes, thus permitting a number of contestants to compete simultaneously on the same track. The second method, called serial processing, time-shares multiple signals in the same way that pole vaulters vault over the same bar one after the other. Although serial processing may not seem simultaneous, the signal speed is so fast that it is possible to multiplex four different numbers through a single decoder-driver and have them appear on four different displays without a flicker.
Multiplier: A circuit whose output state is the arithmetic product of two input signals. Important in DSP (digital signal processing) technology for signal processing and power control applications. Intersil offers high-speed analog and digital multipliers. See DSP and signal processing.
Mux: MUltipleXer.
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N
NAND Type Flash Memory:A type of non-volatile memory medium invented in 1987 by Fujio Masuoka (then a Toshiba employee). Compared to the NOR type flash memory, NAND flash is smaller in circuit scale, less costly, and offers larger capacities as well as faster read/write speeds. NAND flash is widely used for USB drives, memory cards for digital cameras, and storage devices for mobile phones and digital music players. As conventional chip scaling technology is reaching its limits, 3D structures have been introduced in flash memory devices in recent years.
Nano Imprint: A lithography technology for nanoscale pattern transference, which is attained by pressing a mold with predefined nanopatterns onto a substrate coated with a polymer film. The technology is attracting attention for its low cost and ease of volume manufacturing.
Nanometer, nm: unit of length commonly used in semiconductor industry; one billionth of a meter, 10-9 m [nm]; terms such as microchip and microtechnology are being replaced with nanochip and nanotechnology.
Netlist: An ASCII file containing a description of schematic design elements and their interconnections. Netlist transfer is the most common way of moving designs from one design system or tool to another. The file formats that are used by Intersil are Cadence and EDIF.
NMOS: Also called "N-Channel MOS" (metal oxide semiconductor). A type of MOSFET in which electrons are the dominant charge carrier in the semiconductor channel. The channel is N-type. NMOS devices run at least twice as fast as PMOS (P-Channel MOS) devices--the oldest type of MOS circuit-- because the mobility of electrons is higher than that of holes. Compare PMOS.
Noise: Unwanted acoustic or electromagnetic disturbances, as opposed to desired signals.
Non-volatile memory: Any device that faithfully retains its stored information after power is removed. Examples: EPROMS, PALS, bubble memories, rotating magnetic discs, optical memory. See volatile memory.
NOR Type Flash Memory:A type of non-volatile memory medium invented in 1984 by Fujio Masuoka (then a Toshiba employee). In 1988, Intel commercially released the first NOR type flash memory device. Compared to the NAND type flash memory, NOR flash is faster in read operations and superior in random accessibility, while its integration level and write speed are inferior. NOR flash is principally used in microcontrollers and as a firmware storage chip for devices that require high reliability but do not support hard disk drives, including routers, printers, digital cameras, GPS navigation systems, car electronics, and mobile phones.
NPLY: Non Photo-Non Process Limited Yield.
NPN transistor: A two-junction transistor with an N-type collector and emitter and a P-type base. See bipolar transistor and complementary. Compare PNP transistor.
NRE:Non-Recurring Engineering. A one-time charge for photomask development, test and prototype tooling, and associated engineering costs.
Ns, nsec: Abbreviations for nanosecond (x10-9 second). One thousandth of a microsecond. Electronic signals travel approximately one foot per nsec.
N-type semiconductor: A semiconductor type in which the density of holes in the valence band is exceeded by the density of electrons in the conduction band. N-type behavior is induced by the addition of donor impurities, such as arsenic or phosphorus, to the crystal structure of silicon. See also acceptor, donor, doping and impurity.
N-type semiconductor: A semiconductor in which current is conducted by excess free electrons.
N-Type Semiconductor (Negative Semiconductor): In n-type semiconductors, free electrons move when a voltage is applied, carrying negative charge to produce an electric current. N-type semiconductors are created by doping quadrivalent elements (such as silicon and germanium) with trace amount of pentavalent elements (such as arsenic).
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O
OED (Oxidation Enhanced Diffusion): An anomalous (enhanced) dopant diffusion in silicon when thermal oxidation is being performed at the surface of the silicon. It is caused by an increase in silicon point defects (silicon interstitials), which are injected into silicon from the surface where oxidation is proceeding.
Op amp: OPerational AMPlifier. A general purpose integrated circuit used as a basic building block for implementation of linear functions. An op amp's gain and response characteristics are determined by external components. Op amps form the "front end" or sensory apparatus of thousands of electronics systems, capturing weak signals emanating from the real world and amplifying them for processing. Intersil offers the industry's broadest range of op amp ICs, as well as op amp cells for designing ASIC versions. See power control circuit and signal processing.
Open architecture: A system whose characteristics comply with industry standards and can be connected to other systems that also comply with these standards. Compare closed architecture.
Operational amplifier: See op amp.
Optical coupler, optocoupler: A device designed to transfer electrical signals by utilizing light waves to provide coupling with electrical isolation between input and output. Sometimes called photocoupler.
Optical Proximity Correction:A photolithography enhancement technique for offsetting the optical proximity effect, a phenomenon in which photomask patterns transferred onto a photoresist under insufficient resolution develop inaccuracies. OPC offsets those image errors by adding intricate modifications to the original photomask pattern, so the projected image on the photoresist accurately reflects the intended circuit pattern.
Optoelectronic: Pertaining to any device that functions as an electrical-to-optical or optical-to-electrical transducer (i.e., a device that is responsive to or that emits or modifies light waves), or an instrument that uses such a device in its operation.
Optoelectronic device: A device that is responsive to or that emits or modifies light waves. Examples are LEDs, optical couplers, laser diodes, and photo detectors.
Optoisolator: See optical coupler.
Over-etch: This is the practice of running an etch process longer than would be required for the average thickness of the target film and the average etch rate of the film. The etch process time must be set by the worst case scenario of etch rate variation and target film thickness variations. It may also be employed to account for differences in target film thickness caused substrate topology under the target film. High selectivity in the etch process is required if a large amount of over-etch is employed, in order to avoid problems from photoresist mask erosion (e.g. film feature size reduction) or unacceptable removal of the substrate underlying the target film.
Over-voltage: A voltage in excess of the normal operating voltage of a device or circuit. Many Intersil products are designed to withstand the effects of over-voltage without damage. See ESD and over-voltage protection.
Over-voltage protection: Also referred to as "transient suppression." A term used to describe the built-in capability of an electrical circuit to dissipate or shunt electrical impulse energy at a voltage low enough to ensure the survival of circuit components. Many Intersil ICs, especially Intersil MOVs, are components specifically designed to dissipate high impulse energy and voltage surges in electronic and electrical circuits. Some of Intersil' analog multiplexer products (OVP muxes) offer built-in over-voltage protection.
Oxygen in silicon: oxygen finds its way into silicon during the Czochralski (CZ) single-crystal growth process; in moderate concentration (below 1017 cm3) oxygen improves mechanical properties of a silicon wafer; excess oxygen acts as a n-type dopant in silicon.
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P
Package:The protective container or housing for an electronic component or die, with external terminals to provide electrical access to the components inside. Packages provide for power and signal distribution, power dissipation, and physical and chemical protection of the circuits.
Parametric tests: Tests that measure DC conditions of a chip, such as maximum current, leakage, and output drive.
Parasitic extraction: Applies to software that analyzes a layout database and determines the capacitance (and sometimes resistance) of the metal interconnections. These values, which are considered parasitic because they are determined by the placement of the devices rather than as part of the design schematics, are then used in logic or circuit simulations.
PARLY: Parameter Limited Yield. See yield.
PASIC: Power ASIC. A versatile power BiMOS process technology co-developed by Intersil and IBM for use in the manufacture of semicustom and ASIC circuits for power applications. This technology can support voltages in the 60-100V range and currents of 5-10A. Sometimes referred to as "intelligent power".
Passivation:A layer of insulating material deposited over a wafer or a region of a device to stabilize and protect the surface against moisture, contamination, and mechanical damage. Silicon dioxide or silicon nitride are often used for IC passivation.
Passive component: An electrical component without gain or current-switching capability. Commonly used when referring to resistors, capacitors and inductors.
PBX: Private Branch EXchange. A telecommunications switching facility or service located on the customer's premises. Intersil SLIC circuits are found in most of the world's PBX systems. See SLIC.
PC: Personal Computer, usually an IBM PC or compatible. Also an acronym for Production Control in a manufacturing organization. Can also refer to Printed Circuit when referencing printed circuit boards (PCBs).
PDLY or PLY: Photo Defect Limited Yield. See defect, lithography and yield.
PECVD: Plasma-Enhanced Chemical Vapor Deposition. CVD with the gases first passing through a plasma. See CVD.
PECVD: Plasma Enhanced Chemical Vapor Deposition; a CVD technology which uses a rf glow discharge to transfer energy to the reactant gases, instead of heat. PECVD reactors feature high deposition rates at low temperatures.
Performance node: A performance node is a control parameter which has limited influence on reliability but which does impact the yield, productivity, or other set of economic indices associated with the product or technology. See control parameter, critical node, and characterization node.
Performance optimization:Very powerful, advanced, multi-dimensional optimization algorithms are used for optimizing circuit performance using many different behavior criteria. The result is a Intersil product that meets all performance specifications with the greatest possible yield.
PFMEA or FMEA: Potential Failure Mode and Effects Analysis.
PGA:Pin-Grid Array. A packaging technology for high-pin-count packages. Name derives from the array of pins at the bottom of the package. The pins go through holes on a printed circuit board. I/O lead counts as high as 600 can be achieved with PGA packaging designs.
PG Tape: Pattern-Generation Tape. Computerized instructions used to build photomasks.
Photocoupler:See optical coupler.
Photolithography:The Lithography, originally, means lithograph prints. Semiconductor device is made as a structure transferred onto the wafer a fine pattern by reducing exposure by using photolithography. Negative film in photo printing is the photomask (reticle: the original circuit pattern), the wafer with a photoresist (photosensitive corrosion-resistant resin coating) is corresponds to the printing paper. Photolithography is the technique for transferring a circuit pattern that is the drawn semiconductor devices on a photomask, to the photoresist on the silicon wafer using the exposure tool. It generates a pattern of the exposed portion and unexposed portions by irradiating light to the wafer through a photomask with a circuit pattern. It is called Photo-lithography because it uses a photo (light). In semiconductor manufacturing, it mainly uses the ultraviolet rays. In the semiconductormanufacturing process, it is one of the most important technologies because the formation of a fine pattern depends on it. It is also used in the manufacture of such a printed circuit board, a liquid crystal display panel and a plasma display panel. For fine pattern formation, the wavelength of light used for exposure, has been shorter and shorter.
Photoluminescence:A method of measuring some critical semiconductor material characteristics by shining a laser on the material and measuring the signal that returns.
Photomask Equipment: A type of semiconductor manufacturing equipment used to fabricate photomasks by forming a pattern of integrated circuits on glass plates. Photomasks are similar in function to negative film. The mainstream mask-making technology has shifted from optical lens-based tools to electron beam lithography tools.
Photomask: A photomask is a pattern formed on a flat plate, and is a master for transferring the different plates using photolithography technology.
Photoreflectance: One of an extensive set of characterization techniques used to analyze epitaxial layers. Photoreflectance (PR) is a method of characterizing semiconductor material properties by analyzing how light reflects off the material.
Photoresist: A light-sensitive liquid that is spread as a uniform thin film on a wafer or substrate. After baking to solidify the liquid, exposure of specific patterns is performed using a photomask. Material remaining after development shields regions of the wafer from subsequent etch or implant operations.
Physical Vapor Deposition, PVD: deposition of thin film occurs through physical transfer of material (e.g. thermal evaporation and sputtering) from the source to the substrate; the chemical composition of deposited material is not altered in the process. learn more.
Pitch:The center-to-center spacing between pads, rows of bumps, pins, posts, leads, etc., on an IC or circuit board.
Place and route: The act of placing the physical representations of the circuit functions, either as macro blocks or as rows of standard cells. The signal paths are then routed on the interconnect layers. Currently, two layers of routing are used, with three layers being the next step.
Planar defect: also known as area defect; basically an array of dislocations, e.g. grain boundaries, stacking faults.
Plasma: Plasma is a cloud of protons (ions), neutrons and electrons. There are solid, liquid and gas state of matter. Plasma is also one of the states of matter, the fourth state of matter. Plasma is a group of charged particles that is kept almost electrically neutral as a whole, into which sufficient energy is provided to free electrons from atoms or molecules and to allow both species; ions and electrons, to coexist. The ions with a positive charge and electrons with a negative charge are distributed equally in an ionized state.
Plasma Display: A type of flat panel display which, along with LCD, attracted a lot of attention as the next-generation display technology when it came out. A plasma display panel has numerous tiny cells encapsulating neon and other noble gases. When a voltage is applied, the gases in each cell light up and form images on the screen.
Plasma Etching: A process for rapid removal of target films or silicon substrate material in unprotected (unmasked) areas of the substrate used in the manufacture of solid state devices and integrated circuits. It is sometimes referred to as dry etching, because it does not employ wet chemistry, as in older etch processes. The chemical etch rate is enhanced in this process by use of a plasma containing the etching species. The plasma produces exited electronic states in the etching species, which increases etch rates. The use of the plasma (which contains various ion species) with wafer bias relative to the plasma also increases the anisotropy (directionality) of the etch process. In this configuration, it is called RIE (Reactive Ion Etching). The ions bombard horizontal surfaces of the target film preferentially (compared to vertical surfaces), thereby increasing the vertical etch rate relative to the horizontal etch rate. The fundamental purpose of this process is to transfer a photolithography pattern in a photoresist mask on the substrate into the film underlying the mask.
PLCC:Plastic Leaded Chip Carrier. A leaded quad package--a replacement for the plastic DIP (dual in-line package) in surface-mount applications. External connections consist of leads around all four sides of the package.
PMOS: P-channel MOS. A type of MOSFET where the semiconductor channel is doped P-type. In such a MOSFET, the current between source and drain is primarily due to the motion of holes. Compare NMOS.
P-N junction:The basic structure formed by the intimate contact of P-type and N-type semiconductors. The important characteristic of a P-N junction is that it will conduct electric current with one polarity of applied voltage (forward bias) but will not conduct with the opposite polarity (reverse bias).
PNP transistor: A semiconductor junction transistor with a P-type collector and emitter, and an N-type base. In such a device, the current amplification arises from the injection of holes from the emitter into the base, and their subsequent collection in the collector. See bipolar transistor and complementary. Compare NPN transistor.
Polishing: process applied to either reduce roughness of the wafer surface or to remove excess material from the surface; typically polishing is a mechanical-chemical process using a chemically reactive slurry. learn more.
Polycrystal:A polycrystal is made up of many minute single crystals. Each of the single crystals has its own crystal axis direction. Ceramics and many metals are polycrystals. Solar batteries are made from polycrystal silicon.
Polycrystalline material, poly: many (often) small single-crystal regions are randomly connected to form a solid; size of regions varies depending on the material and the method of its formation. heavily doped poly Si is commonly used as a gate contact insilicon MOS and CMOS devices;
Power amplifiers: Integrated circuits (ICs) used to amplify lower-power, smaller signals into larger, more easily used signals. Power amplifiers are designed to handle high power levels.
Power BiMOS: 1 Circuits with the capability of interfacing higher voltages and current levels than conventional BiMOS circuits. See BiMOS. 2 An advanced Intersil wafer process that combines analog, digital and power capabilities in a single IC. This Double-Layer-Metal (DLM) process is being developed in Findlay, Ohio. It features complementary vertical MOS power output transistors and 16V operation to support commercial and industrial applications in plastic packages. See DLM.
Power control circuit: System power supply control functions and output drive, allowing electronic systems to do actual work for such diverse applications as motors, video, and computer disk drives. Examples of Intersil power control ICs are voltage regulators, rectifiers, and high current drivers.
Power discrete: See discrete device and intelligent discrete.
Power MOSFET: A MOSFET circuit capable of handling current ratings of more than 1 ampere. Intersil power MOSFETs have current-handling capabilities as high as 100A and voltage-handling capabilities up to 1200V. See MOSFET.
Power transistor: A transistor capable of being used at current ratings of more than 1 ampere. Intersil bipolar and MOS power transistors have current handling capabilities up to 100A and voltage handling capabilities to 1200V.
PQFP:Plastic Quad Flat Pack. A type of plastic package that has leads on all four sides.
Pre-Cursor Gas (Reactant Gas): The reactant gas used in a CVD reaction. The precursor gas is transported to the surface where it undergoes a chemical reaction to produce the desired film. For example, TEOS is the reactant gas used to form a CVD oxide.
Prime Grade:The highest grade of a silicon wafer. SEMI indicates the bulk, surface, and physical properties required to label silicon wafers as "Prime Wafers".
Printed circuit: A circuit in which the wires or components have been replaced by a conductive pattern printed upon or bonded to the surface of an insulating board.
Printed Circuit Board (PCB): An insulated substrate on which an electronic circuit pattern is formed. Capacitors and other electronic components are soldered on the PCB to complete the circuit. Among its varieties are multi-layered PCBs and flexible PCBs.
Profilometry: A method for measuring the profile, or heights, of semiconductor layers by dragging a needle across the surface of an etched semiconductor.
reflectance difference spectroscopy: Developed in the 1980s, reflectance difference (anisotropy) spectroscopy provides a surface-sensitive, non-destructive method of examining the order of molecules adsorbed on the clean substrate. The surface is probed by a light beam with two orthogonal polarization components, and the relative difference in complex reflectances is then measured.
PROM: Programmable Read-Only Memory. A read-only memory that can be written to only once. Programmed after manufacture by external equipment. Typically, PROMs utilize fusible links that may be burned open to set a specific memory location to a specific logic level. Intersil invented the PROM, and still markets these devices for military applications.
PTM time:Product-To-Market time. The time required to develop a new product, measured from the initiation of a development program to product introduction.
P-type semiconductor:A semiconductor type in which the density of electrons in the conduction band is exceeded by the density of holes in the valence band. P-type behavior is induced by the addition of acceptor impurities, such as boron, to the crystal structure of silicon. See also acceptor, doping, donor and impurity.
PVD:Physical Vapor Deposition. A process for depositing a thin film on a wafer that involves aiming a stream of gas at a target. Secondary emission releases material from the target which is then deposited on the wafer. This process is also know as sputtering.
PWM: Pulse-Width Modulation. A form of analog control in which the duration of digital pulses is varied analogously with the signal of interest.
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Quasi-Neutral Gas: A ionized gas which contains an equal number of positively charged and negatively charges ions, as well as neutral particles. The gas is electrically neutral as a whole, but the majority of its individual components are charged.
QFD:Quality Function Deployment. A methodology for developing products that meet the "voice" or needs of the customer.
QML: Qualified Manufacturer's List per military standard.
Quality control: A term denoting the functions or collection of duties that must be performed in order to carry out a company's quality objective. In some companies, quality control refers to a limited function, such as analysis of quality data or inspection of products before shipment to customers and discard or rework of flawed ones. At Intersil, quality control (more often called Total Quality Management, or TQM) refers to a broad set of programs and responsibilities at all levels of the organization aimed at detecting and preventing errors at every step in the manufacturing process, from order entry through fabrication, packaging, shipment and invoicing the customer.
Quality First initiative: An extensive and long-term initiative throughout Intersil Corporation with three major objectives: (1) To increase customer satisfaction; (2) Grow the company by growing new products; and (3) Make continuous improvements in everything every business unit of the company does. The Quality First initiative is far more comprehensive in scope than application to products alone. Embedded in the initiative are such programs as Just In Time, Quality Involvement, Quality Audits, Employee Improvement Teams, and Total Quality Systems Reviews. The ultimate objective is a quantum and fundamental change in the way Intersil does business, moving away from traditional, vertical management structures toward cross-functional teams. At the heart of the concept is customer satisfaction and the notion that end (external) customers are best satisfied as the result of a chain of satisfied internal customers.
Quartz: single-crystal SiO2.
Quench Rate: A measure (in degrees per second or minute) of the rate of the wafer temperature decrease from the desired process temperature at the end of a thermal process.
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R&R: Repeatability and Reproducibility.
Race condition: The situation arising when inputs to a gate traverse parallel, but different, circuit paths. Differing path delays can result in unpredictable signal arrival times at a gate, and uncertain transition time for the output of the gate.
Rambus Dynamic Random Access Memory:A type of DRAM developed by U.S.-based Rambus Incorporated featuring an ultra-fast interface. The device was originally touted to be the next-generation DRAM with a 500 MB/s bandwidth, which was five to ten times greater than conventional DRAMs. However, it failed to become the next industry standard due to stiff pricing, and was replaced by double data rate synchronous dynamic random-access memory (DDR SDRAM) devices. Today, Rambus DRAMs have very limited applications.
Reclaim Grade: A lower quality wafer that has been used in manufacturing and then reclaimed (etched or polished) and subsequently used a second time in manufacturing.
Rad: Specifies the amount of energy transferred to a material by ionizing radiation. One rad is equal to the energy of 100 ergs per gram of material. The material must be specified, because the energy differs with each material. 1 rad-Si=100 ergs/grams of silicon.
Rad-hard: RADiation HARDened.
Rad-hard: tactical: Terminology used to describe products or programs that must be capable of surviving and operating in medium levels of radiation, usually total-dose environments. Circuits requiring up to 50k rads-Si are considered tactical rad hard.
Radiation hardened circuit:An electronic circuit protected against damage from radiation for use in space, high altitude flight and nuclear applications. Special processing techniques are used to make insulators more resistant.
RAM: Random-Access Memory. A memory that may be written to, or read from any address location in any sequence. Also called a read/write memory. Random access in the sense of providing access to any storage location in the memory. Stores digital bits temporarily and can be rapidly changed as required. RAM constitutes the basic read/write storage element in computers. See DRAM and SRAM.
Ramp Rate: A measure (in degrees per second or minute) of the rate of the wafer temperature increase to the desired process temperature at the beginning of a thermal process.
Random defects: Random defect is a defect due mainly to small particles generated in the semiconductor process. The random defects occurrence location will not be able to predict because the frequency of defects, the defect state and the size varies.
RDS(on): The resistance between drain and source of a forward-biased power MOSFET at a specified drain current and gate voltage. Intersil MegaFETS have on-resistance values as low as 10 milliohms. See also MegaFET, power MOSFET, and diode.
Reaction Rate Limited: A CVD process whose thin film growth rate at the wafer's surface is limited only by the ability of the precursor gas to react on the surface. LPCVD systems are reaction rate limited because their low pressure takes them out of the mass transport limited regime, and their reaction rate is limited by the low temperature at which they operate.
Refractive index, n: important optical characteristic of a material; defined as a ratio speed of light in free space over speed of light in the material.
Resistivity mapping:A method to map the resistance of a semiconductor across an entire wafer.
Resistivity (Volume):The resistance that a unit volume of a material offers to the passage of electricity, the electric current being perpendicular to two parallel faces. More generally, the volume resistivity is the ratio of the potential gradient parallel with the current in the material to the current density.
Resistor: A resistor is an electronic component that has the function to suppress the flow of a current. Its unit is the OHM (Ω). It is mounted on an IC together with transistors and condensers and is used to suppress the current and divide the voltage.
Reticle:A photomask used in a stepper. See mask, photolithography and stepper.
RF operation: Radio frequency (RF) is the mode of operation where a transistor is rapidly switched off and on
with smaller biases. This rapid switching occurs at a rate consistent with the radio frequency range/spectrum.
RHD1: An advanced Intersil wafer process that will support high-speed 256k rad-hard SRAMS. The process features 0.8µm feature size and SIMOX substrates. This process is expected to extend Intersil's technology lead in rad-hard CMOS beyond that currently provided by TSOS4. See SRAM, and TSOS4.
RIE (Reactive Ion Etching): See plasma etching.
RISC:Reduced Instruction Set Computer (or Chip). A type of processor architecture that processes programs more quickly than conventional microprocessors because it uses a smaller, less complex set of instructions. Compare CISC.
ROM:Read-Only Memory. A memory in which the binary information located at each address is fixed and cannot be changed subsequently. Permanently stores information repeatedly used, such as tables of data, characters for electronic displays, etc. In its virgin state, the ROM consists of a mosaic of undifferentiated cells. One type of ROM is programmed by mask pattern as part of the last fabrication stage. Another popular type known as PROM, is programmable in the field with the aid of programmer equipment. Programmed data stored in ROMs are often called firmware. Compare EPROM.
Rough, roughing pump: vacuum pump designed to reduce pressure from atmospheric to militorr range. learn more.
R(on): on-Resistance. The output resistance of a power switching device when it is forward biased to the fully "on" or conducting state. Especially important in high-current switches, where the voltage drop across the power device must be minimized. In a power MOSFET, R(on) is the same as RDS(on). See microcontroller.
Roots pump: high efficiency roughing pump; used in oil vapor-free vacuum systems. learn more.
Roughness:lack of planarity of solid surface at the atomic level; a parameter that measures lack of planarity; in high quality Si wafers better than 0.1 nm.
RTA (Rapid Thermal Annealing): RTP (Rapid Thermal Processing), specifically for the annealing thermal processes (e.g. ion implantation damage annealing, silicide contact annealing). See also: RTP.
RTP (Rapid Thermal Processing): A technology for thermal processing that allows very high ramp and quench rates for thermal processes. It is a single wafer (serial) process technology that is fundamentally based on keeping the temperature uniform (isothermal) all across the wafer as the it is ramped to the process temperature. By keeping the temperature very uniform (< ~50C variation across the wafer) during ramping, warping and slip line formation in the wafer is avoided. These problems are caused by stresses in the silicon wafer, which are created by differential thermal expansion (large temperature gradients) in different portions of the wafer during thermal processing. Isothermal heating allows ramp rates on the order of 1000C per second in thermal processes, as opposed to about 50C per minute maximum ramp rates in typical batch furnaces. This technology enables much improved process control over thermal processes in which there are undesirable competing reactions with different activation energies than the desired reaction. It also enables significant total thermal budget decreases (compared to tube furnace batch processing) in processes requiring high temperatures, because the high process temperature can be reached and left very quickly (high ramp and quench rates). In such applications (e.g. titanium salicide contact formation, ultra-shallow source-drain implant annealing), single wafer RTP is replacing tube furnace batch processing.
Rugged, ruggedized:A term associated with MOSFETs or IGBTs that are designed, manufactured and tested to an avalanche energy specification. Also refers to electronic systems or devices that have been strengthened or modified for better resistance to wear, stress and abuse--for example, in space or under battlefield conditions or conditions of severe weather or dirt. See radiation hardened circuit.
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S
SACVD:Selected Area Chemical Vapor Deposition. See deposition.
SAM:(1) Served Available Market. That segment of the marketplace that is actually addressed by the human and capital resources of an enterprise. (2) Statistical Analysis and Modeling Menu. A modeling system within FASTRACK that allows geometry-dependent analog simulations to model a large number of possible process variations, thus predicting the range of behaviors of the chip across wafer runs. See FASTRACK.
Sample and hold (S/H): A system or IC in which a sample of an analog input signal is frozen in time and held while it is converted to a digital representation or otherwise processed. Intersil sample and hold ICs are the fastest in the industry. Abbreviation: S/H.
Sapphire:single-crystal Al2O3; can be synthesized and processed into various shapes; highly resistant chemically; transparent to UV radiation.
SAR: Successive Approximation Register. An A/D conversion method where the input voltage is compared to the output of a sequentially programmed D/A converter. First, the most significant bit (MSB) of the D/A is turned on and compared to the analog input. If the input is greater than the D/A output, the MSB is left on; otherwise it is turned off. This process is then repeated for all other bits in decreasing order until the least significant bit (LSB) is reached.
SCAN: Switched Capacitor ANalysis. A simulator available in FASTRACK that simulates a switched capacitor design. See FASTRACK.
SCD: Source Control Drawing. A specification for a military semiconductor device that is specific to a program, a vendor, or a customer. Compare thyristor.
Scribe and break: The procedure used to separate a processed wafer into individual ICs. Narrow channels between individual ICs are mechanically weakened by scratching with a diamond tip (scribe), sawing with a diamond blade, or burning with a laser. The wafer is mechanically stressed and broken apart along the channels (called scribe lines), thereby separating the individual ICs (dice).
Scrubber: A filter which removes corrosive and hazardous gases from the exhaust gas flow of a CVD system.
Secondary Electrons: Secondary electrons are electrons which are dislodges from the target by incident ionized Argon atoms. They play a key role in Magnetron sputtering.
Secondary Flat: The flat of shortest length appearing in the circumference of the wafer. The secondary flat has a specific crystallographic orientation relative to the wafer surface and the primary flat. learn more.
Sealing: Joining the package case header or substrate to its cover or lid.
Seed crystal: single crystal material used in crystal growing to set a pattern for the growth of material in which this pattern is reproduced.
Selectivity: This is a measure of the difference in etch rate of the target film relative to the photoresist mask etch rate or the etch rate of the substrate under the target film. It is typically expressed as the ratio of the target film etch rate to the mask or substrate etch rate. Higher selectivity is always desirable. High selectivity in an etch process will help avoid unwanted etching of materials or structures other than the target film, which may result in unacceptable degradation in the electrical performance of the final circuit structures.
SEMATECH: SEmiconductor MAnufacturing TECHnology research consortium. A consortium of 14 American semiconductor manufacturing firms dedicated to restoring America's manufacturing leadership in semiconductors. Located in Austin, Texas, half of its annual funding is provided by its member companies and half by the federal government. Research results are transferred to member firms and to the government for both commercial and military applications. Intersil was a charter member of SEMATECH.
Semiconductor:A class of materials, such as silicon and germanium, whose electrical properties lie between those of conductors (such as copper and aluminum) and insulators (such as glass and rubber). A material that exhibits relatively high resistance in a pure state and much lower resistance when it contains small amounts of certain impurities. The term is also used to denote electronic devices made from semiconductor materials. See noise.
Semiconductor: A material, usually a solid chemical element or compound, that is neither a good conductor of electricity (like copper) nor a good insulator (like rubber). The conductance varies depending on the current or voltage applied to a control electrode, or on the intensity of irradiation by infrared, visible, or ultraviolet light, or X rays. Common semiconductors include silicon, germanium, gallium arsenide, indium antimonide, and the oxides of most metals. Of these, gallium arsenide (GaAs) is widely used in low-noise, high-gain, weak-signal amplifying devices.
Semiconductor:solid-state material in which (unlike in metals and insulators) (1) large changes in electrical conductivity can be effected by adding very small amounts of impurity elements known as dopants, (2) electrical conductivity can be controlled by both negatively charged electrons and positively charged holes and (3) electrical conductivity is sensitive to temperature, illumination, and magnetic field; these properties result from the fact that the valence and conduction bands in semiconductors are separated by a energy gap that rarely exceeds about 3.5 eV. Semiconductors are found in the IVth group of the periodic table: diamond (C), silicon (Si), germanium (Ge) and tin (Sn); numerous compound semiconductors can be formed by combining elements from groups II-VI; also, some organic materials display semiconductor properties.
Semiconductor manufacturing equipment:Semiconductor manufacturing equipment is the equipment used to manufacture semiconductor devices (integrated circuits). There is a variety of semiconductor manufacturing equipment: vacuum deposition equipment for forming a thin film on a wafer, exposure tool for transferring patterns onto a wafer using the photolithography technique, etch system for forming a thin film into circuit, ion implanter for adding impurities into semiconductor, metrology and inspection equipment, assembly equipment, etc. Among the semiconductor manufacturing process, especially at the wafer processing process, small particles such as dust are the cause of the product failure. Therefore manufacturing equipment is placed in a clean room and used in a clean state.
Semiconductor metrology equipment: Metrology equipment is the equipment for measuring the various dimensions of the semiconductor circuit patterns on a wafer. CD-SEM: measure the width or diameter of the elements and patterns, ellipsometer : measure film thickness of thin film, Overlay tool for measuring a displacement of the upper circuit pattern from the lower circuit pattern.
Semiconductors, III-V: III-V semiconductors are fabricated using elements from 3rd and 5th group of periodic table; e.g. GaAs, GaP, GaN, GaAlAs.
Shadowing (Mask Edge Shadowing): Wafers are carefully oriented to the ion beam in order to avoid channeling effects. In certain applications, this wafer orientation can cause implant feature registration errors with respect to the implant mask edges. This effect is called shadowing. It is a concern in application where the registration of the implant feature edge must closely register to the mask edge (e.g. source/drain implantation at the gate edge). See also: channeling.
SiC Wafer: A wafer made of SiC, a compound semiconductor material consisting of silicon (Si) and carbon (C). The material’s field strength for electrical breakdown is 10 times that of Si, and its band gap is three times wider. As SiC is also suitable for controlling a wide range of p- and n-type devices, it is attracting attention as a power device material that can be used in high-temperature, high-radiation environments. Because SiC has higher thermal conductivity than Si, it is also used to make semiconductor wafers.
Signal processing: A broad class of electronic functions that enhance the representations of physical or electrical phenomena. Temperature, pressure, vibration, acceleration and flow are examples of physical properties that rely on signal processing enhancements. The detection and conversion of RF, X-ray or ultrasonic energy into images and sound is another form of signal processing. See analog signal processing and digital signal processing.
Silicon: A solid element that is abundantly available in the form of SiO2 (glass). It is element 14 in the periodic table, with an atomic weight of 28.09. Silicon has a diamond crystal lattice, a density of 2.328 g/cm3 and a melting point of 1415oC. Its extreme abundance, moderate processing temperatures, and the stability of its native oxide (SiO2) have made it the electronic semiconductor material of choice for nearly four decades. It supports about $50 billion in IC and discrete sales annually.
Silicon Cycle: In the past when the consumption volume of semiconductors was dictated by supply and demand of computers, the semiconductor industry experienced periodic economic swings that repeated themselves roughly every four years—which is the rule of thumb known as the silicon cycle. The yearly growth of the semiconductor industry has in fact shown a cycle of peak and trough every three to four years until recently, but the pattern was broken as smartphones with short upgrade cycles became the sales driver in the increasingly diverse electronics market.
Silicon dioxide, SiO2: silica; native oxide of silicon; the most common insulator in semiconductor device technology; high quality films are obtained by thermal oxidation of silicon; thermal SiO2 forms smooth, low-defect interface with Si; can be also readily deposited by CVD; Key parameters: energy gap Eg ~ 8eV; dielectric strength 5-15 x 106 V/cm; dielectric constant k = 3.9; density 2.3 g/cm3; refractive index n =1.46; melting point ~ 1700 oC; prone to contamination with alkali ions and sensitive to high energy radiation (i.e. X-rays); single crystal SiO2 is known as quartz.
Silicon Interposer: Unlike a resin-based interposer, silicon interposer’s thermal expansion coefficient remains stable in a flip-chip mounting, which translates into beneficial electrical properties and excellent performance at high speeds and high frequencies, enabling more intricate wiring and bump formation.
Silicon Nitride, Si3N4: dielectric material with energy gap = 5 eV and density ~3.0 g/cm3; excellent mask against oxidation of Si and KOH; properties depend on deposition method: dielectric strength ~107 V/cm, dielectric constant k ~6-7, bulk resistivity 1015-1017 ohm-cm; deposited by CDV.
Silicon On Insulator Wafer: A layered silicon-insulator-silicon wafer. Because it contains a layer of electrical insulator, the wafer is suitable for manufacturing high voltage-resistant devices. The transistor leakage can be curtailed by making the channel layer thinner, which could lower power consumption.
Silicon Valley:A nickname for the southwestern portion of the San Francisco Bay Area in the U.S. where a large number of semiconductor chip manufacturers are concentrated. The name derives from the fact that monocrystalline silicon is the principal semiconductor material.
Silicon Wafer: A principal material for manufacturing semiconductors. Silicon wafers are made by melting silicon into a 99.999999999% pure cylindrical ingot and slicing it into discs of less than 1 mm in thickness. A grid of intricate circuit patterns is formed on the wafer surface, and then cut into separate semiconductor chips. Silicon crystals prepared using the Czochralski method and high pulling rates are grown under vacancy rich conditions, resulting in agglomeration of vacancies and formation of Crystal Originated Particles.
Silicon-on-insulator: See RHD1, Verilog, and VHDL
SIMOX:Separation by Implantation of Oxygen; oxygen ions are implanted into Si substrate and form a buried oxide layer. SIMOX is a common technique when building SOI wafers.
Single-crystal: crystalline solid in which atoms are arranged following specific pattern throughout the entire piece of material; in general, single crystal material features superior electronic and photonic properties as compared to polyscrystalline and amorphous materials, but is more difficult to fabricate; all high-end semiconductor electronic and photonic materials are fabricated using single-crystal substrates.
Single crystal: In a single crystal, the direction of the crystal axis is the same in every section of the crystal. Single crystalsilicon is indispensable for semiconductor manufacturing.
Single Electron Transistor: Unlike a conventional transistor that functions with an electrical current consisting of a flow of about 10,000 to 100,000 electrons, a single electron transistor uses a phenomenon called Coulomb blockade and can operate with a flow of only one electron. Once single electron transistors are successfully applied to ICs, they would significantly reduce the power consumption and heat generation levels associated with conventional ICs.
Single in-line package: See PBX.
Single wafer process: only one wafer is processed at the time; tools that are designed specifically for single-wafer processing become more common as wafer diameter increases.
SLIC:Subscriber Line Interface Circuit
Slice:(verb) To cut into wafers. In semiconductor technology, to cut a crystalline ingot into thin pieces (wafers or slices) upon which the device patterns are subsequently formed. (noun) Another term for wafer. Also, a type of chip architecture that permits the cascading or stacking of devices to increase word bit size.
SLICE:Simulation Language with Integrated Circuit Emphasis. For the design of the analog portions of mixed signal circuits, the FASTRACK simulation environment consists of a BASIC-like language called SLICE with powerful expression scanning coupled with standard language constructs such as looping, conditionals and arrays, and the ability to call simulators from within the language. With the language, Intersil has built subsystems for statistical analysis, macro-model development, and optimization. Over the years, engineers have written many routines for setting up simulation structures for a particular performance assessment and many routines for analyzing the outputs of one or multiple simulations. There are probably greater than 100 engineering-years invested in the development of SLICE and its sub-systems.
Slice orientation: the angle between the surface of a slice and the growth plane of the crystal. The most common slice orientations are (100), (111) and (110). learn more.
Slicing: term refers to the process of cutting of the single-crystal ingot into wafers; high precision diamond blades are used. learn more.
Slip Lines: Large (visible to the eye) silicon crystal defects (dislocations) formed when the silicon crystal plastically deforms to relieve stress caused by differential thermal expansion (large temperature gradients) in different portions of the wafer during thermal processing.
SLM: Single-Level Metal. The use of only one level of metal to form the contact interconnections in an IC. Compare DLM.
Slurry: a liquid containing suspended abrasive component; used for lapping, polishing and grinding of solid surfaces; can be chemically active; key element of CMP processes.
Smart cut: process used to fabricate bonded SOI substrates by cleaving the top wafer close to the desired thickness of the active layer; before bonding one wafer is implanted with hydrogen to a depth that will determine the thickness of an active layer in the future SOI wafer; following bonding, the wafer is annealed (at ~500 oC) at which time the wafer splits along the plane stressed with implanted hydrogen. The result is a very thin layer of Si forming a SOI substrate.
Smart discrete: See intelligent discrete.
SMD:(1) Standard Military Drawing. A military specification developed by the Defense Electronic Supply Center (DESC) for a semiconductor device. The specification applies to all manufacturers of the device. Compare SCD. (2) Surface Mount Device. See dielectric and die.
SOI: Silicon-On-Insulator. A composite structure consisting of an active layer of silicon deposited on an insulating material. The insulator can be sapphire (as in SOS), silicon dioxide, silicon nitride, or even an insulating form of silicon itself. The ICs subsequently deposited in the active silicon layer can have advantages of radiation hardness, speed, and high-temperature operation. Intersil is developing SOI technology for a process called RHD1, which is being used for radiation-hardened 256K SRAMS. Compare RHD1.
SOI: Silicon-On-Insulator; silicon substrate of choice in future generation CMOS ICs; basically a silicon wafer with a thin layer of oxide (SiO2) buried in it; devices are built into a layer of silicon on top of the buried oxide and are thus electricaly isolated from the substrate; SOI substrates provide superior isolation between adjacent devices in an IC; SOI devices have reduced parasitic capacitances.
SOIC: Small Outline Integrated Circuit. A miniature plastic flat pack designed for surface mount with gull-wing leads. Most versions have lead spacing of 0.05 inches. See channel, drain, FET and gate.
SOS:Silicon-On-Sapphire; special case of SOI where an active Si layer is formed on top of a saphire substrate (an insulator) by means of epitaxial deposition; due to a slight lattice mismatch between Si and sapphire, Si epitaxial layers larger than the critical thickness have a high defect density;
Source: One of three terminals that make up a field-effect transistor (FET). The source is the point where current enters the channel. See channel, drain, FET and gate.
SPC:Statistical Process Control. A technique to ensure that a manufacturing process is controlled to the limits of its capability. With SPC, each time a process is monitored its behavior is compared against limits that have been established by statistical data on the same process. Intersil has been one of the industry leaders in applying SPC, and is committed to its use over the full range of manufacturing processes.
Species: A specific charged particle that was implanted in an ion implantation process. Note that the species is the specific charged particle that was accelerated and injected into the wafer, not necessarily the dopant element that was activated in the silicon. Specifying the species means specifying all of the following information: 1) the chemical element or compound used, 2) the charge state of the ion used, and 3) the specific isotopes (in AMU Atomic Mass Units) used in the implantation process. For example, consider these two different ion species: 1) 11B+ which is the chemical element boron, isotope 11 AMU, singly charged, and 2) 49BF2+ which is the chemical compound (molecule) boron difluoride, boron isotope 11 AMU and two fluorine isotopes 19 AMU each, singly charged. Although either of these two different ion species may be used for an implant, they will both result (after post-implant annealing) in the same element (boron) being activated in the silicon (producing a p-type carrier, i.e. a hole in the valence band of the semiconductor silicon).
Specifications, military (for packaging): The most commonly used military specs for hybrid circuit packaging are MIL-M-38510C, for general microelectronics, and MIL-STD-883A, for test methods.
SPICE: Simulation Program with Integrated Circuit Emphasis. Simulator used to model electrical circuits at the transistor level. This popular simulator was developed by UC Berkeley, and has been customized and enhanced by many companies, including Intersil. See PVD.
Spintronics: The study in engineering concerning the use of electric charge of an electron and its intrinsic spin. The word is a coinage combining “spin” and “electronics.” A representative achievement in this field of study is the discovery of the giant magnetoresistive effect in 1988, which came to be applied to magnetic heads of hard disc drives.
Sputter Yield: The number of sputtered target atoms per incident Argon atom.
Sputtering: Ion beams unavoidably cause sputtering of any surface they strike. Sputtering is a process in which some of the energy of the ion in the ion beam causes the ejection of atoms from the target surface. The characteristic energies of sputtered particles is low, typical in the range of a few eV to perhaps ~100eV. Sputtering is the primary mechanism for metal and elemental contamination in ion implantation processes.
Sputtering target:source material during sputter deposition processes; typically a disc inside the vacuum chamber which is exposed to bombarding ions, knocking source atoms loose and onto samples. learn more.
Sputter yield: efficiency of the sputtering process (differs for different materials). learn more.
SRAM: Static Random Access Memory. A read/write memory in which the data are latched and retained. SRAMs do not lose their contents as long as power is on. This memory does not need to be refreshed as does DRAM. Compare DRAM.
SRC:Semiconductor Research Corporation. The SRC is a consortium of more than 60 member companies and government agencies planning and executing programs of applied research at leading U.S. universities to strengthen the competitive ability of the U.S. semiconductor industry. Formed by the Semiconductor Industry Association in 1982, the SRC today is the largest industry-driven research program in the nation. Harris Semiconductor (now Intersil) has been an active member and supporter of the SRC since 1983.
SSI: Small-Scale Integration. Integrated circuits containing fewer than ten logic gates. See also MSI, LSI, VLSI.
Stabistor: A switching diode designed for low voltage stabilizing applications. See diode.
Standard cell: Predefined circuit elements that may be selected and arranged to create a custom or semicustom integrated circuit more easily than through original (custom) design. Intersil's comprehensive standard cell libraries provide the building blocks from which designers create ASICs (application specific integrated circuits). See FASTRACK and logic.
Standard Cell: A type of semi-custom LSI that combines and interconnects pre-designed and standardized functional cells to enable a system on a chip. Each functional cell is optimally designed so the chip’s footprint is used more efficiently than in a gate array.
Static: A state in which a quantity exhibits no appreciable change over time.
Static RAM:See memory.
Stepper:Steppers are used in the lithography process to manufacture ICs. Silicon wafers are imprinted with individual circuit components when light passes through the stepper and a mask. See lithography, mask, and aligner.
Stepper: A device for optically shrinking and transferring circuit patterns from a photomask (reticle) via lenses onto the wafer set on a stage. Light sources used for exposure include visible light (g-line), ultraviolet light (i-line), excimer laser (KrF, ArF, etc.) and so forth.
Sticking Coefficient: The ratio of the average number of gas particles sticking to the surface to the average number gas particles incident on the surface.
Stringers: These are an artifact of insufficient over-etch time in anisotropic etch processes. They are pockets of the target film left at the end of the etch process, typically along the edge of steps in the substrate topology (they look like strings of the target film material). These are unacceptable in polysilicon gate etch and metal etch applications. However, they are the intended etch structure in the anisotropic etch process employed to form the gate sidewall spacer (a key part of the final MOS transistor structure.
Structured ASIC: A type of ASIC introduced as an answer to continued chip scaling and shorter product cycles. A structured ASIC uses a number of fixed layers to reduce the cost of mask and mask development as well as to speed up development.
Substrate: The underlying material on which a microelectronic device is built. Such material may be electrically active, such as silicon, or passive, such as alumina ceramic.
Substrate: The underlying material on which other layers are deposited. Such material may be electrically active, such as gallium arsenide or silicon, or passive, such as alumina ceramic.
Superconductivity:The flow of electric current with negligible resistance in certain metals and alloys and over certain temperature ranges. In recent years, superconductivity has been achieved at temperatures as "high" as -140oC.
Surface damage: process related disruption of the crystallographic order at the surface of single-crystal semiconductor substrates; typically caused by surface interactions with high energy ions during dry etching and ionimplantation.
Surface roughness: disruption of the planarity of the semiconductor surface; measured as a difference between highest and deepest surface features; can be as low as 0.06 nm or high quality Si wafers with epitaxial layers.
Surgector:Solid-state devices formed by combining a thyristor and a Zener diode. It is designed to protect circuitry and equipment from damage due to transient surges, such as contact with power lines, lightning strikes, induced voltages due to magnetic or electric fields, and static discharges. Protection is provided by diverting the surge current through a low-impedance path around the vulnerable components. Ideal for data communication and telecommunication applications, but cannot be used in DC circuits where available current exceeds holding current. Harris surgectors are designed and produced in Mountaintop, Penn. Compare MOV.
Switch: As pertaining to semiconductors, an analog IC (typically CMOS) which, on command, either passes or blocks an electrical signal. Intersil is the leading worldwide supplier of DI (dielectric isolation) and JI (junction isolation) analog switches. See DI and JI.
Switched capacitor: A technique commonly used in analog signal processing to create filtering and signal conditioning circuits.
Switching regulators: Switching regulators rapidly switches a series element on and off. They can operate with both synchronous and non-synchronous switches (FETs). These devices store the input energy temporarily and then releasing that energy to the output at a different voltage level. The switch’s duty cycle sets the amount of charge transferred to the load. Switching regulators are efficient because the series element is either fully conducting or switched off so it dissipates almost no power. Switching regulators are able to generate output voltages that are higher than the input voltage or of opposite polarity, unlike linear regulators. The versatility of these converters allow configuration for buck, boost, buck-boost, flyback, inverting in isolated and non-isolated applications. Integrated FET regulators are a subset of switching regulators. These microcircuits have integrated the power MOSFET and are considered a whole solution; whereas controllers employ external power MOSFETs. Both configurations are classified as switching regulators because they regulate the output voltage.
Symbolic layout and compaction: An advanced way of producing custom quality layouts with reduced manual intervention. The symbols of transistors and interconnects are placed either automatically or manually. From there the compaction algorithms replace the symbolic representation with the correctly sized physical transistors and interconnects and compacts the layout to the limit of the algorithms and ground rules.
System: An integrated whole that is comprised of diverse interacting, specialized structures and sub-functions. A collection of people, machines (hardware) and software organized to accomplish a set of specific functions.
System In Package: A module that encloses a number of ICs and passive components (memory chips, ASICs, controllers, etc.) to function as an electronic system. SiP has an advantage over SoC (system on a chip) in terms of lead time and production cost.
System-level integration: (1) In semiconductor design and fabrication, packing more and more devices into an IC or designing multi-chip modules that are more and more complex. (2) In electronics in general, the progressive linking and testing of system components into a complete system. See multi-chip module.
System LSI: Large-scale integration (LSI) is a type of IC. It is the integration of a large number of devices (transistors). The main memory of a computer is an example of this. System LSI is a super multifunction LSI combined with single function LSIs according to the usage. It is installed inside computers and electronic devices with specific applications, such as audio devices. It makes wiring simple and helps to downsize the devices because it occupies a small area.
Systematic defects: A systematic defect occurs mainly due to the interaction of the layout and semiconductor processing. The defect is likely to occur in combination with a particular layout pattern and a particular process. According to the circuit pattern, the mask and the exposure process conditions, the occurring position is determined. The defects may be occurring at the same position of the circuit patterns of all of the dies that has been transferred. The wafer defect inspection system detects defects by comparing the image of the circuit patterns of the adjacent dies. As a result, systematic defects sometimes cannot be detected using a conventional wafer defect inspection system. In such cases, it may be used a method to detect a defect by comparing the design pattern.
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T
TAB:Tape Automated Bonding. A process utilizing metal conductors on beam tape that are mass bonded to the integrated circuit in a single operation. TAB offers the advantage of allowing a circuit to be tested at high frequencies and proving it in good condition without the expensive alternative of mounting it in a module for testing, thus avoiding the need to rework modules. Intersil has capability in this technology as well as ongoing development work toward advancement of TAB as an enabling technology for multi-chip modules. See multi-chip module.
TAM: Total Available Market. Used to show actual dollars spent in a market.
Tape Automated Bonding:An automated process for electrically attaching LSI chip’s connectors to a substrate using a tape (i.e., film carrier). Packaging of LSIs using TAB is called tape carrier package (TCP).
Target:source material used during evaporation or deposition; In sputtering, typically in the form of high purity disc. In e-Beam evaporation, typically in the form of a crucible. In thermal evaporation, the source material is typically held in a boat which is heated resistively. learn more.
Target Erosion: The tendency of PVD targets to selectively erode in those regions where the magnetic field is most parallel to the target. Such regions are the most effective in confining secondary electrons, and thus, experience maximum sputtering and therefore maximum target wear.
TED (Transient Enhanced Diffusion): An anomalous dopant diffusion that occurs during annealing after ion implantation. The diffusivity (diffusion rate) of the dopant is observed to be higher than expected at the beginning of the anneal (enhanced diffusion), which effect decays as the anneal proceeds to longer times (i.e., the enhancement is transient). The cause of this effect is the presence of very high (non-equilibrium) concentrations of silicon interstitials, which come from the damage caused by the ion implantation process itself. These high concentrations decay rapidly during annealing at high temperatures.
Telecom: Telephone communications. See SLICs.
Tensile Film: A CVD film that is under tensile stress after it has been deposited, such as LPCVD Silicon Nitride.
TEOS: TetraEthylOrthoSilicate, a liquid source oxide deposition with excellent uniformity, step coverage and film properties. Disadvantage is high temperature and liquid source requirements. See deposition.
Testability: A descriptor of a general area of circuit design that deals with how testable a particular circuit design is going to be. Specific implementations of structures and test methods that make circuits more testable and provide higher level fault coverage provide better testability. See design for testability (DFT).
Test Grade:A virgin silicon wafer of lower quality than Prime, and used primarily for testing processes. SEMI indicates the bulk, surface, and physical properties required to label silicon wafers as "Test Wafers".
Test patterns: A sequential listing of the test vectors making up most of a TDL file.
Thermal Oxidation (or Oxidation): A thermal process that produces silicon dioxide (SiO2) by a thermally controlled reaction between silicon and an appropriate oxygen bearing chemical species (typically O2 or H2O).
Thermal Process: A desired chemical reaction or a physical transformation with an activation energy (energy barrier) that is overcome by applying thermal energy (temperature). Such processes are typically described by the Arrhenius law, which means that their reaction rate is exponentially dependent on temperature. The process control parameters available in thermal processing are peak temperature, time, ramp rate, quench rate, and ambient.
Thin Film:A film with a thickness of several thousand angstroms (1 angstrom = 1/100,000,000 cm) or less. Resistors and capacitors are made by depositing a thin film of metal or a dielectric material on a ceramic or glass substrate, using processes such as chemical vapor deposition and sputtering.
Thin Film Transistor: A transistor based on a thin film of amorphous and/or multi-crystalline silicon. It is typically used in liquid crystal displays (LCDs). TFT LCD, which uses active matrix thin film transistors, is the mainstream technology for LCDs.
Thin Small Outline Package: A type of thin IC package made of plastic, typically used for a memory (DRAM) module. It is a kind of small outline package (SOP) characterized by two parallel rows of electrical connecting pins, except that TSOP has to be 1.27 mm or less in height when mounted on the substrate, with a resin component of 1 mm in thickness.
Thyristor: A four-layered solid-state device with two to four leads made up and alternate N and P-type layers. Thyristors act as switches to conduct after a current trigger and while they are forward biased.
Tile array: Primarily used in analog ASIC design styles, a tile array is a pre-established layout of electrical devices which can be configured to create a number of different (although related) electrical functions by means of programming the levels of interconnecting material. Since the cost of producing the underlying devices is spread over all designs using a particular tile array, a customer may create very cost-effective solutions to analog design requirements using a high performance Intersil dielectrically isolated process (DI). With tile arrays, customer-specific programming requires only two or three masks rather than 12 or 15.
Tinning: To coat metallic surfaces with a thin layer of solder.
TIR:Testing In Reliability.
TLM:Triple-Level Metal. An IC metal interconnect process that employs three vertical levels of metal, separated by insulating layers. Such a dense configuration requires that each metal interconnect layer be made planar before the subsequent layer is deposited. See DLM and SLM.
Total dose:Term used to describe the total exposure of an IC to ionizing radiation, typically gamma rays, energetic electrons, or X-rays. Most commercial ICs are very sensitive to ionizing radiation and degrade in their performance upon exposure. Intersil is the number-one supplier of rad-hard circuits, with total dose capabilities ranging from several kilorads to more than a megarad.
Total Thickness Variation:The maximum variation in the wafer thickness. Total Thickness Variation is generally determined by measuring the wafer in 5 locations of a cross pattern (not too close to the wafer edge) and calculating the maximum measured difference in thickness.
TQM:Total Quality Management. See Quality First initiative.
Transfer molding: The process of forming articles, in a closed mold, from a thermo-setting material that is conveyed under pressure, in a hot, plastic state. All of Intersil's plastic ICs and discrete devices are transfer molded.
Transient over-voltage: A condition in electrical circuits resulting from a sudden release of energy. Often this condition is precipitated by a static discharge, lightning, or switching of an inductive load. May occur in repeated fashion or randomly. See over-voltage.
Transient radiation:A pulse of ionizing radiation. Transient radiation can cause data upset, device latchup, and destruction of unprotected ICs. Properly designed ICs however, can resist such effects to high levels of transient radiation.
Transient suppression: See over-voltage protection.
Transistor: A three-terminal active semiconductor device that provides current amplification. A bipolar transistor is comprised of base, emitter and collector and is a current-controlled device with a low input impedance. A field-effect transistor has gate, source, and drain electrodes and is a high-impedance, voltage controlled device. The first transistor was invented at Bell Laboratories in 1947 by Nobel-Prize physicists John Bardeen, William Shockley and Walter Bratain. See base, bipolar transistor, collector, drain, emitter, field-effect transistor, gate, MOSFET and source.
Transistor:A three-terminal device composed of semiconductor material that amplifies a signal or opens or closes a circuit. Transistors are the basic elements in integrated circuits, which consist of very large numbers of transistors interconnected with circuitry and contained within a single "chip."
TSOS4: An advanced Intersil wafer process used to prepare rad-hard 64k SOS SRAMs. It features 1.25µm feature size and double-level metal, and is prepared in Intersil's facility at Research Triangle Park, North Carolina. See rad-hard and SRAM.
TTL: Transistor-Transistor Logic. A bipolar technology used for producing logic gates. Positioned in the evolution of logic families after RTL (resistor transistor logic), DTL (diode transistor logic) and before ECL and CMOS. See gate.
Tunnel Effect (also called Tunneling or Quantum Tunneling): A phenomenon at the quantum scale in which a particle tunnels through a barrier that should be insurmountable in terms of classical physics. This quantum effect, also known as tunneling or quantum tunneling, can be explained by the uncertainty principle.
Tunnel Magneto-Resistance (TMR) Effect: A magneto-resistance effect that occurs in a magnetic tunnel junction (MTJ). When a voltage is applied to the junction, electrons tunnel through the insulator and change the electrical resistance of the junction. The effect is being applied to the MRAM device, and is also expected to radically enhance the storage density of hard disk drives, as the memory cells using the TMR effect will be far smaller than those that depend on electromagnetic induction.
TVS:Transient Voltage Suppressor. A general category of devices that protect other electronic circuits, components or systems from destructive transient voltage spikes. The Harris family of TVS types include MOVs, Zener diodes, and surgectors.
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U
UHF:Ultra High Frequency. (1) A bonded-wafer process technology used in Melbourne, Fla. for fabrication of enhanced bipolar products, particularly linear and high-frequency operational amplifiers and other linear products. (2) Also, the portion of the radio spectrum between 300 and 3000 megahertz (MHz). This includes television channels 14 through 83, as well as most radar use.
Ultra-Pure Water: Water that has been purified to attain extremely low levels of conductivity, particles, bacteria, total organic carbon (TOC), etc. In LSI manufacturing processes, ultra-pure water is used to cleanse wafers. As the semiconductor integration level rises, so does the required level of water purity.
Ultra-Thin Substrate:An interposer that substitutes a lead frame to carry a chip. Chips for mobile phones and thin digital signal controllers (DSCs) require a low profile package consisting of a very thin chip combined with a substrate of less than 100μm in core thickness.
Ultra-Thin Wafer: Chip size packages (CSPs) and multi-chip packages (MCPs) found in advanced digital appliances are made possible by ultra-thin wafers of less than 100 μm in thickness. Development of 50μm-thick wafers is ongoing, but the issue of their delicate handling still needs to be addressed.
Under-cutting: When there is some degree of horizontal etching in a target film during a plasma etch process, the feature transferred by the etch process into the film will be smaller than the feature was in the photoresist mask pattern. The horizontal dimensional loss of the film feature relative to the edge of the feature in the photoresist film is called under-cutting. See also: etch bias.
Unix: An operating system developed at AT&T Bell Labs by Ken Thompson and Dennis Ritchie, and further extended at the University of California, Berkeley, by a number of students, including Bill Joy, one of the founders of Sun Computers. The key feature of Unix is that while all versions of Unix are not the same, it is an open architecture and not proprietary to any hardware vendor. This means that application programs are more easily ported between different versions of Unix than between any other proprietary operating systems. See open architecture.
UV Lithography: A photolithography process used in semiconductor fabrication that uses ultraviolet (UV) light as the source. The process typically uses a light source producing the spectral line at 436 nm (g-line) or at an even shorter wavelength of 365 nm (i-line).
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V
Valence band: the lower energy band in a semiconductor that is completely filled with electrons at 0 K; electrons cannot conduct in valence band.
Van der Pauw-Hall:A method used to measure the doping level and "mobility," or ease for an electron or hole to move about a semiconductor material. This mobility is used to gauge the quality of the semiconductor.
Varistor: From "variable-resistor". A non-linear, voltage-dependent device whose electrical behavior provides transient suppression performance. The device absorbs the potentially destructive energy of incoming transient pulses, thereby protecting vulnerable circuit components. Harris varistors are made from zinc oxide in the Dundalk, Ireland manufacturing facility. See MOV.
VCSEL (pronounced "vixel"):Vertical cavity surface emitting laser. A type of laser that emits light vertically and is often used in fiber-optic communication systems.
Verilog: A Cadence Design Systems logic simulator used in the Intersil FASTRACK design system. See FASTRACK.
VHDL: VHSIC Hardware Description Language. Originally developed as a language for describing the design of an IC under the VHSIC (Very High Speed Integrated Circuit) program, this language, sponsored by the U.S. Department of Defense, is the military-mandated language for describing hardware functionality as well as a commercially viable standard for high-level descriptions of ICs. VHDL is important to Intersil because it is required by military contracts, and because it is increasingly desired by commercial customers who use it to model systems composed of one or more parts from several vendors. VHDL will probably be the lasting standard among hardware description languages (HDLs). See LSI, MSI and SSI.
VLSI: Very Large Scale Integration is the process of combining thousands of transistors to create an integrated circuit.
Volatile memory: A memory device that does not retain stored information when power is interrupted. See non-volatile memory.
Voltage: Electromotive force (EMF). One volt is equal to the EMF required to force one ampere of current through one ohm of resistance. Symbol: V.
Voltage regulator: A circuit (either an IC or a portion of an IC) whose purpose is to make the output voltage less variable than the input voltage. As an example, a voltage regulator might provide an output of 5 volts ±2% to a logic board from an input of 5 volts ±50%.
Volume defect: voids and/or local regions featuring different phase (e.g. precipitates or amorphous phase) in crystalline materials.
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W
Wafer:A thin slice, typically 10-30 mils thick, sawed from a cylindrical ingot (boule) of bulk semiconductor material (usually silicon), four to eight inches in diameter. Arrays of ICs or discrete devices are fabricated in the wafers during the manufacturing process. See Czochralski, IC, mil, silicon.
Wafer Bias: This is a potential difference between the wafer and the plasma (typically on the order of 10-1000 Volts). It is the source of the energy for directional (vertical) ion bombardment of the wafer, which increases the anisotropy of plasma etch processes. However, higher voltages can produce unacceptable damage in the substrate.
Wafer bonding: process in which two semiconductor wafers are bonded to form a single substrate; commonly applied to form SOI substrates; bonding of wafers of different materials, e.g. GaAs on Si, or SiC on Si; is more dificult than bonding of similar materials. learn more.
Wafer diameter:The linear distance across the surface of a circular slice which contains the slice center and excludes any flats or other peripheral fiduciary areas. Standard silicon wafer diameters are: 25.4mm (1"), 50.4mm (2"), 76.2mm (3"), 100mm, 125mm, 150mm, 200mm, 300mm.
Wafer fabrication:process in which single crystal semiconductor ingot is fabricated and transformed by cutting, grinding, polishing, and cleaning into a circular wafer with desired diameter and physical properties.
Wafer flat: flat area on the perimeter of the wafer; location and number of wafer flats contains information on crystal orientation of the wafer and the dopant type (n-type or p-type). learn more.
Wafer Level Chip Size Package: A type of chip size package (CSP) that uses an advanced technology to encase an IC device in resin while it is still part of the wafer. Because WLCSP’s package size is virtually the same as a bare chip and finer bump pitch can be easily achieved, it is widely used for mobile phone IC chips.
Warping: A very undesirable mechanical deformation of the silicon wafer that seriously compromises wafer flatness, which at least degrades lithography capabilities. It is caused by stresses in the silicon wafer, which are created by differential thermal expansion (large temperature gradients) in different portions of the wafer during thermal processing.
Warp: Deviation from a plane of a slice or wafer centerline containing both concave and convex regions.
WAT:Wafer Acceptance Test. See mil.
Wire bonding: Process used to make connections between a semiconductor and packaging.
Wire Bonding: A process of connecting an IC chip contact pad with lead frame connectors by means of metal wire. Typically, gold wire with a diameter of 30 microns is used for this purpose in a fully automated process.
WLR:Wafer Level Reliability. See wafer.
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X
X-ray lithography: The lithographic process for transferring patterns to a silicon wafer in which the electromagnetic radiation used is X-ray, rather than visible radiation. The shorter wavelength for X-rays (10-50 angstroms, versus 2000-3000 angstroms for ultra-violet radiation) minimizes diffraction, and extends the useful range of lithography towards 0.1µm. Optical lithography is currently thought to be limited to feature sizes above 0.25-0.3µm. See lithography and angstrom.
X windows: Commercial operating software that overlays the operating system of computers and allows workstation users to manage multiple processes with a graphical interface. Window managers, such as Motif and OpenLook, provide the specific user interface to X.
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Y
YEA:Yield Enhancement Analysis. See yield.
Yield:The percent of wafers, dice, or packaged units conforming to specifications. The most common yields in the manufacturing process are: wafer fab yield (percentage of the wafers that complete wafer processing); wafer probe yield (the fraction of dice on a wafer that meet device specifications); assembly yield (percent of units that are assembled correctly); and final test yield (percent of packaged units that pass all device specifications).
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Z
Zener diode: A semiconductor P-N junction diode that has a controlled reverse-bias breakdown voltage, and is used to supply (clamp) a specific voltage for other protected components (for example in an IC). The Zener effect describes a tunnel breakdown phenomenon that is restricted to less than 5V. However, Zener diodes are traditionally used to describe any reverse-bias P-N junction device used to supply a specific voltage, even those of several hundred volts.
Zinc blend lattice:crystal structure which belongs to the cubic-crystal family; most ot the III-V compound semiconductors have a zincblend lattice. learn more.
Zinc Oxide-Based Light Emitting Diode: An LED that uses zinc oxide (ZnO) for an epitaxial layer. It emits blue and ultraviolet light just as a GaN LED does. ZnO LEDs have several advantages over GaN LEDs: they cost less to produce, can use a lower wavelength range to broaden the choice of fluorescent materials, and emit light at higher temperatures.
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