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Nolting et al., 2011 - Google Patents

Optimizing VLIW-SIMD processor architectures for FPGA implementation

Nolting et al., 2011

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Document ID
9140738852185131750
Author
Nolting S
Payá-Vayá G
Blume H
Publication year
Publication venue
ICT. OPEN

External Links

Snippet

This paper presents several implementation strate-gies to optimize the mapping and place- and-route of common single instruction multiple data (SIMD) functional units on a Xilinx Virtex-5 FPGA. These strategies make use of the dedicated carry chain logic (MUXCY and …
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Classifications

The classifications are assigned by a computer and are not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the classifications listed.
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