A MICRO LED DISPLAY PANELTECHNICAL FIELDThe present disclosure generally relates to light emitting diode (LED) technology and, more particularly, to a micro LED display panel.
BACKGROUNDDisplay technologies are becoming increasingly important in today’s commercial electronic devices. These display panels are widely used in stationary large screens such as liquid crystal display televisions (LCD TVs) and organic light emitting diode televisions (OLED TVs) as well as portable electronic devices such as laptop personal computers, smartphones, tablets, cameras, video-recording devices, and wearable electronic devices.
Inorganic micro light emitting diodes (also called “micro LEDs” ) are of increasing importance because of their use in various applications including self-emissive micro-displays, visible light communications, and opto-genetics. Micro LEDs have the advantage of higher wall plug efficiency (WPE) , higher brightness, lower efficiency droop, better thermal stability, longer lifetime, faster response rate, higher resolution, higher color gamut, and higher contrast over conventional organic LED (OLED) or liquid crystal display (LCD) based micro-displays.
A micro LED panel is manufactured by integrating an array of thousands or even millions of micro LEDs with a driver circuitry back panel. Each pixel of the micro LED panel is formed by one or more micro LEDs. The micro LED panel may be a mono-color or multi-color panel.
One type of conventional micro LED array on a micro LED panel includes a continuous light emitting layer that is not etched or partitioned at any boundary of neighboring micro LEDs forming the individual pixel elements. This type of conventional micro LED array has higher WPE but suffers from electrical and optical crosstalk into neighboring pixels. Another type of conventional micro LED array on a micro LED panel includes an etched and thus partitioned light emitting layer at all of the boundaries of neighboring micro LEDs. This type of conventional micro LED array has lower WPE but does not have electrical and optical crosstalk problems.
The above content is only used to assist in understanding the technical solutions of the present application, and does not constitute an admission that the above is prior art.
SUMMARYThere is a need for improved display designs that improve upon, and help to address the shortcomings of conventional display systems, such as those described above. In particular, there is a need for display panels with better performance.
In order to overcome the drawback mentioned above, the present disclosure provides a micro LED panel to avoid crosstalk while maintaining high WPE.
To achieve the above objectives, some exemplary embodiments of the present disclosure provide a micro LED display panel including a micro LED array area and an IC backplane bonded with a micro LED array of the micro LED array area. Each micro LED of the micro LED array is separately electrically controlled by the IC backplane. Each micro LED of the micro LED array includes a micro mesa structure.
In some embodiments, the micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer. The first type epitaxial layer, the light emitting layer, and the second type epitaxial layer may be arranged in sequence from bottom up. In some embodiments, at least one sidewall of the micro mesa structure does not pass through the light emitting layer, and at least one sidewall of the micro mesa structure passes through the light emitting layer.
In some embodiments, a barrier layer may be formed on a sidewall of the micro mesa structure. In some embodiments, the micro LED array may include at least one micro LED unit. The micro LED unit may include a first micro LED structure and a second micro LED structure. The first micro LED structure and the second micro LED structure may share the same light emitting layer, the same first type epitaxial layer and the same second type epitaxial layer. In some embodiments, the same light emitting layer may be continuously formed in the micro LED unit.
In some embodiments, the first type epitaxial layer may include a first trench formed at the bottom of the same first type epitaxial layer to form a first bottom extrusion and a second bottom extrusion. In some embodiments, the first trench does not pass through the same first type epitaxial layer to leave a continuous top of the same first type epitaxial layer.
In some embodiments, the first bottom extrusion extrudes downward from the continuous top of the same first type epitaxial layer and the second bottom extrusion extrudes downward from the continuous top of the first type epitaxial layer. In some embodiments, the first bottom extrusion belongs to the first micro LED structure and the second bottom extrusion belongs to the second micro LED structure. In some embodiments, a sidewall of the micro LED unit passes through the same light emitting layer.
In some embodiments, the same second type epitaxial layer may include a second trench formed at the top of the same second type epitaxial layer to form a first top extrusion and a second top extrusion. In some embodiments, the second trench does not pass through the same second type epitaxial layer to leave a continuous bottom of the same second type epitaxial layer.
In some embodiments, the first top extrusion extrudes upward from the continuous bottom of the same second type epitaxial layer and the second top extrusion extrudes upward from the continuous bottom of the second type epitaxial layer. In some embodiments, the first top extrusion belongs to the first micro LED structure and the second top extrusion belongs to the second micro LED structure. In some embodiments, the same second type epitaxial layer may further include an extending part extending along horizontal direction and being interconnected with adjacent micro LED units. In some embodiments, the micro LED unit may further include a top transparent dielectric layer covering on the entire top surface of the same second type epitaxial layer.
In some embodiments, a first barrier layer may be formed on a top inner surface and a sidewall of the first trench. In some embodiments, a second barrier layer may be formed on a bottom surface and a sidewall of the second trench. In some embodiments, the top transparent dielectric layer may be filled into the second trench and formed on the second barrier layer.
In some embodiments, a bottom conductive layer may be formed at the bottom of the first bottom extrusion and the second bottom extrusion. In some embodiments, a bottom reflective layer may at least be formed at the bottom of the bottom conductive layer and the bottom reflective layer is electrically conductive.
In some embodiments, a first barrier layer may be formed on a sidewall of the micro LED unit. The first barrier layer may include openings. In some embodiments, the micro LED unit may further include contact structures formed in the openings and on a bottom surface of the extending part.
In some embodiments, a second reflective layer may be formed on the sidewall of the first barrier layer and contacts to the contact structures. In some embodiments, the second reflective layer is not connected with the bottom reflective layer. In some embodiments, the second reflective layer may be electrically conductive. In some embodiments, the second reflective layer may be electrically connected with the IC backplane by a metal via. In some embodiments, an edge of the second reflective layer extends from an edge of the micro LED array along a horizontal direction.
In some embodiments, the IC backplane may include a first top pad array. In some embodiments, a bonding structure array may be formed at the bottom of the first bottom extrusion and the second bottom extrusion. Each bonding structure of the bonding structure array may be formed at the bottom of the bottom reflective layer corresponding to each micro LED structure, respectively. In some embodiments, each bonding structure is correspondingly bonded with each first top pad of the first top pad array, respectively.
In some embodiments, the IC backplane may include a second top pad. In some embodiments, a bottom pad may be formed at the bottom of the metal via. In some embodiments, the bottom pad may be bonded with the second top pad.
In some embodiments, the top outline of the micro LED unit is a rectangle, square, triangle, or circle. In some embodiments, the top outline of a micro LED in each micro LED unit is half of the rectangle, square, triangle, or circle.
In some embodiments, the top outline of the micro LED array is smaller than the top outline of the IC backplane. In some embodiments, the ratio of the number of sidewalls not passing through the light emitting layer to the number of sidewalls passing through the light emitting layer is 1: 3. In some embodiments, the micro LED unit may be arranged recursively or repeatedly in a plane substantially parallel to the IC backplane to form the micro LED array.
In some embodiments, the first type epitaxial layer may be a p-type semiconductor layer and the second type epitaxial layer may be a n-type semiconductor layer. In some embodiments, the first type epitaxial layer may be a n-type semiconductor layer and the second type epitaxial layer may be a p-type semiconductor layer. In some embodiments, the light emitting layer is at least one layer of quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel may include a micro LED array area including a micro LED array. A top transparent conductive layer may be continuously formed on the entire top surface of the micro LED array. The micro LED display panel may include an IC backplane bonded with the micro LED array of the micro LED array area. Each micro LED of the micro LED array may be separately electrically controlled by the IC backplane. The IC backplane may include a first top pad array and a second top pad outside of the first top pad array. The first top pad array and the second top pad may be formed on the top surface of the IC backplane. Each micro LED unit of the micro LED array may include a first type epitaxial layer formed on the IC backplane. The bottom of the first type epitaxial layer may be formed on a plurality of first top pads of the first top pad array. Each micro LED unit of the micro LED array may further include a light emitting layer formed on the first type epitaxial layer and a second type epitaxial layer formed on the light emitting layer. A first trench may be formed in the first type epitaxial layer. The top of the first trench may be lower than the bottom of the light emitting layer. The first trench does not partition the first type epitaxial layer so as to leave a continuous top of the first type epitaxial layer. The first type epitaxial layer may include a first bottom extrusion and a second bottom extrusion. A first trench may be formed between the first bottom extrusion and the second bottom extrusion. The first bottom extrusion and the second bottom extrusion may be formed correspondingly on two of the plurality of first top pads of the first top pad array, respectively.
In some embodiments, a dielectric layer may be formed in the gap between micro LED structures. The dielectric layer may be filled into the first trench. In some embodiments, a metal via may be formed in the dielectric layer and outside of the edge of the micro LED array area. The bottom of the metal via may be electrically connected with the second top pad of the IC backplane. In some embodiments, the edge of the top transparent conductive layer may extend down to the top of the dielectric layer and on the top of the metal via.
In some embodiments, a sidewall of the micro LED unit may pass through the light emitting layer. In some embodiments, a first barrier layer may be formed on the sidewall of the micro LED unit and on the inner surface of the first trench.
In some embodiments, in each micro LED unit, the second type epitaxial layer may include a second trench corresponding to the first trench to form a first top extrusion and a second top extrusion. The bottom of the second trench may be higher than the top of the light emitting layer. The second trench does not pass through the second type epitaxial layer so as to leave a continuous bottom of the second type epitaxial layer.
In some embodiments, a second barrier layer may be formed on the inner surface of the second trench. In some embodiments, the dielectric layer may be filled into the second trench. In some embodiments, the second type epitaxial layer may further include an extending part extending along horizontal direction and being interconnected with adjacent micro LED units.
In some embodiments, a bottom conductive layer may be formed at the bottom of the first bottom extrusion. In some embodiments, a bottom reflective layer may at least be formed at the bottom of the bottom conductive layer. The bottom reflective layer may be electrically conductive.
In some embodiments, a second reflective layer may be formed on the sidewall where the first barrier layer is also formed. The second reflective layer may be electrically conductive. In some embodiments, the second reflective layer may be connected with the bottom reflective layer.
In some embodiments, the micro LED unit may further include a bonding structure array formed at the bottom of the first type epitaxial layer. Each bonding structure of the bonding structure array may be formed at the bottom of the bottom reflective layer corresponding to the first bottom extrusion and to the second bottom extrusion, respectively. In some embodiments, each bonding structure may be correspondingly bonded with each first top pad of the IC backplane, respectively.
In some embodiments, the top outline of the micro LED unit may be a rectangle, square, triangle, or circle. In some embodiments, the top outline of a micro LED in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments, the top outline of the micro LED array area may be smaller than the top outline of the IC backplane. In some embodiments, in a micro LED structure, the ratio of the number of sidewalls not passing through the light emitting layer to the number of sidewalls passing through the light emitting layer is 1: 3. In some embodiments, the micro LED unit may be arranged repeatedly or recurringly in a plane substantially parallel to the IC backplane to form the micro LED array.
In some embodiments, the first type epitaxial layer is a p-type semiconductor layer and the second type epitaxial layer is a n-type semiconductor layer, or the first type epitaxial layer is a n-type semiconductor layer and the second type epitaxial layer is a p-type semiconductor layer. In some embodiments, the light emitting layer may be at least one layer of quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel may include a micro LED array area including a micro LED array. The micro LED display panel may further include an IC backplane bonded with the micro LED array. Each micro LED of the micro LED array may be separately electrically controlled by the IC backplane. In some embodiments, each micro LED of the micro LED array may include a micro mesa structure. The micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer from bottom up. In some embodiments, a first set of sidewalls of the micro mesa structure does not pass through the light emitting layer and a second set of the sidewalls of the micro mesa structure passes through the light emitting layer. The ratio of the number of the first set of sidewalls to the number of the second set of sidewalls is 1: 1.
In some embodiments, the micro LED array may include at least one micro LED unit. The at least one micro LED unit may include a first micro LED structure, a second micro LED structure, a third micro LED structure, and a fourth micro LED structure. The first micro LED structure, the second micro LED structure, the third micro LED structure, and the fourth micro LED structure may share the same first type epitaxial layer, the same light emitting layer, and the same second type epitaxial layer from bottom up. The light emitting layer may be continuously formed in the at least one micro LED unit.
In some embodiments, the first type epitaxial layer may include a first trench and a second trench. The first trench and the second trench may be perpendicularly crossed in the first type epitaxial layer to form a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, and a fourth bottom extrusion in the first type epitaxial layer. The first trench and the second trench do not pass through the first type epitaxial layer to leave a continuous top of the first type epitaxial layer. The sidewalls of the at least one micro LED unit may pass through the light emitting layer.
In some embodiments, the at least one micro LED unit may be arranged in a plane substantially parallel to the IC backplane to form the micro LED array. In some embodiments, a barrier layer may be formed on a sidewall of the micro mesa structure.
In some embodiments, the first bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the second bottom extrusion may extrude downward from the continuous top of the first type layer; the third bottom extrusion may extrude downward from the continuous top of the first type layer; the fourth bottom extrusion may extrude downward from the continuous top of the first type layer. In some embodiments, the first trench may be formed between the first bottom extrusion and the second bottom extrusion; and the first trench may also be formed between the third bottom extrusion and the fourth bottom extrusion. In some embodiments, the second trench may be formed between the first bottom extrusion and the third bottom extrusion; and the second trench may also be formed between the second bottom extrusion and the fourth bottom extrusion. In some embodiments, the first bottom extrusion may be formed in the first micro LED structure; the second bottom extrusion may be formed in the second micro LED structure; the third bottom extrusion may be formed in the third micro LED structure; and the fourth bottom extrusion may be formed in the fourth micro LED structure.
In some embodiments, the second type epitaxial layer may include a third trench and a fourth trench. The third trench and the fourth trench may be perpendicularly crossed in the second type epitaxial layer to form a first top extrusion, a second top extrusion, a third bottom extrusion, and a fourth top extrusion in the second type epitaxial layer. The third trench and the fourth trench do not pass through the second type epitaxial layer to leave a continuous bottom of the second type epitaxial layer.
In some embodiments, the first top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the second top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the third top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the fourth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer.
In some embodiments, the third trench may be formed between the first top extrusion and the second top extrusion; the third trench may also be formed between the third top extrusion and the fourth top extrusion. In some embodiments, the fourth trench may be formed between the first top extrusion and the third top extrusion; the fourth trench may also be formed between the second top extrusion and the fourth top extrusion. In some embodiments, the first top extrusion may be formed in the first micro LED structure; the second top extrusion may be formed in the second micro LED structure; the third top extrusion may be formed in the third micro LED structure; and the fourth top extrusion may be formed in the fourth micro LED structure.
In some embodiments, the second type epitaxial layer may include an extending part along horizontal direction. The extending part may be interconnected with adjacent micro LED units.
In some embodiments, a first barrier layer may be formed in the top inner surface and the sidewall of the first trench and the second trench. In some embodiments, a bottom conductive layer may be formed at the bottom of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, and the fourth bottom extrusion.
In some embodiments, a bottom reflective layer may at least be formed at the bottom of the bottom conductive layer. The bottom reflective layer may be electrically conductive. In some embodiments, the first barrier layer may be further formed on the sidewalls of the at least one micro LED unit. The first barrier layer may further include a plurality of openings. The at least one micro LED unit may further include a plurality of contact structures formed in the plurality of openings and on the bottom surface of a plurality of extending parts, respectively.
In some embodiments, a second reflective layer may be formed on the sidewalls of the at least one micro LED unit on which the first barrier layer is also formed. The second reflective layer may be formed below the plurality of contact structures and may contact to the plurality of contact structures. In some embodiments, the second reflective layer is not connected with the bottom reflective layer. In some embodiments, the second reflective layer may be electrically conductive.
In some embodiments, the second reflective layer may be electrically connected with the IC backplane by a metal via. In some embodiments, the edge of the second reflective layer may extend from the edge of the micro LED array along horizontal direction to the top surface of the metal via.
In some embodiments, the at least one micro LED unit may further include a top transparent dielectric layer covering on the entire top surface of the second type epitaxial layer. The top surface of the top transparent dielectric layer does not have any electrically conductive layers.
In some embodiments, a second barrier layer may be formed at the bottom surface and the sidewall of the third trench and the fourth trench. The top transparent dielectric layer may be filled into the third trench and the fourth trench and formed on the second barrier layer.
In some embodiments, a second reflective layer may be formed on the sidewall on which the first barrier layer is also formed. The second reflective layer is not connected with any contact structures. In some embodiments, the second reflective layer may be connected with the bottom reflective layer.
In some embodiments, the at least one micro LED unit may further include a dielectric layer formed between adjacent micro LED mesas and between the bottom of the bottom reflective layer and the IC backplane. In some embodiments, the at least one micro LED unit may further include a top transparent conductive layer continuously formed on the top of the entire micro LED array, and on the exposed top of the dielectric layer. In some embodiments, the top transparent conductive layer may be electrically connected with the IC backplane by a metal via.
In some embodiments, the edge of the top transparent conductive layer may extend from the edge of the micro LED array along horizontal direction to the top surface of the metal via. In some embodiments, the IC backplane may include a first top pad array. In some embodiments, a bonding structure array may be formed correspondingly at the bottom of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, and the fourth bottom extrusion. Each bonding structure of the bonding structure array may be formed at the bottom of the bottom reflective layer corresponding to each micro LED structure, respectively. Each bonding structure may be correspondingly bonded with each first top pad of the first top pad array of the IC backplane, respectively.
In some embodiments, the IC backplane may further include a second top pad. In some embodiments, a bottom pad may be formed at the bottom of a metal via. The bottom pad may be bonded with the second top pad.
In some embodiments, the top outline of each micro LED unit of the at least one micro LED unit may be a rectangle, square, triangle, or circle. In some embodiments, the top outline of each micro LED in a micro LED unit may be a quarter of the rectangle, square, triangle, or circle. In some embodiments, the top outline of the micro LED array area may be smaller than the top outline of the IC backplane.
In some embodiments, the first type epitaxial layer may be a p-type semiconductor layer and the second type epitaxial layer may be a n-type semiconductor layer. In some embodiments, the first type epitaxial layer may be a n-type semiconductor layer and the second type epitaxial layer may be a p-type semiconductor layer. In some embodiments, the light emitting layer may be at least one layer of quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel may include a micro LED array area and an IC backplane bonded with a micro LED array of the micro LED array area. Each micro LED may be separately electrically controlled by the IC backplane. Each micro LED of the micro LED array may include a micro mesa structure. The micro mesa structure may include a first type epitaxial layer, a light emitting layer, a second type epitaxial layer, and a plurality of sidewalls. A first set of the plurality of sidewalls of the micro mesa structure does not partition the light emitting layer; and a second set of the plurality of sidewalls of the micro mesa structure partitions the light emitting layer. The ratio of the number of the first set of the plurality of sidewalls to the number of the second set of the plurality of sidewalls is 3: 1.
In some embodiments, the micro LED array may include one or more micro LED unit. Each micro LED unit of the micro LED array may include a first micro LED structure, a second micro LED structure, a third micro LED structure, a fourth micro LED structure, a fifth micro LED structure, a sixth micro LED structure, a seventh micro LED structure, and an eighth micro LED structure. In some embodiments, the first micro LED structure, the second micro LED structure, the third micro LED structure, the fourth micro LED structure, the fifth micro LED structure, the sixth micro LED structure, the seventh micro LED structure, and the eighth micro LED structure may share the same first type epitaxial layer, the same light emitting layer, and the same second type epitaxial layer from bottom up. The light emitting layer may be continuously formed in the micro LED unit.
In some embodiments, the first type epitaxial layer may include a first trench, a second trench, a third trench, a fourth trench, a fifth trench, and a sixth trench. The first trench, the second trench, and the third trench may be parallel; and the fourth trench, the fifth trench, and the sixth trench may be parallel. In some embodiments, each of the first trench, the second trench, and the third trench may be perpendicularly crossed with each of the fourth trench, the fifth trench, and the sixth trench in the first type epitaxial layer to form a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, a fourth bottom extrusion, a fifth bottom extrusion, a sixth bottom extrusion, a seventh bottom extrusion, and an eighth bottom extrusion in the first type epitaxial layer. In some embodiments, the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench do not partition the first type epitaxial layer to leave a continuous top of the first type epitaxial layer.
In some embodiments, in each micro LED unit, each micro LED structure may include a first side, a second side, a third side, and a fourth side. The first sides, the second sides, the third sides, and the fourth sides of any two micro LED structures may be parallel, respectively. In some embodiments, a sidewall formed at the first side of the first micro LED structure may partition the light emitting layer. A sidewall formed at the first side of the second micro LED structure may partition the light emitting layer. A sidewall formed at the second side of the third micro LED structure may partition the light emitting layer. A sidewall formed at the fourth side of the fourth micro LED structure may partition the light emitting layer. A sidewall formed at the second side of the fifth micro LED structure may partition the light emitting layer. A sidewall formed at the fourth side of the sixth micro LED structure may partition the light emitting layer. A sidewall formed at the third side of the seventh micro LED structure may partition the light emitting layer. A sidewall formed at the third side of the eighth micro LED structure may partition the light emitting layer.
In some embodiments, a first partition trench may be formed along the first sides of the first micro LED structure and the second micro LED structure and continuously through the micro LED array. A second partition trench may be formed along the second sides of the third micro LED structure and the fifth micro LED structure. A third partition trench may be formed along the fourth sides of the fourth micro LED structure and the sixth micro LED structure. A fourth partition trench may be formed along the third sides of the seventh micro LED structure and the eighth micro LED structure and continuously through the micro LED array. The first partition trench may be perpendicular to the second and third partition trenches. The first partition trench may be parallel to the fourth partition trench.
In some embodiments, the first trench may include a first part and a second part. The first part of the first trench may be formed at the second side of the first micro LED structure and the second part of the first trench may be formed at the second side of the seventh micro LED structure. The second partition trench may be formed between the first and second parts of the first trench.
In some embodiments, the second trench may be formed between the first micro LED structure and the second micro LED structure, between the third micro LED structure and the fourth micro LED structure, between the fifth micro LED structure and the sixth micro LED structure, and between the seventh micro LED structure and the eighth micro LED structure in each micro LED unit. The second trench may be formed along the fourth side of the first micro LED structure and continuously through the micro LED unit.
In some embodiments, the third trench may include a first part and a second part. The first part of the third trench may be formed at the fourth side of the second micro LED structure and at the second side of an adjacent first micro LED structure. The second part of the third trench may be formed at the fourth side of the eighth micro LED structure and at the second side of an adjacent seventh micro LED structure. The third partition trenches may be formed between the first and second parts of the third trench.
In some embodiments, the fourth trench may be formed between the first micro LED structure and the third micro LED structure, between the second micro LED structure and the fourth micro LED structure in each micro LED unit. The fourth trench may be formed along the third side of the first micro LED structure and continuously through the micro LED array.
In some embodiments, the fifth trench may be formed between the third micro LED structure and the fifth micro LED structure, between the fourth micro LED structure and the sixth micro LED structure in each micro LED unit. The fifth trench may be formed along the third side of the third micro LED structure and the two ends of the fifth trench may be stopped at the second partition trench and the third partition trench, respectively.
In some embodiments, the sixth trench may be formed between the fifth micro LED structure and the seventh micro LED structure, and between the sixth micro LED structure and the eighth micro LED structure in each micro LED unit. The sixth trench may be formed along the third side of the fifth micro LED structure and continuously through the micro LED array.
In some embodiments, the smallest width of the first partition trench, the second partition trench, and the third partition trench may be larger than the width of the first trench. In some embodiments, the widths of the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench are the same. In some embodiments, a barrier layer may be formed on a sidewall of the micro mesa structure.
In some embodiments, the first bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the second bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the third bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the fourth bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the fifth bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the sixth bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the seventh bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer; the eighth bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer.
In some embodiments, the first trench may be formed at the second side of the first bottom extrusion and at the second side of the seventh bottom extrusion. The second trench may be formed between the first bottom extrusion and the second bottom extrusion, between the third bottom extrusion and the fourth bottom extrusion, between the fifth bottom extrusion and the sixth bottom extrusion, and between the seventh bottom extrusion and the eighth bottom extrusion in the same micro LED unit. The third trench may be formed at the fourth side of the second bottom extrusion and the fourth side of the eighth bottom extrusion. The fourth trench may be formed between the first bottom extrusion and the third bottom extrusion, also between the second bottom extrusion and the fourth bottom extrusion. The fifth trench may be formed between the third bottom extrusion and the fifth bottom extrusion, also between the fourth bottom extrusion and the sixth bottom extrusion in the same micro LED unit. The sixth trench may be formed between the fifth bottom extrusion and the seventh bottom extrusion, also formed between the sixth bottom extrusion and the eighth bottom extrusion.
In some embodiments, the first bottom extrusion may be formed in the first micro LED structure; the second bottom extrusion may be formed in the second micro LED structure; the third bottom extrusion may be formed in the third micro LED structure; the fourth bottom extrusion may be formed in the fourth micro LED structure; the fifth bottom extrusion may be formed in the fifth micro LED structure; the sixth bottom extrusion may be formed in the sixth micro LED structure; the seventh bottom extrusion may be formed in the seventh micro LED structure; the eighth bottom extrusion may be formed in the eighth micro LED structure.
In some embodiments, the second type epitaxial layer may include a seventh trench, an eighth trench, a ninth trench, a tenth trench, an eleventh trench, and a twelfth trench. The seventh trench, the eighth trench, and the ninth trench are parallel. The tenth trench, the eleventh trench, and the twelfth trench are parallel. Each of the seventh trench, the eighth trench, and the ninth trench may be perpendicularly crossed with each of the tenth trench, the eleventh trench, and the twelfth trench in the second type epitaxial layer to form a first top extrusion, a second top extrusion, a third top extrusion, a fourth top extrusion, a fifth top extrusion, a sixth top extrusion, a seventh top extrusion, and an eighth top extrusion in the second type epitaxial layer, respectively. The seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench do not partition the second type epitaxial layer to leave a continuous bottom of the second type epitaxial layer.
In some embodiments, the first top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the second top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the third top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the fourth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the fifth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the sixth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the seventh top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the eighth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer.
In some embodiments, the seventh trench may be formed at the second side of the first top extrusion and at the second side of the seventh top extrusion. The eighth trench may be formed between the first top extrusion and the second top extrusion, between the third top extrusion and the fourth top extrusion, between the fifth top extrusion and the sixth top extrusion, and between the seventh top extrusion and the eighth top extrusion in the same micro LED unit. The ninth trench may be formed at the fourth side of the second top extrusion and at the fourth side of the eighth top extrusion. The tenth trench may be formed between the first top extrusion and the third top extrusion, also between the second top extrusion and the fourth top extrusion. The eleventh trench may be formed between the third top extrusion and the fifth top extrusion, also between the fourth top extrusion and the sixth top extrusion in a same micro LED unit. The twelfth trench may be formed between the fifth top extrusion and the seventh top extrusion, also formed between the sixth top extrusion and the eighth top extrusion.
In some embodiments, the first top extrusion may be formed in the first micro LED structure; the second top extrusion may be formed in the second micro LED structure; the third top extrusion may be formed in the third micro LED structure; the fourth top extrusion may be formed in the fourth micro LED structure; the fifth top extrusion may be formed in the fifth micro LED structure; the sixth top extrusion may be formed in the sixth micro LED structure; the seventh top extrusion may be formed in the seventh micro LED structure; the eighth top extrusion may be formed in the eighth bottom extrusion.
In some embodiments, the second type epitaxial layer may include an extending part along horizontal direction and being interconnected with adjacent micro LED units. In some embodiments, a first barrier layer may be formed in the top inner surface and a sidewall of the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench.
In some embodiments, a bottom conductive layer may be formed at the bottom of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, the eighth bottom extrusion. In some embodiments, a bottom reflective layer may be at least formed at the bottom of the bottom conductive layer. The bottom reflective layer is electrically conductive.
In some embodiments, the first barrier layer may further be formed on a sidewall of the micro LED unit. The first barrier layer may include openings. The micro LED unit may further include contact structures formed in the openings and on the bottom surfaces of the extending parts.
In some embodiments, a second reflective layer may be formed on the sidewall where the first barrier layer is formed and may contact to the contact structures. The second reflective layer is not connected with the bottom reflective layer. The second reflective layer may be electrically conductive. In some embodiments, the second reflective layer may be electrically connected with the IC backplane by a metal via. In some embodiments, the edge of the second reflective layer may extends from the edge of the micro LED array along horizontal direction to the top surface of the metal via.
In some embodiments, the micro LED unit may further include a top transparent dielectric layer covering on the entire top surface of the second type epitaxial layer. The top surface of the top transparent dielectric layer does not have any electrically conductive layers.
In some embodiments, a second barrier layer may be formed in the bottom surface and the sidewall of the seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench. The top transparent dielectric layer may be filled into the seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench, and formed on the second barrier layer.
In some embodiments, a second reflective layer may be formed on the sidewall where the first barrier layer is formed and is not connected with contact structures. In some embodiments, the second reflective layer may be connected with the bottom reflective layer.
In some embodiments, the micro LED unit may further include a dielectric material formed between adjacent micro LED mesas and between the bottom of the reflective layer and the IC backplane. The micro LED unit may further include a top transparent conductive layer continuously formed on the top of the entire micro LED array, and on the exposed top of the dielectric material. The top transparent conductive layer may be electrically connected with the IC backplane by a metal via. In some embodiments, the edge of the top transparent conductive layer may extend from the edge of the micro LED array along horizontal direction to the top surface of the metal via.
In some embodiments, the IC backplane may include a first top pad array. A bonding structure array may be formed correspondingly at the bottoms of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, and the eighth bottom extrusion. Each bonding structure may be formed at the bottom of the bottom reflective layer corresponding to each micro LED structure, respectively. Each bonding structure may correspondingly be bonded with each first top pad of the IC backplane, respectively.
In some embodiments, the IC backplane may further include a second top pad. A bottom pad may be formed at the bottom of a metal via. The bottom pad may be bonded with the second top pad. The bottom of the metal via and the bottom pad may be formed correspondingly to the second top pad. In some embodiments, the second top pad may be formed at a position along the fourth partition trench direction outside of the micro LED array.
In some embodiments, the top outline of the micro LED unit may be a rectangle, square, triangle, or circle. In some embodiments, the top outline of a micro LED in each micro LED unit may be one eighth of the rectangle, square, triangle, or circle.
In some embodiments, the top outline of the micro LED array area may be smaller than the top outline of the IC backplane. In some embodiments, the first type epitaxial layer may be a p-type semiconductor layer and the second type epitaxial layer may be an n-type semiconductor layer. In some embodiments, the first type epitaxial layer may be an n-type semiconductor layer and the second type epitaxial layer is a p-type semiconductor layer. In some embodiments, the light emitting layer may be at least one layer of quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel includes a micro LED array area and an IC backplane bonded with a micro LED array of the micro LED array area. Each micro LED of the micro LED array may be separately electrically controlled by the IC backplane. Each micro LED of the micro LED array includes: a micro mesa structure, which includes a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer from bottom up; a first-type sidewall of the micro mesa structure not passing through the light emitting layer; and a second-type sidewall of the micro mesa structure passing through the light emitting layer. The ratio of the number of first-type sidewall to the number of second-type sidewall may be 3: 1 for each micro LED.
In some embodiments, the micro LED array includes multiple micro LED units. Each micro LED unit includes a first micro LED structure, a second micro LED structure, a third micro LED structure, a fourth micro LED structure, a fifth micro LED structure, a sixth micro LED structure, a seventh micro LED structure, and an eighth micro LED structure. The first micro LED structure, the second micro LED structure, the third micro LED structure, the fourth micro LED structure, the fifth micro LED structure, the sixth micro LED structure, the seventh micro LED structure, and the eighth micro LED structure share a same first type epitaxial layer, a same light emitting layer, and a same second type epitaxial layer from bottom to up. In some embodiments, the light emitting layer may be continuously formed in each micro LED unit.
In some embodiments, each of the first micro LED structure, the second micro LED structure, the third micro LED structure, the fourth micro LED structure, the fifth micro LED structure, the sixth micro LED structure, the seventh micro LED structure, and the eighth micro LED structure includes a first side, a second side, a third side, and a fourth side along a clockwise direction. Each of the first micro LED structure and the second micro LED structure includes the second-type sidewall at the first side; each of the third micro LED structure and the fifth micro LED structure includes the second-type sidewall at the second side; each of the fourth micro LED structure and the sixth micro LED structure includes the second-type sidewall at the fourth side; and each of the seventh micro LED structure and the eighth micro LED structure includes the second-type sidewall at the third side.
In some embodiments, the first type epitaxial layer of each micro LED unit includes a first trench, a second trench, a third trench, a fourth trench, a fifth trench, and a sixth trench. The first trench, the second trench, and the third trench may be parallel; the fourth trench, the fifth trench, and the sixth trench may be parallel; the first trench and the fourth trench may be perpendicularly crossed. In some embodiments, the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench may not pass through the first type epitaxial layer to leave a continuous top of the first type epitaxial layer.
In some embodiments, each micro LED unit includes a first partition trench, a second partition trench, and a third partition trench. The first partition trench may be formed at the first side of each of the first micro LED structure and the second micro LED structure. The first partition trench may be continuously formed through the micro LED array. The second partition trench may be formed at the second side of each of the third micro LED structure and the fifth micro LED structure, which may be formed as a shared sidewall between the third micro LED structure and the fourth micro LED structure and between the fifth micro LED and the sixth micro LED. The third partition trench may be formed at the third side of each of the seventh micro LED structure and the eighth micro LED structure. The third partition trench may be continuously formed through the micro LED array. In some embodiments, the first partition trench may be perpendicular to the second partition trench, and the first partition trench may be parallel to the third partition trench.
In some embodiments, the first trench may be formed at the fourth side of each of the first micro LED structure, the third micro LED structure, the fifth micro LED structure, and the seventh micro LED structure. The first trench may be continuously formed through each micro LED unit.
In some embodiments, the second trench may include two parts: a first part of the second trench being formed between the first micro LED structure and the second micro LED structure; and a second part of the second trench being formed between the seventh micro LED structure and the eighth micro LED structure. The second partition trench may be formed between the two parts of the second trench.
In some embodiments, the third trench may be formed at the second side of each of the second micro LED structure, the fourth micro LED structure, the sixth micro LED structure, and the eighth micro LED structure. The third trench may be continuously formed through each micro LED unit. The third trench may be formed as a shared sidewall between two adjacent micro LED units.
In some embodiments, the fourth trench may be formed at the third side of each of the first micro LED structure and the second micro LED structure, which may be between the first micro LED structure and the third micro LED structure and between the second micro LED structure and the fourth micro LED structure. The fourth trench may be continuously formed through the micro LED array.
In some embodiments, the fifth trench may be formed at the third side of each of the third micro LED structure and the fourth micro LED structure, which may be between the third micro LED structure and the fifth micro LED structure and between the fourth micro LED structure and the sixth micro LED structure. A center of the fifth trench may be cut off by the second partition trench.
In some embodiments, the sixth trench may be formed at the third side of each of the fifth micro LED structure and the sixth micro LED structure, and may be between the fifth micro LED structure and the seventh micro LED structure and between the sixth micro LED structure and the eighth micro LED structure. The sixth trench may be continuously formed through the micro LED array.
In some embodiments, multiple micro LED units may be arranged recurringly along a first direction and a second direction to form a micro LED unit array. The first direction may be perpendicular to the second direction, and the first direction and the second direction may be substantially parallel to the IC backplane.
In some embodiments, the smallest width of the first partition trench, the second partition trench, and the third partition trench may be larger than the width of the first trench. In some embodiments, the widths of the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench are same.
In some embodiments, a barrier layer may be formed on sidewalls of the micro mesa structure.
In some embodiments, each of a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, a fourth bottom extrusion, a fifth bottom extrusion, a sixth bottom extrusion, a seventh bottom extrusion, and an eighth bottom extrusion extrudes downward from the continuous top of the first type epitaxial layer.
In some embodiments, the first bottom extrusion corresponds to the first micro LED structure, the second bottom extrusion corresponds to the second micro LED structure, the third bottom extrusion corresponds to the third micro LED structure, the fourth bottom extrusion corresponds to the fourth micro LED structure, the fifth bottom extrusion corresponds to the fifth micro LED structure, the sixth bottom extrusion corresponds to the sixth micro LED structure, the seventh bottom extrusion corresponds to the seventh micro LED structure, and the eighth bottom extrusion corresponds to the eighth micro LED structure.
In some embodiments, the second type epitaxial layer of each micro LED units include a seventh trench, an eighth trench, a ninth trench, a tenth trench, an eleventh trench, and a twelfth trench. In some embodiments, the seventh trench, the eighth trench, and the ninth trench may be parallel; the tenth trench, the eleventh trench, and the twelfth trench may be parallel; and the seventh trench and the tenth trench may be perpendicularly crossed. In some embodiments, the seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench may not pass through the second type epitaxial layer to leave a continuous bottom of the second type epitaxial layer.
In some embodiments, each of a first top extrusion, a second top extrusion, a third top extrusion, a fourth top extrusion, a fifth top extrusion, a sixth top extrusion, a seventh top extrusion and an eighth top extrusion extrudes upward from the continuous bottom of the second type epitaxial layer.
In some embodiments, the first top extrusion corresponds to the first micro LED structure, the second top extrusion corresponds to the second micro LED structure, the third top extrusion corresponds to the third micro LED structure, the fourth top extrusion corresponds to the fourth micro LED structure, the fifth top extrusion corresponds to the fifth micro LED structure, the sixth top extrusion corresponds to the sixth micro LED structure, the seventh top extrusion corresponds to the seventh micro LED structure, and the eighth top extrusion corresponds to the eighth micro LED structure.
In some embodiments, the seventh trench may be continuously formed at the fourth side of each of the first top extrusion, the third top extrusion, the fifth top extrusion, and the seventh top extrusion. In some embodiments, the eighth trench may be separately formed between the first top extrusion and the second top extrusion and between the seventh top extrusion and the eighth top extrusion in a same micro LED unit. In some embodiments, the ninth trench may be continuously formed at the second side of each of the second top extrusion, the fourth top extrusion, the sixth top extrusion, and the eighth top extrusion. In some embodiments, the tenth trench may be continuously formed between the first top extrusion and the third top extrusion and between the second top extrusion and the fourth top extrusion. In some embodiments, the eleventh trench may be separately formed between the second top extrusion and the fifth top extrusion and between the fourth top extrusion and the sixth top extrusion in a same micro LED unit. In some embodiments, the twelfth trench may be continuously formed between the fifth top extrusion and the seventh top extrusion and between the sixth top extrusion and the eighth top extrusion.
In some embodiments, the second type epitaxial layer includes an extending part along a horizontal direction. The extending part may be interconnected with the third top extrusion and the fourth top extrusion, and the extending part may be interconnected with the fifth top extrusion and the sixth top extrusion.
In some embodiments, a first barrier layer may be formed in the top inner surface and the sidewall of the first trench, the second trench, the third trench, the fourth trench, the fifth trench, and the sixth trench.
In some embodiments, a bottom conductive layer may be formed at the bottom of the first bottom extrusion, the bottom of the second bottom extrusion, the bottom of the third bottom extrusion, the bottom of the fourth bottom extrusion, the bottom of the fifth bottom extrusion, the bottom of the sixth bottom extrusion, the bottom of the seventh bottom extrusion, and the bottom of the eighth bottom extrusion.
In some embodiments, a bottom reflective layer may be at least formed at the bottom of the bottom conductive layer and the bottom reflective layer may be electrically conductive.
In some embodiments, the first barrier layer may be further formed on sidewalls of each micro LED unit. The first barrier layer further includes openings, and contact structures may be formed in the openings and on a bottom surface of the extending part.
In some embodiments, a second reflective layer may be formed on the first barrier layer. The second reflective layer may be electrically conductive. The second reflective layer contacts to and may be electrically connected with the contact structures. The second reflective layer may not be connected with the bottom reflective layer.
In some embodiments, the second reflective layer may be electrically connected with the IC backplane by a metal via.
In some embodiments, the edge of the second reflective layer extends from the edge of the micro LED array along the horizontal direction to the top surface of the metal via.
In some embodiments, the micro LED array further includes a top transparent dielectric layer covering the entire top surface of the second type epitaxial layer, wherein the top surface of the top transparent dielectric layer may not have any electrically conductive layers.
In some embodiments, a second barrier layer may be formed in the bottom surface and the sidewall of the seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench, wherein the top transparent dielectric layer may be filled into the seventh trench, the eighth trench, the ninth trench, the tenth trench, the eleventh trench, and the twelfth trench. The top transparent dielectric layer may be formed on the second barrier layer.
In some embodiments, the IC backplane further includes a second top pad, and a bottom pad may be formed at a bottom of the metal via. The bottom pad may be bonded with the second top pad.
In some embodiments, the micro LED array further includes a dielectric material formed between the adjacent micro mesa structures and between the bottom of the bottom reflective layer and the IC backplane. In some embodiments, he micro LED array further includes a top transparent conductive layer continuously formed on an entire top of the micro LED array. The top transparent conductive layer covers an exposed top of the dielectric material. The top transparent conductive layer may be electrically connected with the IC backplane by a metal via.
In some embodiments, the IC backplane includes a first top pad array, and the micro LED array includes a bonding structure array. Each bonding structure of the bonding structure array may be formed correspondingly at a bottom of each of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, and the eighth bottom extrusion, respectively. Each bonding structure of the bonding structure array may be formed at the bottom of the bottom reflective layer corresponding to each of the first micro LED structure, the second micro LED structure, the third micro LED structure, the fourth micro LED structure, the fifth micro LED structure, the sixth micro LED structure, the seventh micro LED structure, and the eighth micro LED structure, respectively. In some embodiments, each bonding structure may be correspondingly bonded with each first top pad of the first top pad array, respectively.
In some embodiments, the second top pad may be formed at a position outside of the micro LED array area along the direction of the first partition trench or the second partition trench.
In some embodiments, the top outline of the micro LED array area may be smaller than the top outline of the IC backplane.
In some embodiments, the first type epitaxial layer may be a p-type semiconductor layer and the second type epitaxial layer may be an n-type semiconductor layer, or the first type epitaxial layer may be an n-type semiconductor layer and the second type epitaxial layer may be a p-type semiconductor layer.
In some embodiments, the light emitting layer may be at least one layer of a quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel includes a micro LED array area and an IC backplane bonded with a micro LED array of the micro LED array area. Each micro LED of the micro LED array may be separately electrically controlled by the IC backplane. Each micro LED includes: a micro mesa structure, which includes a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer from bottom up; a first-type sidewall of the micro mesa structure not passing through the light emitting layer; and a second-type sidewall of the micro mesa structure passing through the light emitting layer. In some embodiments, each micro LED may be a first-type micro LED structure or a second-type micro LED structure. For the first-type micro LED structure, the ratio of the number of first-type sidewall to the number of second-type sidewall may be 1: 1. For the second-type micro LED structure, the ratio of the number of first-type sidewall to the number of second-type sidewall may be 3: 1.
In some embodiments, the first-type micro LED structure includes two first-type sidewalls and two second-type sidewalls. In some embodiment, each first-type micro LED structure may be a first kind of micro LED structure or a second kind of micro LED structure. For the first kind of micro LED structure, two first-type sidewalls may be adjacent and two second-type sidewalls may be adjacent. For the second kind of micro LED structure, two first-type sidewalls may be parallel and two second-type sidewalls may be parallel.
In some embodiments, the micro LED display panel comprises multiple second-type micro LED structures, multiple first kind of micro LED structures, and multiple second kind of micro LED structures. Each second-type micro LED structure may be arranged between two first kind of micro LED structures; and second kind of micro LED structures may be arranged in a row.
In some embodiments, the micro LED array may be formed by multiple micro LED units, and each micro LED unit includes an N×M array of
N and M each represents a positive integer no less than 3. M11 represents a first kind of micro LED structure, M12 represents a second kind of micro LED structure, and M2 represents a second-type micro LED structure.
In some embodiments, the first type epitaxial layer includes one or more first shallow trenches. The first shallow trenches may not pass through the first type epitaxial layer, and sidewalls of the first shallow trenches may be formed as lower sidewalls of the micro mesa structure not passing through the light emitting layer.
In some embodiments, the second type epitaxial layer includes one or more second shallow trenches. The second shallow trenches may not pass through the second type epitaxial layer, and sidewalls of the second shallow trenches may be formed as upper sidewalls of the micro mesa structure not passing through the light emitting layer.
In some embodiments, the micro LED display panel further includes one or more deep trenches. The deep trenches pass through the first type epitaxial layer and the light emitting layer, and stop in the second type epitaxial layer. The top of the second type epitaxial layer may be continuously formed on the micro LED array.
In some embodiments, a first barrier layer may be formed in the one or more first shallow trenches, and a second barrier layer may be formed in the one or more second shallow trenches.
In some embodiments, a first reflective layer may be at least formed at the bottom of the bottom conductive layer. The first reflective layer may be electrically conductive.
In some embodiments, a first barrier layer may be formed in the one or more deep trenches. In some embodiments, the first barrier layer comprises openings formed at the top of the deep trenches, and contact structures may be formed in the openings and contact the second type epitaxial layer.
In some embodiments, a second reflective layer may be formed on the first barrier layer. The second reflective layer may be electrically conductive. In some embodiments, the second reflective layer contacts to and may be electrically connected with the contact structures. In some embodiments, the second reflective layer may not be connected with the first reflective layer.
In some embodiments, the second reflective layer may be electrically connected with the IC backplane by a metal via.
In some embodiments, the IC backplane further includes a second top pad. A bottom pad may be formed at the bottom of the metal via, and the bottom pad may be bonded with the second top pad.
In some embodiments, the edge of the second reflective layer extends from the edge of the micro LED array along horizontal direction to the top surface of the metal via.
In some embodiments, the micro LED array further includes a top transparent dielectric layer covering the entire top surface of the second type epitaxial layer.
In some embodiments, the second barrier layer may be formed in the bottom surface and the sidewalls of second shallow trenches. In some embodiments, the top transparent dielectric layer may be filled into the second shallow trenches and formed on the second barrier layer.
In some embodiment, a first barrier layer may be formed in the deep trenches, and a second reflective layer may be formed on the first barrier layer. In some embodiments, the second reflective layer may be electrically conductive. In some embodiments, the second reflective layer may be connected with the first reflective layer.
In some embodiments, the micro LED array further includes a dielectric material filled into the first shallow trenches, the second shallow trenches, and the deep trenches. In some embodiments, the micro LED array further includes a top transparent conductive layer continuously formed on the entire top of the micro LED array. In some embodiments, the top transparent conductive layer covers the exposed top of the dielectric material filled into the second shallow trenches. The top transparent conductive layer may be electrically connected with the IC backplane by a metal via.
In some embodiments, the IC backplane includes a first top pad array, and the micro LED array comprises a bonding structure array. In some embodiments, each bonding structure of the bonding structure array may be formed at a bottom of the first reflective layer corresponding to each micro LED, respectively. In some embodiments, each bonding structure may be correspondingly bonded with each first top pad of the first top pad array, respectively.
In some embodiments, the top outline of the micro LED array area may be smaller than the top outline of the IC backplane.
In some embodiments, the first type epitaxial layer may be a p-type semiconductor layer and the second type epitaxial layer may be an n-type semiconductor layer. In some embodiments, the first type epitaxial layer may be an n-type semiconductor layer and the second type epitaxial layer may be a p-type semiconductor layer.
In some embodiments, the light emitting layer may be at least one layer of a quantum well layer.
In some embodiments, a micro LED display panel is provided. The micro LED display panel includes a micro LED array area and an IC backplane bonded with a micro LED array of the micro LED array area. Each micro LED of the micro LED array may be separately electrically controlled by the IC backplane. Each micro LED includes: a micro mesa structure, which includes a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer from bottom up; a first-type sidewall of the micro mesa structure not passing through the light emitting layer; and a second-type sidewall of the micro mesa structure passing through the light emitting layer.
In some embodiments, each micro LED may be a first-type micro LED structure, a second micro LED structure, and a third-type micro LED structure. For the first-type micro LED structure, the ratio of the number of first-type sidewall to the number of second-type sidewall may be 1: 1. For the second-type micro LED structure, the ratio of the number of first-type sidewall to the number of second-type sidewall may be 3: 1. For the third-type micro LED structure, the ratio of the number of first-type sidewall to the number of second-type sidewall may be 1: 3.
Note that the various embodiments described above can be combined with any other embodiments described herein. The features and advantages described in the disclosure are not all inclusive and, in particular, many additional features and advantages will be apparent to one of ordinary skill in the art in view of the drawings, specification, and claims. Moreover, it should be noted that the language used in the disclosure has been principally selected for readability and instructional purposes, and may not have been selected to delineate or circumscribe the inventive subject matter.
BRIEF DESCRIPTION OF THE DRAWINGSSo that the present disclosure can be understood in greater detail, a more particular description may be had by reference to the features of various embodiments, some of which are illustrated in the appended drawings. The appended drawings, however, merely illustrate pertinent features of the present disclosure and are therefore not to be considered limiting, for the description may admit to other effective features.
For convenience, “up” is used to mean away from the substrate of a light emitting structure as shown in the Figures, “down” means toward the substrate, and other directional terms such as top, bottom, above, below, under, beneath, etc. are interpreted accordingly.
FIG. 1 is a cross-sectional view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 2 is a bottom view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 3 is a bottom view of a micro LED display panel according to some other embodiments of the present disclosure.
FIG. 4 is a bottom view of a micro LED display panel according to some other embodiments of the present disclosure.
FIG. 5 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure.
FIG. 6 is a cross-sectional view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 7 is a bottom view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 8 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure.
FIG. 9 is a bottom view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 10 is a cross-sectional view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 11 is a bottom view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 12 is a cross-sectional view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 13 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure.
FIG. 14A is a bottom view of a micro LED display panel according to some embodiments of the present disclosure.
FIG. 14B is another bottom view of the micro LED display panel descried above with respect to FIG. 14A without the barrier layer according to some embodiments of the present disclosure.
FIG. 15A is a partial cross-sectional view of the micro LED display panel along the AA’ line in FIG. 14A according to some embodiments of the present disclosure.
FIG. 15B is a partial cross-sectional view of a micro LED display panel along the BB’ line in FIG. 14A according to some embodiments of the present disclosure.
FIG. 15C is a cross-sectional view of a micro LED display panel along the CC’ line in FIG. 14A according to some embodiments of the present disclosure.
FIG. 16 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure;
FIG. 17A is a bottom view illustrating a micro LED display panel without a first barrier layer according to some embodiments of the present disclosure;
FIG. 17B is a bottom view illustrating a micro LED display panel with a first barrier layer according to some embodiments of the present disclosure;
FIG. 18 is a cross-sectional view of a micro LED unit along the BB’ line in FIG. 17B, according to some embodiments of the present disclosure;
FIG. 19A is a partial cross-sectional view of a micro LED display panel along the BB’ line in FIG. 17B, according to some embodiments of the present disclosure;
FIG. 19B is a partial cross-sectional view of a micro LED display panel along the AA’ line in FIG. 17B, according to some embodiments of the present disclosure;
FIG. 19C is a cross-sectional view of a micro LED display panel along the CC’ line in FIG. 17B, according to some embodiments of the present disclosure.
FIG. 20 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure;
FIG. 21 is a bottom view illustrating a micro LED unit with a first barrier layer according to some embodiments of the present disclosure;
FIG. 22A is a bottom view illustrating a micro LED display panel without a first barrier layer according to some embodiments of the present disclosure;
FIG. 22B is a bottom view illustrating a micro LED display panel with a first barrier layer according to some embodiments of the present disclosure.
FIG. 23A is a cross-sectional view of a micro LED display panel along the AA’ line in FIG. 21, according to some embodiments of the present disclosure;
FIG. 23B is a cross-sectional view of a micro LED display panel along the BB’ line in FIG. 21, according to some embodiments of the present disclosure;
FIG. 23C is a cross-sectional view of a micro LED display panel along the CC’ line in FIG. 21, according to some embodiments of the present disclosure;
FIG. 24 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure.
FIG. 25 illustrates an example of a layout of a micro LED array with recurring micro LED units according to some embodiments of the present disclosure.
In accordance with common practice, the various features illustrated in the drawings may not be drawn to scale. Accordingly, the dimensions of the various features may be arbitrarily expanded or reduced for clarity. In addition, some of the drawings may not depict all of the components of a given system, method, or device. Finally, like reference numerals may be used to denote like features throughout the specification and figures.
DETAILED DESCRIPTIONNumerous details are described herein in order to provide a thorough understanding of the example embodiments illustrated in the accompanying drawings. However, some embodiments may be practiced without many of the specific details, and the scope of the claims is only limited by those features and aspects specifically recited in the claims. Furthermore, well-known processes, components, and materials have not been described in exhaustive detail so as not to unnecessarily obscure pertinent aspects of the embodiments described herein.
As discussed above, to resolve the problem in the related technologies, in some embodiments, a micro LED panel comprising multiple micro LED structures is disclosed in the present disclosure. Each dimension of the micro LED panel is not more than 1 cm. The micro LED structures are formed in the micro LED panel in an array, with a resolution such as 720*480, 640*480, 1920*1080, 1280*720, 2k, or 4k. The diameter of the micro LED structure is at a nano-meter level, e.g., 20 nm to 100 nm.
FIG. 1 is a cross-sectional view of a micro LED display panel 150 according to some embodiments of the present disclosure. As shown in FIG. 1, the micro LED display panel 150 includes an integrated circuit (IC) backplane 140 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S101, S102, S103, and S104) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 150.
In some embodiments, the IC backplane 140 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 140.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 110. In some embodiments, the micro mesa structure 110 may include a first type epitaxial layer 111, a light emitting layer 112, and a second type epitaxial layer 113, from bottom up. That is, among the three layers, the first type epitaxial layer 111 is closest to the IC backplane 140; the light emitting layer 112 is on top of the first type epitaxial layer 111 and is further away from the IC backplane 140; the second type epitaxial layer 113 is on top of the light emitting layer 112 and is the furthest away from the IC backplane 140.
In some embodiments, at least one sidewall of the micro mesa structure 110 does not pass through or partition the light emitting layer 112. That is, the light emitting layer 112 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 112 of the micro LED structures S101 and S102 is continuous and not partitioned by the sidewall between the micro LED structures S101 and S102. Similarly, the light emitting layer 112 of the micro LED structures S103 and S104 is continuous and not partitioned by the sidewall between the micro LED structures S103 and S104. In some embodiments, at least one sidewall of the micro mesa structure 110 passes through the light emitting layer 112. For example, the sidewall between the micro LED structures S102 and S103 passes through and partitions the light emitting layer 112.
In some embodiments, the micro LED array of the micro LED display panel 150 may include micro LED units 155 and 156. The micro LED unit 155 may include the micro LED structures S101 and S102. The micro LED structure S101 and the micro LED structure S102 may share the same light emitting layer 112, the same first type epitaxial layer 111, and the same second type epitaxial layer 113. The light emitting layer 112 may be continuously formed in the micro LED unit 155.
In some embodiments, the first type epitaxial layer 111 in the micro LED unit 155 may include a trench T101 formed at the bottom of the first type epitaxial layer 111 to form bottom extrusions 160 and 161. In some embodiments, the trench T101 does not pass through or partition the first type epitaxial layer 111, thus leaving a continuous top of the first type epitaxial layer 111.
In some embodiments, the bottom extrusion 160 extrudes downward from the continuous top of the first type epitaxial layer 111 and belongs to the micro LED structure S101; the bottom extrusion 161 extrudes downward from the continuous top of the first type epitaxial layer 111 and belongs to the micro LED structure S102.
In some embodiments, the second type epitaxial layer 113 in each micro LED unit (e.g., the micro LED unit 155) may include a trench T102 formed at the top of the second type epitaxial layer 113 to form top extrusions 165 and 166. The trench T102 does not pass through or partition the second type epitaxial layer 113, thus leaving a continuous bottom of the second type epitaxial layer 113.
In some embodiments, the top extrusion 165 extrudes upward from the continuous bottom of the second type epitaxial layer 113 and belongs to the micro LED structure S101; the top extrusion 166 extrudes upward from the continuous bottom of the second type epitaxial layer 113 and belongs to the micro LED structure S102.
Similarly, the micro LED unit 156 may include the micro LED structures S103 and S104. The micro LED structure S103 and the micro LED structure S104 may share the same light emitting layer 112, the same first type epitaxial layer 111, and the same second type epitaxial layer 113. The light emitting layer 112 may be continuously formed in the micro LED unit 156.
In some embodiments, the first type epitaxial layer 111 in the micro LED unit 156 may include a trench formed at the bottom of the first type epitaxial layer 111 to form bottom extrusions 162 and 163. In some embodiments, the trench does not pass through or partition the first type epitaxial layer 111, thus leaving a continuous top of the first type epitaxial layer 111.
In some embodiments, the bottom extrusion 162 extrudes downward from the continuous top of the first type epitaxial layer 111 and belongs to the micro LED structure S103; the bottom extrusion 163 extrudes downward from the continuous top of the first type epitaxial layer 111 and belongs to the micro LED structure S104.
In some embodiments, a bottom conductive layer 134 may be formed at the bottom of each of the bottom extrusions 160, 161, 162, 163. In some embodiments, a bottom reflective layer 135 may at least be formed at the bottom of the bottom conductive layer 134 and the bottom reflective layer 135 may be electrically conductive.
In some embodiments, the second type epitaxial layer 113 in the micro LED unit 156 may include a trench formed at the top of the second type epitaxial layer 113 to form top extrusions 167 and 168. The trench does not pass through or partition the second type epitaxial layer 113, thus leaving a continuous bottom of the second type epitaxial layer 113.
In some embodiments, the top extrusion 167 extrudes upward from the continuous bottom of the second type epitaxial layer 113 and belongs to the micro LED structure S103; the top extrusion 168 extrudes upward from the continuous bottom of the second type epitaxial layer 113 and belongs to the micro LED structure S104.
In some embodiments, the sidewall of the micro LED unit passes through or partitions the light emitting layer 112. For example, the sidewall between the micro LED units 155 and 156 (i.e., the sidewall between the micro LED structures S102 and S103) passes through or partitions the light emitting layer 112.
In some embodiments, the second type epitaxial layer 113 may further include an extending part 115 extending along horizontal direction (i.e., a direction parallel to the IC backplane 140) and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 113 that is not the extending part 115 may be referred to as the main second type epitaxial layer 114.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 110. For example, barrier layers 121 and 122 are formed on the sidewalls of the micro mesa structure 110 of the micro LED structure S104.
In some embodiments, each micro LED unit 155 or 156 may further include a top transparent dielectric layer 132 covering on the entire top surface of the second type epitaxial layer 113. In some embodiments, a dielectric layer 131 may be formed in the gap between the micro LEDs. In some embodiments, the dielectric layer 131 may be filled into the trench T101. In some embodiments, the dielectric layer 131 may fill in the space between the bottom surface of each micro LED unit 155 or 156 and the top surface of the IC backplane 140.
In some embodiments, a barrier layer 121 may be formed on the top inner surface and the sidewall of a trench formed at the bottom of the first type epitaxial layer 111 (e.g., the trench T101) .
In some embodiments, a barrier layer 122 may be formed on the bottom surface and the sidewall of a trench formed at the top of the second type epitaxial layer 113 (e.g., the trench T102) . In some embodiments, the top transparent dielectric layer 132 may be filled into a trench formed at the top of the second type epitaxial layer 113 (e.g., the trench T102) and formed on the barrier layer 122.
In some embodiments, the barrier layer 121 may be further formed on the sidewall of the micro LED units 155 and 156. In some embodiments, the barrier layer 121 may further include openings. In some embodiments, the micro LED unit (e.g., 155 or 156) may further include contact structures 138 formed in the openings and on the bottom surfaces of the extending parts 115.
In some embodiments, a second reflective layer 137 may be formed on the sidewall where the barrier layer 121 is also formed and may contact to the contact structures 138. The second reflective layer 137 is not connected with the bottom reflective layer 135. In some embodiments, the second reflective layer 137 may be electrically conductive.
In some embodiments, the second reflective layer 137 may be electrically connected with the IC backplane 140 by a metal via 125. In some embodiments, the edge of the second reflective layer 137 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 140) .
In some embodiments, the IC backplane 140 may include a first top pad array. The first top pad array may include multiple first top pads 141. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of the bottom extrusions 160, 161, 162, 163. The bonding structure array may include multiple bonding structures 136. In some embodiments, each bonding structure 136 may be formed at the bottom of the bottom reflective layer 135 corresponding to each micro LED structure (e.g., S101, S102, S103, S104) , respectively. Each bonding structure 136 may be correspondingly bonded with each first top pad 141 of the IC backplane 140, respectively.
In some embodiments, the IC backplane 140 may further include a second top pad 143. In some embodiments, a bottom pad 126 may be formed at the bottom of the metal via 125. The bottom pad 126 is bonded with the second top pad 143.
In some embodiments, the first type epitaxial layer 111 is a p-type semiconductor layer and the second type epitaxial layer 113 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 111 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 113 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 111 is an n-type semiconductor layer and the second type epitaxial layer 113 is a p-type semiconductor layer. In some embodiments, the light emitting layer 112 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 2 is a bottom view of a micro LED display panel 200 according to some embodiments of the present disclosure. Please note that FIG. 2 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 2 may not be visible to the naked eye. In some embodiments, the micro LED display panel 200 in FIG. 2 is the micro LED display panel 150 described above with reference to FIG. 1.
As shown in FIG. 2, the micro LED display panel 200 includes an IC backplane 140 and a micro LED array on top of the IC backplane 140. The micro LED array may include multiple micro LED structures S101, S102, S103, S104, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 200.
In some embodiments, the micro LED array of the micro LED display panel 200 may include multiple micro LED units, each of which may contain multiple micro LED structures. For example, the micro LED structures S101 and S102 may form one micro LED unit and the micro LED structures S103 and S104 may form another micro LED unit. As shown in FIG. 2, the top or bottom outline of the micro LED unit is a rectangle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, triangle, or circle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure 110. In some embodiments, the micro mesa structure 110 of two adjacent micro LED structures may be partitioned by a trench formed at the bottom of the micro mesa structure 110. In some embodiments, a barrier layer 121 may be formed on the top inner surface and the sidewall of the trench.
In some embodiments, the barrier layer 121 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 121 may further include openings between adjacent micro LED units. In some embodiments, the micro LED units may further include the contact structures 138 formed in the openings.
In some embodiments, a second reflective layer 137 may be formed on the sidewall where the barrier layer 121 is also formed and may contact to the contact structures 138. In some embodiments, the second reflective layer 137 may be electrically conductive.
In some embodiments, the second reflective layer 137 may be electrically connected with the IC backplane 140 by a metal via 125. In some embodiments, the edge of the second reflective layer 137 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 140) . In some embodiments, a bottom pad 126 may be formed at the bottom of the metal via 125.
In some embodiments, the top outline of the micro LED array area is smaller than the top outline of the IC backplane 140; and the bottom outline of the micro LED array area is smaller than the bottom outline of the IC backplane 140.
FIG. 3 is a bottom view of a micro LED display panel 310 according to some other embodiments of the present disclosure. Please note that FIG. 3 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 3 may not be visible to the naked eye. In some embodiments, the micro LED display panel 310 in FIG. 3 is the micro LED display panel 150 described above with reference to FIG. 1.
As shown in FIG. 3, the micro LED display panel 310 includes an IC backplane 140 and a micro LED array on top of the IC backplane 140. The micro LED array may include multiple micro LED structures S101, S102, S103, S104, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 310.
In some embodiments, the micro LED array of the micro LED display panel 310 may include multiple micro LED units, each of which may contain multiple micro LED structures. For example, the micro LED structures S101 and S102 may form one micro LED unit and the micro LED structures S103 and S104 may form another micro LED unit. As shown in FIG. 3, the top or bottom outline of the micro LED unit is a circle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, triangle, or rectangle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure 110. In some embodiments, the micro mesa structure 110 of two adjacent micro LED structures may be partitioned by a trench formed at the bottom of the micro mesa structure 110. In some embodiments, a barrier layer 121 may be formed on the top inner surface and the sidewall of the trench.
In some embodiments, the barrier layer 121 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 121 may further include openings between adjacent micro LED units. In some embodiments, the micro LED units may further include the contact structures 138 formed in the openings.
In some embodiments, a second reflective layer 137 may be formed on the sidewall where the barrier layer 121 is also formed and may contact to the contact structures 138. In some embodiments, the second reflective layer 137 may be electrically conductive.
In some embodiments, the second reflective layer 137 may be electrically connected with the IC backplane 140 by a metal via 125. In some embodiments, the edge of the second reflective layer 137 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 140) . In some embodiments, a bottom pad 126 may be formed at the bottom of the metal via 125.
In some embodiments, the top outline of the micro LED array area is smaller than the top outline of the IC backplane 140; and the bottom outline of the micro LED array area is smaller than the bottom outline of the IC backplane 140.
FIG. 4 is a bottom view of a micro LED display panel 410 according to some other embodiments of the present disclosure. Please note that FIG. 4 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 4 may not be visible to the naked eye. In some embodiments, the micro LED display panel 410 in FIG. 4 is the micro LED display panel 150 described above with reference to FIG. 1.
As shown in FIG. 4, the micro LED display panel 410 includes an IC backplane 140 and a micro LED array on top of the IC backplane 140. The micro LED array may include multiple micro LED structures S101, S102, S103, S104, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 410.
In some embodiments, the micro LED array of the micro LED display panel 410 may include multiple micro LED units, each of which may contain multiple micro LED structures. For example, the micro LED structures S101 and S102 may form one micro LED unit and the micro LED structures S103 and S104 may form another micro LED unit. As shown in FIG. 4, the top or bottom outline of the micro LED unit is a triangle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, circle, or rectangle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure 110. In some embodiments, the micro mesa structure 110 of two adjacent micro LED structures may be partitioned by a trench formed at the bottom of the micro mesa structure 110. In some embodiments, a barrier layer 121 may be formed on the top inner surface and the sidewall of the trench.
In some embodiments, the barrier layer 121 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 121 may further include openings between adjacent micro LED units. In some embodiments, the micro LED units may further include the contact structures 138 formed in the openings.
In some embodiments, a second reflective layer 137 may be formed on the sidewall where the barrier layer 121 is also formed and may contact to the contact structures 138. In some embodiments, the second reflective layer 137 may be electrically conductive.
In some embodiments, the second reflective layer 137 may be electrically connected with the IC backplane 140 by a metal via 125. In some embodiments, the edge of the second reflective layer 137 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 140) . In some embodiments, a bottom pad 126 may be formed at the bottom of the metal via 125.
In some embodiments, the top outline of the micro LED array area is smaller than the top outline of the IC backplane 140; and the bottom outline of the micro LED array area is smaller than the bottom outline of the IC backplane 140.
FIG. 5 illustrates an example of a layout of a micro LED array 530 with recurring micro LED units 520 according to some embodiments of the present disclosure. In this example, the micro LED array 530 may be the micro LED array described above with reference to any of FIGs. 1 through 4. Similarly, the micro LED unit 520 may be the micro LED unit described above with reference to any of FIGs. 1 through 4; and the micro LED structure 510 may be the micro LED structure described above with reference to any of FIGs. 1 through 4.
In some embodiments, the micro LED structure 510 may have four sidewalls 511, 512, 513, and 514. In some embodiments, the sidewall 512 does not pass through or partition the light emitting layer, and the sidewalls 511, 513, and 514 may pass through or partition the light emitting layer.
In some embodiments, the micro LED unit 520 may include micro LED structures S501 and S502, each of which may be a micro LED structure 510 described above. In some embodiments, the shared sidewall 522 of the micro LED structures S501 and S502 does not pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures may pass through or partition the light emitting layer.
In some embodiments, the micro LED array 530 may include micro LED units 531, 532, 533, and 534, each of which may be a micro LED unit 520 described above. As shown in FIG. 5, the micro LED array 530 is formed by recurringly or repeatedly placing micro LED units 520 in a plane that is substantially parallel to the IC backplane.
FIG. 6 is a cross-sectional view of a micro LED display panel 650 according to some embodiments of the present disclosure. As shown in FIG. 6, the micro LED display panel 650 includes an integrated circuit (IC) backplane 640 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S601, S602, S603, S604) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 650. In some embodiments, the micro LED display panel 650 may be the micro LED display panel 750 described below with reference to FIG. 7. In some embodiments, the micro LED array in FIG. 6 may be the micro LED array 530 described above with reference to FIG. 5.
In some embodiments, the IC backplane 640 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 640.
In some embodiments, the IC backplane 640 may include a first top pad array and a second top pad 643 outside of the first top pad array. The first top pad array and the second top pad 643 are formed on the top surface of the IC backplane 640. The first top pad array includes an array of first top pads 641.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 610. In some embodiments, the micro mesa structure 610 may include a first type epitaxial layer 611, a light emitting layer 612, and a second type epitaxial layer 613, from bottom up. That is, among the three layers, the first type epitaxial layer 611 is closest to the IC backplane 640; the light emitting layer 612 is formed on top of the first type epitaxial layer 611 and is further away from the IC backplane 640; the second type epitaxial layer 613 is formed on top of the light emitting layer 612 and is the furthest away from the IC backplane 640.
In some embodiments, the first type epitaxial layer 611 may be formed on the IC backplane 640. In some embodiments, the bottom of the first type epitaxial layer 611 for each micro LED structure may be formed on each first top pad 641 of the first top pad array, respectively.
In some embodiments, the first type epitaxial layer 611 may include a trench T601 formed at the bottom of the first type epitaxial layer 611 to form bottom extrusions 670 and 671 in the first type epitaxial layer 611. The trench T601 is formed between the bottom extrusion 670 and the bottom extrusion 671. In some embodiments, the trench T601 does not pass through or partition the first type epitaxial layer 611, thus leaving a continuous top of the first type epitaxial layer 611. In some embodiments, the top of the trench T601 may be lower than the bottom of the light emitting layer 612. In some embodiments, the bottom extrusions 670 and 671 may be formed correspondingly on two first top pads 641 of the first top pad array, respectively.
In some embodiments, a top transparent conductive layer 645 may be continuously formed on the top of the entire micro LED array. In some embodiments, a dielectric layer 631 may be formed in the gap between the micro LEDs. In some embodiments, the dielectric layer 631 may be filled into a trench (e.g., T601 or T602) .
In some embodiments, a metal via 625 may be formed in the dielectric layer 631 and outside of the edge of the micro LED array area. In some embodiments, the IC backplane 640 may include a second top pad 643. In some embodiments, a bottom pad 626 may be formed at the bottom of the metal via 625. The bottom pad 626 is bonded with the second top pad 643. In some embodiments, the bottom of the metal via 625 may be electrically connected with the second top pad 643 of the IC backplane 640. In some embodiments, the edge of the top transparent conductive layer 645 may extend down to the top of the dielectric layer 631 and on the top of the metal via 625. In some embodiments, the top conductive layer 645 may be electrically connected with the metal via 625.
In some embodiments, the micro LED array of the micro LED display panel 650 may include the micro LED units 655 and 656. The micro LED unit 655 may include the micro LED structures S601 and S602. The micro LED structures S601 and S602 may share the same light emitting layer 612, the same first type epitaxial layer 611, and the same second type epitaxial layer 613. The light emitting layer 612 may be continuously formed in the micro LED unit 655.
Similarly, the micro LED unit 656 may include the micro LED structures S603 and S604. The micro LED structures S603 and S604 may share the same light emitting layer 612, the same first type epitaxial layer 611, and the same second type epitaxial layer 613. The light emitting layer 612 may be continuously formed in the micro LED unit 656.
In some embodiments, the sidewall of the micro LED unit passes through or partitions the light emitting layer 612. For example, the sidewall between the micro LED units 655 and 656 (i.e., the sidewall between the micro LED structures S602 and S603) passes through or partitions the light emitting layer 612.
In some embodiments, a barrier layer 621 may be formed on the sidewall of the micro LED unit (e.g., the micro LED units 655 and 656) and on the inner surface of the trench T601.
In some embodiments, the second type epitaxial layer 613 in each micro LED unit (e.g., the micro LED unit 655) may include a trench T602 formed at the top of the second type epitaxial layer 613 to form top extrusions 672 and 673. In some embodiments, the bottom of the trench T602 may be higher than the top of the light emitting layer 612. In some embodiments, the trench T602 does not pass through or partition the second type epitaxial layer 613, thus leaving a continuous bottom of the second type epitaxial layer 613. In some embodiments, the trench T602 may correspond to the trench T601.
In some embodiments, a barrier layer 622 may be formed on the inner surface of the trench T602. In some embodiments, the dielectric layer 631 may be filled into the trench T602.
In some embodiments, the second type epitaxial layer 613 may further include an extending part 615 extending along horizontal direction (i.e., a direction parallel to the IC backplane 640) and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 613 that is not the extending part 615 may be referred to as the main second type epitaxial layer 614.
In some embodiments, a bottom conductive layer 634 may be formed at the bottom of each of the bottom extrusions (e.g., the bottom extrusions 670 and 671) . In some embodiments, a bottom reflective layer 635 may at least be formed at the bottom of the bottom conductive layer 634 and the bottom reflective layer 635 may be electrically conductive.
In some embodiments, a second reflective layer 637 may be formed on the sidewall where the barrier layer 621 is also formed. In some embodiments, the second reflective layer 637 may be connected with the bottom reflective layer 635.
In some embodiments, each micro LED unit may include a bonding structure array formed at the bottom of the first type epitaxial layer 611. The bonding structure array may include multiple bonding structures 636. In some embodiments, each bonding structure 636 may be formed at the bottom of the bottom reflective layer 635 corresponding to each bottom extrusion (e.g., bottom extrusion 670 or 671) , respectively. Each bonding structure 636 may be correspondingly bonded with each first top pad 641 of the IC backplane 640, respectively.
In some embodiments, at least one sidewall of the micro mesa structure 610 does not pass through or partition the light emitting layer 612. That is, the light emitting layer 612 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 612 of the micro LED structures S601 and S602 is continuous and not partitioned by the sidewall between the micro LED structures S601 and S602. Similarly, the light emitting layer 612 of the micro LED structures S603 and S604 is continuous and not partitioned by the sidewall between the micro LED structures S603 and S604. In some embodiments, at least one sidewall of the micro mesa structure 610 passes through the light emitting layer 612. For example, the sidewall between the micro LED structures S602 and S603 passes through and partitions the light emitting layer 612. In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 612 to the number of sidewalls passing through or partitioning the light emitting layer 612 is 1: 3.
In some embodiments, the bottom extrusion 670 extrudes downward from the continuous top of the first type epitaxial layer 611 and belongs to the micro LED structure S601; the bottom extrusion 671 extrudes downward from the continuous top of the first type epitaxial layer 611 and belongs to the micro LED structure S602. In some embodiments, the top extrusion 672 extrudes upward from the continuous bottom of the second type epitaxial layer 613 and belongs to the micro LED structure S601; the top extrusion 673 extrudes upward from the continuous bottom of the second type epitaxial layer 613 and belongs to the micro LED structure S602.
In some embodiments, the first type epitaxial layer 611 is a p-type semiconductor layer and the second type epitaxial layer 613 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 611 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 613 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 611 is an n-type semiconductor layer and the second type epitaxial layer 613 is a p-type semiconductor layer. In some embodiments, the light emitting layer 612 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 7 is a bottom view of a micro LED display panel 750 according to some embodiments of the present disclosure. Please note that FIG. 7 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 7 may not be visible to the naked eye. In some embodiments, the micro LED display panel 750 in FIG. 7 is the micro LED display panel 650 described above with reference to FIG. 6.
As shown in FIG. 7, the micro LED display panel 750 includes an IC backplane 640 and a micro LED array on top of the IC backplane 640. The micro LED array may include multiple micro LED structures S601, S602, S603, S604, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 750. In some embodiments, the micro LED array in FIG. 7 may be the micro LED array 530 described above with reference to FIG. 5.
In some embodiments, the micro LED array of the micro LED display panel 750 may include multiple micro LED units, each of which may contain multiple micro LED structures. For example, the micro LED structures S601 and S602 may form one micro LED unit and the micro LED structures S603 and S604 may form another micro LED unit. As shown in FIG. 7, the top or bottom outline of the micro LED unit is a rectangle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, triangle, or circle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure 610. In some embodiments, the micro mesa structure 610 of two adjacent micro LED structures may be partitioned by a trench formed at the bottom of the micro mesa structure 610. In some embodiments, a barrier layer 621 may be formed on the inner surface of the trench.
In some embodiments, the barrier layer 621 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 621 may be further formed on top of the sidewalls of the micro LED units. In some embodiments, the barrier layer 621 may be formed between adjacent micro LED units.
In some embodiments, a second reflective layer 637 may be formed on the sidewall where the barrier layer 621 is also formed. In some embodiments, the second reflective layer 637 may be electrically conductive.
In some embodiments, a bottom pad 626 may be formed at the bottom of the metal via 625. In some embodiments, the metal via 625 may be formed outside of the edge of the micro LED array area 755.
In some embodiments, the top outline of the micro LED array area 755 is smaller than the top outline of the IC backplane 640; and the bottom outline of the micro LED array area 755 is smaller than the bottom outline of the IC backplane 640.
In some embodiments, as shown in FIG. 7, the micro LED unit may be arranged recurringly or repeatedly in a plane substantially parallel to the IC backplane 640 to form the micro LED array.
FIG. 8 illustrates an example of a layout of a micro LED array 830 with recurring micro LED units 820 according to some embodiments of the present disclosure. In this example, the micro LED array 830 may be the micro LED array described below with reference to any of FIGs. 9 through 12. Similarly, the micro LED unit 820 may be the micro LED unit described below with reference to any of FIGs. 9 through 12; and the micro LED structure 810 may be the micro LED structure described below with reference to any of FIGs. 9 through 12.
In some embodiments, the micro LED structure 810 may have four sidewalls 811, 812, 813, and 814. In some embodiments, the sidewalls 812 and 813 do not pass through or partition the light emitting layer, and the sidewalls 811 and 814 may pass through or partition the light emitting layer.
In some embodiments, the micro LED unit 820 may include micro LED structures S801, S802, S803, and S804, each of which may be a micro LED structure 810 described above. In some embodiments, the micro LED structures S801 through S804 may share the same first type epitaxial layer, the same light emitting layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 820.
In some embodiments, the shared sidewalls 822, 823, 824, and 825 of the micro LED structures S801 through S804 do not pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures may pass through or partition the light emitting layer.
In some embodiments, the micro LED array 830 may include micro LED units 831, 832, 833, and 834, each of which may be a micro LED unit 820 described above. As shown in FIG. 8, the micro LED array 830 is formed by recurringly or repeatedly placing micro LED units 820 in a plane that is substantially parallel to the IC backplane.
FIG. 9 is a bottom view of a micro LED display panel 950 according to some embodiments of the present disclosure. Please note that FIG. 9 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 9 may not be visible to the naked eye. In some embodiments, the micro LED display panel 950 in FIG. 9 is the micro LED display panel 1050 described below with reference to FIG. 10.
As shown in FIG. 9, the micro LED display panel 950 includes an IC backplane 940 and a micro LED array on top of the IC backplane 940. The micro LED array may include multiple micro LED structures S901, S902, S903, S904, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 950. In some embodiments, the micro LED array in FIG. 9 may be the micro LED array 830 described above with reference to FIG. 8.
In some embodiments, the micro LED array of the micro LED display panel 950 may include multiple micro LED units, each of which may contain multiple (e.g., four) micro LED structures. For example, the micro LED structures S901 through S904 may form one micro LED unit, which is only one of many (e.g., 12) micro LED units in the micro LED array. As shown in FIG. 9, the top or bottom outline of the micro LED unit is a square. In some embodiments, the top or bottom outline of each micro LED unit may be a rectangle, triangle, or circle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be a quarter of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure. In some embodiments, the micro mesa structure may include a first type epitaxial layer 911, a light emitting layer, and a second type epitaxial layer, from bottom up.
In some embodiments, the micro mesa structures of the micro LED structures in the same micro LED unit may be partitioned by trenches T901 and T902 formed in the first type epitaxial layer 911. The trenches T901 and T902 may be perpendicularly crossed to form four bottom extrusions in the first type epitaxial layer 911. In some embodiments, the trenches T901 and T902 do not pass through or partition the first type epitaxial layer 911 to leave a continuous top of the first type epitaxial layer 911. In some embodiments, a barrier layer 921 may be formed on the top inner surface and the sidewall of the trenches T901 and T902.
In some embodiments, each of the four bottom extrusions may extrude downward from the continuous top of the first type epitaxial layer 911. The trench T901 may be formed between a first bottom extrusion of the four bottom extrusions and a second bottom extrusion of the four bottom extrusions, also between a third bottom extrusion of the four bottom extrusions and a fourth bottom extrusion of the four bottom extrusions. The trench T902 may be formed between the first bottom extrusion and the third bottom extrusion, also between the second bottom extrusion and the fourth bottom extrusion. The first bottom extrusion may be formed in a first micro LED structure (e.g., the micro LED structure S901) of the micro LED unit; the second bottom extrusion may be formed in a second micro LED structure (e.g., the micro LED structure S902) of the micro LED unit; the third bottom extrusion may be formed in a third micro LED structure (e.g., the micro LED structure S903) of the micro LED unit; and the fourth bottom extrusion may be formed in a fourth micro LED structure (e.g., the micro LED structure S904) of the micro LED unit.
In some embodiments, the micro mesa structures of the micro LED structures in the same micro LED unit may be partitioned by trenches T903 and T904 formed in the second type epitaxial layer 103. The trenches T903 and T904 may be perpendicularly crossed to form four top extrusions in the second type epitaxial layer 103. In some embodiments, the trenches T903 and T904 do not pass through or partition the second type epitaxial layer 103 to leave a continuous bottom of the second type epitaxial layer 103.
In some embodiments, each of the four top extrusions may extrude upward from the continuous bottom of the second type epitaxial layer. The trench T903 may be formed between a first top extrusion of the four top extrusions and a second top extrusion of the four top extrusions, also between a third top extrusion of the four top extrusions and a fourth top extrusion of the four top extrusions. The trench T904 may be formed between the first top extrusion and the third top extrusion, also between the second top extrusion and the fourth top extrusion. The first top extrusion may be formed in a first micro LED structure (e.g., the micro LED structure S901) of the micro LED unit; the second top extrusion may be formed in a second micro LED structure (e.g., the micro LED structure S902) of the micro LED unit; the third top extrusion may be formed in a third micro LED structure (e.g., the micro LED structure S903) of the micro LED unit; and the fourth top extrusion may be formed in a fourth micro LED structure (e.g., the micro LED structure S904) of the micro LED unit.
In some embodiments, the barrier layer 921 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 921 may be further formed on top of the sidewalls of the micro LED units. In some embodiments, the barrier layer 921 may further include openings between adjacent micro LED units. In some embodiments, the micro LED units may further include the contact structures 938 formed in the openings.
In some embodiments, a second reflective layer 937 may be formed on the sidewall where the barrier layer 921 is also formed and may contact to the contact structures 938. In some embodiments, the second reflective layer 937 may be electrically conductive.
In some embodiments, the second reflective layer 937 may be electrically connected with the IC backplane 940 by a metal via 925. In some embodiments, the edge of the second reflective layer 937 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 940) to the top surface of the metal via 925. In some embodiments, a bottom pad 926 may be formed at the bottom of the metal via 925.
In some embodiments, the top outline of the micro LED array area is smaller than the top outline of the IC backplane 940; and the bottom outline of the micro LED array area is smaller than the bottom outline of the IC backplane 940. In some embodiments, as shown in FIG. 9, the micro LED unit may be arranged recurringly or repeatedly in a plane substantially parallel to the IC backplane 940 to form the micro LED array.
FIG. 10 is a cross-sectional view of a micro LED display panel 1050 according to some embodiments of the present disclosure. As shown in FIG. 10, the micro LED display panel 1050 includes an IC backplane 940 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S901 and S902) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1050. In some embodiments, the micro LED display panel 1050 in FIG. 10 is the micro LED display panel 950 described above with reference to FIG. 9. In some embodiments, the micro LED array in FIG. 10 may be the micro LED array 830 described above with reference to FIG. 8.
In some embodiments, the IC backplane 940 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 940.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1010. In some embodiments, the micro mesa structure 1010 may include a first type epitaxial layer 911, a light emitting layer 1012, and a second type epitaxial layer 1013, from bottom up. That is, among the three layers, the first type epitaxial layer 911 is closest to the IC backplane 940; the light emitting layer 1012 is on top of the first type epitaxial layer 911 and is further away from the IC backplane 940; the second type epitaxial layer 1013 is on top of the light emitting layer 1012 and is the furthest away from the IC backplane 940.
In some embodiments, at least one sidewall of the micro mesa structure 1010 does not pass through or partition the light emitting layer 1012. That is, the light emitting layer 1012 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 1012 of the micro LED structures S901 and S902 is continuous and not partitioned by the sidewall between the micro LED structures S901 and S902. In some embodiments, at least one sidewall of the micro mesa structure 1010 passes through the light emitting layer 1012. In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 1012 to the number of sidewalls passing through or partitioning the light emitting layer 1012 is 1: 1.
In some embodiments, the micro LED array of the micro LED display panel 1050 may include multiple micro LED units (e.g., the micro LED units 1055 and 1056) . The micro LED unit 1055 may include the micro LED structures S901 and S902. The micro LED structure S901 and the micro LED structure S902 may share the same light emitting layer 1012, the same first type epitaxial layer 911, and the same second type epitaxial layer 1013. The light emitting layer 1012 may be continuously formed in the micro LED unit 1055.
In some embodiments, the first type epitaxial layer 911 in a micro LED unit (e.g., the micro LED unit 1055) may include a trench T901 formed at the bottom of the first type epitaxial layer 911. In some embodiments, the trench T901 does not pass through or partition the first type epitaxial layer 911, thus leaving a continuous top of the first type epitaxial layer 911.
In some embodiments, the second type epitaxial layer 1013 in each micro LED unit (e.g., the micro LED unit 1055) may include a trench T903 formed at the top of the second type epitaxial layer 1013. In some embodiments, the trench T903 may be parallel to or corresponding to the trench T901. The trench T903 does not pass through or partition the second type epitaxial layer 1013, thus leaving a continuous bottom of the second type epitaxial layer 1013.
In some embodiments, a bottom conductive layer 1034 may be formed at the bottom of each of the bottom extrusions described above with reference to FIG. 9. In some embodiments, a bottom reflective layer 1035 may at least be formed at the bottom of the bottom conductive layer 1034 and the bottom reflective layer 1035 may be electrically conductive.
In some embodiments, the sidewall of the micro LED unit passes through or partitions the light emitting layer 1012. For example, the sidewall between the micro LED units 1055 and 1056 passes through or partitions the light emitting layer 1012.
In some embodiments, the second type epitaxial layer 1013 may further include an extending part 1015 extending along horizontal direction (i.e., a direction parallel to the IC backplane 940) and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 1013 that is not the extending part 1015 may be referred to as the main second type epitaxial layer 1014.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 1010. For example, barrier layers 921 and 1022 may be formed on the sidewalls of the micro mesa structure 1010 of the micro LED unit 1056.
In some embodiments, each micro LED unit (e.g., the micro LED unit 1055 or 1056) may further include a top transparent dielectric layer 1032 covering on the entire top surface of the second type epitaxial layer 1013. In some embodiments, the top surface of the top transparent dielectric layer 1032 does not have any electrical conductive layers.
In some embodiments, a dielectric layer 1031 may be formed in the gap between the micro LED units. In some embodiments, the dielectric layer 1031 may be filled into the trenches formed at the bottom of the first type epitaxial layer 911 (e.g., the trench T901) .
In some embodiments, a barrier layer 921 may be formed on the top inner surface and the sidewall of a trench formed at the bottom of the first type epitaxial layer 911 (e.g., the trench T901) . In some embodiments, a barrier layer 1022 may be formed on the bottom surface and the sidewall of a trench formed at the top of the second type epitaxial layer 1013 (e.g., the trench T903) . In some embodiments, the top transparent dielectric layer 1032 may be filled into a trench formed at the top of the second type epitaxial layer 1013 (e.g., the trench T903) and formed on the barrier layer 1022.
In some embodiments, the barrier layer 921 may be further formed on the sidewall of the micro LED units 1055 and 1056. In some embodiments, the barrier layer 921 may further include openings. In some embodiments, the micro LED unit (e.g., 1055 or 1056) may further include contact structures 938 formed in the openings and on the bottom surfaces of the extending parts 1015.
In some embodiments, a second reflective layer 937 may be formed on the sidewall where the barrier layer 921 is also formed. The second reflective layer 937 may be formed on the bottom of the contact structures 938 and contact the contact structures 938. In some embodiments, the second reflective layer 937 is not connected with the bottom reflective layer 1035.
In some embodiments, the second reflective layer 937 may be electrically conductive.
In some embodiments, the second reflective layer 937 may be electrically connected with the IC backplane 940 by a metal via 925. In some embodiments, the edge of the second reflective layer 937 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 940) .
In some embodiments, the IC backplane 940 may include a first top pad array. The first top pad array may include multiple first top pads 1041. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of the bottom extrusions. The bonding structure array may include multiple bonding structures 1036. In some embodiments, each bonding structure 1036 may be formed at the bottom of the bottom reflective layer 1035 corresponding to each micro LED structure (e.g., S901, S902) , respectively. Each bonding structure 1036 may be correspondingly bonded with each first top pad 1041 of the IC backplane 940, respectively.
In some embodiments, the IC backplane 940 may further include a second top pad 1043. In some embodiments, a bottom pad 926 may be formed at the bottom of the metal via 925. The bottom pad 926 may be bonded with the second top pad 1043.
In some embodiments, the first type epitaxial layer 911 is a p-type semiconductor layer and the second type epitaxial layer 1013 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 911 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1013 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 911 is an n-type semiconductor layer and the second type epitaxial layer 1013 is a p-type semiconductor layer. In some embodiments, the light emitting layer 1012 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 11 is a bottom view of a micro LED display panel 1150 according to some embodiments of the present disclosure. Please note that FIG. 11 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 11 may not be visible to the naked eye. In some embodiments, the micro LED display panel 1150 in FIG. 11 is the micro LED display panel 1250 described below with reference to FIG. 12.
As shown in FIG. 11, the micro LED display panel 1150 includes an IC backplane 1140 and a micro LED array on top of the IC backplane 1140. The micro LED array may include multiple micro LED structures S1101, S1102, S1103, S1104, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1150. In some embodiments, the micro LED array in FIG. 11 may be the micro LED array 830 described above with reference to FIG. 8.
In some embodiments, the micro LED array of the micro LED display panel 1150 may include multiple micro LED units, each of which may contain multiple (e.g., four) micro LED structures. For example, the micro LED structures S1101 through S1104 may form one micro LED unit. As shown in FIG. 11, the top or bottom outline of the micro LED unit is a rectangle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, triangle, or circle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be a quarter of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure. In some embodiments, the micro mesa structure 100 may include a first type epitaxial layer 1111, a light emitting layer, and a second type epitaxial layer, from bottom up.
In some embodiments, the micro mesa structures of the micro LED structures in the same micro LED unit may be partitioned by trenches T1101 and T1102 formed in the first type epitaxial layer 1111. The trenches T1101 and T1102 may be perpendicularly crossed to form four bottom extrusions in the first type epitaxial layer 1111. In some embodiments, the trenches T1101 and T1102 do not pass through or partition the first type epitaxial layer 1111 to leave a continuous top of the first type epitaxial layer 1111. In some embodiments, a barrier layer 1121 may be formed on the inner surface of the trenches T1101 and T1102.
In some embodiments, each of the four bottom extrusions may extrude downward from the continuous top of the first type epitaxial layer 1111. The trench T1101 may be formed between a first bottom extrusion of the four bottom extrusions and a second bottom extrusion of the four bottom extrusions, also between a third bottom extrusion of the four bottom extrusions and a fourth bottom extrusion of the four bottom extrusions. The trench T1102 may be formed between the first bottom extrusion and the third bottom extrusion, also between the second bottom extrusion and the fourth bottom extrusion. The first bottom extrusion may be formed in a first micro LED structure (e.g., the micro LED structure S1101) of the micro LED unit; the second bottom extrusion may be formed in a second micro LED structure (e.g., the micro LED structure S1102) of the micro LED unit; the third bottom extrusion may be formed in a third micro LED structure (e.g., the micro LED structure S1103) of the micro LED unit; and the fourth bottom extrusion may be formed in a fourth micro LED structure (e.g., the micro LED structure S1104) of the micro LED unit.
In some embodiments, the micro mesa structures of the micro LED structures in the same micro LED unit may be partitioned by trenches T1103 and T1104 formed in the second type epitaxial layer 103. The trenches T1103 and T1104 may be perpendicularly crossed to form four top extrusions in the second type epitaxial layer. In some embodiments, the trenches T1103 and T1104 do not pass through or partition the second type epitaxial layer to leave a continuous bottom of the second type epitaxial layer.
In some embodiments, each of the four top extrusions may extrude upward from the continuous bottom of the second type epitaxial layer. The trench T1103 may be formed between a first top extrusion of the four top extrusions and a second top extrusion of the four top extrusions, also between a third top extrusion of the four top extrusions and a fourth top extrusion of the four top extrusions. The trench T1104 may be formed between the first top extrusion and the third top extrusion, also between the second top extrusion and the fourth top extrusion. The first top extrusion may be formed in a first micro LED structure (e.g., the micro LED structure S1101) of the micro LED unit; the second top extrusion may be formed in a second micro LED structure (e.g., the micro LED structure S1102) of the micro LED unit; the third top extrusion may be formed in a third micro LED structure (e.g., the micro LED structure S1103) of the micro LED unit; and the fourth top extrusion may be formed in a fourth micro LED structure (e.g., the micro LED structure S1104) of the micro LED unit.
In some embodiments, the barrier layer 1121 may be further formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 1121 may be further formed on top of the sidewalls of the micro LED units. In some embodiments, the barrier layer 1121 may be formed between adjacent micro LED units.
In some embodiments, there is no contact structures formed on the bottom surfaces of the extending parts. In some embodiments, a second reflective layer 1137 may be formed on the sidewall where the barrier layer 1121 is also formed. In some embodiments, the second reflective layer 1137 may be electrically conductive.
In some embodiments, a top transparent conductive layer may be electrically connected with the IC backplane 1140 by a metal via 1125. In some embodiments, a bottom pad 1126 may be formed at the bottom of the metal via 1125. In some embodiments, the metal via 1125 may be formed outside of the edge of the micro LED array area 1155. In some embodiments, the edge of the top transparent conductive layer may extend from the edge of the micro LED array area 1155 along horizontal direction (i.e., a direction parallel to the IC backplane 1140) to the top surface of the metal via 1125.
In some embodiments, the top outline of the micro LED array area 1155 is smaller than the top outline of the IC backplane 1140; and the bottom outline of the micro LED array area 1155 is smaller than the bottom outline of the IC backplane 1140.
In some embodiments, as shown in FIG. 11, the micro LED unit may be arranged recurringly or repeatedly in a plane substantially parallel to the IC backplane 1140 to form the micro LED array.
FIG. 12 is a cross-sectional view of a micro LED display panel 1250 according to some embodiments of the present disclosure. As shown in FIG. 12, the micro LED display panel 1250 includes an integrated circuit (IC) backplane 1140 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1250. In some embodiments, the micro LED display panel 1250 may be the micro LED display panel 1150 described above with reference to FIG. 11. In some embodiments, the micro LED array in FIG. 12 may be the micro LED array 830 described above with reference to FIG. 8.
In some embodiments, the IC backplane 1140 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1140.
In some embodiments, the IC backplane 1140 may include a first top pad array and a second top pad 1243 outside of the first top pad array. The first top pad array and the second top pad 1243 are formed on the top surface of the IC backplane 1140. The first top pad array includes an array of first top pads 901.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1210. In some embodiments, the micro mesa structure 1210 may include a first type epitaxial layer 1111, a light emitting layer 1212, and a second type epitaxial layer 1213, from bottom up. That is, among the three layers, the first type epitaxial layer 1111 is closest to the IC backplane 1140; the light emitting layer 1212 is formed on top of the first type epitaxial layer 1111 and is further away from the IC backplane 1140; the second type epitaxial layer 1213 is formed on top of the light emitting layer 1212 and is the furthest away from the IC backplane 1140.
In some embodiments, the first type epitaxial layer 1111 may be formed on the IC backplane 1140. In some embodiments, the bottom of the first type epitaxial layer 1111 for each micro LED structure may be formed on each first top pad 901 of the first top pad array, respectively.
In some embodiments, in each micro LED unit, the first type epitaxial layer 1111 may include a trench T1101 formed at the bottom of the first type epitaxial layer 1111 to form bottom extrusions in the first type epitaxial layer 1111. In some embodiments, the trench T1101 does not pass through or partition the first type epitaxial layer 1111, thus leaving a continuous top of the first type epitaxial layer 1111 in the micro LED unit. In some embodiments, the top of the trench T1101 may be lower than the bottom of the light emitting layer 1212. In some embodiments, the bottom extrusions may be formed correspondingly on first top pads 901 of the first top pad array, respectively.
In some embodiments, a top transparent conductive layer 1245 may be continuously formed on the top of the entire micro LED array. In some embodiments, a dielectric layer 1231 may be formed in the gap between the micro LEDs. In some embodiments, the dielectric layer 1231 may be formed between the adjacent micro LED mesas. In some embodiments, the dielectric layer 1231 may be filled into the trench T1101. In some embodiments, the top transparent conductive layer 1245 may be continuously formed on the exposed top of the dielectric layer 1231.
In some embodiments, a metal via 1125 may be formed in the dielectric layer 1231 and outside of the edge of the micro LED array area. In some embodiments, the IC backplane 1140 may include a second top pad 1243. In some embodiments, a bottom pad 1126 may be formed at the bottom of the metal via 1125. The bottom pad 1126 is bonded with the second top pad 1243. In some embodiments, the bottom of the metal via 1125 may be electrically connected with the second top pad 1243 of the IC backplane 1140. In some embodiments, the edge of the top transparent conductive layer 1245 may extend from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 1140) to the top of the dielectric layer 1231 and on the top of the metal via 1125. In some embodiments, the top transparent conductive layer 1245 may be electrically connected with the IC backplane 1140 by the metal via 1125.
In some embodiments, the micro LED array of the micro LED display panel 1250 may include the micro LED units 1255 and 1256. The micro LED unit 1255 may include micro LED structures that share the same light emitting layer 1212, the same first type epitaxial layer 1111, and the same second type epitaxial layer 1213. The light emitting layer 1212 may be continuously formed in the micro LED unit 1255. Similarly, the micro LED unit 1256 may include the micro LED structures that share the same light emitting layer 1212, the same first type epitaxial layer 1111, and the same second type epitaxial layer 1213. The light emitting layer 1212 may be continuously formed in the micro LED unit 1256.
In some embodiments, the sidewalls of the micro LED units pass through or partition the light emitting layer 1212. For example, the sidewall between the micro LED units 1255 and 1256 passes through or partitions the light emitting layer 1212.
In some embodiments, a barrier layer 1121 may be formed on the sidewall of the micro LED unit (e.g., the micro LED units 1255 and 1256) and on the inner surface of the trench T1101.
In some embodiments, the second type epitaxial layer 1213 in each micro LED unit (e.g., the micro LED unit 1255) may include a trench T1103 formed at the top of the second type epitaxial layer 1213 to form top extrusions. In some embodiments, the bottom of the trench T1103 may be higher than the top of the light emitting layer 1212. In some embodiments, the trench T1103 does not pass through or partition the second type epitaxial layer 1213, thus leaving a continuous bottom of the second type epitaxial layer 1213. In some embodiments, the trench T1103 may correspond to the trench T1101.
In some embodiments, a barrier layer 1222 may be formed on the inner surface of the trench T1103. In some embodiments, the dielectric layer 1231 may be filled into the trench T1103.
In some embodiments, the second type epitaxial layer 1213 may further include an extending part 1215 extending along horizontal direction (i.e., a direction parallel to the IC backplane 1140) and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 1213 that is not the extending part 1215 may be referred to as the main second type epitaxial layer 1214.
In some embodiments, a bottom conductive layer 1234 may be formed at the bottom of each of the bottom extrusions described above. In some embodiments, a bottom reflective layer 1235 may at least be formed at the bottom of the bottom conductive layer 1234 and the bottom reflective layer 1235 may be electrically conductive.
In some embodiments, the micro LED unit (e.g., 1255 or 1256) does not include any contact structure formed on the bottom surfaces of the extending parts 1215. In some embodiments, a second reflective layer 1137 may be formed on the sidewall where the barrier layer 1121 is also formed. In some embodiments, the second reflective layer 1137 may be connected with the bottom reflective layer 1235.
In some embodiments, each micro LED unit (e.g., 1255 or 1256) may include a bonding structure array formed at the bottom of the first type epitaxial layer 1111. The bonding structure array may include multiple bonding structures 1236. In some embodiments, each bonding structure 1236 may be formed at the bottom of the bottom reflective layer 1235 corresponding to each bottom extrusion, respectively. Each bonding structure 1236 may be correspondingly bonded with each first top pad 1241 of the IC backplane 1140, respectively.
In some embodiments, at least one sidewall of the micro mesa structure 1210 does not pass through or partition the light emitting layer 1212. That is, the light emitting layer 1212 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. In some embodiments, at least one sidewall of the micro mesa structure 1210 passes through the light emitting layer 1212. In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 1212 to the number of sidewalls passing through or partitioning the light emitting layer 1212 is 1: 1.
In some embodiments, the first type epitaxial layer 1111 is a p-type semiconductor layer and the second type epitaxial layer 1213 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 1111 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1213 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 1111 is an n-type semiconductor layer and the second type epitaxial layer 1213 is a p-type semiconductor layer. In some embodiments, the light emitting layer 1212 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 13 illustrates an example of a layout of a micro LED array 1330 with recurring micro LED units 1320 according to some embodiments of the present disclosure. In this example, the micro LED array 1330 may be at least a portion of the micro LED array described below with reference to any of FIGs. 14A through 15C. Similarly, the micro LED unit 1320 may be the micro LED unit described below with reference to any of FIGs. 14A through 15C; and the micro LED structure 1310 in FIG. 13 may be the micro LED structure described below with reference to any of FIGs. 14A through 15C.
In some embodiments, the micro LED structure 1310 may have four sidewalls 1311, 1312, 1313, and 1314. In some embodiments, the sidewalls 1311, 1313, and 1314 do not pass through or partition the light emitting layer, and the sidewall 1312 may pass through or partition the light emitting layer.
In some embodiments, the micro LED unit 1320 may include micro LED structures S1301, S1302, S1303, S1304, S1305, S1306, S1307, and S1308, each of which may be a micro LED structure 1310 described above. In some embodiments, the micro LED structures S1301 through S1308 may share the same first type epitaxial layer, the same light emitting layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 1320.
In some embodiments, the sidewalls 1321, 1322, 1323, 1324, 1325, 1326, 1327, and 1328 of the micro LED structures S1301 through S1308 may pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures S1301 through S1308 do not pass through or partition the light emitting layer.
In some embodiments, the micro LED array 1330 may include micro LED units 1331 and 1332, each of which may be a micro LED unit 1320 described above. As shown in FIG. 13, the micro LED array 1330 is formed by recurringly or repeatedly placing micro LED units 1320 in a plane that is substantially parallel to the IC backplane.
FIG. 14A is a bottom view of a micro LED display panel 1400 according to some embodiments of the present disclosure. Please note that FIG. 14A aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 14A may not be visible to the naked eye.
As shown in FIG. 14A, the micro LED display panel 1400 includes an IC backplane 1440 and a micro LED array 1450 on top of the IC backplane 1440. The micro LED array 1450 may include multiple micro LED structures S1401, S1402, S1403, S1404, S1405, S1406, S1407, S1408, and so on. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1400. In some embodiments, the micro LED array 1450 in FIG. 14A may include the micro LED array 1330 described above with reference to FIG. 13.
In some embodiments, the micro LED array 1450 of the micro LED display panel 1400 may include multiple micro LED units, each of which may contain multiple (e.g., 8) micro LED structures. For example, the micro LED structures S1401 through S1408 may form one micro LED unit, which is only one of many (e.g., 8) micro LED units in the micro LED array 1450. As shown in FIG. 14A, the top or bottom outline of the micro LED unit is a rectangle. In some embodiments, the top or bottom outline of each micro LED unit may be a square, triangle, or circle. In some embodiments, the top or bottom outline of each micro LED structure in each micro LED unit may be one eighth of the rectangle, square, triangle, or circle.
In some embodiments, each micro LED structure may include a micro mesa structure. In some embodiments, the micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer, from bottom up. That is, among the three layers, the first type epitaxial layer is closest to the IC backplane 1440; the light emitting layer is on top of the first type epitaxial layer and is further away from the IC backplane 1440; the second type epitaxial layer is on top of the light emitting layer and is the furthest away from the IC backplane 1440.
In some embodiments, a barrier layer 1421 may be formed on the sidewall of the micro LED units. In some embodiments, the barrier layer 1421 may be further formed on top of the sidewalls of the micro LED units. In some embodiments, the barrier layer 1421 may further include openings between adjacent micro LED units. In some embodiments, the micro LED units may further include the contact structures 1438 formed in the openings. In some embodiments, each of the micro LED units of the micro LED display panel 1450 includes at least one contact structure 1438. In some embodiments, the barrier layer 1421 may be formed on the sidewall of the micro mesa structures within the micro LED units.
In some embodiments, a second reflective layer 1437 may be formed on the sidewall where the barrier layer 1421 is also formed and may contact to the contact structures 1438. In some embodiments, the second reflective layer 1437 may be electrically conductive.
In some embodiments, the second reflective layer 1437 may be electrically connected with the IC backplane 1440 by a metal via 1425. In some embodiments, the edge of the second reflective layer 1437 extends from the edge of the micro LED array 1450 along horizontal direction (i.e., a direction parallel to the IC backplane 1440) to the top surface of the metal via 1425. In some embodiments, a bottom pad 1426 may be formed at the bottom of the metal via 1425.
In some embodiments, the top outline of the micro LED array area is smaller than the top outline of the IC backplane 1440; and the bottom outline of the micro LED array area is smaller than the bottom outline of the IC backplane 1440. In some embodiments, as shown in FIG. 14A, the micro LED unit may be arranged recurringly or repeatedly in a plane substantially parallel to the IC backplane 1440 to form the micro LED array 1450.
FIG. 14B is another bottom view of the micro LED display panel 1400 descried above with respect to FIG. 14A without the barrier layer 1421 according to some embodiments of the present disclosure. Please note that FIG. 14B aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 14B may not be visible to the naked eye.
In some embodiments, the first type epitaxial layer in each micro LED unit may include trenches T1401, T1402, T1403, T1404, T1405, and T1406. The trenches T1401, T1402, and T1403 are parallel; and the trenches T1404, T1405, and T1406 are parallel. The trench T1401 is perpendicularly crossed with the trench T1404 to form a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, a fourth bottom extrusion, a fifth bottom extrusion, a sixth bottom extrusion, a seventh bottom extrusion, and an eighth bottom extrusion in the first type epitaxial layer, respectively. The trenches T1401, T1402, T1403, T1404, T1405, and T1406 do not pass through or partition the first type epitaxial layer in the vertical direction (i.e., a direction perpendicular to the IC backplane 1440) to leave a continuous top of the first type epitaxial layer. In some embodiments, the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, and the eighth bottom extrusion may correspond to the micro LED structures S1401, S1402, S1403, S1404, S1405, S1406, S1407, and S1408, respectively.
In some embodiments, each of the micro LED structures (e.g., S1401 through S1408) may include a first side, a second side, a third side and a fourth side along a clockwise direction. In some embodiments, each of the micro LED structures (e.g., S1401 through S1408) may include a first side, a second side, a third side and a fourth side along a counter-clockwise direction. In some embodiments, the first sides, the second sides, the third sides, and fourth sides of any two micro LED structures are parallel, respectively.
In some embodiments, in each micro LED unit, the sidewall passing through or partitioning the light emitting layer of a first micro LED structure (e.g., S1401) may be formed at the first side of the first micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a second micro LED structure (e.g., S1402) may be formed at the first side of the second micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a third micro LED structure (e.g., S1403) may be formed at the second side of the third micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a fourth micro LED structure (e.g., S1404) may be formed at the fourth side of the fourth micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a fifth micro LED structure (e.g., S1405) may be formed at the second side of the fifth micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a sixth micro LED structure (e.g., S1406) may be formed at the fourth side of the sixth micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of a seventh micro LED structure (e.g., S1407) may be formed at the third side of the seventh micro LED structure. In some embodiments, the sidewall passing through or partitioning the light emitting layer of an eighth micro LED structure (e.g., S1408) may be formed the third side of the eighth micro LED structure.
In some embodiments, a trench T1411 may be formed along the first sides of a first micro LED structure (e.g., S1401) and a second micro LED structure (e.g., S1402) and continuously through the micro LED array 1450. In some embodiments, a trench T1412 may be formed along the second sides of a third micro LED structure (e.g., S1403) and a fifth micro LED structure (e.g., S1405) . In some embodiments, a trench T1413 may be formed along the fourth side of a fourth micro LED structure (e.g., S1404) and a sixth micro LED structure (e.g., S1406) between adjacent micro LED units. In some embodiments, a trench T1414 may be formed along the third side of a seventh micro LED structure (e.g., S1407) and an eighth micro LED structure (e.g., S1408) and continuously through the micro LED array 1450. In some embodiments, the trench T1411 may be perpendicular to the trenches T1412 and T1413; and the trench T1411 may be parallel to the trench T1414.
In some embodiments, the trench T1401 may include two parts. One part of the trench T1401 may be formed at the second side of a first micro LED structure (e.g., S1401) and the other part of the trench T1401 may be formed at the second side of a seventh micro LED structure (e.g., S1407) . The trench T1412 may be formed between the two parts of the trench T1401;
In some embodiments, the trench T1402 may be formed between a first micro LED structure (e.g., S1401) and a second micro LED structure (e.g., S1402) , between a third micro LED structure (e.g., S1403) and a fourth micro LED structure (e.g., S1404) , between a fifth micro LED structure (e.g., S1405) and a sixth micro LED structure (e.g., S1406) , and between a seventh micro LED structure (e.g., S1407) and an eighth micro LED structure (e.g., S1408) in each micro LED unit. The trench T1402 may be formed along the fourth side of a first micro LED structure (e.g., S1401) and continuously through each micro LED unit.
In some embodiments, the trench T1403 may include two parts. One part of the trench T1403 may be formed at the fourth side of a second micro LED structure (e.g., S1402) and at the second side of an adjacent first micro LED structure; and the other part of the trench T1403 may be formed at the fourth side of an eighth micro LED structure (e.g., S1408) and at the second side of an adjacent seventh micro LED structure. The trenches T1413 may be formed between the two parts of the trench T1403.
In some embodiments, the trench T1404 may be formed between a first micro LED structure (e.g., S1401) and a third micro LED structure (e.g., S1403) , between a second micro LED structure (e.g., S1402) and a fourth micro LED structure (e.g., S1404) in each micro LED unit. The trench T1404 may be formed along the third side of a first micro LED structure (e.g., S1401) and continuously through the micro LED array 1450.
In some embodiments, the trench T1405 may be formed between a third micro LED structure (e.g., S1403) and a fifth micro LED structure (e.g., S1405) , between a fourth micro LED structure (e.g., S1404) and a sixth micro LED structure (e.g., S1406) in each micro LED unit. The trench T1405 may be formed along the third side of a third micro LED structure (e.g., S1403) and the two ends of the trench T1405 may be stopped at the trench T1412 and the trench T1413, respectively.
In some embodiments, the trench T1406 may be formed between a fifth micro LED structure (e.g., S1405) and a seventh micro LED structure (e.g., S1407) , between a sixth micro LED structure (e.g., S1406) and an eighth micro LED structure (e.g., S1408) in each micro LED unit. The trench T1406 may be formed along the third side of a fifth micro LED structure (e.g., S1405) and continuously through the micro LED array 1450.
In some embodiments, the smallest width of the trenches T1411, T1412, T1413, and T1414 is larger than the width of the trench T1401. In some embodiments, the widths of the trenches T1401, T1402, T1403, T1404, and T1406 are the same. In some embodiments, the trenches T1411, T1412, T1413, and T1414 may be referred to as partition trenches.
In some embodiments, each of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, and the eighth bottom extrusion may extrude downward from the continuous top of the first type epitaxial layer. In some embodiments, the trench T1401 may be formed at the second side of the first bottom extrusion and at the second side of the seventh bottom extrusion. The trench T1402 may be formed between the first bottom extrusion and the second bottom extrusion, between the third bottom extrusion and the fourth bottom extrusion, between the fifth bottom extrusion and the sixth bottom extrusion, and between the seventh bottom extrusion and the eighth bottom extrusion in a micro LED unit. The trench T1403 may be formed at the fourth side of the second bottom extrusion and the fourth side of the eighth bottom extrusion. The trench T1404 may be formed between the first bottom extrusion and the third bottom extrusion, and between the second bottom extrusion and the fourth bottom extrusion. The trench T1405 may be formed between the third bottom extrusion and the fifth bottom extrusion, and between the fourth bottom extrusion and the sixth bottom extrusion in a micro LED unit. The trench T1406 may be formed between the fifth bottom extrusion and the seventh bottom extrusion, and between the sixth bottom extrusion and the eighth bottom extrusion.
In some embodiments, the first bottom extrusion is formed in a first micro LED structure (e.g., S1401) , the second bottom extrusion is formed in a second micro LED structure (e.g., S1402) , the third bottom extrusion is formed in a third micro LED structure (e.g., S1403) , the fourth bottom extrusion is formed in a fourth micro LED structure (e.g., S1404) , the fifth bottom extrusion is formed in a fifth micro LED structure (e.g., S1405) , the sixth bottom extrusion is formed in a sixth micro LED structure (e.g., S1406) , the seventh bottom extrusion is formed in a seventh micro LED structure (e.g., S1407) , and the eighth bottom extrusion is formed in an eighth bottom extrusion (e.g., S1408) .
In some embodiments, the second type epitaxial layer in each micro LED unit may include trenches T1421, T1422, T1423, T1424, T1425, and T1426. The trenches T1421, T1422, and T1423 are parallel; and the trenches T1424, T1425, and T1426 are parallel. Each of the trenches T1421, T1422, and T1423 is perpendicularly crossed with each of the trenches T1424, T1425, and T1426 to form a first top extrusion, a second top extrusion, a third top extrusion, a fourth top extrusion, a fifth top extrusion, a sixth top extrusion, a seventh top extrusion, and an eighth top extrusion in the second type epitaxial layer, respectively. The trenches T1421, T1422, T1423, T1424, T1425, and T1426 do not pass through or partition the second type epitaxial layer in the vertical direction (i.e., a direction perpendicular to the IC backplane 1440) to leave a continuous bottom of the second type epitaxial layer. In some embodiments, the first top extrusion, the second top extrusion, the third top extrusion, the fourth top extrusion, the fifth top extrusion, the sixth top extrusion, the seventh top extrusion, and the eighth top extrusion may correspond to the micro LED structures S1401, S1402, S1403, S1404, S1405, S1406, S1407, and S1408, respectively.
In some embodiments, the first top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the second top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the third top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the fourth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the fifth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the sixth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the seventh top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer; the eighth top extrusion may extrude upward from the continuous bottom of the second type epitaxial layer.
In some embodiments, the trench T1421 may be formed at the second side of the first top extrusion and at the second side of the seventh top extrusion. In some embodiments, the trench T1422 may be formed between the first top extrusion and the second top extrusion, between the third top extrusion and the fourth top extrusion, between the fifth top extrusion and the sixth top extrusion, and between the seventh top extrusion and the eighth top extrusion in the same micro LED unit. In some embodiments, the trench T1423 may be formed at the fourth side of the second top extrusion and the fourth side of the eighth top extrusion. In some embodiments, the trench T1424 may be formed between the first top extrusion and the third top extrusion, and between the second top extrusion and the fourth top extrusion. In some embodiments, the trench T1425 may be formed between the third top extrusion and the fifth top extrusion, and between the fourth top extrusion and the sixth top extrusion in the same micro LED unit. In some embodiments, the trench T1426 may be formed between the fifth top extrusion and the seventh top extrusion, and between the sixth top extrusion and the eighth top extrusion.
In some embodiments, the first top extrusion may be formed in a first micro LED structure (e.g., S1401) ; the second top extrusion may be formed in a second micro LED structure (e.g., S1402) ; the third top extrusion may be formed in a third micro LED structure (e.g., S1403) ; the fourth top extrusion may be formed in a fourth micro LED structure (e.g., S1404) ; the fifth top extrusion may be formed in a fifth micro LED structure (e.g., S1405) ; the sixth top extrusion may be formed in a sixth micro LED structure (e.g., S1406) ; the seventh top extrusion may be formed in a seventh micro LED structure (e.g., S1407) ; and the eighth top extrusion may be formed in an eighth bottom extrusion (e.g., S1408) , respectively.
In some embodiments, the barrier layer 1421 described above in FIG. 14A may be formed in the top inner surface and the sidewall of the trenches T1401, T1402, T1403, T1404, T1405, and T1406.
FIG. 15A is a partial cross-sectional view of the micro LED display panel 1400 along the AA’ line in FIG. 14A according to some embodiments of the present disclosure. As shown in FIG. 15A, the micro LED display panel 1400 includes an IC backplane 1440 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S1401, S1402, S1401’, and S1402’) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1400.
In some embodiments, the IC backplane 1440 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1440.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1510. In some embodiments, the micro mesa structure 1510 may include a first type epitaxial layer 1511, a light emitting layer 1512, and a second type epitaxial layer 1513, from bottom up. That is, among the three layers, the first type epitaxial layer 1511 is closest to the IC backplane 1440; the light emitting layer 1512 is on top of the first type epitaxial layer 1511 and is further away from the IC backplane 1440; the second type epitaxial layer 1513 is on top of the light emitting layer 1512 and is the furthest away from the IC backplane 1440.
In some embodiments, at least one sidewall of the micro mesa structure 1510 does not pass through or partition the light emitting layer 1512. That is, the light emitting layer 1512 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 1512 of the micro LED structures S1401, S1402, S1401’, and S1402’ is continuous and not partitioned by the sidewalls between them. In some embodiments, at least one sidewall of the micro mesa structure 1510 passes through or partition the light emitting layer 1512. In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 1512 to the number of sidewalls passing through or partitioning the light emitting layer 1512 is 3: 1.
In some embodiments, the micro LED array of the micro LED display panel 1400 may include multiple micro LED units (e.g., the micro LED units 1555 and 1556) . The micro LED unit 1555 may include the micro LED structures S1401 and S1402. The micro LED unit 1556 may include the micro LED structures S1401’ and S1402’. The micro LED structures S1401, S1402, S1401’, and S1402’ may share the same light emitting layer 1512, the same first type epitaxial layer 1511, and the same second type epitaxial layer 1513. The light emitting layer 1512 may be continuously formed in the micro LED structures S1401, S1402, S1401’, and S1402’.
In some embodiments, the first type epitaxial layer 1511 in a micro LED unit (e.g., the micro LED unit 1555) may include trenches T1401, T1402, and T1403 formed at the bottom of the first type epitaxial layer 1511. In some embodiments, the trenches T1401, T1402, and T1403 do not pass through or partition the first type epitaxial layer 1511, thus leaving a continuous top of the first type epitaxial layer 1511.
In some embodiments, the second type epitaxial layer 1513 in each micro LED unit (e.g., the micro LED unit 1555) may include trenches T1421, T1422, and T1423 formed at the top of the second type epitaxial layer 1513. In some embodiments, the trenches T1421, T1422, and T1423 may be parallel to or corresponding to the trenches T1401, T1402, and T1403, respectively. The trenches T1421, T1422, and T1423 do not pass through or partition the second type epitaxial layer 1513, thus leaving a continuous bottom of the second type epitaxial layer 1513.
In some embodiments, a bottom conductive layer 1534 may be formed at the bottom of each of the bottom extrusions described above with reference to FIG. 14B. In some embodiments, a bottom reflective layer 1535 may at least be formed at the bottom of the bottom conductive layer 1534 and the bottom reflective layer 1535 may be electrically conductive.
In some embodiments, the sidewall of the micro LED unit passes through or partitions the light emitting layer 1512. For example, the sidewall on the left side of the micro LED unit 1555 passes through or partitions the light emitting layer 1512.
In some embodiments, each micro LED unit (e.g., the micro LED unit 1555 or 1556) may further include a top transparent dielectric layer 1532 covering on the entire top surface of the second type epitaxial layer 1513. In some embodiments, the top surface of the top transparent dielectric layer 1532 does not have any electrically conductive layers.
In some embodiments, a dielectric layer 1531 may be formed in the gap between the micro LED units. In some embodiments, the dielectric layer 1531 may be filled into the trenches formed at the bottom of the first type epitaxial layer 1511 (e.g., the trenches T1401, T1402, and T1403) .
In some embodiments, a barrier layer 1421 may be formed on the top inner surface and the sidewall of a trench formed at the bottom of the first type epitaxial layer 1511 (e.g., the trench T1401, T1402, or T1403) . In some embodiments, a barrier layer 1522 may be formed on the bottom surface and the sidewall of a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trench T1421, T1422, or T1423) . In some embodiments, the top transparent dielectric layer 1532 may be filled into a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trench T1421, T1422, or T1423) and formed on the barrier layer 1522.
In some embodiments, the IC backplane 1440 may include a first top pad array. The first top pad array may include multiple first top pads 1541. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of the bottom extrusions. The bonding structure array may include multiple bonding structures 1536. In some embodiments, each bonding structure 1536 may be formed at the bottom of the bottom reflective layer 1535 corresponding to each micro LED structure (e.g., S1401, S1402, S1401’, S1402’) , respectively. Each bonding structure 1536 may be correspondingly bonded with each first top pad 1541 of the IC backplane 1440, respectively.
In some embodiments, the first type epitaxial layer 1511 is a p-type semiconductor layer and the second type epitaxial layer 1513 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 1511 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1513 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 1511 is an n-type semiconductor layer and the second type epitaxial layer 1513 is a p-type semiconductor layer. In some embodiments, the light emitting layer 1512 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 15B is a partial cross-sectional view of a micro LED display panel 1400 along the BB’ line in FIG. 14A according to some embodiments of the present disclosure. As shown in FIG. 15B, the micro LED display panel 1400 includes an IC backplane 1440 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S1405, S1406, S1405’, and S1406’) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1400.
In some embodiments, the IC backplane 1440 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1440.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1510. In some embodiments, the micro mesa structure 1510 may include a first type epitaxial layer 1511, a light emitting layer 1512, and a second type epitaxial layer 1513, from bottom up. That is, among the three layers, the first type epitaxial layer 1511 is closest to the IC backplane 1440; the light emitting layer 1512 is on top of the first type epitaxial layer 1511 and is further away from the IC backplane 1440; the second type epitaxial layer 1513 is on top of the light emitting layer 1512 and is the furthest away from the IC backplane 1440.
In some embodiments, at least one sidewall of the micro mesa structure 1510 does not pass through or partition the light emitting layer 1512. That is, the light emitting layer 1512 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 1512 of the micro LED structures S1405 and S1406 is continuous and not partitioned by the sidewall between the micro LED structures S1405 and S1406. In some embodiments, at least one sidewall of the micro mesa structure 1510 passes through the light emitting layer 1512. For example, the light emitting layer 1512 is partitioned by the sidewall between the micro LED structures S1406 and S1405’ (i.e., the sidewall between the micro LED units 1555 and 1556) . In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 1512 to the number of sidewalls passing through or partitioning the light emitting layer 1512 is 3: 1.
In some embodiments, the micro LED array of the micro LED display panel 1400 may include multiple micro LED units (e.g., the micro LED units 1555 and 1556) . The micro LED unit 1555 may include the micro LED structures S1405 and S1406. The micro LED structures S1405 and S1406 may share the same light emitting layer 1512, the same first type epitaxial layer 1511, and the same second type epitaxial layer 1513. The light emitting layer 1512 may be continuously formed in the micro LED unit 1555.
In some embodiments, the first type epitaxial layer 1511 in a micro LED unit (e.g., the micro LED unit 1555) may include a trench T1402 formed at the bottom of the first type epitaxial layer 1511. In some embodiments, the trench T1402 does not pass through or partition the first type epitaxial layer 1511, thus leaving a continuous top of the first type epitaxial layer 1511.
In some embodiments, the second type epitaxial layer 1513 in each micro LED unit (e.g., the micro LED unit 1555) may include a trench T1422 formed at the top of the second type epitaxial layer 1513. In some embodiments, the trench T1422 may be parallel to or corresponding to the trench T1402. The trench T1422 does not pass through or partition the second type epitaxial layer 1513, thus leaving a continuous bottom of the second type epitaxial layer 1513.
In some embodiments, a trench T1412 may be formed on the left side of a fifth micro LED structure (e.g., S1405) . In some embodiments, a trench T1413 may be formed on the right side of a sixth micro LED structure (e.g., S1406) between adjacent micro LED units. The trench T1413 may also be the trench T1412’ formed on the left side of the micro LED structure S1405’. A trench T1413’ may be formed on the right side of the micro LED structure S1406’. The trenches T1412, T1413 (T1412’) , and T1413’ are partition trenches that partition the first type epitaxial layer 1511 and the light emitting layer 1512, but do not partition the second type epitaxial layer 1513.
In some embodiments, a bottom conductive layer 1534 may be formed at the bottom of each of the bottom extrusions described above with reference to FIG. 14B. In some embodiments, a bottom reflective layer 1535 may at least be formed at the bottom of the bottom conductive layer 1534 and the bottom reflective layer 1535 may be electrically conductive.
In some embodiments, the second type epitaxial layer 1513 may further include an extending part 1515 extending along horizontal direction (i.e., a direction parallel to the IC backplane 1440) and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 1513 that is not the extending part 1515 may be referred to as the main second type epitaxial layer 1514.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 1510. For example, barrier layers 1421 and 1522 may be formed on the sidewalls of the micro mesa structure 1510 of the micro LED unit 1556.
In some embodiments, each micro LED unit (e.g., the micro LED unit 1555 or 1556) may further include a top transparent dielectric layer 1532 covering on the entire top surface of the second type epitaxial layer 1513. In some embodiments, the top surface of the top transparent dielectric layer 1532 does not have any electrically conductive layers.
In some embodiments, a dielectric layer 1531 may be formed in the gap between the micro LED units. In some embodiments, the dielectric layer 1531 may be filled into the trenches formed at the bottom of the first type epitaxial layer 1511 (e.g., the trench T1402) .
In some embodiments, a barrier layer 1421 may be formed on the top inner surface and the sidewall of a trench formed at the bottom of the first type epitaxial layer 1511 (e.g., the trench T1402) . In some embodiments, a barrier layer 1522 may be formed on the bottom surface and the sidewall of a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trench T1422) . In some embodiments, the top transparent dielectric layer 1532 may be filled into a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trench T1422) and formed on the barrier layer 1522.
In some embodiments, the barrier layer 1421 may be further formed on the sidewall of the micro LED units 1555 and 1556. In some embodiments, the barrier layer 1421 may further include openings. In some embodiments, the micro LED unit (e.g., 1555 or 1556) may further include contact structures 1438 formed in the openings and on the bottom surfaces of the extending parts 1515.
In some embodiments, a second reflective layer 1437 may be formed on the sidewall where the barrier layer 1421 is also formed. The second reflective layer 1437 may be formed on the bottom of the contact structures 1438 and contact the contact structures 1438. In some embodiments, the second reflective layer 1437 is not connected with the bottom reflective layer 1535. In some embodiments, the second reflective layer 1437 may be electrically conductive.
In some embodiments, the second reflective layer 1437 may be electrically connected with the IC backplane 1440 by a metal via 1425. In some embodiments, the edge of the second reflective layer 1437 extends from the edge of the micro LED array along horizontal direction (i.e., a direction parallel to the IC backplane 1440) .
In some embodiments, the IC backplane 1440 may include a first top pad array. The first top pad array may include multiple first top pads 1541. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of the bottom extrusions. The bonding structure array may include multiple bonding structures 1536. In some embodiments, each bonding structure 1536 may be formed at the bottom of the bottom reflective layer 1535 corresponding to each micro LED structure (e.g., S1405, S1406, S1405’, S1406’) , respectively. Each bonding structure 1536 may be correspondingly bonded with each first top pad 1541 of the IC backplane 1440, respectively.
In some embodiments, the IC backplane 1440 may further include a second top pad 1543. In some embodiments, a bottom pad 1426 may be formed at the bottom of the metal via 1425. The bottom pad 1426 may be bonded with the second top pad 1543. In some embodiments, the second top pad 1543 may be formed at a position along the trench T1414 direction outside of the micro LED array 1450.
In some embodiments, the first type epitaxial layer 1511 is a p-type semiconductor layer and the second type epitaxial layer 1513 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 1511 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1513 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 1511 is an n-type semiconductor layer and the second type epitaxial layer 1513 is a p-type semiconductor layer. In some embodiments, the light emitting layer 1512 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
FIG. 15C is a cross-sectional view of a micro LED display panel 1400 along the CC’ line in FIG. 14A according to some embodiments of the present disclosure. As shown in FIG. 15C, the micro LED display panel 1400 includes an IC backplane 1440 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S1401, S1403, S1405, and S1407) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1400.
In some embodiments, at least one sidewall of the micro mesa structure does not pass through or partition the light emitting layer 1512. That is, the light emitting layer 1512 of two neighboring micro LED structures may be continuous and not partitioned by at least the sidewall between the two micro LED structures. For example, the light emitting layer 1512 of the micro LED structures S1401, S1403, S1405, and S1407 is continuous and not partitioned by the sidewalls between them. In some embodiments, at least one sidewall of the micro mesa structure passes through the light emitting layer 1512. In some embodiments, in each micro LED structure, the ratio of the number of sidewalls not passing through or not partitioning the light emitting layer 1512 to the number of sidewalls passing through or partitioning the light emitting layer 1512 is 3: 1.
In some embodiments, the micro LED array of the micro LED display panel 1400 may include multiple micro LED units, each of which may include multiple micro LED structures (e.g., S1401, S1403, S1405, and S1407) . The micro LED structures S1401, S1403, S1405, and S1407 may share the same light emitting layer 1512, the same first type epitaxial layer 1511, and the same second type epitaxial layer 1513. The light emitting layer 1512 may be continuously formed in the micro LED unit 1555.
In some embodiments, the first type epitaxial layer 1511 in a micro LED unit (e.g., the micro LED unit 1555) may include trenches T1404, T1405, and T1406 formed at the bottom of the first type epitaxial layer 1511. In some embodiments, the trenches T1404, T1405, and T1406 do not pass through or partition the first type epitaxial layer 1511, thus leaving a continuous top of the first type epitaxial layer 1511.
In some embodiments, the second type epitaxial layer 1513 in each micro LED unit (e.g., the micro LED unit 1555) may include a trenches T1424, T1425, and T1426 formed at the top of the second type epitaxial layer 1513. In some embodiments, the trenches T1424, T1425, and T1426 may be parallel to or corresponding to the trenches T1404, T1405, and T1406. The trenches T1424, T1425, and T1426 do not pass through or partition the second type epitaxial layer 1513, thus leaving a continuous bottom of the second type epitaxial layer 1513.
In some embodiments, a bottom conductive layer 1534 may be formed at the bottom of each of the bottom extrusions described above with reference to FIG. 14B. In some embodiments, a bottom reflective layer 1535 may at least be formed at the bottom of the bottom conductive layer 1534 and the bottom reflective layer 1535 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure. For example, barrier layers 1421 and 1522 may be formed on the sidewalls of the micro mesa structure of the micro LED unit 1555.
In some embodiments, each micro LED unit (e.g., the micro LED unit 1555) may further include a top transparent dielectric layer 1532 covering on the entire top surface of the second type epitaxial layer 1513. In some embodiments, the top surface of the top transparent dielectric layer 1532 does not have any electrically conductive layers.
In some embodiments, a dielectric layer 1531 may be formed in the gap between the micro LED units. In some embodiments, the dielectric layer 1531 may be filled into the trenches formed at the bottom of the first type epitaxial layer 1511 (e.g., the trenches T1404, T1405, T1406) .
In some embodiments, a barrier layer 1421 may be formed on the top inner surface and the sidewall of a trench formed at the bottom of the first type epitaxial layer 1511 (e.g., the trenches T1404, T1405, T1406) . In some embodiments, a barrier layer 1522 may be formed on the bottom surface and the sidewall of a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trenches T1424, T1425, T1426) . In some embodiments, the top transparent dielectric layer 1532 may be filled into a trench formed at the top of the second type epitaxial layer 1513 (e.g., the trenches T1424, T1425, T1426) and formed on the barrier layer 1522. In some embodiments, the barrier layer 1421 may be further formed on the sidewall of the micro LED units (e.g., 1555) .
In some embodiments, the IC backplane 1440 may include a first top pad array. The first top pad array may include multiple first top pads 1541. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of the bottom extrusions. The bonding structure array may include multiple bonding structures 1536. In some embodiments, each bonding structure 1536 may be formed at the bottom of the bottom reflective layer 1535 corresponding to each micro LED structure (e.g., S1401, S1403) , respectively. Each bonding structure 1536 may be correspondingly bonded with each first top pad 1541 of the IC backplane 1440, respectively.
In some embodiments, a trench T1411 may be formed on the left side of a first micro LED structure (e.g., S1401) . In some embodiments, a trench T1414 may be formed along the right side of a seventh micro LED structure (e.g., S1407) . The trenches T1411 and T1414 are partition trenches that partition the first type epitaxial layer 1511 and the light emitting layer 1512, but do not partition the second type epitaxial layer 1513.
In some embodiments, the first type epitaxial layer 1511 is a p-type semiconductor layer and the second type epitaxial layer 1513 is an n-type semiconductor layer. In some embodiments, the material of the first type epitaxial layer 1511 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1513 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 1511 is an n-type semiconductor layer and the second type epitaxial layer 1513 is a p-type semiconductor layer. In some embodiments, the light emitting layer 1512 is at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
In some embodiments with reference to FIGs. 14A through 15C, the second type epitaxial layer 1513 may be electrically connected with the second top pad 1543 of the IC backplane 1440 through the contact structures 1438, the second reflective layer 1437, the metal via 1425, and the bottom pad 1426. A person having ordinary skills in the art would understand the second type epitaxial layer 1513 may also be electrically connected with the second top pad 1543 in a method described above with reference to FIGs. 6 and 12.
FIG. 16 illustrates an example of a layout of a micro LED array 1630 with recurring micro LED units 1620 according to some embodiments of the present disclosure. In this example, the micro LED array 1630 may be the micro LED array described below with reference to any of FIGs. 17 through 19. Similarly, the micro LED unit 1620 may be the micro LED unit described below with reference to any of FIGs. 17A through 19C; and the micro LED structure 1610 may be the micro LED structure described below with reference to any of FIGs. 17A through 19C.
In some embodiments, each micro LED structure 1610 may have four sidewalls. In some embodiments, three sidewalls of the micro LED structure may not pass through or partition the light emitting layer (which is represented by dotted lines) , and one sidewall of the micro LED structure may pass through or partition the light emitting layer (which is represented by solid lines) . Accordingly, the ratio of the number of sidewall not passing through or partitioning the light emitting layer to the number of sidewall passing through or partitioning the light emitting layer may be 3: 1 for each micro LED structure 1610.
In some embodiments, the micro LED unit 1620 may include micro LED structures S1601 through S1608, each of which may be a micro LED structure 1610 described above. In some embodiments, the micro LED structures S1601 through S1608 may share the same first type epitaxial layer, the same light emitting layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 1620.
As shown in FIG. 16, in some embodiments, each of the micro LED structures S1601 through S1608 includes a first side, a second side, a third side, and a fourth side along a clockwise direction. The first sides, the second sides, the third sides, and the fourth sides of any two micro LED structures may be parallel, respectively. In some embodiments, each of the first micro LED structure S1601 and the second micro LED structure S1602 includes the sidewall passing though the light emitting layer at the first side; each of the third micro LED structure S1603 and the fifth micro LED structure S1605 includes the sidewall passing though the light emitting layer at the second side; each of the fourth micro LED structure S1604 and the sixth micro LED structure S1606 includes the sidewall passing though the light emitting layer at the fourth side; and each of the seventh micro LED structure S1607 and the eighth micro LED structure S1608 includes the sidewall passing though the light emitting layer at the third side.
In some embodiments, the micro LED array 1630 may include micro LED units 1631 and 1632, each of which may be a micro LED unit 1620 described above. As shown in FIG. 16, the micro LED array 1630 may be formed by recurringly or repeatedly placing micro LED units 1620 in a plane that may be substantially parallel to the IC backplane.
FIGs. 17A and 17B are bottom views of a micro LED display panel 1750 according to some embodiments of the present disclosure. Please note that FIGs. 17A and 17B aim to illustrate the relative positions of different components and some of the components illustrated in FIGs. 17A and 17B may not be visible to the naked eye. Furthermore, FIG. 17A illustrates the micro LED display panel 1750 without a first barrier layer, so that a plurality of trenches and partition trenches are exposed. FIG. 17B illustrates the micro LED display panel 1750 with a first barrier layer 1721.
FIGs. 17A and 17B illustrate an example of micro LED display panel 1750 according to some embodiments of the present disclosure. As shown in FIGs. 17A 17B, the micro LED display panel 1750 includes an IC backplane 1740 and a micro LED array area. The micro LED array area includes a micro LED array, which may be formed by recurringly or repeatedly placing micro LED units 1620 described above with reference to FIG. 16 on the horizontal plane (i.e., a plane substantially parallel to the IC backplane 1740) .
In some embodiments, each of the micro LED units of the micro LED display panel 1750 includes a plurality of micro LED structures S1701 through S1708. In some embodiments, the micro LED structures S1701 through S1708 in FIGs. 17A and 17B may be the micro LED structures S1601 through S1608 described above with reference to FIG. 16.
In some embodiments, each of the micro LED structures S1701 through S1708 of the micro LED unit may include a micro mesa structure. In some embodiments, the micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer, from bottom up.
As shown in FIG. 17A, in some embodiments, each micro LED unit of the micro LED display panel 1750 includes a plurality of trenches T1701 through T1706 formed within the first type epitaxial layer. The trenches T1701 through T1706 do not pass through or partition the first type epitaxial layer. The trenches T1701 through T1706 may be formed as lower sidewalls of the micro LED structures S1701 through S1708 not passing through the light emitting layer. In some embodiments, the trenches T1701 through T1703 are parallel; the trenches T1704 through T1706 are parallel; and each of the trenches T1701 through T1703 are perpendicular to each of the trenches T1704 through T1706, respectively.
In some embodiments, the first trench T1701 may be formed at the fourth side of each of the first micro LED structure S1701, the third micro LED structure S1703, the fifth micro LED structure S1705, and the seventh micro LED structure S1707. The first trench T1701 may form as a sidewall of the micro LED unit and may be continuously formed through the micro LED unit.
In some embodiments, the second trench T1702 includes two parts: a first part of the second trench T1702 being formed between the first micro LED structure S1701 and the second micro LED structure S1702, and a second part of the second trench T1702 being formed between the seventh micro LED structure S1707 and the eighth micro LED structure S1708. In some embodiments, a second partition trench T1722 may be formed between the two parts of the second trench T1702.
In some embodiments, the third trench T1703 may be formed at the second side of each of the second micro LED structure S1702, the fourth micro LED structure S1704, the sixth micro LED structure S1706, and the eighth micro LED structure S1708. The third trench T1703 may form as a sidewall of the micro LED unit and may be continuously formed through the micro LED unit. In some embodiments, the third trench T1703 of the micro LED unit may be formed as a first trench of an adjacent micro LED unit.
In some embodiments, the fourth trench T1704 may be formed at the third side of each of the first micro LED structure S1701 and the second micro LED structure S1702, which may be between the first micro LED structure S1701 and the third micro LED structure S1703 and between the second micro LED structure S1702 and the fourth micro LED structure S1704. The fourth trench T1704 may be continuously formed through the micro LED array.
In some embodiments, the fifth trench T1705 may be formed at the third side of each of the third micro LED structure S1703 and the fourth micro LED structure S1704, and may be between the third micro LED structure S1703 and the fifth micro LED structure S1705 and between the fourth micro LED structure S1704 and the sixth micro LED structure S1706. In some embodiments, the center of the fifth trench T1705 may be cut off by the second partition trench T1722.
In some embodiments, the sixth trench T1706 may be formed at the third side of each of the fifth micro LED structure S1705 and the sixth micro LED structure S1706, and may be between the fifth micro LED structure S1705 and the seventh micro LED structure S1707 and between the sixth micro LED structure S1706 and the eighth micro LED structure S1708. The sixth trench T1706 may be continuously formed through the micro LED array.
In some embodiments, the micro LED unit includes a plurality of partition trenches T1721 through T1723. The partition trenches T1721 through T1723 pass through the first type epitaxial layer and the light emitting layer, and stop in the second type epitaxial layer, leaving the top of the second type epitaxial layer continuously formed on each of the micro LED unit and between adjacent micro LED units. In some embodiments, the first partition trench T1721 may be perpendicular to the second partition trench T1722 and may be parallel to the third partition trench T1723. In some embodiments, the smallest width of the partition trenches T1721 through T1723 may be larger than the width of the trenches T1701 through T1706.
In some embodiments, the first partition trench T1721 may be formed at the first side of each of the first micro LED structure S1701 and the second micro LED structure S1702. The first partition trench T1721 may form as a sidewall of the micro LED unit and may be continuously formed through the micro LED array.
In some embodiments, the second partition trench T1722 may be formed at the second side of each of the third micro LED structure S1703 and the fifth micro LED structure S1705, which may be formed as a shared sidewall between the third micro LED structure S1703 and the fourth micro LED structure S1704 and between the fifth micro LED S1705 and the sixth micro LED S1706.
In some embodiments, the third partition trench T1723 may be formed at the third side of each of the seventh micro LED structure S1707 and the eighth micro LED structure S1708. The third partition trench T1723 may form as a sidewall of the micro LED unit and may be continuously formed through the micro LED array. In some embodiments, the third partition trench T1723 of the micro LED unit may be formed as a first partition trench of an adjacent micro LED unit.
In some embodiments, the plurality of trenches T1701 through T1706 and the plurality of partition trenches T1721 through T1723 form in the micro LED unit to form a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, a fourth bottom extrusion, a fifth bottom extrusion, a sixth bottom extrusion, a seventh bottom extrusion, and an eighth bottom extrusion, each of which extrudes downward from the continuous top of the first type epitaxial layer. In some embodiments, each of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, and the eighth bottom extrusion corresponds to each of the micro LED structures S1701 through S1708, respectively.
As shown in FIG. 17B, in some embodiments, the barrier layer 1721 may be formed on the sidewalls of the trenches T1701 through T1706 and the partition trenches T1721 through T1723, which are exposed in FIG. 17A. That is, the barrier layer 1721 may be formed on the sidewalls of the micro LED structures S1701 through S1708. In some embodiments, the barrier layer 1721 may further include openings at a top of the partition trenches T1721 through T1723. In some embodiments, the micro LED units may further include the contact structures 1738 formed in the openings. In some embodiments, each of the micro LED units of the micro LED display panel 1750 includes at least one contact structure 1738.
In some embodiments, a second reflective layer 1737 may be formed on the sidewalls where the barrier layer 1721 may also be formed. In some embodiments, the second reflective layer 1737 may be formed on the sidewalls and the top of the partition trenches T1721 through T1723. The second reflective layer 1737 may contact to the contact structures 1738. In some embodiments, the second reflective layer 1737 may be electrically conductive and electrically connected to the contact structures 1738.
In some embodiments, the micro LED display panel 1750 further includes a metal via 1725 and a bottom pad 1726. In some embodiments, the bottom pad 1726 may be formed at the bottom of the metal via 1725. In some embodiments, the metal via 1725 and the bottom pad 1726 are formed at a position outside of the micro array area of the micro LED display panel 1750. In some embodiments, the metal via 1725 and the bottom pad 1726 are formed outside of the micro array area at the first side, the second side, the third side, or the fourth side of the micro LED display panel 1750.
FIG. 18 is a cross-sectional view of a micro LED unit of the micro LED display panel 1750 along the BB’ line in FIG. 17B, according to some embodiments of the present disclosure. As shown in FIG. 18, the micro LED display panel 1750 includes an IC backplane 1740 and a micro LED array area. The micro LED array area includes a micro LED array, which may be formed by recurringly or repeatedly placing micro LED units 1620 described above with reference to FIG. 16 on the horizontal plane. The micro LED unit further include multiple micro LED structures (e.g., micro LED structures S1703 and S1704) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1750.
In some embodiments, the IC backplane 1740 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1740.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1810. In some embodiments, the micro mesa structure 1810 may include a first type epitaxial layer 1811, a light emitting layer 1812, and a second type epitaxial layer 1813, from bottom up. That is, among the three layers, the first type epitaxial layer 1811 may be closest to the IC backplane 1740; the light emitting layer 1812 may be on top of the first type epitaxial layer 1811 and may be further away from the IC backplane 1740; the second type epitaxial layer 1813 may be on top of the light emitting layer 1812 and may be the furthest away from the IC backplane 1740.
In some embodiments, each of the micro LED structures S1703 and S1704 in FIG. 18 may be a micro LED structure 1610 described above with reference to FIG. 16. In some embodiments, the third micro LED structure S1703 includes one sidewall passing though the light emitting layer and three sidewalls not passing though the light emitting layer, the sidewall passing though the light emitting layer being at the second side. In some embodiments, the fourth micro LED structure S1704 includes one sidewall passing though the light emitting layer and three sidewalls not passing though the light emitting layer, the sidewall passing though the light emitting layer being at the fourth side.
In some embodiments, the first type epitaxial layer 1811 in the micro LED unit may include a plurality of trenches (e.g., T1801 and T1803) formed at the bottom of the first type epitaxial layer 1811. In some embodiments, the trenches T1801 and T1803 do not pass through or partition the first type epitaxial layer 1811, thus leaving a continuous top of the first type epitaxial layer 1811. In some embodiments, the trenches T1801 and T1803 in FIG. 18 may be the trenches T1701 and T1703 described above with reference to FIG. 17A.
In some embodiments, the second type epitaxial layer 1813 in the micro LED unit may include a plurality of trenches (e.g., T1811 and T1813) formed at the top of the second type epitaxial layer 1813. In some embodiments, the trenches T1811 and T1813 may be parallel to or corresponding to the trenches T1801 and T1803, respectively. In some embodiments, the trenches T1811 and T1813 do not pass through or partition the second type epitaxial layer 1813, thus leaving a continuous bottom of the second type epitaxial layer 1813.
In some embodiments, the micro LED unit includes a plurality of partition trenches (e.g., T1822) . In some embodiments, the partition trench T1822 may pass through or partition the first type epitaxial layer 1811 and the light emitting layer 1812. In some embodiments, the partition trench T1822 stop in the second type epitaxial layer 1813, leaving the top of the second type epitaxial layer 1813 continuously formed on the micro LED structures S1703 and S1704. In some embodiments, the partition trench T1822 in FIG. 18 may be the partition trenches T1722 described above with reference to FIG. 17A.
In some embodiments, a bottom conductive layer 1834 may be formed at the bottom of each of the micro LED structures S1703 and S1704. In some embodiments, a bottom reflective layer 1835 may at least be formed at the bottom of the bottom conductive layer 1834 and the bottom reflective layer 1835 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 1810. For example, barrier layers 1721 and 1822 may be formed on the sidewalls of the micro mesa structure 1810 of the micro LED unit. In some embodiments, the barrier layer 1721 may be formed on the top inner surfaces and the sidewalls of the trenches T1801 and T1803 and the partition trench T1822. In some embodiments, the barrier layer 1822 may be formed on the bottom surfaces and the sidewalls of the trenches T1811 and T1813.
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 1832 covering on the entire top surface of the second type epitaxial layer 1813. In some embodiments, the top surface of the top transparent dielectric layer 1832 may not have any electrically conductive layers.
In some embodiments, a dielectric layer 1831 may be filled in the trenches T1801 and T1803 and the partition trench T1822 and formed on the barrier layer 1721. In some embodiments, the top transparent dielectric layer 1832 may be filled into the trenches T1811 and T1813 and formed on the barrier layer 1822.
In some embodiments, the barrier layer 1721 may further include openings at the top surface of the partition trench T1822. In some embodiments, the micro LED units may further include the contact structures 1738 formed in the openings.
In some embodiments, a second reflective layer 1737 may be formed on the sidewall where the barrier layer 1721 may be also formed. The second reflective layer 1737 may be formed on the bottom of the contact structures 1738 and contact the contact structures 1738. In some embodiments, the second reflective layer 1737 may be electrically conductive and electrically connected with the contact structures 1738. In some embodiments, the second reflective layer 1737 may not be connected with the bottom reflective layer 1835.
In some embodiments, the IC backplane 1740 may include a first top pad array. The first top pad array may include multiple first top pads 1841. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S1703 and S1704. In some embodiments, the bonding structure array may be formed correspondingly at the bottom of the third bottom extrusion corresponding to the third micro LED structure S1703 and the fourth bottom extrusion corresponding to the fourth micro LED structure S1704.
In some embodiments, the bonding structure array may include multiple bonding structures 1836. In some embodiments, each bonding structure 1836 may be formed at the bottom of the bottom reflective layer 1835 corresponding to each of the micro LED structures S1703 and S1704, respectively. Each bonding structure 1836 may be correspondingly bonded with each first top pad 1841 of the IC backplane 1740, respectively.
FIG. 19A is a partial cross-sectional view of the micro LED display panel 1750 along the BB’ line in FIG. 17B, according to some embodiments of the present disclosure. As shown in FIG. 19A, the micro LED display panel 1750 includes an IC backplane 1740 and a micro LED array area. In some embodiments, the micro LED array area includes a micro LED array, which may include multiple micro LED units.
In some embodiments, the micro LED array may be formed by recurringly or repeatedly placing micro LED units 1620 described above with reference to FIG. 16 on the horizontal plane. Two representative micro LED units are shown in FIG. 19A, which may include multiple micro LED structures (e.g., S1703, S1704, S1703’, and S1704’) . In some embodiments, the micro LED structures S1703 and S1704 belongs to a first micro LED unit, and the micro LED structures S1703’ and S1704’ belongs to a second micro LED unit. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1750.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the first trench T1801 (or T1801’) and the third trench T1803 (or T1803’) formed in the first type epitaxial layer 1811. In some embodiments, the third trench of a micro LED unit may be formed as the first trench of an adjacent micro LED unit. For example, the third trench T1803 of the first micro LED unit may be formed as the first trench T1801’ of the second micro LED unit.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the seventh trench T1811 (or T1811’) and the ninth trench T1813 (or T1813’) formed in the second type epitaxial layer 1813. In some embodiments, the ninth trench of a micro LED unit may be formed as the seventh trench of an adjacent micro LED unit. For example, the ninth trench T1813 of the first micro LED unit may be formed as the seventh trench T1811’ of the second micro LED unit.
In some embodiments, the micro LED array described with reference to FIG. 19A may include the micro LED unit described above with reference to FIG. 18. In some embodiments, each of the first micro LED unit and the second micro LED unit described with reference to FIG. 19A may be the micro LED unit described above with reference to FIG. 18. Accordingly, structures with the same referral numbers in FIG. 19A may be the same structures described above with reference to FIG. 18.
FIG. 19B is a partial cross-sectional view of the micro LED display panel 1750 along the AA’ line in FIG. 17B, according to some embodiments of the present disclosure. As shown in FIG. 19C, the micro LED display panel 1750 includes an IC backplane 1740 and a micro LED array area. In some embodiments, the micro LED array area includes a micro LED array, which may include multiple micro LED units.
In some embodiments, the micro LED array may be formed by recurringly or repeatedly placing micro LED units 1620 described above with reference to FIG. 16 on the horizontal plane. Two representative micro LED units are shown in FIG. 19B, which may include multiple micro LED structures (e.g., S1701, S1702, S1701’, and S1702’) . In some embodiments, the micro LED structures S1701 and S1702 belongs to a first micro LED unit, and the micro LED structures S1701’ and S1702’ belongs to a second micro LED unit. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1750.
In some embodiments, the IC backplane 1740 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1740.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1810. In some embodiments, the micro mesa structure 1810 may include a first type epitaxial layer 1811, a light emitting layer 1812, and a second type epitaxial layer 1813, from bottom up.
In some embodiments, the micro LED structures S1701, S1702, S1701’, and S1702’ in FIG. 19B may be a micro LED structure 1610 described above with reference to FIG. 16. In some embodiments, each of the micro LED structures S1701, S1702, S1701’, and S1702’ includes one sidewall passing though the light emitting layer and three sidewalls not passing though the light emitting layer, the sidewall passing though the light emitting layer being at the first side.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the first trench T1801 (or T1801’) , the second trench T1902 (or T1902’) , and the third trench T1803 (or T1803’) formed in the first type epitaxial layer 1811. In some embodiments, the third trench of a micro LED unit may be formed as the first trench of an adjacent micro LED unit. For example, the third trench T1803 of the first micro LED unit may be formed as the first trench T1801’ of the second micro LED unit. In some embodiments, the trenches T1801 (or T1801’) , T1902 (or T1902’) , and T1902 (or T1902’) do not pass through or partition the first type epitaxial layer 1811, thus leaving a continuous top of the first type epitaxial layer 1811. In some embodiments, the trenches T1801 (or T1801’) , T1902 (or T1902’) , and T1803 (or T1803’) in FIG. 19B is the trenches T1701, T1702 and T1703 described above with reference to FIG. 17A.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the seventh trench T1811 (or T1811’) , the eighth trench T1912 (or T1912’) , and the ninth trench T1813 (or T1813’) formed in the second type epitaxial layer 1813. In some embodiments, the ninth trench of a micro LED unit may be formed as the seventh trench of an adjacent micro LED unit. For example, the ninth trench T1813 of the first micro LED unit may be formed as the seventh trench T1811’ of the second micro LED unit. In some embodiments, the trenches T1811 (or T1811’) , T1912 (or T1912’) , and T1813 (or T1813’) do not pass through or partition the second type epitaxial layer 1813, thus leaving a continuous bottom of the second type epitaxial layer 1813.
In some embodiments, a bottom conductive layer 1834 may be formed at the bottom of each of the micro LED structures S1701, S1702, S1701’, and S1702’. In some embodiments, a bottom reflective layer 1835 may at least be formed at the bottom of the bottom conductive layer 1834 and the bottom reflective layer 1835 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 1810. For example, barrier layers 1721 and 1822 may be formed on the sidewalls of the micro mesa structure 1810 of the micro LED unit. In some embodiments, the barrier layer 1721 may be formed on the top inner surfaces and the sidewalls of the trenches T1801 (or T1801’) , T1902 (or T1902’) , and T1803 (or T1803’) . In some embodiments, the barrier layer 1822 may be formed on the bottom surfaces and the sidewalls of the trenches T1811 (or T1811’) , T1912 (or T1912’) , and T1813 (or T1813’) .
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 1832 covering on the entire top surface of the second type epitaxial layer 1813. In some embodiments, the top surface of the top transparent dielectric layer 1832 may not have any electrically conductive layers.
In some embodiments, a dielectric layer 1831 may be filled in the trenches T1801 (or T1801’) , T1902 (or T1902’) , and T1803 (or T1803’) and formed on the barrier layer 1721. In some embodiments, the top transparent dielectric layer 1832 may be filled into the trenches T1811 (or T1811’) , T1912 (or T1912’) , and T1813 (or T1813’) and formed on the barrier layer 1822.
In some embodiments, the IC backplane 1740 may include a first top pad array. The first top pad array may include multiple first top pads 1841. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S1701, S1702, S1701’, and S1702’. The bonding structure array may include multiple bonding structures 1836. In some embodiments, each bonding structure 1836 may be formed at the bottom of the bottom reflective layer 1835 corresponding to each of the micro LED structures S1701, S1702, S1701’, and S1702’, respectively. Each bonding structure 1836 may be correspondingly bonded with each first top pad 1841 of the IC backplane 1740, respectively.
FIG. 19C is a cross-sectional view of the micro LED display panel 1750 along the CC’ line in FIG. 17B, according to some embodiments of the present disclosure. As shown in FIG. 19C, the micro LED display panel 1750 includes an IC backplane 1740 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S1702, S1704, S1706, and S1708) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 1750.
In some embodiments, the IC backplane 1740 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 1740.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 1810. In some embodiments, the micro mesa structure 1810 may include a first type epitaxial layer 1811, a light emitting layer 1812, and a second type epitaxial layer 1813, from bottom up.
In some embodiments, the micro LED structures S1702, S1704, S1706, and S1708 in FIG. 19C may be a micro LED structure 1610 described above with reference to FIG. 16. In some embodiments, each of the micro LED structures S1702, S1704, S1706, and S1708 includes one sidewall passing though the light emitting layer and three sidewalls not passing though the light emitting layer. In some embodiments, the sidewall passing though the light emitting layer of the micro LED structure S1702 may be at the first side, the sidewall passing though the light emitting layer of the micro LED structures S1704 and S1706 may be at the fourth side, and the sidewall passing though the light emitting layer of the micro LED structure S1708 may be at the third side.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the fourth trench T1904, the fifth trench T1905, and the sixth trench T1906 formed in the first type epitaxial layer 1811. In some embodiments, the trenches T1904 through T1906 do not pass through or partition the first type epitaxial layer 1811, thus leaving a continuous top of the first type epitaxial layer 1811. In some embodiments, the trenches T1904 through T1906 in FIG. 19C is the trenches T1704 through T1706 described above with reference to FIG. 17A.
In some embodiments, each of the micro LED unit includes a plurality of trenches, including the tenth trench T1914, the eleventh trench T1915, and the twelfth trench T1916 formed in the second type epitaxial layer 1813. In some embodiments, the trenches T1914 through T1916 do not pass through or partition the second type epitaxial layer 1813, thus leaving a continuous bottom of the second type epitaxial layer 1813.
In some embodiments, the micro LED unit includes a plurality of partition trenches (e.g., T1921 and T1923) . In some embodiments, the partition trenches T1921 and T1923 pass through or partition the first type epitaxial layer 1811 and the light emitting layer 1812. In some embodiments, the partition trenches T1921 and T1923 stop in the second type epitaxial layer 1813, leaving a top of the second type epitaxial layer 1813 continuously formed on the micro LED structures structures S1702, S1704, S1706, and S1708. In some embodiments, the partition trenches T1921 and T1923 in FIG. 19C is the partition trenches T1721 and T1723 described above with reference to FIG. 17A. In some embodiments, each of the first partition trench and the third partition trench forms as a sidewall of the micro unit. In some embodiments, the third partition trench of a micro LED unit may be formed as the first partition trench of an adjacent micro LED unit.
In some embodiments, the second type epitaxial layer 1813 may further include an extending part 1915 extending along horizontal direction and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 1813 that is not the extending part 1915 may be referred to as the main second type epitaxial layer 1914. In some embodiments, the partition trenches T1921 and T1923 pass through or partition the main second type epitaxial layer 1914 and do not pass through or partition the extending part 1915. In some embodiments, the extending part 1915 is interconnected with the top extrusions corresponding to the third LED structure S1703 and the fourth LED structure S1704, and is interconnected with the the top extrusions corresponding to the fifth LED structure S1705 and the sixth LED structure S1706 described above with reference to FIG. 17B.
In some embodiments, a bottom conductive layer 1834 may be formed at the bottom of each of the micro LED structures S1702, S1704, S1706, and S1708. In some embodiments, a bottom reflective layer 1835 may at least be formed at the bottom of the bottom conductive layer 1834 and the bottom reflective layer 1835 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 1810. For example, barrier layer 1721 and 1822 may be formed on the sidewalls of the micro mesa structure 1810 of the micro LED unit. In some embodiments, the barrier layer 1721 may be formed on the top inner surfaces and the sidewalls of the trench T1904 through T1916 and the partition trenches T1921 and T1923. In some embodiments, the barrier layer 1822 may be formed on the bottom surfaces and the sidewalls of the trenches T1904 through T1916.
In some embodiments, a dielectric layer 1831 may be filled in the trench T1904 through T1906 and the partition trenches T1921 and T1923 and formed on the barrier layer 1721.
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 1832 covering on the entire top surface of the second type epitaxial layer 1813. In some embodiments, the top surface of the top transparent dielectric layer 1832 may not have any electrically conductive layers.
In some embodiments, the barrier layer 1721 may further include openings at the top surface of the partition trenches T1921 and T1923. In some embodiments, the micro LED units may further include the contact structures 1738 formed in the openings.
In some embodiments, a second reflective layer 1737 may be formed on the sidewall where the barrier layer 1721 may be also formed. The second reflective layer 1737 may be formed on the bottom of the contact structures 1738 and contact the contact structures 1738. In some embodiments, the second reflective layer 1737 may be electrically conductive and electrically connected with the contact structures 1738. In some embodiments, the second reflective layer 1737 may not be connected with the bottom reflective layer 1835.
In some embodiments, the second reflective layer 1737 may be electrically connected with the IC backplane 1740 by a metal via 1725. In some embodiments, the edge of the second reflective layer 1737 extends from the edge of the micro LED array along horizontal direction.
In some embodiments, the IC backplane 1740 may include a first top pad array. The first top pad array may include multiple first top pads 1841. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S1702, S1704, S1706, and S1708. The bonding structure array may include multiple bonding structures 1836. In some embodiments, each bonding structure 1836 may be formed at the bottom of the bottom reflective layer 1835 corresponding to each of the micro LED structures S1702, S1704, S1706, and S1708, respectively. Each bonding structure 1836 may be correspondingly bonded with each first top pad 1841 of the IC backplane 1740, respectively.
In some embodiments, the IC backplane 1740 may further include a second top pad 1942. In some embodiments, a bottom pad 1726 may be formed at the bottom of the metal via 1725. The bottom pad 1726 may be bonded with the second top pad 1942.
In some embodiments, the first type epitaxial layer 1811 may be a p-type semiconductor layer and the second type epitaxial layer 1813 may be an n-type semiconductor layer. In some embodiments, The material of the first type epitaxial layer 1811 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 1813 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 1811 may be an N-type semiconductor layer and the second type epitaxial layer 1813 may be a P-type semiconductor layer. In some embodiments, the light emitting layer 1812 may be at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
In some embodiments, the top outline of the micro LED unit may be a rectangle, square, triangle, or circle. In some embodiments, the top outline of a micro LED in each micro LED unit may be half of the rectangle, square, triangle, or circle.
In some embodiments with reference to FIGs. 17A through 19C, the second type epitaxial layer 1913 may be electrically connected with the second top pad 1942 of the IC backplane 1740 through the contact structures 1738, the second reflective layer 1737, the metal via 1725, and the bottom pad 1726. A person having ordinary skills in the art would understand the second type epitaxial layer 1913 may also be electrically connected with the second top pad 1942 in a method described above with reference to FIGs. 6 and 12.
FIG. 20 illustrates an example of a layout of a micro LED array 2030 with recurring micro LED units 2020 according to some embodiments of the present disclosure. In this example, the micro LED array 2030 may be the micro LED array described below with reference to any of FIGs. 21 through 23. Similarly, the micro LED unit 2020 may be the micro LED unit described below with reference to any of FIGs. 21 through 23; and the micro LED structure 2010 may be the micro LED structure described below with reference to any of FIGs. 21 through 23.
In some embodiments, each micro LED structure 2010 may have four sidewalls. In some embodiments, some sidewalls of the micro LED structure do not pass through or partition the light emitting layer (which is represented by dotted lines) , and other sidewalls of the micro LED structure may pass through or partition the light emitting layer (which is represented by solid lines) .
In some embodiments, the micro LED structures comprise two types. The first-type micro LED structure (M11/M12) comprises two sidewalls not passing through or partitioning the light emitting layer and two sidewalls passing through or partitioning the light emitting layer. Accordingly, the ratio of the number of sidewalls not passing through or partitioning the light emitting layer to the number of sidewalls passing through or partitioning the light emitting layer may be 1: 1 for the first-type micro LED structure (M11/M12) . The second-type micro LED structure (M2) comprises three sidewalls not passing through or partitioning the light emitting layer and one sidewall passing through or partitioning the light emitting layer. Accordingly, the ratio of the number of sidewalls not passing through or partitioning the light emitting layer to the number of sidewalls passing through or partitioning the light emitting layer may be 3: 1 for the second-type micro LED structure (M2) .
In some embodiments, the first-type micro LED structure (M11/M12) further comprises two kinds. The first kind of micro LED structure (M11) comprises two sidewalls not passing through or partitioning the light emitting layer being adjacent and two sidewalls passing through or partitioning the light emitting layer being adjacent. The second kind of micro LED structure (M12) comprises two sidewalls not passing through or partitioning the light emitting layer being parallel and two sidewalls passing through or partitioning the light emitting layer being parallel.
In some embodiments, the micro LED unit 2020 may include micro LED structures S2001 through S2012, each of which may be a micro LED structure 2010 described above. In some embodiments, the micro LED structures S2001 through S2012 may share the same light emitting layer, the same first type epitaxial layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 2020.
In some embodiments, the micro LED structures S2001, S2003, S2010, and S2012 may be the first kind of micro LED structures (M11) ; the micro LED structures S2004 through S2009 may be the second kind of micro LED structures (M12) ; and the micro LED structures S2002 and S2011 may be the second-type micro LED structure (M2) . As shown in FIG. 20, some sidewalls of the micro LED structures S2001 through S2012 representing by the dotted lines do not pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures S2001 through S2012 representing by the solid lines may pass through or partition the light emitting layer.
In some embodiments, the micro LED array 2030 may include micro LED units 2031, 2032, 2033, and 2034, each of which may be a micro LED unit 2020 described above. As shown in FIG. 20, the micro LED array 2030 may be formed by recurringly or repeatedly placing micro LED units 2020 in a plane that may be substantially parallel to the IC backplane.
FIG. 21 is a bottom view of a micro LED display panel 2150 according to some embodiments of the present disclosure. Please note that FIG. 21 aims to illustrate the relative positions of different components and some of the components illustrated in FIG. 21 may not be visible to the naked eye. The micro LED display panel 2150 in FIG. 21 may be further described below with reference to FIGs. 23A through C.
As shown in FIG. 21, the micro LED display panel 2150 includes an IC backplane 2140 and a micro LED unit on top of the IC backplane 2140. The micro LED unit may include multiple micro LED structures S2101 through S2112. Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 2150. In some embodiments, the micro LED array in FIG. 21 may include the micro LED unit 2020 described above with reference to FIG. 20.
In some embodiments, each of the micro LED structures S2101 through S2112 of the micro LED unit may include a micro mesa structure. In some embodiments, the micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer, from bottom up.
In some embodiments, a barrier layer 2121 may be formed on the sidewalls of the micro mesa structure of micro LED structures S2101 through S2112. In some embodiments, the barrier layer 2121 may further include openings. In some embodiments, the micro LED unit may further include second type contact structures 2138 formed in the openings.
In some embodiments, a second reflective layer 2137 may be formed on the sidewalls where the barrier layer 2121 may be also formed. In some embodiments, the second reflective layer 2137 may contact to the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may be electrically conductive and electrically connected to the second type contact structures 2138.
In some embodiments, the second reflective layer 2137 may be further electrically connected with the IC backplane 2140 by a metal via 2125. In some embodiments, the edge of the second reflective layer 2137 extends from the edge of the micro LED array along horizontal direction to the top surface of the metal via 2125. In some embodiments, a bottom pad 2126 may be formed at the bottom of the metal via 2125.
FIGs. 22A and 22B are bottom views of a micro LED display panel 2250 according to some embodiments of the present disclosure. Please note that FIGs. 22A and 22B aim to illustrate the relative positions of different components and some of the components illustrated in FIGs. 22A and 22B may not be visible to the naked eye. Furthermore, FIG. 22A illustrates the micro LED display panel 2250 without a first barrier layer, so that a plurality of first shallow trenches and deep trenches may be exposed. FIG. 22B illustrates the micro LED display panel 2250 with a first barrier layer 2221.
FIGs. 22A and 22B illustrate an example of micro LED display panel 2250 according to some embodiments of the present disclosure. As shown in FIGs. 22A and 22B, the micro LED display panel 2250 includes an IC backplane 2240 and a micro LED array area. The micro LED array area includes a micro LED array, which may be formed by recurringly or repeatedly placing micro LED units 2020 described above with reference to FIG. 20 on the horizontal plane. In some embodiments, the micro LED display panel 2250 may include the micro LED display panel 2150 described above with reference to FIG. 21.
In some embodiments, each of the micro LED units of the micro LED display panel 2250 includes a plurality of micro LED structures S2201 through S2212. In some embodiments, the micro LED structures S2201 through S2212 in FIGs. 22A and 22B may be the micro LED structures S2001 through S2012 and S2101 through S2112 described above with reference to FIGs. 20 and 21, respectively.
In some embodiments, each of the micro LED structures S2201 through S2212 of the micro LED unit may include a micro mesa structure. In some embodiments, the micro mesa structure may include a first type epitaxial layer, a light emitting layer, and a second type epitaxial layer, from bottom up.
As shown in FIG. 22A, in some embodiments, each micro LED unit of the micro LED display panel 2250 comprises a plurality of first shallow trenches T2201 through T2207 formed within the first type epitaxial layer, which do not pass through the first type epitaxial layer. The first shallow trenches T2201 through T2207 may be formed as lower sidewalls of the micro LED structures S2201 through S2212 not passing through the light emitting layer. In this example, the first shallow trench T2201 forms the shared sidewalls of the micro LED structures S2201 and S2202; the first shallow trench T2202 forms the shared sidewalls of the micro LED structures S2202 and S2203; the first shallow trench T2203 forms the shared sidewalls of the micro LED structures S2210 and S2211; and the first shallow trench T2204 forms the shared sidewalls of the micro LED structures S2211 and S2212. Further, the first shallow trench T2205 forms the shared sidewalls of the micro LED structures S2201 and S2204, the micro LED structures S2202 and S2205, and the micro LED structures S2203 and S2206; the first shallow trench T2206 forms the shared sidewalls of the micro LED structures S2204 and S2207, the micro LED structures S2205 and S2208, and the micro LED structures S2206 and S2209; and the first shallow trench T2207 forms the shared sidewalls of the micro LED structures S2207 and S2210, the micro LED structures S2208 and S2211, and the micro LED structures S2209 and S2212.
In some embodiments, the micro LED unit comprises a plurality of deep trenches T2221 through T2226. The deep trenches T2221 through T2226 pass through the first type epitaxial layer and the light emitting layer, and stop in the second type epitaxial layer, leaving a top of the second type epitaxial layer continuously formed on each of the micro LED unit and between adjacent micro LED units. In some embodiments, the deep trenches T2221 through T2226 may be formed as sidewalls of the micro LED structures S2201 through S2212 passing through the light emitting layer. In this example, the deep trenches T2221, T2224, T2225, and T2226 form the sidewalls of the micro LED unit, wherein the deep trench T2221 forms the sidewalls of the micro LED structures S2201, S2204, S2207, and S2210; the deep trench T2224 forms the sidewalls of the micro LED structures S2203, S2206, S2209, and S2212; the deep trench T2225 forms the sidewalls of the micro LED structures S2201 through S2203; and the deep trench T2226 forms the sidewalls of the micro LED structures S2210 through S2212. Further, the deep trench T2222 forms the shared sidewalls of the micro LED structures S2204 and S2205, and the micro LED structures S2207 and S2208; and the deep trench T2223 forms the shared sidewalls of the micro LED structures S2205 and S2206, and the micro LED structures S2208 and S2209.
In some embodiments, the plurality of first shallow trenches T2201 through T2207 and the plurality of deep trenches T2221 through T2226 form in the micro LED unit to form a first bottom extrusion, a second bottom extrusion, a third bottom extrusion, a fourth bottom extrusion, a fifth bottom extrusion, a sixth bottom extrusion, a seventh bottom extrusion, an eighth bottom extrusion, a nineth bottom extrusion, a tenth bottom extrusion, a eleventh bottom extrusion, and a twelfth bottom extrusion, each of which extrudes downward from the first type epitaxial layer. In some embodiments, each of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, the eighth bottom extrusion, the nineth bottom extrusion, the tenth bottom extrusion, the eleventh bottom extrusion, and the twelfth bottom extrusion corresponds to each of the micro LED structures S2201 through S2212, respectively.
As shown in FIG. 22B, in some embodiments, the barrier layer 2221 may be formed on the sidewalls of the first shallow trenches T2201 through T2207 and the deep trenches T2221 through T2226, which may be exposed in FIG. 22A. That is, the barrier layer 2221 may be formed on the sidewalls the micro LED structures S2201 through S2212. In some embodiments, the barrier layer 2221 may further include openings at a top of the deep trenches T2221 through T2226. In some embodiments, the micro LED units may further include the second type contact structures 2238 formed in the openings.
In some embodiments, a second reflective layer 2237 may be formed on the sidewalls where the barrier layer 2221 may be also formed. In some embodiments, the second reflective layer 2237 may be formed on the sidewalls and the top of the deep trenches T2221 through T2226. The second reflective layer 2237 may contact to the second type contact structures 2238. In some embodiments, the second reflective layer 2237 may be electrically conductive and electrically connected to the second type contact structures 2238. In some embodiments, the second reflective layer 2237 and the second type contact structures 2238 in FIGs. 22A and 22B may be the second reflective layer 2137 and the second type contact structures 2138 described above with reference to FIG. 21, respectively.
In some embodiments, the micro LED display panel 2250 further comprises a metal via 2225 and a bottom pad 2226. In some embodiments, the metal via 2225 and the bottom pad 2226 in FIGs. 22A and 22B may be the metal via 2125 and the bottom pad 2126 described above with reference to FIG. 21, respectively.
FIG. 23A is a cross-sectional view of the micro LED display panel 2150 along the AA’ line in FIG. 21, according to some embodiments of the present disclosure. As shown in FIG. 23A, the micro LED display panel 2150 includes an IC backplane 2140 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S2101, S2102 and S2103) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 2150.
In some embodiments, the IC backplane 2140 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 2140.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 2310. In some embodiments, the micro mesa structure 2310 may include a first type epitaxial layer 2311, a light emitting layer 2312, and a second type epitaxial layer 2313, from bottom up. That is, among the three layers, the first type epitaxial layer 2311 is closest to the IC backplane 2140; the light emitting layer 2312 is on top of the first type epitaxial layer 2311 and is further away from the IC backplane 2140; the second type epitaxial layer 2313 is on top of the light emitting layer 2312 and is the furthest away from the IC backplane 2140.
In some embodiments, the micro LED structure S2101 in FIG. 23A is a first kind of micro LED structure (M11) described above with reference to FIG. 20. In some embodiments, the micro LED structure S2102 in FIG. 23A is a second-type micro LED structure (M2) described above with reference to FIG. 20. In some embodiments, the micro LED structure S2103 in FIG. 23A is a first kind of micro LED structure (M11) described above with reference to FIG. 20.
In some embodiments, the first type epitaxial layer 2311 in the micro LED unit may include a plurality of first shallow trenches (e.g., T2301 and T2302) formed at the bottom of the first type epitaxial layer 2311. In some embodiments, the first shallow trenches T2301 and T2302 do not pass through or partition the first type epitaxial layer 2311, thus leaving a continuous top of the first type epitaxial layer 2311. In some embodiments, the first shallow trenches T2301 and T2302 in FIG. 23A may be the first shallow trenches T2201 and T2202 described above with reference to FIG. 22A.
In some embodiments, the second type epitaxial layer 2313 in the micro LED unit may include a plurality of second shallow trenches (e.g., T2311 and T2312) formed at the top of the second type epitaxial layer 2313. In some embodiments, the second shallow trenches T2311 and T2312 may be parallel to or corresponding to the first shallow trenches T2301 and T2302. In some embodiments, the second shallow trenches T2311 and T2312 do not pass through or partition the second type epitaxial layer 2313, thus leaving a continuous bottom of the second type epitaxial layer 2313.
In some embodiments, the micro LED unit comprises a plurality of deep trenches (e.g., T2321 and T2324) . In some embodiments, the deep trenches T2321 and T2324 pass through or partition the first type epitaxial layer 2311 and the light emitting layer 2312. In some embodiments, the deep trenches T2321 and T2324 stop in the second type epitaxial layer 2313, leaving a top of the second type epitaxial layer 2313 continuously formed on the micro LED structures S2101, S2102 and S2103. In some embodiments, the deep trenches T2321 and T2324 in FIG. 23A is the deep trenches T2221 and T2224 described above with reference to FIG. 22A.
In some embodiments, a bottom conductive layer 2334 may be formed at the bottom of each of the micro LED structures S2101, S2102 and S2103. In some embodiments, a first reflective layer 2335 may at least be formed at the bottom of the bottom conductive layer 2334 and the first reflective layer 2335 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 2310. For example, barrier layers 2121 and 2322 may be formed on the sidewalls of the micro mesa structure 2310 of the micro LED unit. In some embodiments, the barrier layer 2121 may be formed on the top inner surfaces and the sidewalls of the first shallow trenches T2301 and T2302 and the deep trenches T2321 and T2324. In some embodiments, the barrier layer 2322 may be formed on the bottom surfaces and the sidewalls of the second shallow trenches T2311 and T2312.
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 2332 covering on the entire top surface of the second type epitaxial layer 2313. In some embodiments, the top surface of the top transparent dielectric layer 2332 may not have any electrically conductive layers.
In some embodiments, a dielectric layer 2331 may be filled in the first shallow trenches T2301 and T2302 and the deep trenches T2321 and T2324 and formed on the barrier layer 2121. In some embodiments, the top transparent dielectric layer 2332 may be filled into the second shallow trenches T2311 and T2312 and formed on the barrier layer 2322.
In some embodiments, the barrier layer 2121 may further include openings at the top surface of the deep trenches T2321 and T2324. In some embodiments, the micro LED units may further include the second type contact structures 2138 formed in the openings.
In some embodiments, a second reflective layer 2137 may be formed on the sidewall where the barrier layer 2121 may be also formed. The second reflective layer 2137 may be formed on the bottom of the second type contact structures 2138 and contact the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may be electrically conductive and electrically connected with the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may not be connected with the bottom reflective layer 2335.
In some embodiments, the IC backplane 2140 may include a first top pad array. The first top pad array may include multiple first top pads 2341. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S2101, S2102 and S2103. In some embodiments, the bonding structure array may be formed correspondingly at the bottom of the first bottom extrusion, the second bottom extrusion, the third bottom extrusion, the fourth bottom extrusion, the fifth bottom extrusion, the sixth bottom extrusion, the seventh bottom extrusion, the eighth bottom extrusion, the nineth bottom extrusion, the tenth bottom extrusion, the eleventh bottom extrusion, and the twelfth bottom extrusion.
In some embodiments, the bonding structure array may include multiple bonding structures 2336. In some embodiments, each bonding structure 2336 may be formed at the bottom of the bottom reflective layer 2335 corresponding to each of the micro LED structures S2101, S2102 and S2103, respectively. Each bonding structure 2336 may be correspondingly bonded with each first top pad 2341 of the IC backplane 2140, respectively.
FIG. 23B is a cross-sectional view of the micro LED display panel 2150 along the BB’ line in FIG. 21, according to some embodiments of the present disclosure. As shown in FIG. 23, the micro LED display panel 2150 includes an IC backplane 2140 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S2104, S2105 and S2106) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 2150.
In some embodiments, the IC backplane 2140 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 2140.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 2310. In some embodiments, the micro mesa structure 2310 may include a first type epitaxial layer 2311, a light emitting layer 2312, and a second type epitaxial layer 2313, from bottom up.
In some embodiments, the micro LED structures S2104, S2105, and S2106 in FIG. 23B may be the second kind of micro LED structure (M12) described above with reference to FIG. 20.
In some embodiments, the micro LED unit comprises a plurality of deep trenches (e.g., T2321 through T2324) . In some embodiments, the deep trenches T2321 through T2324 pass through or partition the first type epitaxial layer 2311 and the light emitting layer 2312. In some embodiments, the deep trenches T2321 through T2324 stop in the second type epitaxial layer 2313, leaving a top of the second type epitaxial layer 2313 continuously formed on the micro LED structures S2104, S2105, and S2106. In some embodiments, the deep trenches T2321 through T2324 in FIG. 23B is the deep trenches T2221 through T2224 described above with reference to FIG. 22A.
In some embodiments, the second type epitaxial layer 2313 may further include an extending part 2315 extending along horizontal direction and being interconnected with the adjacent micro LED units. The part of the second type epitaxial layer 2313 that is not the extending part 2315 may be referred to as the main second type epitaxial layer 2314. In some embodiments, the deep trenches T2321 through T2324 pass through or partition the main second type epitaxial layer 2314 and do not pass through or partition the extending part 2315.
In some embodiments, a bottom conductive layer 2334 may be formed at the bottom of each of the micro LED structures S2104, S2105 and S2106. In some embodiments, a first reflective layer 2335 may at least be formed at the bottom of the bottom conductive layer 2334 and the first reflective layer 2335 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 2310. For example, a barrier layer 2121 may be formed on the sidewalls of the micro mesa structure 2310 of the micro LED unit. In some embodiments, the barrier layer 2121 may be formed on the top inner surfaces and the sidewalls of the deep trenches T2321 through T2324.
In some embodiments, a dielectric layer 2331 may be filled in the deep trenches T2321 through T2324 and formed on the barrier layer 2121.
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 2332 covering on the entire top surface of the second type epitaxial layer 2313. In some embodiments, the top surface of the top transparent dielectric layer 2332 may not have any electrically conductive layers.
In some embodiments, the barrier layer 2121 may further include openings at the top surface of the deep trenches T2321 through T2324. In some embodiments, the micro LED units may further include the second type contact structures 2138 formed in the openings.
In some embodiments, a second reflective layer 2137 may be formed on the sidewall where the barrier layer 2121 may be also formed. The second reflective layer 2137 may be formed on the bottom of the second type contact structures 2138 and contact the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may be electrically conductive and electrically connected with the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may not be connected with the bottom reflective layer 2335.
In some embodiments, the second reflective layer 2137 may be electrically connected with the IC backplane 2140 by a metal via 2125. In some embodiments, the edge of the second reflective layer 2137 extends from the edge of the micro LED array along horizontal direction.
In some embodiments, the IC backplane 2140 may include a first top pad array. The first top pad array may include multiple first top pads 2341. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S2104, S2105 and S2106. The bonding structure array may include multiple bonding structures 2336. In some embodiments, each bonding structure 2336 may be formed at the bottom of the bottom reflective layer 2335 corresponding to each of the micro LED structures S2104, S2105 and S2106, respectively. Each bonding structure 2336 may be correspondingly bonded with each first top pad 2341 of the IC backplane 2140, respectively.
In some embodiments, the IC backplane 2140 may further include a second top pad 2342. In some embodiments, a bottom pad 2126 may be formed at the bottom of the metal via 2125. The bottom pad 2126 may be bonded with the second top pad 2342.
FIG. 23C is a cross-sectional view of the micro LED display panel 2150 along the CC’ line in FIG. 21, according to some embodiments of the present disclosure. As shown in FIG. 23C, the micro LED display panel 2150 includes an IC backplane 2140 and a micro LED array area. The micro LED array area includes a micro LED array, which may include multiple micro LED structures (e.g., micro LED structures S2101, S2104, S2107, and S2110) . Each micro LED structure may be referred to as a micro LED, which may form at least a portion of a pixel element on the micro LED display panel 2150.
In some embodiments, the IC backplane 2140 may be bonded with the micro LED array of the micro LED array area. In some embodiments, each micro LED may be separately electrically controlled by the IC backplane 2140.
In some embodiments, each micro LED structure of the micro LED array may include a micro mesa structure 2310. In some embodiments, the micro mesa structure 2310 may include a first type epitaxial layer 2311, a light emitting layer 2312, and a second type epitaxial layer 2313, from bottom up.
In some embodiments, the micro LED structure S2101 and S2110 in FIG. 23C may be the first kind of micro LED structure (M11) described above with reference to FIG. 20.In some embodiments, the micro LED structures S2104 and S2107 in FIG. 23C may be the second kind of micro LED structure (M12) described above with reference to FIG. 20.
In some embodiments, the first type epitaxial layer 2311 in the micro LED unit may include a plurality of first shallow trenches (e.g., T2305, T2306, and T2307) formed at the bottom of the first type epitaxial layer 2311. In some embodiments, the first shallow trenches T2305, T2306, and T2307 do not pass through or partition the first type epitaxial layer 2311, thus leaving a continuous top of the first type epitaxial layer 2311. In some embodiments, the first shallow trenches T2305, T2306, and T2307 in FIG. 23C is the first shallow trenches T2305, T2306, and T2307 described above with reference to FIG. 21.
In some embodiments, the second type epitaxial layer 2313 in the micro LED unit may include a plurality of second shallow trenches (e.g., T2315, T2316, and T2317) formed at the top of the second type epitaxial layer 2313. In some embodiments, the second shallow trenches T2315, T2316, and T2317 may be parallel to or corresponding to the first shallow trenches T2305, T2306, and T2307. In some embodiments, the second shallow trenches T2305, T2306, and T2307 do not pass through or partition the second type epitaxial layer 2313, thus leaving a continuous bottom of the second type epitaxial layer 2313.
In some embodiments, the micro LED unit comprises a plurality of deep trenches (e.g., T2325 and T2326) . In some embodiments, the deep trenches T2325 and T2326 pass through or partition the first type epitaxial layer 2311 and the light emitting layer 2312. In some embodiments, the deep trenches T2325 and T2326 stop in the second type epitaxial layer 2313, leaving a top of the second type epitaxial layer 2313 continuously formed on the micro LED structures S2101, S2104, S2107, and S2110. In some embodiments, the deep trenches T2325 and T2326 in FIG. 23C is the deep trenches T2325 and T2326 described above with reference to FIG. 21.
In some embodiments, a bottom conductive layer 2334 may be formed at the bottom of each of the micro LED structures S2101, S2104, S2107, and S2110. In some embodiments, a first reflective layer 2335 may at least be formed at the bottom of the bottom conductive layer 2334 and the first reflective layer 2335 may be electrically conductive.
In some embodiments, a barrier layer may be formed on the sidewall of the micro mesa structure 2310. For example, barrier layers 2121 and 2322 may be formed on the sidewalls of the micro mesa structure 2310 of the micro LED unit. In some embodiments, the barrier layer 2121 may be formed on the top inner surfaces and the sidewalls of the first shallow trenches T2305, T2306, and T2307 and the deep trenches T2325 and T2326. In some embodiments, the barrier layer 2322 may be formed on the bottom surfaces and the sidewalls of the second shallow trenches T2315, T2316, and T2317.
In some embodiments, each micro LED unit may further include a top transparent dielectric layer 2332 covering on the entire top surface of the second type epitaxial layer 2313. In some embodiments, the top surface of the top transparent dielectric layer 2332 may not have any electrically conductive layers.
In some embodiments, a dielectric layer 2331 may be filled in the first shallow trenches T2305, T2306, and T2307 and the deep trenches T2325 and T2326 and formed on the barrier layer 2121. In some embodiments, the top transparent dielectric layer 2332 may be filled into the second shallow trenches T2315, T2316, and T2317 and formed on the barrier layer 2322.
In some embodiments, the barrier layer 2121 may further include openings at the top surface of the deep trenches T2325 and T2326. In some embodiments, the micro LED units may further include the second type contact structures 2138 formed in the openings.
In some embodiments, a second reflective layer 2137 may be formed on the sidewall where the barrier layer 2121 may be also formed. The second reflective layer 2137 may be formed on the bottom of the second type contact structures 2138 and contact the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may be electrically conductive and electrically connected with the second type contact structures 2138. In some embodiments, the second reflective layer 2137 may not be connected with the bottom reflective layer 2335.
In some embodiments, the IC backplane 2140 may include a first top pad array. The first top pad array may include multiple first top pads 2341. In some embodiments, the micro LED array area may include a bonding structure array formed at the bottom of each of the micro LED structures S2101, S2104, S2107, and S2110. The bonding structure array may include multiple bonding structures 2336. In some embodiments, each bonding structure 2336 may be formed at the bottom of the bottom reflective layer 2335 corresponding to each of the micro LED structures S2101, S2104, S2107, and S2110, respectively. Each bonding structure 2336 may be correspondingly bonded with each first top pad 2341 of the IC backplane 2140, respectively.
In some embodiments, the first type epitaxial layer 2311 may be a p-type semiconductor layer and the second type epitaxial layer 2313 may be an n-type semiconductor layer. In some embodiments, The material of the first type epitaxial layer 2311 may be one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of p-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof; and the material of the second type epitaxial layer 2313 may be one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, AlP, InP, AlN, and/or InN, etc., or any combinations thereof, preferably one or more of n-type GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, and/or AlGaInP, or any combinations thereof.
In some embodiments, the first type epitaxial layer 2311 may be an N-type semiconductor layer and the second type epitaxial layer 2313 may be a P-type semiconductor layer. In some embodiments, the light emitting layer 2312 may be at least one layer of quantum well layer. The material of the quantum well layer can be one of GaAs, InGaAs, GaP, GaN, InGaN, AlGaN, AlInP, GaInP, AlGaInP, etc.
In some embodiments, the top outline of the micro LED unit is a rectangle, square, triangle, or circle. In some embodiments, the top outline of a micro LED in each micro LED unit is half of the rectangle, square, triangle, or circle.
In some embodiments with reference to FIGs. 21 through 23C, the second type epitaxial layer 2313 may be electrically connected with the second top pad 2342 of the IC backplane 2140 through the contact structures 2138, the second reflective layer 2137, the metal via 2125, and the bottom pad 2126. A person having ordinary skills in the art would understand the second type epitaxial layer 2313 may also be electrically connected with the second top pad 2342 in a method described above with reference to FIGs. 6 and 12.
FIG. 24 illustrates an example of a layout of a micro LED array 2430 with recurring micro LED units 2420 according to some embodiments of the present disclosure.
In some embodiments, each micro LED structure 2410 may have four sidewalls. In some embodiments, some sidewalls of the micro LED structure do not pass through or partition the light emitting layer (which is represented by dotted lines) , and other sidewalls of the micro LED structure may pass through or partition the light emitting layer (which is represented by solid lines) .
In some embodiments, the micro LED structures comprise three types. The first-type micro LED structure (M11/M12) in FIG. 24 may be the first-type micro LED structure (M11/M12) described above with reference to FIG. 20. The second-type micro LED structure (M2) in FIG. 24 may be the second-type micro LED structure (M2) described above with reference to FIG. 20. The third-type micro LED structure (M3) comprises one sidewall not passing through or partitioning the light emitting layer and three sidewalls passing through or partitioning the light emitting layer. Accordingly, an amount ratio of the sidewalls not passing through or partitioning the light emitting layer and the sidewalls passing through or partitioning the light emitting layer is 1: 3 for the third-type micro LED structure (M3) .
In some embodiments, the first-type micro LED structure (M11/M12) further comprises two kinds. The first kind of micro LED structure (M11) and the second kind of micro LED structure (M12) in FIG. 24 may be the first kind of micro LED structure (M11) and the second kind of micro LED structure (M12) described above with reference to FIG. 20.
In some embodiments, the micro LED unit 2420 may include micro LED structures S2401 through S2412, each of which may be a micro LED structure 2410 described above. In some embodiments, the micro LED structures S2401 through S2412 may share the same light emitting layer, the same first type epitaxial layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 2420.
In some embodiments, the micro LED structures S2401, S2403, S2410, and S2412 may be the first kind of micro LED structures (M11) ; the micro LED structures S2404, S2406, S2407, and S2409 may be the second kind of micro LED structures (M12) ; the micro LED structures S2402 and S2411 may be the second-type micro LED structures (M2) ; and the micro LED structures S2405 and S2408 may be the third-type micro LED structures (M3) . As shown in FIG. 24, some sidewalls of the micro LED structures S2401 through S2412 representing by the dotted lines do not pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures S2401 through S2412 representing by the solid lines may pass through or partition the light emitting layer.
In some embodiments, the micro LED array 2430 may include micro LED units 2431, 2432, 2433, and 2434, each of which may be a micro LED unit 2420 described above. As shown in FIG. 24, the micro LED array 2430 is formed by recurringly or repeatedly placing micro LED units 2420 on the horizontal plane.
FIG. 25 illustrates an example of a layout of a micro LED array 2530 with recurring micro LED units 2520 according to some embodiments of the present disclosure.
In some embodiments, the micro LED structures 2510 comprise the first-type micro LED structure (M11/M12) and the third-type micro LED structure (M3) , which may be the first-type micro LED structure (M11/M12) and the third-type micro LED structure (M3) described above with reference to FIG. 24, respectively.
In some embodiments, the first-type micro LED structure (M11/M12) further comprises two kinds. The first kind of micro LED structure (M11) and the second kind of micro LED structure (M12) in FIG. 25 may be the first kind of micro LED structure (M11) and the second kind of micro LED structure (M12) described above with reference to FIG. 24.
In some embodiments, the micro LED unit 2520 may include micro LED structures S2401 through S2412, each of which may be a micro LED structure 2510 described above. In some embodiments, the micro LED structures S2401 through S2412 may share the same light emitting layer, the same first type epitaxial layer, and the same second type epitaxial layer from bottom up. In some embodiments, the light emitting layer may be continuously formed in the micro LED unit 2520.
In some embodiments, the micro LED structures S2402, S2403, S2411, and S2412 may be the first kind of micro LED structures (M11) ; the micro LED structures S2404 and S2407 may be the second kind of micro LED structures (M12) ; and the micro LED structures S2401, S2405, S2406, and S2408 through S2410 may be the third-type micro LED structures (M3) . As shown in FIG. 25, some sidewalls of the micro LED structures S2401 through S2412 representing by the dotted lines do not pass through or partition the light emitting layer, and the other sidewalls of the micro LED structures S2401 through S2412 representing by the solid lines may pass through or partition the light emitting layer.
In some embodiments, the micro LED array 2530 may include micro LED units 2531, 2532, 2533, and 2534, each of which may be a micro LED unit 2520 described above. As shown in FIG. 25, the micro LED array 2530 is formed by recurringly or repeatedly placing micro LED units 2520 on the horizontal plane.
It is understood by those skilled in the art that, the micro LED display panel is not limited by the structure mentioned above, and may include more or less components than those as illustrated, or some components may be combined, or a different component may be utilized.
It is understood by those skilled in the art that, all or part of the steps for implementing the foregoing embodiments may be implemented by hardware, or may be implemented by a program which instructs related hardware. The program may be stored in a flash memory, in a conventional computer device, in a central processing module, in an adjustment module, etc.
The above descriptions are merely embodiments of the present disclosure, and the present disclosure is not limited thereto. A modifications, equivalent substitutions and improvements made without departing from the conception and principle of the present disclosure shall fall within the protection scope of the present disclosure.
Further embodiments also include various subsets of the above embodiments including embodiments as shown in FIGs. 1 through 25 combined or otherwise re-arranged in various other embodiments.
Although the detailed description contains many specifics, these should not be construed as limiting the scope of the disclosure but merely as illustrating different examples and aspects of the disclosure. It should be appreciated that the scope of the disclosure includes other embodiments not discussed in detail above. For example, the approaches described above can be applied to the integration of functional devices other than LEDs and OLEDs with control circuitry other than pixel drivers. Examples of non-LED devices include vertical cavity surface emitting lasers (VCSEL) , photodetectors, micro-electro-mechanical system (MEMS) , silicon photonic devices, power electronic devices, and distributed feedback lasers (DFB) . Examples of other control circuitry include current drivers, voltage drivers, trans-impedance amplifiers, and logic circuits.
The preceding description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the embodiments described herein and variations thereof. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the subject matter disclosed herein. Thus, the present disclosure is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the following claims and the principles and novel features disclosed herein.
Features of the present disclosure can be implemented in, using, or with the assistance of a computer program product, such as a storage medium (media) or computer readable storage medium (media) having instructions stored thereon/in which can be used to program a processing system to perform any of the features presented herein. The storage medium can include, but is not limited to, high-speed random access memory, such as DRAM, SRAM, DDR RAM or other random access solid state memory devices, and may include non-volatile memory, such as one or more magnetic disk storage devices, optical disk storage devices, flash memory devices, or other non-volatile solid state storage devices. Memory optionally includes one or more storage devices remotely located from the CPU (s) . Memory or alternatively the non-volatile memory device (s) within the memory, comprises a non-transitory computer readable storage medium.
Stored on any machine readable medium (media) , features of the present disclosure can be incorporated in software and/or firmware for controlling the hardware of a processing system, and for enabling a processing system to interact with other mechanisms utilizing the results of the present disclosure. Such software or firmware may include, but is not limited to, application code, device drivers, operating systems, and execution environments/containers.
It will be understood that, although the terms “first, ” “second, ” etc. may be used herein to describe various elements or steps, these elements or steps should not be limited by these terms. These terms are only used to distinguish one element or step from another.
The terminology used herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the claims. As used in the description of the embodiments and the appended claims, the singular forms “a, ” “an” and “the” are intended to include the plural forms as well, unless the context clearly indicates otherwise. It will also be understood that the term “and/or” as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items. It will be further understood that the terms “comprises” and/or “comprising, ” when used in this specification, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof.
As used herein, the term “if” may be construed to mean “when” or “upon” or “in response to determining” or “in accordance with a determination” or “in response to detecting, ” that a stated condition precedent is true, depending on the context. Similarly, the phrase “if it is determined [that a stated condition precedent is true] ” or “if [a stated condition precedent is true] ” or “when [a stated condition precedent is true] ” may be construed to mean “upon determining” or “in response to determining” or “in accordance with a determination” or “upon detecting” or “in response to detecting” that the stated condition precedent is true, depending on the context.
The foregoing description, for purpose of explanation, has been described with reference to specific embodiments. However, the illustrative discussions above are not intended to be exhaustive or to limit the claims to the precise forms disclosed. Many modifications and variations are possible in view of the above teachings. The embodiments were chosen and described in order to best explain principles of operation and practical applications, to thereby enable others skilled in the art to best utilize the disclosure and the various embodiments.