本发明的最佳实施方式BEST MODE FOR CARRYING OUT THE INVENTION在以下的叙述中,为了使读者更好地理解本申请而提出了许多技术细节。但是,本领域的普通技术人员可以理解,即使没有这些技术细节和基于以下各实施方式的种种变化和修改,也可以实现本申请各权利要求所要求保护的技术方案。In the following description, numerous technical details are set forth in order to provide the reader with a better understanding of the present application. However, those skilled in the art can understand that the technical solutions claimed in the claims of the present application can be implemented without these technical details and various changes and modifications based on the following embodiments.
为使本发明的目的、技术方案和优点更加清楚,下面将结合附图对本发明的实施方式作进一步地详细描述。The embodiments of the present invention will be further described in detail below with reference to the accompanying drawings.
本发明第一实施方式涉及一种电源管理集成电路的控制方法,本实施方式中电路的基本元件为Q1(即电源功率管1)、Q2(即电源功率管2)、Q3(即电源功率管3)、L1(即电感),基本控制单元为C1(即控制器)。The first embodiment of the present invention relates to a method for controlling a power management integrated circuit. In this embodiment, the basic components of the circuit are Q1 (ie, power supply power tube 1), Q2 (ie, power supply power tube 2), and Q3 (ie, power supply power tube). 3), L1 (ie, inductance), the basic control unit is C1 (ie controller).
本实施方式的具体流程如图4所示,在步骤410中,利用电源功率管1、电源功率管2、电源功率管3、控制器和电感组成与降压DC-DC电路结构相同的电路,即将Q1一端与输入电压相连接,另一端与L1和Q2相连,Q2的另一端与相对零电位连接,将Q3并联于L1两端,由控制器C1输出控制信号给Q1、Q2和Q3的栅极,控制Q1、Q2和Q3的导通和关闭,如图5所示。由于在现有技术中,降压DC-DC电路的基本器件也是3个电源功率管、控制器和电感,因此本步骤不存在任何的技术难度,在此不再赘述。The specific process of this embodiment is shown in FIG. 4. Instep 410, the powersupply power tube 1, the powersupply power tube 2, the powersupply power tube 3, the controller, and the inductor are used to form the same circuit as the step-down DC-DC circuit. The Q1 end is connected to the input voltage, the other end is connected to L1 and Q2, the other end of Q2 is connected to the relative zero potential, Q3 is connected in parallel to L1, and the controller C1 outputs control signals to the gates of Q1, Q2 and Q3. Pole, control the conduction and closing of Q1, Q2 and Q3, as shown in Figure 5. Since the basic device of the step-down DC-DC circuit is also three power supply tubes, controllers, and inductors in the prior art, there is no technical difficulty in this step, and details are not described herein again.
接着,在步骤420中,通过控制器接收使能信号1和使能信号2,在同一时间段,使能信号1和使能信号2择一有效。也就是说,当使能信号1为高有效时,使能信号2只能设置为低无效;当使能信号2为高有效时,使能信号1只能设置为低无效。Next, instep 420, the enablesignal 1 and the enablesignal 2 are received by the controller, and the enablesignal 1 and the enablesignal 2 are selectively asserted during the same period of time. That is to say, when the enablesignal 1 is active high, the enablesignal 2 can only be set to low invalid; when the enablesignal 2 is active high, the enablesignal 1 can only be set to low invalid.
接着,在步骤430中,判断使能信号1是否为高有效。如果判定使能信号1为高有效,则进入步骤440。Next, instep 430, it is determined whether the enablesignal 1 is active high. If it is determined that the enablesignal 1 is active high, then step 440 is entered.
在步骤440中,根据降压DC-DC电路的工作原理对电源功率管1、电源功率管2、电源功率管3进行控制,实现降压DC-DC电路。具体地说,当使能信号1为高有效时(此时使能信号2只能设置为低无效),具体工作过程与现有的降压DC-DC电路一样可以简单分为三个阶段:Instep 440, the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3 are controlled according to the working principle of the step-down DC-DC circuit to implement a step-down DC-DC circuit. Specifically, when the enablesignal 1 is active high (the enablesignal 2 can only be set to low inactive), the specific working process can be easily divided into three stages as the existing step-down DC-DC circuit:
第一阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1导通、Q2关断、Q3也关断,这时VIN给电感L1充电,同时也给VOUT供电。The first stage controller C1 controls Q1 on, Q2 off, and Q3 off by control signals CQ1, CQ2, and CQ3. At this time, VIN charges inductor L1 and also supplies power to VOUT.
第二阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1关断、Q2导通、Q3关断,这时电感L1放电给VOUT以及VOUT上的负载。The second stage controller C1 controls Q1 off, Q2 on, and Q3 off through control signals CQ1, CQ2, and CQ3, respectively, when inductor L1 is discharged to the loads on VOUT and VOUT.
第三阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1和Q2关断、Q3导通,这个阶段发生的条件是电感L1电流为0时,为了防止电感电流震荡产生EMI,所以将Q1和Q2关断,并将Q3导通,即将电感L1中的多余能量通过Q3消耗掉。The third stage controller C1 controls Q1 and Q2 to be turned off and Q3 to be turned on respectively through control signals CQ1, CQ2, and CQ3. The condition occurs at this stage when the current of the inductor L1 is 0. In order to prevent EMI from being generated by the inductor current oscillation, Q1 is used. And Q2 is turned off, and Q3 is turned on, that is, the excess energy in the inductor L1 is consumed by Q3.
不难发现,本实施方式中控制器C1通过对Q1、Q2、Q3的控制,实现降压DC-DC电路的方式,与现有技术中的控制器C1通过对Q1、Q2、Q3的控制,实现降压DC-DC电路的方式完全相同。由于在现有技术中,Q1和Q3一般使用PMOS管(P沟道的金属氧化物半导体场效应晶体管),PMOS管在控制端为低时处于完全导通状态(即处于恒流区,导通电阻很小且不变),在控制端为高时处于完全关断状态(即处于夹断区,电阻无穷大)。Q2使用NMOS管(N沟道的金属氧化物半导体场效应晶体管),NMOS在控制端为高时完全导通状态,为低时处于完全关断状态,即现有的该降压DC-DC电路在工作过程中各个控制信号工作时序和关键连接点电路SW的电压波形如图6所示。It is not difficult to find that in the embodiment, the controller C1 realizes the step-down DC-DC circuit by controlling Q1, Q2, and Q3, and controls the Q1, Q2, and Q3 through the controller C1 in the prior art. The way to implement a step-down DC-DC circuit is exactly the same. In the prior art, Q1 and Q3 generally use a PMOS transistor (P-channel metal oxide semiconductor field effect transistor), and the PMOS transistor is in a fully conducting state when the control terminal is low (ie, in a constant current region, conducting The resistance is small and constant), in the fully off state when the control terminal is high (ie, in the pinch-off region, the resistance is infinite). Q2 uses an NMOS transistor (N-channel metal oxide semiconductor field effect transistor). The NMOS is fully turned on when the control terminal is high, and is completely turned off when it is low, that is, the existing step-down DC-DC circuit. The working timing of each control signal and the voltage waveform of the critical connection point circuit SW during operation are as shown in FIG. 6.
因此,为使本实施方式能与现有技术更好地兼容,在本实施方式中,电源功率管1(即Q1)和电源功率管3(即Q3)使用PMOS管,电源功率管2(即Q2)使用NMOS管。也就是说,在当使能信号1为高有效时,电源集成电路在工作过程中各个控制信号工作时序和关键连接点电路SW的电压波形与图6相同,控制信号CQ1、CQ2、CQ3以及中间点SW的电压波形都是快速翻转的信号,频率一般在几百KHz到几MHz,将会导致电磁兼容问题。但是根据降压DC-DC电路的工作原理,其能量传输效率可高达90%以上。因此,在对性能要求不高时,如实现播放音频或视频等功能时,可使使能信号1为高有效,使能信号2为低无效,以提高转换效率,降低功耗。Therefore, in order to make the present embodiment more compatible with the prior art, in the present embodiment, the power supply power tube 1 (ie, Q1) and the power supply power tube 3 (ie, Q3) use a PMOS tube, and the power supply tube 2 (ie, Q2) Use an NMOS transistor. That is to say, when the enablesignal 1 is active high, the operation timing of each control signal and the voltage waveform of the key connection point circuit SW during the operation of the power supply integrated circuit are the same as those of FIG. 6, and the control signals CQ1, CQ2, CQ3 and the middle The voltage waveform of the point SW is a fast flipping signal, and the frequency is generally in the range of several hundred KHz to several MHz, which will cause electromagnetic compatibility problems. However, according to the working principle of the step-down DC-DC circuit, the energy transmission efficiency can be as high as 90% or more. Therefore, when the performance requirement is not high, such as when playing audio or video, the enablesignal 1 is enabled to be active, and the enablesignal 2 is low, to improve conversion efficiency and reduce power consumption.
如果在步骤430中,判定使能信号1并非为高有效,即使能信号1为低无效,也就是说,使能信号2为高有效,此时进入步骤450。If, instep 430, it is determined that the enablesignal 1 is not active high, even if the enablesignal 1 is low, that is, the enablesignal 2 is active high, then step 450 is entered.
在步骤450中,根据LDO电路的工作原理对电源功率管1、电源功率管2、电源功率管3进行控制,实现LDO电路。Instep 450, the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3 are controlled according to the working principle of the LDO circuit to implement the LDO circuit.
具体地说,通过控制器控制电源功率管2处于完全关断状态,通过控制器控制电源功率管3处于完全导通状态,通过控制器控制电源功率管1工作在可变电阻区,通过减小或增大电源功率管1的导通电阻,保证输出电压VOUT稳定在固定的电压值上(即电源功率管1等同于图2或图3中的电源功率管Q4)。Specifically, thepower supply tube 2 is controlled to be in a completely off state by the controller, and thepower supply tube 3 is controlled to be in a fully-on state by the controller, and thepower supply tube 1 is controlled by the controller to operate in the variable resistance region, by reducing Or increase the on-resistance of thepower supply tube 1 to ensure that the output voltage VOUT is stabilized at a fixed voltage value (ie, thepower supply tube 1 is equivalent to the power supply tube Q4 in FIG. 2 or FIG. 3).
也就是说,控制器C1控制NMOS管Q2处于完全关断状态,其电阻近似无穷大,并控制PMOS管Q3处于完全导通状态,导通电阻为零点几欧姆,一般设计为0.2~5欧姆以内,同时控制PMOS管Q1工作在可变电阻区,相当于图2或图3中的功率管Q4。Q1的电阻由输出电压VOUT决定,阻值范围可能从零点几Ω到几百kΩ变化。当VOUT电压略低于固定值时,控制器C1通过输出信号CQ1来减小Q1的导通电阻;当VOUT电压略高于固定值时,控制器C1通过输出信号CQ1来增大Q1的导通电阻,最终使输出VOUT稳定在固定的电压值上。That is to say, the controller C1 controls the NMOS transistor Q2 to be in a completely off state, its resistance is approximately infinite, and controls the PMOS transistor Q3 to be in a fully conducting state, and the on-resistance is zero ohms, generally designed to be within 0.2 to 5 ohms. At the same time, the PMOS transistor Q1 is controlled to operate in the variable resistance region, which is equivalent to the power transistor Q4 in FIG. 2 or FIG. The resistance of Q1 is determined by the output voltage VOUT, and the resistance range may vary from a few Ω to several hundred kΩ. When the VOUT voltage is slightly lower than the fixed value, the controller C1 reduces the on-resistance of Q1 by the output signal CQ1; when the VOUT voltage is slightly higher than the fixed value, the controller C1 increases the conduction of Q1 by outputting the signal CQ1. The resistor eventually stabilizes the output VOUT at a fixed voltage value.
理论上Q3阻值越小越好,但是阻值越小,对应的集成电路的面积就会越大,那么晶圆的成本也相应的增加。Q3值也大,对应集成电路面积就会小,使用到的晶圆的成本也较小,考虑面积成本与性能优劣,取值0.2~5欧姆比较理想。大于5欧姆时电路也可以工作,不过性能会变差。In theory, the smaller the resistance of Q3, the better, but the smaller the resistance, the larger the area of the corresponding integrated circuit, and the cost of the wafer is correspondingly increased. The Q3 value is also large, the area of the corresponding integrated circuit will be small, and the cost of the used wafer is also small. Considering the area cost and performance, the value is preferably 0.2 to 5 ohms. The circuit can work even when it is greater than 5 ohms, but the performance will be worse.
由于在现有的LDO电路中,Q4为PMOS管,用于控制Q4导通电阻的输出信号CQ4的波形为缓慢变化的波形,且不会有固定的频率,如图7所示。而本实施方式中等同于Q4的Q1同样也为PMOS管,因此在当使能信号2为高有效时,CQ1的波形同样为缓慢变化的波形,且不会有固定的频率。Since Q4 is a PMOS transistor in the existing LDO circuit, the waveform of the output signal CQ4 for controlling the on-resistance of the Q4 is a slowly varying waveform, and there is no fixed frequency, as shown in FIG. In the present embodiment, Q1 equivalent to Q4 is also a PMOS transistor. Therefore, when the enablesignal 2 is active high, the waveform of CQ1 is also a slowly changing waveform, and there is no fixed frequency.
由此可见,本实施方式的电源管理集成电路的控制方法同样能实现LDO电路,具备LDO电路的优点:电源噪声很小,稳定性较好。因此,在对性能要求较高时,如实现收音机功能和RF等功能时,可使使能信号2为高有效,使能信号1为低无有效,以提高性能。It can be seen that the control method of the power management integrated circuit of the embodiment can also implement the LDO circuit, and has the advantages of the LDO circuit: the power supply noise is small, and the stability is good. Therefore, when the performance requirements are high, such as the implementation of the radio function and the RF function, the enablesignal 2 can be made active, and the enablesignal 1 is low and effective to improve performance.
在步骤440或步骤450后,回到步骤420,继续接收使能信号1和使能信号2。Afterstep 440 or step 450, returning to step 420, continue to receive the enablesignal 1 and the enablesignal 2.
由于在本实施方式中,电路的组成器件等同于降压DC-DC电路的组成器件,并未额外增加用于实现LDO电路的器件,根据不同的使能信号,对各电源功率管进行相应的控制,实现不同使能信号所对应的电路。从而可以在不增加额外器件的情况下,在SOC中实现降压DC-DC电路和LDO电路的复用,不但节省了SOC面积,同时可以根据需要决定采用功耗更低的降压DC-DC电路,还是采用性能更好的LDO电路,兼顾了功耗和性能,保证了应用方案的可靠性和稳定性。In this embodiment, the components of the circuit are equivalent to the components of the step-down DC-DC circuit, and the device for implementing the LDO circuit is not additionally added. According to different enable signals, the power transistors of the power supply are correspondingly Control, realize the circuit corresponding to different enable signals. Therefore, the multiplexing of the step-down DC-DC circuit and the LDO circuit can be realized in the SOC without adding an additional device, which not only saves the SOC area, but also can decide to adopt a lower-voltage step-down DC-DC according to the need. The circuit, or a better performance LDO circuit, takes into account power consumption and performance, ensuring the reliability and stability of the application.
本发明第二实施方式涉及一种电源管理集成电路的控制方法。第二实施方式与第一实施方式基本相同,区别主要在于:A second embodiment of the present invention relates to a method of controlling a power management integrated circuit. The second embodiment is basically the same as the first embodiment, and the difference mainly lies in:
在第一实施方式中,通过将电源功率管2处于完全关断状态,将电源功率管3处于完全导通状态,将电源功率管1工作在可变电阻区,通过减小或增大电源功率管1的导通电阻,保证输出电压VOUT稳定在固定的电压值上,实现LDO电路。In the first embodiment, by placing the powersupply power tube 2 in a completely off state, the powersupply power tube 3 is in a fully-on state, and the powersupply power tube 1 is operated in the variable resistance region, by reducing or increasing the power supply. The on-resistance of thetube 1 ensures that the output voltage VOUT is stabilized at a fixed voltage value to realize the LDO circuit.
然而在第二实施方式中,通过由控制器控制电源功率管2和电源功率管3处于完全关断状态,控制电源功率管1工作在可变电阻区,通过减小或增大电源功率管1的导通电阻,保证输出电压VOUT稳定在固定的电压值上(即电源功率管1等同于图2或图3中的电源功率管Q4),实现LDO电路。此时电感和输出端的电容组合实现LC滤波作用。也就是说,当使能信号2为高有效时(此时使能信号1只能设置为低无效),C1通过对Q1、Q2、Q3的控制,使得Q1等同于LDO电路中的电源功率管Q4,以降压DC-DC的电路结构实现LDO电路的复用。However, in the second embodiment, by controlling the powersupply power tube 2 and the powersupply power tube 3 to be in a completely off state by the controller, the control powersupply power tube 1 operates in the variable resistance region, by reducing or increasing the powersupply power tube 1 The on-resistance ensures that the output voltage VOUT is stabilized at a fixed voltage value (ie, thepower supply tube 1 is equivalent to the power supply tube Q4 in FIG. 2 or FIG. 3) to implement the LDO circuit. At this time, the combination of the inductance and the output capacitance achieves LC filtering. That is to say, when the enablesignal 2 is active high (the enablesignal 1 can only be set to low inactive), C1 controls Q1, Q2, and Q3 to make Q1 equal to the power supply tube in the LDO circuit. Q4, the multiplexing of the LDO circuit is realized by the circuit structure of the step-down DC-DC.
由于也可以通过将电源功率管2处于完全关断状态,将电源功率管3处于完全导通或者完全关断状态,将电源功率管1工作在可变电阻区,实现LDO电路。可见本发明的实施方式能灵活实现。Since the powersupply power tube 3 can be in a fully-on state or the power-offpower tube 3 is in a fully-on state or a completely-off state, the powersupply power tube 1 can be operated in a variable resistance region to implement an LDO circuit. It can be seen that the embodiments of the present invention can be flexibly implemented.
本发明的各方法实施方式均可以以软件、硬件、固件等方式实现。不管本发明是以软件、硬件、还是固件方式实现,指令代码都可以存储在任何类型的计算机可访问的存储器中(例如永久的或者可修改的,易失性的或者非易失性的,固态的或者非固态的,固定的或者可更换的介质等等)。同样,存储器可以例如是可编程阵列逻辑(ProgrammableArray Logic,简称“PAL”) 、随机存取存储器(Random Access Memory,简称“RAM”)、可编程只读存储器(Programmable Read Only Memory,简称“PROM”) 、只读存储器(Read-OnlyMemory,简称“ROM”) 、电可擦除可编程只读存储器(Electrically Erasable ProgrammableROM,简称“EEPROM”) 、磁盘、光盘、数字通用光盘(Digital Versatile Disc,简称“DVD”)等等。The method embodiments of the present invention can all be implemented in software, hardware, firmware, and the like. Regardless of whether the invention is implemented in software, hardware, or firmware, the instruction code can be stored in any type of computer-accessible memory (eg, permanent or modifiable, volatile or non-volatile, solid state Or non-solid, fixed or replaceable media, etc.). Also, the memory can be, for example, a programmable array logic (Programmable)Array Logic ("PAL" for short), Random Access Memory ("RAM")Programmable Read Only Memory ("PROM"), read-only memory (Read-Only)Memory, referred to as "ROM"), electrically erasable programmable read-only memory (Electrically Erasable Programmable)ROM, referred to as "EEPROM"), magnetic disk, optical disk, Digital Versatile Disc ("DVD") and so on.
本发明第三实施方式涉及一种电源管理集成电路,该电路的基本元件为Q1(即电源功率管1)、Q2(即电源功率管2)、Q3(即电源功率管3)、L1(即电感),基本控制单元为C1(即控制器),本实施方式的电源管理集成电路还包含2个使能信号,使能信号1和使能信号2,在同一时间段,使能信号1和使能信号2择一有效。也就是说,当使能信号1为高有效时,使能信号2只能设置为低无效;当使能信号2为高有效时,使能信号1只能设置为低无效。A third embodiment of the present invention relates to a power management integrated circuit, the basic components of which are Q1 (ie, power supply tube 1), Q2 (ie, power supply tube 2), Q3 (ie, power supply tube 3), and L1 (ie, Inductor), the basic control unit is C1 (ie, controller), and the power management integrated circuit of the embodiment further includes two enable signals.Enablesignal 1 and enablesignal 2, enablesignal 1 and enablesignal 2 are valid at the same time. That is to say, when the enablesignal 1 is active high, the enablesignal 2 can only be set to low invalid; when the enablesignal 2 is active high, the enablesignal 1 can only be set to low invalid.
电源功率管1、电源功率管2、电源功率管3、控制器和电感构成的电路结构与常用的降压DC-DC电路结构相同,即将电源功率管1一端与输入电压相连接,另一端与电感和电源功率管2相连,电源功率管2的另一端与相对零电位连接,将电源功率管3并联于所述电感两端,由控制器输出控制信号给电源功率管1、电源功率管2和电源功率管3的栅极,控制电源功率管1、电源功率管2和电源功率管3的导通和关闭。The circuit structure composed of thepower supply tube 1, thepower supply tube 2, thepower supply tube 3, the controller and the inductor is the same as the conventional step-down DC-DC circuit, that is, the end of thepower supply tube 1 is connected to the input voltage, and the other end is connected with The inductor is connected to thepower supply tube 2, and the other end of thepower supply tube 2 is connected to a relatively zero potential, and thepower supply tube 3 is connected in parallel to the two ends of the inductor, and the controller outputs a control signal to thepower supply tube 1 and thepower supply tube 2 And the gate of thepower supply tube 3 controls the conduction and shutdown of the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3.
控制器还用于接收使能信号1和使能信号2,并在使能信号1有效时,控制器通过对电源功率管1、电源功率管2、电源功率管3的控制,将控制器与电源功率管1、电源功率管2、电源功率管3的连接关系,与降压DC-DC电路中的控制器与3个电源功率管的连接关系完全相同;在使能信号2有效时,控制器通过对电源功率管1、电源功率管2、电源功率管3的控制,将控制器与电源功率管1的连接关系,等同于LDO电路中的控制器与电源功率管的连接关系,从而可以根据LDO电路的工作原理对电源功率管1、电源功率管2、电源功率管3进行控制,实现LDO电路。The controller is further configured to receive the enablesignal 1 and the enablesignal 2, and when the enablesignal 1 is valid, the controller controls the powersupply power tube 1, thepower power tube 2, and thepower power tube 3, and the controller The connection relationship between the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3 is exactly the same as the connection relationship between the controller and the three power supply power tubes in the step-down DC-DC circuit; when the enablesignal 2 is valid, the control is performed. By controlling the powersupply power tube 1, thepower supply tube 2, and thepower supply tube 3, the connection relationship between the controller and thepower supply tube 1 is equivalent to the connection relationship between the controller and the power supply tube in the LDO circuit, thereby According to the working principle of the LDO circuit, thepower supply tube 1, thepower supply tube 2, and thepower supply tube 3 are controlled to realize the LDO circuit.
具体地说,当使能信号1为高有效时(此时使能信号2只能设置为低无效),控制器通过对电源功率管1、电源功率管2、电源功率管3的控制,与现有的降压DC-DC电路一样可以简单分为三个阶段:Specifically, when the enablesignal 1 is active high (the enablesignal 2 can only be set to low inactive), the controller controls the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3, The existing step-down DC-DC circuit can be easily divided into three stages:
第一阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1导通、Q2关断、Q3也关断,这时VIN给电感L1充电,同时也给VOUT供电。The first stage controller C1 controls Q1 on, Q2 off, and Q3 off by control signals CQ1, CQ2, and CQ3. At this time, VIN charges inductor L1 and also supplies power to VOUT.
第二阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1关断、Q2导通、Q3关断,这时电感L1放电给VOUT以及VOUT上的负载。The second stage controller C1 controls Q1 off, Q2 on, and Q3 off through control signals CQ1, CQ2, and CQ3, respectively, when inductor L1 is discharged to the loads on VOUT and VOUT.
第三阶段控制器C1通过控制信号CQ1、CQ2、CQ3分别控制Q1和Q2关断、Q3导通,这个阶段发生的条件是电感L1电流为0时,为了防止电感电流震荡产生EMI,所以将Q1和Q2关断,并将Q3导通,即将电感L1中的多余能量通过Q3消耗掉。The third stage controller C1 controls Q1 and Q2 to be turned off and Q3 to be turned on respectively through control signals CQ1, CQ2, and CQ3. The condition occurs at this stage when the current of the inductor L1 is 0. In order to prevent EMI from being generated by the inductor current oscillation, Q1 is used. And Q2 is turned off, and Q3 is turned on, that is, the excess energy in the inductor L1 is consumed by Q3.
由于在现有技术中,Q1和Q3一般使用PMOS管,Q2使用NMOS管,因此,为使本实施方式能与现有技术更好地兼容,在本实施方式中,电源功率管1(即Q1)和电源功率管3(即Q3)同样使用PMOS管,电源功率管2(即Q2)同样使用NMOS管。In the prior art, Q1 and Q3 generally use a PMOS tube, and Q2 uses an NMOS tube. Therefore, in order to make the present embodiment more compatible with the prior art, in the present embodiment, the power supply power tube 1 (ie, Q1) The same applies to the power supply tube 3 (ie, Q3), and the power supply tube 2 (ie, Q2) also uses the NMOS tube.
当使能信号2为高有效时(此时使能信号1只能设置为低无效),C1通过对Q1、Q2、Q3的控制,使得Q1等同于LDO电路中的电源功率管Q4,以降压DC-DC的电路结构实现LDO电路的复用。具体工作过程如图8所示:When theenable signal 2 is active high (the enablesignal 1 can only be set to low inactive), C1 controls Q1, Q2, and Q3 to make Q1 equal to the power supply tube Q4 in the LDO circuit. The circuit structure of the DC-DC implements multiplexing of the LDO circuit. The specific work process is shown in Figure 8:
当使能信号1从高有效变为低无效,使能信号2从低无效变为高有效时,控制器C1控制NMOS管Q2处于完全关断状态,其电阻近似无穷大,并控制PMOS管Q3处于完全导通状态,导通电阻为零点几欧姆,一般设计为0.2~5欧姆以内,同时控制PMOS管Q1工作在可变电阻区,相当于图2或图3中的功率管Q4。Q3的电阻由输出电压VOUT决定,阻值范围可能从零点几Ω到几百kΩ变化。当VOUT电压略低于固定值时,控制器C1通过输出信号CQ1来减小Q1的导通电阻;当VOUT电压略高于固定值时,控制器C1通过输出信号CQ1来增大Q1的导通电阻,最终使输出VOUT稳定在固定的电压值上。When the enable signal 1 changes from high active to low active, and the enablesignal 2 changes from low inactive to active high, the controller C1 controls the NMOS transistor Q2 to be in a completely off state, its resistance is approximately infinite, and the control PMOS transistor Q3 is in The fully-on state, the on-resistance is zero ohms, generally designed to be within 0.2~5 ohms, and the PMOS transistor Q1 is controlled to operate in the variable resistance region, which is equivalent to the power transistor Q4 in FIG. 2 or FIG. The resistance of Q3 is determined by the output voltage VOUT, and the resistance range may vary from a few Ω to several hundred kΩ. When the VOUT voltage is slightly lower than the fixed value, the controller C1 reduces the on-resistance of Q1 by the output signal CQ1; when the VOUT voltage is slightly higher than the fixed value, the controller C1 increases the conduction of Q1 by outputting the signal CQ1. The resistor eventually stabilizes the output VOUT at a fixed voltage value.
由于在现有的LDO电路中,Q4为PMOS管,用于控制Q4导通电阻的输出信号CQ4的波形为缓慢变化的波形,且不会有固定的频率。而本实施方式中等同于Q4的Q1同样也为PMOS管,因此在当使能信号2为高有效时,CQ1的波形同样为缓慢变化的波形,且不会有固定的频率,此时SW点的波形与输出电压波形VOUT基本一样(如图9所示)。Since Q4 is a PMOS transistor in the existing LDO circuit, the waveform of the output signal CQ4 for controlling the Q4 on-resistance is a slowly varying waveform, and there is no fixed frequency. In the present embodiment, Q1 equivalent to Q4 is also a PMOS transistor. Therefore, when the enablesignal 2 is active high, the waveform of CQ1 is also a slowly changing waveform, and there is no fixed frequency. The waveform is basically the same as the output voltage waveform VOUT (as shown in Figure 9).
由此可见,本实施方式的电源管理集成电路同样能实现LDO电路,具备LDO电路的优点:电源噪声很小,稳定性较好。因此,在对性能要求较高时,如实现收音机功能和RF等功能时,可使使能信号2为高有效,使能信号1为低无有效,以提高性能。It can be seen that the power management integrated circuit of the embodiment can also implement the LDO circuit, and has the advantages of the LDO circuit: the power supply noise is small, and the stability is good. Therefore, when the performance requirements are high, such as the implementation of the radio function and the RF function, the enablesignal 2 can be made active, and the enablesignal 1 is low and effective to improve performance.
不难发现,本实施方式是与第一实施方式相对应的装置实施方式,本实施方式可与第一实施方式互相配合实施。第一实施方式中提到的相关技术细节在本实施方式中依然有效,为了减少重复,这里不再赘述。相应地,本实施方式中提到的相关技术细节也可应用在第一实施方式中。It is not difficult to find that the present embodiment is an apparatus embodiment corresponding to the first embodiment, and the present embodiment can be implemented in cooperation with the first embodiment. The related technical details mentioned in the first embodiment are still effective in the present embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related art details mentioned in the present embodiment can also be applied to the first embodiment.
本发明第四实施方式涉及一种电源管理集成电路。第四实施方式与第三实施方式基本相同,区别主要在于:A fourth embodiment of the present invention relates to a power management integrated circuit. The fourth embodiment is basically the same as the third embodiment, and the difference mainly lies in:
在第三实施方式中,控制器通过将电源功率管2处于完全关断状态,将电源功率管3处于完全导通状态,将电源功率管1工作在可变电阻区,通过减小或增大电源功率管1的导通电阻,保证输出电压VOUT稳定在固定的电压值上,使得控制器与电源功率管1的连接关系,等同于LDO电路中的控制器与电源功率管的连接关系,从而实现LDO电路。In the third embodiment, the controller places the powersupply power tube 3 in a fully-on state by placing the powersupply power tube 2 in a fully-off state, and operates the powersupply power tube 1 in the variable resistance region, by reducing or increasing. The on-resistance of thepower supply tube 1 ensures that the output voltage VOUT is stabilized at a fixed voltage value, so that the connection relationship between the controller and thepower supply tube 1 is equivalent to the connection relationship between the controller and the power supply tube in the LDO circuit, thereby Implement the LDO circuit.
然而在第四实施方式中,控制器通过以下方式对电源功率管1、电源功率管2、电源功率管3进行控制,将控制器与电源功率管1的连接关系,等同于LDO电路中的控制器与电源功率管的连接关系:However, in the fourth embodiment, the controller controls the powersupply power tube 1, the powersupply power tube 2, and the powersupply power tube 3 in the following manner, and the connection relationship between the controller and the powersupply power tube 1 is equivalent to the control in the LDO circuit. Connection between the device and the power supply tube:
控制器控制电源功率管2处于完全关断状态。The controller controls thepower supply tube 2 to be in a fully off state.
控制器控制电源功率管3处于完全关断状态。The controller controls thepower supply tube 3 to be in a fully off state.
控制器控制电源功率管1工作在可变电阻区,通过减小或增大电源功率管1的导通电阻,保证输出电压VOUT稳定在固定的电压值上。此时电感和输出端的电容组合实现LC滤波作用。The controller controls thepower supply tube 1 to operate in the variable resistance region, and by reducing or increasing the on-resistance of thepower supply tube 1, the output voltage VOUT is stabilized at a fixed voltage value. At this time, the combination of the inductance and the output capacitance achieves LC filtering.
也就是说,当使能信号2为高有效时(此时使能信号1只能设置为低无效),C1通过对Q1、Q2、Q3的控制,使得Q1等同于LDO电路中的电源功率管Q4,以降压DC-DC的电路结构实现LDO电路的复用。具体工作过程如图9所示:That is to say, when the enablesignal 2 is active high (the enablesignal 1 can only be set to low inactive), C1 controls Q1, Q2, and Q3 to make Q1 equal to the power supply tube in the LDO circuit. Q4, the multiplexing of the LDO circuit is realized by the circuit structure of the step-down DC-DC. The specific work process is shown in Figure 9:
当使能信号1从高有效变为低无效,使能信号2从低无效变为高有效时,控制器C1控制NMOS管Q2处于完全关断状态,其电阻近似无穷大,也控制PMOS管Q3处于完全关断状态,同时控制PMOS管Q1工作在可变电阻区,相当于图2或图3中的功率管Q4。Q1的电阻由输出电压VOUT决定,阻值范围可能从零点几Ω到几百kΩ。当VOUT电压略低于固定值时,控制器C1通过输出信号CQ1来减小Q1的导通电阻;当VOUT电压略高于固定值时,控制器C1通过输出信号CQ1来增大Q1的导通电阻,最终使输出VOUT稳定在固定的电压值上。CQ1的波形为缓慢变化的波形,且不会有固定的频率,此时SW点的波形与输出电压波形VOUT基本一样。其能量传输效率为输出电压除以输入电压。When the enable signal 1 changes from high to low and the enablesignal 2 changes from low to high, the controller C1 controls the NMOS transistor Q2 to be in a completely off state, its resistance is approximately infinite, and the PMOS transistor Q3 is also controlled. The state is completely turned off, and the PMOS transistor Q1 is controlled to operate in the variable resistance region, which is equivalent to the power transistor Q4 in FIG. 2 or FIG. The resistance of Q1 is determined by the output voltage VOUT, and the resistance range may range from a few Ω to several hundred kΩ. When the VOUT voltage is slightly lower than the fixed value, the controller C1 reduces the on-resistance of Q1 by the output signal CQ1; when the VOUT voltage is slightly higher than the fixed value, the controller C1 increases the conduction of Q1 by outputting the signal CQ1. The resistor eventually stabilizes the output VOUT at a fixed voltage value. The waveform of CQ1 is a slowly changing waveform, and there is no fixed frequency. At this time, the waveform of the SW point is basically the same as the output voltage waveform VOUT. Its energy transfer efficiency is the output voltage divided by the input voltage.
不难发现,本实施方式是与第二实施方式相对应的装置实施方式,本实施方式可与第二实施方式互相配合实施。第二实施方式中提到的相关技术细节在本实施方式中依然有效,为了减少重复,这里不再赘述。相应地,本实施方式中提到的相关技术细节也可应用在第二实施方式中。It is not difficult to find that the present embodiment is an apparatus embodiment corresponding to the second embodiment, and the present embodiment can be implemented in cooperation with the second embodiment. The related technical details mentioned in the second embodiment are still effective in the present embodiment, and are not described herein again in order to reduce repetition. Accordingly, the related art details mentioned in the present embodiment can also be applied to the second embodiment.