Process for Aligning Nanoparticles
Field of the Invention
The invention relates to a process for aligning conducting or semiconducting nanoparticles, to a process for preparing electronic devices comprising such aligned nanoparticles, and to electronic devices prepared by these processes.
Background and Prior Art
The assembly of conducting or semiconducting nanoparticles, like nanowires or nanotubes, into nanoscale devices and circuits can enable diverse applications in nanoelectronics and photonics. Individual semiconducting nanowires have already been configured as field-effect transistors (FETs) [Xiang et al., Nature 441 (2006), 489-493], memory devices [Lee et al., Nature Nanotechnology 2 (2007), 626-630], photodetectors and solar cells [Tian et al., Nature 449 (2007), 885-889; Hayden et al., Nature Materials 5 (2006), 352-356], and sensors [Han et al., Chemical Physics Letters 389 (2004), 176-180]. More sophisticated light-emitting diodes (LEDs) [Gudiksen et al., Nature 415 (2002), 617-620] and complementary and diode logic devices [Bachtold et al., Science 9 (2001), 294, 1317-1320] have been realized using both n- and p-type semiconducting nanowires or nanotubes.
The prior art describes methods to assemble nanowire devices based on a bottom-up method or randomly distributed nanowires on pre-patterned substrates. However, such methods are time consuming and too expensive for use in mass production processes, are difficult to control and usually only give a very low yield. Since meanwhile also methods for mass production of nanowires have been reported [Wan et al., Applied Physics Letters 84(1) (2004), 124-126], there is a need for techniques to align and assemble the nanowires prepared by such methods.
in prior art several methods to align and assemble nanowires assisted by an electric field have been reported. Thus, Cao et al., Nanotechnology 17 (2006), 2378-2380, describe a technique for controlling the alignment of silver nanowires with a DC electric field (DCEF). Therein, silver nanowires are synthesized directly from a 80 nm thick solid electrolyte RbAg4I5 film that is contacted with two 136 nm thick silver film electrodes, by applying a DCEF between the silver electrodes. This leads to the formation of oriented silver nanowires. However, while this method demonstrates that it is possible to directly prepare aligned nanowires, it is not suitable for the alignment of nanowires during mass production of electronic devices.
Motayed et al., Journal of Applied Physics 100 (2006), 114310, Smith et al., Applied Physics Letters 77(9) (2000), 1399-1401 , and US 6,536,106 describe a process for aligning pre-prepared GaN or Au nanowires, which are dispersed in a fluid and deposited onto a substrate that is covered with a patterned and interdigited electrode structure. When applying a non- uniform electric field to the electrodes, the nanowires are aligned by a dielectrophoretic force. However, this process has several disadvantages. For example, it requires the fabrication of interdigitated electrode structures with complicated and fine patterns for application of the electric field, which is not ideal for mass production. Also, the dimensions and distances of the electrodes are in the same range as the nanowire dimensions so that the nanowires overlap with the electrodes. To prevent direct contact and thus shorting of the electrode fingers by the metallic nanowires, the electrodes have to be covered with a protection layer of e.g. silicon nitride that is deposited by chemical vapor deposition. Again, this makes the process unsuitable for the alignment of nanowires during mass production of electronic devices.
Thus, there is still a need for an improved, simple and effective process of aligning nanoparticles , which can be used in the fabrication of electronic devices like transistors, but also other nanoparticle based electronics such as diodes (LEDs, photodiodes), sensors, and complementary and diode logic, especially for mass production of such devices, and which does not have the drawbacks of the methods disclosed in priort art as explained above. One aim of the present invention is to provide such an improved alignment process. Another aim of the invention is to provide improved electronic devices, especially transistors and solar cells, obtained by such a process. Other aims of the present invention are immediately evident to the person skilled in the art from the following detailed description.
It was found that these aims can be achieved by providing a process as claimed in the present invention.
Summary of the Invention
The invention relates to a process for aligning conducting or semiconducting nanoparticles, comprising the steps of
1) placing a pair of auxiliary electrodes onto a substrate,
2) depositing conducting or semiconducting nanoparticles onto the substrate between the auxiliary electrodes, and
3) applying a voltage to the auxiliary electrodes.
Preferably the nanoparticles are placed in contact with one or more device structures, preferably working electrodes other than the auxiliary electrodes. During alignment preferably no voltage is applied to the device or to the working electrodes.
A prerequisite for aligning the nanoparticles is that they have an anisotropic, preferably elongated shape, like nanowires, nanotubes, nanorods, nanoribbons, nanowhiskers, or even platelet shape like nanodiscs.
The invention further relates to the use of nanoparticles aligned by a process according to the present invention as charge transport, conducting or semiconducting component in an electronic, electro-optical, electroluminescent or optical device.
The invention further relates to a process for preparing an electronic, electro-optical, electroluminescent or optical device, preferably an electronic device, comprising the steps of a) applying working electrodes, preferably source and drain electrodes (4) onto a substrate (1 ) or onto a dielectric layer (3), b) placing a pair of auxiliary electrodes onto the substrate (1) or the dielectric layer (3) such that they are not in contact with the working electrodes (4), c) depositing a layer of conducting or semiconducting nanoparticles (5), optionally dispersed in a fluid, onto the substrate (1) or dielectric layer
(3) and the working electrodes (4), such that the nanoparticles are situated between the auxiliary electrodes, d) applying a voltage to the auxiliary electrodes, e) optionally removing the fluid from the nanoparticle layer (5), f) optionally removing the auxiliary electrodes, and g) optionally providing one or more further functional layers onto the nanoparticle layer, wherein it is also possible to carry out steps b), c), d) and f) in a different order. Preferably the steps are carried out in the given order. The order of steps b), c) and d) can be varied and adapted according to practical considerations (safety measures, etc.). Preferably the particles are semiconducting.
Preferably the fluid is removed according to step e), more preferably while the voltage according to step d) is maintained. Preferably the electrodes are removed according to step e), more preferable after the fluid is removed or after the voltage provided in d) has been reduced to zero.
The auxiliary electrodes are preferably placed in a position where at least one of the working electrodes (source and/or drain), preferably both, are positioned at least partly or wholly between the auxiliary electrodes. More preferably, the directions of an electric field in vicinity of each of the auxiliary and the working electrodes are aligned in parallel. Usually this will be achieved if the surfaces of the auxiliary electrode(s) and the working electrode(s) are aligned in parallel. As a consequence, the arrangement is preferably such, that the nanoparticles are aligned perpendicular to the surface of the working electrodes and may eventually form an elongated structure of (semi-) conductor between them.
Alternatively, in one preferred embodiment of the invention, the auxiliary electrodes are represented by supplemental electrodes which are permanently located on the substrate or device carrying the working electrodes. In this embodiment the auxiliary electrodes are immobilized electrodes. Removing the supplemental electrodes according to step e) is then obsolete. They remain on the substrate, but are not used further once the aligned nanoparticles are fixed permanently to the substrate.
Step a) and b) can be effected within one common procedure, while the auxiliary electrodes are permanent ones.
The invention further relates to a device comprising aligned nanoparticles prepared by a process as described above and below.
The invention further relates to a electronic, electro-optical, electroluminescent or optical device comprising the aligned nanowires and working electrodes, wherein the aligned nanoparticles connect the working electrodes. The working electrodes are preferably not isolated on their surface, which is an advantage. The device can be made without connecting the working electrodes to a voltage for alignment. The working electrodes are preferably located on a substrate, more preferably on a flat substrate. The surface of the substrate can be flat, i.e. without gratings etc. for effecting an alignment of the nanoparticles by means other than the voltage applied according to the invention. A simple flat surface is easier to achieve than any other surface modification.
The device according to the invention preferably comprises a plurality of nanoparticles. The process according to the invention is especially useful for aligning a plurality of nanoparticles, in contrast to other methods, which are preferably useful for placing just a single or a limited number of nanoparticles to dedicated locations.
The device according to the invention comprises preferably a field-effect transistor FET comprising:
- a substrate (1),
- a gate electrode (2),
- a dielectric layer (3), - source and drain electrodes (4), and
- a semiconducting layer (5) comprising nanoparticles aligned by a process as described above and below.
Usually the semiconducting layer (5) connects the source and drain electrodes (4).
The electronic, electrooptical, electroluminescent or optical devices include, without limitation, (organic) field effect transistors ((O)FET), integrated circuits (IC), (organic) thin film transistors ((O)TFT), Radio Frequency Identification (RFID) tags, (organic) light emitting diodes ((O)LED), (organic) light emitting transistors ((O)LET), electroluminescent displays, (organic) photovoltaic ((O)PV) cells, (organic) solar cells ((O)SC)1 flexible (O)PVs and (O-)SCs, (organic) laser diodes ((O)-laser), (organic) integrated circuits ((O-)IC), lighting devices, sensor devices, electrode materials, photoconductors, photodetectors, electrophotographic recording devices, capacitors, charge injection layers, Schottky diodes, planarising layers, antistatic films, conducting substrates, conducting patterns, photoconductors, electrophotographic devices, organic memory devices, biosensors, biochips, optical polarizers, optical retarders, and optical compensators.
Definitions of Terms
The term "auxiliary electrode" means an electrode that is used for aligning nanoparticles according to the invention. The auxiliary electrode is only used for that purpose and is different from any other electrodes that form part of a device comprising the aligned nanoparticles.
The term "movable electrode" means an auxiliary electrode that can be placed onto a substrate, device component or device without being permanently fixed to it (preferably only for the process of nanoparticle alignment), and can be moved independently relative to the substrate, device component or device. This meaning also includes electrodes that are connected to the substrate, device component or device e.g. by mechanical fixing means like clamps, screws etc., but can easily be removed again, without the need to apply methods of thermal or chemical treatment and without damaging or destroying the substrate, device component or device.
The term "working electrode" refers to any electrode other than the auxiliary or movable electrode. The working electrode especially refers to the electrode(s) of any device that are located vicinal to or directly at the place of deposition of the aligned nanoparticles. In some preferred embodiments the working electrodes are the source electrode and/or the drain electrode, e.g. of a transistor-like device.
The term "nanoparticles" (also referred to in the literature as "nanomaterials") includes nanowires, nanorods, nanotubes, nanotetrapods, nanoribbons and/or combinations thereof, as defined for example in US 7,344,961 , the entire disclosure of which is incorporated into this application by reference. Preferably it refers to nanowires.
The terms "group II", "group IV", etc. refer to the periodic table of elements.
The term "nanowires" means any elongated, preferably conducting or semiconducting, particle or material that includes at least one cross sectional dimension < 500 nm, preferably < 100 nm, and has an aspect ratio (length.width) of > 10, preferably > 50, more preferably > 100. Nanowires can have a variable diameter or can have a substantial uniform diameter. Typically the diameter is evaluated away from the ends of the nanowire (e.g. over the central 20 %, 50 % or 80 % of the nanowire). A nanowire can be straight or can be curved or bent, over the entire length of its long axis or a portion thereof. For this invention straight nanowires are preferred over bent ones, which are again preferred over coiled ones. Nanowires according to this invention can expressly exclude carbon nanotubes, and, in certain embodiments, exclude elongated particles having a smallest diameter greater than 150 nm. The dimensions of nanotubes are defined as for the nanowires. Detailed Description of the Invention
The nanoparticles used in the present invention preferably have an anisotropic shape, i.e. they have different length and width/diameter, like for example nanowires or nanotubes. The diameter or width of the nanowires is typically in the range from several tens to several hundreds of nanometers, preferably from 5 to 100 nm. The length of the nanoparticles is typically over 500 nm, preferably from 1 to 100 micrometer (μm). The aspect ratio (length: width) is preferably from 5 to 1000. This anisotropic shape makes the nanoparticles tend to orient along the electric field. Nanowires and nanotubes are especially preferred. Especially preferred are semiconducting nanowires.
The nanoparticles according to this invention can be substantially homogeneous in material properties, or in some embodiments can also be heterogeneous (like for example nanowire heterostructures). They can be fabricated from essentially any convenient material or materials, and can be for example substantially crystalline, substantially monocrystalline, polycrystalline, or amorphous.
Generally a broad variety of materials can be used to prepare nanoparticles, including, without limitation, semiconducting materials selected from the group consisting of Group IV semiconductors, Group III- V semiconductors, Group H-Vl semiconductors, transition metals, or alloys or mixtures of the aforementioned. Especially preferred Group IV semiconductors are Si, Ge, Sn, and alloys thereof. Further preferred are alloys of Group IH-V semiconductors with other Group III and/or Group V elements, and alloys of Group H-Vl semiconductors with other Group Il and/or Group Vl elements.
Suitable and preferred semiconducting materials include, without limitation, Si, Ge, Sn, Se, Te, B, C (including diamond), P, B-C, B-P(BP6), B-Si1 Si-C, Si-Ge, Si-Sn and Ge-Sn, SiC, BN, BP, BAs, AIN, AIP, AIAs, AISb, GaN, GaP, GaAs, GaSb, InN, InP, InAs, InSb, ZnO, ZnS, ZnSe, ZnTe, CdS, CdSe, CdTe, HgS, HgSe, HgTe, BeS, BeSe, BeTe, MgS, MgSe, GeS, GeSe, GeTe, SnS, SnSe, SnTe, PbO, PbS, PbSe1 PbTe, CuF, CuCI1 CuBr, CuI, AgF, AgCI, AgBr, AgI, BeSiN2, CaCN2, ZnGeP2, CdSnAs2, ZnSnSb2, CuGeP3, CuSi2P3, (Cu, Ag)(AI1 Ga, In, Ti, Fe)(S, Se, Te)2, Si3N4, Ge3N4, AI2O3, (Al, Ga, In)2 (S, Se, Te)3, AI2CO, and any appropriate combination of two or more of the aforementioned materials.
The nanoparticles can also consist of or comprise other materials, including, without limitation, metals such as Au, Ni, Pd, Ir, Co, Cr, Al, Ti, Fe, Sn and the like, metal alloys, polymers including (semi-)conducting polymers, ceramics, and/or combinations thereof. Other conducting or semiconducting materials can also employed.
The nanoparticles can also be doped into p-type or n-type semiconductors. For example, they can contain a dopant selected from the group consisting of: a p-type dopant selected from Group III elements, in particular B, Al or In, an n-type dopant selected from Group V elements, in particular P, As and Sb, a p-type dopant selected from Group Il elements, in particular Mg, Zn, Cd and Hg, a p-type dopant selected from Group IV elements, in particular C and Si, or an n-type dopant selected from the group consisting of Si, Ge, Sn, S, Se and Te. Other known dopant materials can also be employed.
The nanoparticles can essentially consist of one material, but can also have for example a core/shell structure, wherein the core and the shell surrounding it consist of or comprise different materials or different material compositions. For example, core/shell nanowires may consist of a nanowire core and a nanowire shell that comprise for example Group IV elements independently selected from the group consisting of C, Si, Ge and Sn. The shell can also consist of or comprise an insulating material, for example an oxide of a Group IV element.
In case of core/shell nanowires, the valence band of the insulating shell can be lower than the valence band of the core for p-type doped wires, or the conduction band of the shell can be higher than the core for n-type doped wires. Generally, the core nanostructure can be made from any metallic or semiconducting material, and the shell can be made from the same or a different material. For example, the first core material can comprise a first semiconductor selected from the group consisting of Group H-Vl semiconductors, Group Hl-V semiconductors, Group IV semiconductors, and alloys thereof. Similarly, the second material of the shell can comprise a second semiconductor, which is the same as or different from the first semiconductor, and is for example selected from the group consisting of Group H-Vl semiconductors, Group Hl-V semiconductors, Group IV semiconductors, and alloys thereof. Examples of suitable semiconductors include, without limitation, CdSe, CdTe1 InP, InAs, CdS, ZnS, ZnSe, ZnTe, HgTe, GaN, GaP, GaAs, GaSb, InSb, Si, Ge, AIAs, AISb, PbSe, PbS1 and PbTe. As mentioned above, metallic materials such as Au, Cr, Sn, Ni, Al etc., and alloys thereof, can be used as the core material, and the metallic core can be overcoated with an appropriate shell material like for example SiO2 or other insulating materials.
An organic mono-layer is often deposited on nanowires. This layer may play several roles:
- Nanowires are better dispersible in solvent.
- Protection of nanowires against oxidation.
- Modification of the nanowire's workfunction.
The organic mono layer can be of many types according to above functions, for example, alkyl, alkanethiol type etc. as described in J. Am. Chem. Soc (2004), 126(47), 15466.
The nanowires or nanoribbons can also include carbon nanotubes, or nanotubes formed from conducting or semiconducting organic materials like for example pentacene, organic polymers, or transition metal oxides.
Nanoparticles can be produced by a variety of different methods. For example, solution based, surfactant mediated crystal growth has been described for producing spherical inorganic nanoparticles, like for example quantum dots, as well as elongated nanoparticles, like for example nanorods and nanotetrapods. Other methods have also been employed to produce nanoparticles, including vapour phase methods. For example, silicon nanocrystals have been reported produced by laser pyrolysis of silane gas. A suitable method for preparing nanowires uses solution growth from a suitable precursor material, like metal halides or organometallic compounds of the above-mentioned elements. This can be achieved for example by exposing a nanowire precursor to a metal nanocrystal in a nanowire growth solution comprising an organic solvent at a suitable temperature. The metal nanocrystals serve as seed particles that catalyze the growth of the semiconductor nanowires. The metal nanocrystals may be formed in situ in the growth solution from metal nanocrystal precursors, or alternatively the nanocrystals may be pre-formed and then added to the growth solution. Suitable metal nanocrystals are known from prior art.
Suitable materials and shapes for nanoparticles and methods of their prepration are generally known to the skilled person and disclosed in the literature, for example in the documents cited above, or in US 2005/0029678 A1, AT. Heitsch, D.D. Fanfair, H.-Y. Tuan & B.A.
Korgel, J. Am. Chem. Soc. (2008), 130, 5346-7, T. Hanrath, B.A. Korgel, J. Am. Chem. Soc. 126 (2004), 15466-72, D. Fanfair et al. Crystal Growth & Design 5 (2005), 1971-6, A.M. Morales et al. Science (1998), 279, 208- 11 , WO 02/17362, WO 01/03208, and in US 7,344,961 B2 and the references cited therein. The entire disclosure of the aforementioned documents concerning production of nanowires is incorporated into this application by way of reference.
The process of aligning nanoparticles according to the present invention is preferably carried out as follows:
1) a pair of auxiliary electrodes is placed onto a substrate,
2) conducting or semiconducting nanoparticles are deposited onto the substrate between the auxiliary electrodes, and
3) a voltage is applied to the auxiliary electrodes.
In nanoparticles with conductor or semiconductor properties, the electrons or charge carriers can easily move when the nanoparticles are put into an electric field. The nanoparticles are usually dispersed in a dielectric medium, usually a fluid, like for example a solvent, in which the individual nanoparticles are separated so that there is no contact between them. When an external electric field is applied across the fluid, the positive or negative charges in the single nanoparticle will move with the electric field accordingly, toward to different ends of the anisotropic nanoparticle. Since there is no contact between the nanoparticles, the charges will accumulate at the end of an individual nanoparticle until the internal field caused by the migrated charges equalizes the external field applied. Due to the anisotropic shape of the nanoparticles, the positive and negative charges accumulated on the two ends of the nanoparticle form a dipole. If the nanoparticles can freely move in the fluid, the formed dipole will force them to align along the external electric field lines. F = αEL• sinθcosθ
The electric force (F) applied to the dipole is proportional to the nanoparticle length (L)1 the electric field strength (E) and the factor sinθcosθ, wherein α is a constant related to the dielectric constant of the solvent and the free charge density in nanowires, and θ is the angle between the longitudinal axis of the nanowires and the electric field.
This principle does also apply in the case of an AC field, wherein the charges will switch accordingly with the external field. The electric force applied to the nanoparticles will cause them to align along the electric field lines in the same way as described above. The frequency of the alternating field can be varied in a very broad range. Frequencies from the lowest end up to 1 MHz are preferred. High frequencies above 50 kHz may be preferred due to their low impact on a human body in case of a short circuit. Frequencies from 50 Hz to 5 kHz are particularly preferred.
Preferably, the voltage applied for the alignment process is an AC voltage.
In order to align nanoparticles, pair electrodes have to be used in order to form an electric field. This can be achieved by having electrodes deposited on substrates or by using one or more movable electrodes, preferably a pair of similar electrodes.
Preferably the auxiliary electrodes are movable electrodes. Thus they will not form part of the final architecture of the device after having served for the nanoparticle alignment process. The movable electrodes are placed onto a substrate or the device or device component on which the nanoparticles shall be aligned. The electrodes may be in direct contact with the substrate. The electrodes can also be fixed, e.g. by fixing means, such that they are either directly in contact with the substrate, or do not contact the substrate but are placed close to the substrate but at a short distance (in contact or in several 10 micrometers distance). They are connected with an electric power supply so that a voltage can be applied to create an electric field of the desired strength, preferably 1 - 250 kV/m.
The distance between the two auxiliary or movable electrodes should preferably be larger than the longitudinal dimensions of the anisotropic nanoparticles.
The nanoparticles are then deposited onto the area of the substrate between the auxiliary electrodes, or the device or device component, as a thin layer by any suitable method, while a voltage is applied to the electrodes.
Compared to the methods of aligning nanoparticles of prior art as described in the background section, where the patterned S/D electrodes of the OE device are used to apply the electric field for alignment, the method of the present invention has several advantages. Thus, due to the use of external electrodes the distance and thereby the electric field strength can easily be varied, and higher voltages can a(so be appfied without the risk of damaging the device electrodes or components connected thereto. This is particularly advantageous, because it is possible that the deposited nanoparticles are in direct contact with the device electrodes so that, when a high voltage would be applied to these device electrodes, which may be required for good alignment, an electrical short circuit could occur which could then damage both the nanoparticles and the device. Due to the use of external electrodes this risk can be avoided. For the same reason, it is not necessary in the process of the present invention to provide a protecting insulating layer between the device electrodes and the nanoparticles, as used in the methods of prior art. It may be also possible to utilize for this technique flexo, gravure, spray, roll to roll and ink-jet print technique to achieve nanoparticles deposition in a fast alignment process.
Liquid deposition techniques, using a fluid comprising the nanoparticles, are especially preferred. Preferred deposition techniques include, without limitation, spin coating, dip coating, miniscus coating, ink jet printing, ink dip, letter-press printing, screen printing, doctor blade coating, roller printing, reverse-roller printing, offset lithography printing, flexographic printing, gravure printing, web printing, spray coating, brush coating or pad printing. Flexo printing, gravure printing and ink-jet printing are particularly preferred.
In order to be applied by liquid deposition techniques, the nanoparticles should first be dispersed in a suitable fluid or solvent.
The dielectric properties of the fluid are important, because it acts as a dielectric medium. The nanoparticles should be well dispersed, which also provides the freedom for NWs orientation under electric field. The fluidic dielectric medium can be a solvent or a solvent mixture, preferably an organic solvent. The preferred solvents usually depend on the nature of the surface of the NWs. For non passivated NWs, if the surface is oxidized, alcohol type of solvents are often used. For the surface- passivated NWs, there are many organic solvents that can be used. The polarization of solvent can be also an important issue for NWs dispersion: if the polar solvents have a high dielectric constant, the external electric field can easily reach the nanoparticles without too much loss in the fluid. A permittivity above 5 (200C) is usually preferred.
Preferred fluids and solvents depend on the type of monolayer used for encapsulating the nanoparticles. For most alkyl or alkene type of monolayers medium polar haiogenated solvents like chloroform and dichlorobenzene are good solvents. Preferred fluids generally comprise chlorobenzene, 1 ,2-dichlorobenzene, butanone or anisole. Solvents with a high dipolar moment are preferred, especially those having a permanent dipole moment of 1 ,5 D (Debye) or higher. The solvent can additionally comprise one or more further components like for example surface-active compounds, lubricating agents, wetting agents, dispersing agents, hydrophobing agents, adhesive agents, flow improvers, defoaming agents, deaerators, diluents which may be reactive or non-reactive, auxiliaries, colorants, dyes or pigments, sensitizers, stabilizers, other nanoparticles or inhibitors.
After deposition of the nanoparticles solution and alignment of the nanoparticles, the solvent is preferably removed, for example by letting it evaporate at ambient temperature and pressure. It is also possible to apply heat and/or reduced pressure to accelerate evaporation.
The layer of aligned nanoparticles can then be covered by another functional layer of the device or by one or more protective layers, for example deposited polymer dielectric layer on top for top gate transistors, or a polymer protection layer to avoid the oxygen damage of the nanoparticles.
The nanoparticles aligned by the process according to the present invention are useful as charge transport, semiconducting, electrically conducting, photoconducting or light-emitting materials in electronic, electrooptical, electroluminescent, photoluminescent or optical components or devices.
Preferred devices are FETs, TFTs, ICs, logic circuits, capacitors, RFID tags, LEDs, LETs, PVs, solar cells, laser diodes, photoconductors, photodetectors, electrophotographic devices, electrophotographic recording devices, organic memory devices, sensor devices, charge injection layers, Schottky diodes, planarising layers, antistatic films, conducting substrates and conducting patterns. In these devices, the aligned nanoparticles of the present invention are typically applied as thin layers or films. Especially preferred are FETS and TFTs.
A preferred electronic device comprises the following components: - optionally a substrate (1),
- one or more conductors, preferably electrodes (2, 4), - an insulator layer comprising a dielectric (3),
- a semiconducting layer comprising aligned nanoparticles (5).
A first preferred embodiment of the invention relates to a bottom gate (BG) FET device, as exemplarily depicted in Fig. 1 , comprising the following components in the sequence described below:
- optionally a substrate (1),
- a gate electrode (2),
- an insulator layer comprising a dielectric (3), - source and drain electrodes (4), and
- a conducting or, preferably, semiconducting layer comprising aligned nanoparticles (5).
The process for preparing this BG transistor device preferably comprises the steps of
- applying a gate electrode (2) on a substrate (1),
- applying a dielectric layer (3) on top of the gate electrode (2) and the substrate (1),
- applying source and drain electrodes (4) on top of the dielectric layer (3),
- placing a pair of auxiliary electrodes onto the dielectric layer (3) such that they are not in contact with the source and drain electrodes (4),
- depositing a layer of semiconducting nanoparticles (5), optionally dispersed in a or mixture solvents with or without a binder, onto the dielectric layer (3) and the source and drain electrodes (4), such that the nanoparticles are situated between the auxiliary electrodes,
- applying a voltage to the auxiliary electrodes,
- optionally removing the fluid from the nanoparticle layer (5),
- optionally removing the auxiliary electrodes, and - optionally providing one or more further functional layers onto the nanoparticle layer.
A second preferred embodiment relates to a top gate (TG) FET device, as exemplarily depicted in Figure 2, comprising the following components in the sequence described below:
- a substrate (1), - source and drain electrodes (4),
- a semiconducting layer comprising aligned nanoparticles (5),
- an insulator layer comprising a dielectric (3), and
- a gate electrode (2).
The process for preparing this TG transistor device preferably comprises the steps of
- applying source and drain electrodes (4) on a substrate (1),
- placing a pair of auxiliary electrodes onto the substrate (1) such that they are not in contact with the source and drain electrodes (4),
- depositing a layer of semiconducting nanoparticles (5), optionally dispersed in a solvent or mixture of solvents, with or without a binder, onto the substrate (1) and the source and drain electrodes (4), such that the nanoparticles are situated between the auxiliary electrodes, - applying a voltage to the auxiliary electrodes,
- optionally removing the fluid from the nanoparticle layer (5),
- optionally removing the auxiliary electrodes,
- applying a dielectric layer (3) on top of the nanoparticle layer (5), and
- applying a gate electrode (2) on top of the dielectric layer (3).
Variations of these device structures and processes can easily be performed by the person skilled in the art using conventional methods and materials known in the art, for example to provide top contact (TG) or bottom contact (BC) transistor devices.
The gate, source and drain electrodes and the insulating and semiconducting layer in the FET device may be arranged in any sequence, provided that the source and drain electrode are separated from the gate electrode by the insulating layer, the gate electrode and the semiconductor layer both contact the insulating layer, and the source electrode and the drain electrode both contact the semiconducting layer.
In a more general manner the process of preparing an electronic device, preferably an translucent electronic device, are the following: a) applying working electrodes, preferably source and drain electrodes (4) onto a substrate (1) or onto a dielectric layer (3), b) placing a pair of auxiliary electrodes onto the substrate (1) or the dielectric layer (3) such that they are not in contact with the source and drain electrodes (4), c) depositing a layer of conducting or semiconducting nanoparticles (5), optionally dispersed in a fluid, onto the substrate (1) or dielectric layer (3) and the source and drain electrodes (4), such that the nanoparticles are situated between the auxiliary electrodes, d) applying a voltage to the auxiliary electrodes, e) optionally removing the fluid from the nanoparticle layer (5), f) optionally removing the auxiliary electrodes, and g) optionally providing one or more further functional layers onto the nanoparticle layer, wherein it is possible to carry out steps b), c), d) and f) in different order. The nanoparticles are preferably semiconducting.
Preferably the fluid is removed partly or completely while the electric field between the auxiliary electrodes is still present. The required electric field is usually maintained by applying the required voltage.
The other components of the device and suitable materials and methods of their preparation are known to the skilled person and described in the literature, for example in US 7,029,945.
For example, various substrates may be used for the fabrication of devices according to the invention, like glass or plastics. Plastic materials are generally preferred, examples including alkyd resins, allyl esters, benzocyclobutenes, butadiene-styrene, cellulose, cellulose acetate, epoxide, epoxy polymers, ethylene-chlorotrifluoro ethylene, ethylene-tetra- fluoroethylene, fibre glass enhanced plastic, fluorocarbon polymers, hexafluoropropylenevinylidene-fluoride copolymer, high density polyethylene, parylene, polyamide, polyimide, polyaramid, polydimethylsiloxane, polyethersulphone, poly-ethylene, polyethylenenaphthalate, polyethyleneterephthalate, polyketone, polymethylmethacrylate, polypropylene, polystyrene, polysulphone, polytetrafluoroethylene, polyurethanes, polyvinylchloride, silicone rubbers, silicones. Preferred substrate materials are polyethyleneterephthalate, polyimide, and polyethylenenaphthalate. The substrate may also comprise any plastic material, metal or glass that is coated with the above materials. The substrate should preferably be homogenous to ensure good pattern definition. The substrate may also be uniformly pre-aligned by extruding, stretching, rubbing or by photochemical techniques to induce the orientation of the organic semiconductor in order to enhance carrier mobility.
The source, drain and gate electrodes can be deposited by liquid coating, such as spray-, dip-, web- or spin-coating, or by vacuum deposition or vapor deposition methods. Suitable electrode materials and deposition methods are known to the person skilled in the art. Suitable electrode materials include, without limitation, inorganic or organic materials, or composites of the two. Examples for suitable conductor or electrode materials include polyaniline, polypyrrole, PEDOT or doped conjugated polymers, further dispersions or pastes of graphite, carbon nanotubes or graphene flakes or particles of metal, such as Au, Ag, Cu, Al, Ni or their mixtures as well as sputtercoated or evaporated metals, like e.g. Cu, Cr, Pt/Pd etc., and semiconductors like e.g. ITO. Organometallic precursors may also be used deposited from a liquid phase.
A PV device according to the present invention preferably comprises:
- a low work function electrode (for example Aluminum),
- a high work function electrode (for example ITO), one of which is transparent,
- a single blend layer or bilayer of consisting of a hole transporting and an electron transporting material and their mixtures; the bilayer can exist as two distinct layers, or a blended mixture (see for example Coakley, K.M. and McGehee, M. D. Chem. Mater. (2004), 16, 4533), - an optional conducting polymer layer (such as for example
PEDOT:PSS) to modify the work function of the high work function electrode to provide an ohmic contact for the hole,
- an optional coating on the high workfunction electrode (such as LiF) to provide an ohmic contact for electrons, wherein the hole and/or electron transporting material comprises aligned nanoparticles according to the present invention. The electron transporting material can also be an inorganic material such as zinc oxide or cadmium selenide, or an organic material such as a fullerene derivate, or n-doped nanoparticles and wires (for example PCBM, [(6,6)-phenyl C61 -butyric acid methyl ester] or a polymer see for example Coakley, K. M. and McGehee, M. D. Chem. Mater. (2004), 16, 4533). The hole transport material can be self p-doped nanoparticles and nanowires.
Alternatively, the aligned nanoparticles according to the present invention can be used in organic light emitting devices or diodes (LEDs), e.g., in display applications or as backlight of e.g. liquid crystal displays. Common LEDs are realized using multilayer structures. An emission layer is generally sandwiched between one or more electron-transport and/ or hole-transport layers. By applying an electric voltage electrons and holes as charge carriers move towards the emission layer where their recombination leads to the excitation and hence luminescence of the luminophor units contained in the emission layer. The aligned nanoparticles can be employed in one or more of the charge transport layers and/ or in the emission layer of the LED device, corresponding to their electrical and/or optical properties. For example, electroluminescent nanowires may be used as the emissive layer in LED devices as described in US 6,918,946 or US 6,846,565.
Aligned nanoparticles comprising a conducting material can also be used as an substitute for metal in applications including, but not limited to, charge injection layers and ITO planarising layers in LED applications, films for flat panel displays and touch screens, antistatic films, printed conducting substrates, patterns or tracts in electronic applications such as printed circuit boards and condensers.
Since the nanoparticles, especially nanowires or nanotubes, which are aligned by a process according to the present invention, have a high anisotropy, they can also be used, alone or together with other materials, in optical components or devices like optical polarizers. If wires are aligned parallel over a larger domain, they will form a wire grid type structure of long individual wires, which can in turn act as a wire-grid polarizer (WGP).
The simplest polarizer in concept is the wire-grid polarizer, which consists of a regular array of fine parallel conducting wires, placed in a plane perpendicular to the incident beam. Electromagnetic waves which have a component of their electric fields aligned parallel to the wires induce the movement of electrons along the length of the wires. Since the electrons are free to move, the polarizer behaves in a similar manner as the surface of a metal when reflecting light; some energy is lost due to Joule heating in the wires, and the rest of the wave is reflected backwards along the incident beam. For waves with electric fields perpendicular to the wires, the electrons cannot move very far across the width of each wire; therefore, little energy is lost or reflected, and the incident wave is able to travel through the grid. Since electric field components parallel to the wires are absorbed or reflected, the transmitted wave has an electric field purely in the direction perpendicular to the wires, and is thus linearly polarized.
For practical use, the separation distance between the wires must be less than the wavelength of the radiation, and the wire width should be a small fraction of this distance. This means that wire-grid polarizers are generally only used for microwaves and for far- and mid-infrared light. Using techniques according to the invention, very tight pitch grids can be made which polarize light. Since the degree of polarization does little depend on wavelength and angle of incidence, WGPs are used for broad-band applications such as projection.
Throughout the description and claims of this specification, the words "comprise" and "contain" and variations of the words, for example
"comprising" and "comprises", mean "including but not limited to", and are not intended to (and do not) exclude other components. Unless the context clearly indicates otherwise, as used herein plural forms of the terms herein are to be construed as including the singular form and vice versa. It will be appreciated that variations to the foregoing embodiments of the invention can be made while still falling within the scope of the invention. Each feature disclosed in this specification, unless stated otherwise, may be replaced by alternative features serving the same, equivalent or similar purpose. Thus, unless stated otherwise, each feature disclosed is one example only of a generic series of equivalent or similar features.
All of the features disclosed in this specification and in the claims may be combined in any combination, except combinations where at least some of such features and/or steps are mutually exclusive. In particular, the preferred features of the invention are applicable to all aspects of the invention and may be used in any combination. Likewise, features described in non-essential combinations may be used separately (not in combination).
The invention will now be described in more detail by reference to the following examples, which are illustrative only and do not limit the scope of the invention.
Abbreviations
NW / NWs nanowire / nanowires
Au / Ge / Si / Al Gold / Germanium / Silicon / Aluminium
AC / DC alternating current, a.c. / direct current, d.c.
(BG) FET (bottom gate) field effect transistor OE organic electronics
LB method method using a Langmuir-Blodgett film
EFIA method Electric Field Induced Alignment method
PV photovoltaic
S/D source and drain WGP wire grid polarizer
Brief Description of the Drawings
Figure 1 schematically depicts a bottom gate FET device according to the present invention, comprising a substrate (1), the gate electrode (2), a dielectric layer (3), source and drain electrodes (4), and a semiconducting layer (5) comprising nanoparticles aligned by a process as described above and below.
Figure 2 schematically depicts a top gate FET device according to the present invention comprising a substrate (1), the gate electrode (2), a dielectric layer (3), source and drain electrodes (4), and a semiconducting layer (5) comprising nanoparticles aligned by a process as described above and below.
Figure 3 schematically depicts the alignment process used in Example 1 , wherein a drop of liquid (6) containing NWs is placed on top of a substrate (1) between a pair of electrodes (7).
Figure 4 shows an optical image of nanowires aligned by a process according to Example 1 A. On the right hand side one of the aluminium electrodes (7) is indicated.
Figure 5 shows an optical image of nanowires aligned by a process according to Example 1 B. It depicts an electrode (7) and deposited nanowires (5).
Figure 6 shows an optical image of nanowires aligned by a process according to Example 1C between a pair of electrodes (7).
Figure 7 schematically depicts the alignment process used in Example 2. The picture shows a substrate (1), which is covered with additional layers (bottom gate electrode, SiO2 dielectric layer), a pair of gate electrodes (4) formed on the substrate, a pair of pillar electrodes (7), a AC power supply connected to the pillar electrodes (7), and a pipette ready for dispensing a nanowire dispersion (7) between the electrodes (7) and (4). The pillar electrodes (7) are centered around where the gate electrodes (4) meet.
Figure 8 shows an optical image of a bottom gate FET devices with aligned nanowires, prepared according to Example 2. The central part of the left side, where the comb like electrodes meet, is shown with ca. 10fold magnification on the right side. In the magnification some bright nanowires are visible spanning the gap between the electrodes.
Figure 9 shows the transfer characteristics of the bottom gate FET device prepared according to Example 2. The horizontal axis shows the gate voltage (V), the vertical axis the drain current (A). The upper graph stands for the measurement at 3 V, the lower for 1 V.
Figure 10 shows the optical image of a bottom gate FET device prepared according to Comparative Example 1. There are some nanowires (bright structures) deposited over the working electrodes in random orientation.
Figure 11 shows the transfer characteristics of the bottom gate FET device prepared according to Comparative Example 1.
Experimental
The nanowires used in the examples of this application were produced by solid-liquid-solid (SLS) growth as exemplified in J. Am. Chem. Soc. (2008) 130, 5436-7 by A.T. Heitsch et al.. The examples of the invention are however not limited to nanowires produced by the SLS approach, as described above and in any of the publications Adv. Mater. (2004) 7, 646- 649, J. Am. Chem. Soc. (2002) 124(7), 1424-1429, and Chem. Mater. (2005) 17, 5705-5711. For example, also vapour-based growth methods of nanowires are applicable.
Example 1
Ge nanowires (NWs) aligned directly on a glass substrate
The alignment process used for this experiment is exemplarily illustrated in Fig. 3, wherein (1) is a glass substrate, (7) are the auxiliary electrodes and (6) denotes a drop of the fluid comrising the NWs. An electric field is supplied by using a HP 8111A pulse/function generator 20 MHz and a Trek power amplifier (Model 603), the electric field being provided by two paralleled electrodes strips (7) deposited on a cleaned glass substrate (1). The electrodes (7) are applied as thin films of Al deposited by using a thermal evaporation method, and have a thickness of 30 nm. The gap between the two electrodes (7) is 2 mm, and the applied AC voltage is 50- 500 V with 0.9 kHz frequency. The NW dispersion is made by dispersing 0.1 mg Ge NWs passivated with isoprene in 1 ml chloroform, or 1 ml butanone, and dispensed as a drop (6) on top of the substrate (1) between the electrodes (7).
1A) NWs dispensed from chloroform
The Ge NWs (all passivated with isoprene) dispersion is dispensed using a glass pipette as a single drop on the substrate between the two electrodes to which an electric field is applied. After chloroform evaporation, the NWs are deposited on the substrate. Fig. 4 shows an optical image taken after the solvent is fully evaporated, wherein (7) is one of the Al electrodes. It can be seen that a part of the NWs has been aligned in the electric field. This is believed to be caused by electric field induced NWs alignment, as discussed in the specification above.
However, from Fig. 4 it can also be seen that the number of aligned NWs is lower compared to the total number of NWs, which can be contributed to the solvent used. Here, the evaporation rate of chloroform is very high, so that the NWs do not have enough time for complete orientation. Therefore, it is advisable to use a solvent with a lower evaporation rate in order to prolong the time for the NWs to orient in the fluid under the electric field effect, and/or to use a higher electric field strength in order to increase the orientation speed of the NWs.
1B) NWs dispensed from butanone
To reduce the solvent evaporation rate, a second experiment is carried out as described above, but wherein butanone (CHsC(O)CH2CHs) is used instead of chloroform. Butanone is as good as chloroform in dispersing Ge NWs passivated with isoprene. However, compared to chloroform, butanone will evaporate more slowly and therefore stay on the substrate for a few minutes before it is completely evaporated; this time is enough to allow the NWs to be aligned between the electrodes. Fig. 5 shows an optical image taken after the solvent is fully evaporated, wherein (7) is one of the Al electrodes. It can clearly be seen that the NWs (2) are aligned in the AC electric field. However, there is a flow stream forward or backward along the electrodes, which is stronger than the electric force applied to the NWs, and therefore can break the aligned NWs already formed in the solution. This can also be seen in Fig. 5: The NWs (5) close to the electrode are aligned and even distributed, the NWs far from the electrode are aligned, but not evenly distributed and some are also broken, which is assumed to be caused by the flow stream as observed by using optical microscopy.
1C) Alignment of Ge NWs in a cell
The above experiments show that the boiling point of the solvent plays an important role in control of the electric field alignment. The lower evaporation rate of the solvent leaves the NWs more time to rearrange under the electric field. However, solvent flow stream can still damage the aligned bunches of NWs.
To solve this problem, in another experiment capillary forces are used to introduce the NW dispersion into an encapsulated cell where the electric field is then applied. In this cell, electrodes with a gap of 2 mm are deposited on one glass substrate by evaporation, on the edges of the substrate 0.1 mm spacers are added and then another glass substrate is loaded on top the first substrates. The gap of the two substrates is 0.1 mm and it worked as a capillary channel.
The NWs solution was dropped on the edges of the cell, and immediately entered the cell caused by capillary force. As the solution covers the channel or gap in between the two electrodes, a 75-750 V AC voltage of the frequency 0.9 kHz is applied to the electrode gap. Fig. 6 shows the aligned NWs after evaporation of the solvent. It can clearly be seen that the NWs are aligned aiong the electric field lines. In conclusion, it is demonstrated that the Ge NWs can be aligned using an electric field.
In Example 1 it is shown that that the quality of the NW alignment depends on the solvent used and on the control of the evaporation rate. Thus, good alignment can be achieved by selecting high boiling point solvents or by encapsulating the NW dispersion in a cell where electric field induced alignment takes place. Example 2
Electric field induced alignment (EFIA) for preparation of an FET using Ge
NWs
The method described above may still be improved for large scale production of OE devices. For example, if NWs should be deposited on a large number (> 103) of FET channels, at each channel special electrodes have to be deposited and have to have an electric field applied. Also, the electric field applied to an individual region can influence the field applied to other regions. This process is complicated and not suitable for industrial use.
Therefore, a more simple and useful method which can be realized also for industrial scale is exemplarily described hereinafter. For this purpose, a pair of pillar electrodes is used for applying the electric field, which can be located at any place on the substrates. Fig. 7 exemplarily and schematically illustrates a method of aligning Ge NWs on top of a selected single BG FET device, comprising a silicon substrate (1) onto which a bottom gate electrode and an SiO2 layer as dielectric are applied. On top of the Siθ2 layer Au source and drain electrodes (4) are provided. A pair of movable pillar electrodes (7) which are connected to an AC power supplier (8) are placed on the device. The gap between the two pillar electrodes (7) is 1-2mm. The electric voltage applied to the pillars is fixed to 750 V with 0.9 kHz.
The process for aligning the Ge NWs is carried out as follows:
1. The pillar electrodes (7) are placed at the desired area of the device.
2. A voltage is applied to the pillar electrodes (7) to ensure that the applied field exists before the NW dispersion is put on the substrate.
3. A NWs dispersion (6) in butanone is dispensed from a glass pipette between the two electrode pillars. Since the surface of the BG silicon
FET substrate wets well, the drop of NWs spreads not only in the region between the electrodes, but also to the nearby region.
4. The time for nanowires alignment under such condition is less than a min. Since the solvent can still move the nanowires during evaporation, it is required to keep the electric field until most of the solvent has evaporated. 5. The pillar electrodes (7) are removed.
Fig. 8 shows two optical images taken after the solvent is removed. Fig. 8A shows the complete 20 μm BG FET device located between the two pillar electrodes, the original position of the two pillars can be seen from the image. Fig. 8B shows an enlarged picture of the central device area as indicated by the circle. It can be seen that the NWs are aligned in the direction perpendicular to the S/D electrode fingers.
Fig. 9 shows the transfer characteristics of the BG FET device wherein the semiconductor layer is made from aligned NWs by the EFIA method as described above. The on/off ratio of the Ge NWs is higher than 102, with a very sharp subthreshold swing at 6.55 V/decade.
Comparative Example 1 : Preparation of an FET using Ge NWs aligned by
LB (Langmuir-Blodgett) technique
A BG FET device was prepared as follows:
The substrates were the same as described in sample 1 , bottom gate substrates with patterned S/D electrodes on S1O2 dielectric layer. The substrates were cleaned as standard silicon substrate cleaning process.
A Ge NWs solution was prepared by using chloroform solvent with concentration of 0.1 mg/ml.
Two to three drops of the above solution are dropped on a surface of water in a beaker. The solvent rapidly evaporates right after the drop of solution reaches the surface, leaves the nanowires forming one or more pitches of NW layer on top of the water.
The above substrate, previously put into the solution, is moved slowly towards to the nanowires layer from below the surface, and then moved out from the water. The NWs layer attaches and deposits onto the substrate.
The bottom gate nanowires FETs are dried and are ready for measurements. Fig. 10 shows an optical image of Ge NWs (deposited by the LB method) on the 20 μm S/D channel BG FET (on silicon substrates), and Fig. 11 shows the transfer characteristics of the device. The on/off ratio is lower than for the devices according to the invention.
By comparing the transfer characteristics of the BG FET device prepared using the EFIA method as described in Example 2 with the transfer characteristics of a TG FET wherein the NWs are deposited by LB technique, it can clearly be seen that the device obtained using the EFIA method shows improved performance.