Fittingly, Fig. 8 shows a frequency spectrum 800 of a test signal after passing through a signal path with a frequency- dependent asymmetry. In other words, the circuit under test, or the signal path under test, has a non-symmetrical, or non- flat, frequency response. This means that some or all of the different frequencies of the frequency spectrum of the test signal are amplified or attenuated with different strength when passing through the signal path.

A phase modulation with a frequency Ω yields pairs of tones symmetrically around the basic frequency of the phase-locked loop, which is also called the carrier (frequency) , at frequencies of ω-kΩ and ω+kΩ.

A circuit under test, or a signal path under test, which attenuates the both sides differently, destroys this symmetry, which leads to low-frequency content in the mixed and filtered test signal y(t).

Fig. 8 shows a spectrum of the mixed test signal x(t) before filtering, for example, if the circuit under test is a second-order low-pass Butterworth filter with a corner frequency at the carrier frequency (basic frequency of the phase-locked loop) , or if a second-order low-pass Butterworth filter with a cut-off frequency (corner frequency) in the range of the carrier frequency is arranged in the signal path under test.

The frequency spectrum 800 shows that by mixing the original test signal Φ(t) with the asymmetrically attenuated test signal ψ(t), the frequency portions 802 in the range of double the basic frequency of the phase-locked loop comprise a similar form as at an ideal signal path. However, by the asymmetrical attenuation, also low-frequency frequency portions 804 result. After filtering the mixed test signal, the signal processing means, or the detector, may evaluate the low-frequency frequency portions to be able to assess the quality of the signal path.

Thus, for example, the symmetry, or flatness, of a frequency response of a signal path under test, or a circuit under test (e.g. an RFIC), may be measured by the test system described. For this, the signal path under test, or the circuit under test, is simply stimulated with a phase-modulated test signal (phase-modulated carrier) , the test signal which passed through the signal path or the circuit under test is mixed with the original test signal, the mixed test signal is low- pass filtered, and the activity of the mixed and filtered test signal is used as a measure for the quality of the signal path under test, or the circuit under test.

Since the modulated phase-locked loop is used as a stimulus, no external stimulator, such as a function generator, is needed. The filtered signal y(t), which is the filter output, only contains the artifacts of asymmetries or non-idealities (except for the DC component) , and is therefore much easier to measure than a large signal with small non-idealities. Additionally, the dynamic range is significantly improved, and a digitization is not necessary, since a simple power detection or a max detection may be sufficient.

For example, a power detector (diode) integrated over a given time, integration of abs ( . ) (an absolute value of a quantity) over given time or a max hold detection (maximum value detection) are a possibility of detecting the activity (of the mixed and filtered signal) . Using an analog-digital- converter (ADC) with reduced requirements, such as the resolution, since the necessary dynamic range is reduced, and/or the sample rate, since detailed information about the spectrum is not needed, but knowing the overall power is enough, for example, is equally possible.

Non-linearities, such as amplitude-dependent gains, which do not comprise any frequency dependencies, do not expose themselves at the filtered signal y(t) in this example. Fig. 9 shows a block diagram of a test system 900 for testing a signal path with an apparatus for compensating a time delay, or adjusting a delay through a circuit under test, according to an embodiment of the invention. If the signal path under test, or a circuit 610 under test as a part of the signal path, comprises a delay (e.g. ideally ψ(t) = Φ(t - τ) ) , the time delay may be compensated by a delayed modulation of a reference signal φ' (t) = φ(t - τ) (e.g. Φ' (t)=cos (ωt+φ' (t) ) , which is also denoted as second carrier.

Here, the test system 900 has a similar setup as the test system shown in Fig. 6. However, mixer 620 is supplied with a reference signal of a second phase-locked loop 930 instead of the original test signal from the phase-locked loop 130 of the test signal generator 110, wherein a second modulator 920 coupled to the second phase-locked loop 930 enables a phase modulation of the reference signal.

If the delay is not known, varying the modulation delay for minimum activity of the mixed and filtered signal y(t) may yield the desired result (the value for the delay) .

Fig. 10 shows a block diagram of a test system 1000 for testing a signal path for determining a non-linearity in the signal path, according to an embodiment of the invention. The test system 1000 is set up according to a similar principle as the test system shown in Fig. 6. However, in the signal path under test, no mixer is arranged (thus ψ(t) = x(t)). At the end of the signal path, the test signal is filtered directly by the low-pass filter 630 and provided to the detector 640 of the signal processing means 140.

Fittingly, Fig. 11 shows a frequency spectrum of a test signal after passing through a signal path with a non- linearity. Here, for example, a non-linearity is an amplitude-dependent gain, which, however, mainly does not comprise any frequency dependence. The frequency spectrum here shows frequency portions 1120 of the original test signal in the range of the basic frequency 720 of the phase- locked loop of the test signal generator, frequency portions 1130 at double the basic frequency 730 of the phase-locked loop, caused by the non-linearity, and low-frequency frequency portions 1110 also caused by the non-linearity. As it is apparent from the characteristic 710 of the low-pass filter, frequency portions in the range of the basic frequency 720 of the phase-locked loop and in the range of double the basic frequency 730 of the phase-locked loop are filtered out. The low-frequency portions 1110 may then be detected and evaluated by the signal processing means, or the detector, so as to detect non-linearities in the signal path.

Here, it should be noted that odd-order non-linearities typically do not show up at low frequencies. For example, even-order non-linearities in the signal path, or in the circuit under test, generate low-frequency inter-modulation products between tones (frequencies) of the test signal, which is also denoted as the modulated stimulus waveform φ(t). These are visible in the filtered test signal y(t).

Fig. 11 shows an example of a spectrum of the test signal x(t) before filtration by the low-pass filter for a signal path or a circuit under test with an even non-linearity.

By stimulating the signal path or the circuit under test with a phase-modulated test signal (carrier) , followed by a low- pass filtrating of the test signal after passing through the signal path or the circuit under test, and using the filter output activity (activity of the filtered test signal) , the measurement of a non-linearity of a signal path, or of a circuit under test, may thus be used, for example, as a measure for the quality of the signal path, or the circuit under test. For an ideal signal path, or an ideal circuit under test, the filtered test signal y(t) is zero.

Fig. 12 shows an example of a known LINC transmitter 1200 (LINC = linear amplification using non-linear components) . The LINC transmitter 1200 includes, as is shown in the block diagram, two phase-modulated phase-locked loops 1210, 1220 connected to a combiner 1230. The combiner 1230 is configured to overlay signals from the both phase-locked loops 1210, 1220 and provide the overlaid signal to a power amplifier 1250 via an programmable gain amplifier 1240.

By the two phase-modulated phase-locked loops 1210, 1220 of the transmitter 1200, a phase-modulated signal may be caused in a common-mode phase modulation (via the combiner 1230) . In a differential phase modulation, an amplitude modulation may be generated.

In systems comprising an LINC transmitter, a test system for testing a signal path may be easily implemented, since a phase-modulated phase-locked loop is already present.

Fig. 13 shows a block diagram of a test system 1300 for testing a signal path for an LINC-based RFIC, according to an embodiment of the invention. The RFIC is set up similar to the principle shown in Fig. 2, wherein the transmitter part does not comprise a in-phase/quadrature-phase architecture, but a LINC architecture, as shown in Fig. 12. One of the both phase-modulated phase-locked loops 130 of the LINC transmitter is used for generating the test signal. For testing the signal path from the second phase-locked loop 1220 to the combiner 1230 the second phase-looked loop 1220 may be used for generating the test signal. The output (TX) of the transmitter part is connected to the input (RX) of the receiver part, whereby the signal path runs from the receiver to the transmitter and, for example, a loopback test of the LINC-based RFIC is thereby enabled.

As shown in Fig. 2, also the receiver part of the test system 1300 is embodied in an in-phase/quadrature-phase architecture, but, instead of the phase-locked loop shown in Fig. 2, a phase-modulated phase-locked loop 1320 which may be phase-modulated by a modulator 1310 is used and configured to provide a reference signal Φ' (t) .

Thus, the signal path under test extends from the phase- modulated phase-locked loop 130 of the test signal generator 110 over a combiner 1230, a programmable gain amplifier 1240, a power amplifier 1250, a low-noise amplifier 266 and a further programmable gain amplifier 264 to an in- phase/quadrature-phase mixer 620 and from there, to a low- pass filter 630, wherein a low-pass filter 630 is arranged in the in-phase branch 252 and a further low-pass filter 630 is arranged in the quadrature-phase branch 254. The both low- pass filters 630 are each connected to a detector 640 which is part of the signal processing means 140. The phase- modulated phase-locked loop 1320 and the associated modulator 1310, which are configured to provide the reference signal, may also form part of the signal processing means 140. Via a phase-shifting unit 262, the phase-modulated phase-locked loop 1320 is connected to the in-phase/quadrature-phase mixer 620 and, thus, may provide the reference signal to the in- phase/quadrature-phase mixer 620.

Additionally, or alternatively, the phase-shifting unit 262

(of the signal processing means 140) may be connected , for example, directly to the phase-locked loop 130 of the test signal generator 110 to provide the original test signal to the in-phase/quadrature-phase mixer 620.

For example, by the setup described in Fig. 13, a test system for detecting frequency-dependent asymmetries in a signal path, as shown in Fig. 6, may be realized. Instead of the original test signal, also the reference signal, if it comprises the same phase modulation, may be used for mixing with the test signal which passed through the signal path. Here, a phase delay between the test signal and the reference signal may have to be compensated by the method described in Fig. 9. If the phase-modulated reference signal, or the original test signal present at the in-phase/quadrature-phase mixer 620 is replaced by a constant signal (however, unequal to zero) , the setup will correspond to the test system shown in Fig. 10, and may be used for detecting non-linearities in the signal path.

The phase-modulated phase-locked loop 1320 of the receiver part is thus deployed as a stimulus. Also the modulated PLL of the transmitter is again leveraged as stimulus. Thus, an expensive function generator is unnecessary. As already described, expensive analyzers for signal processing are not needed either, since only the low-frequency portion of the test signal may be tested.

For example, instead of a LINC-based transmitter, also a transmitter with a polar modulation may be used. Fig. 14 shows a block diagram of a polar modulation transmitter 1400, wherein the transmitter 1400 includes a phase-modulated phase-locked loop 1410, a programmable gain amplifier 1420 and a power amplifier 1430 which may be modulated. The amplitude and phase are modulated independently. Fittingly, Fig. 15 shows a block diagram of a test system 1500 for testing a signal path for a polar-based RFIC according to an embodiment of the invention. The setup and the mode of operation of the test system 1500 correspond to those of the test system described in Fig. 13. The only difference lies in using different transmitter architectures. In turn, however, the phase-modulated phase-locked loop 130 of the transmitter module, which is already present, is used for generating the test signal. Thus, additional expenses for realizing the test system for testing the signal path may be kept very low. Again, the modulated PLL of the transmitter is leveraged as stimulus.

A further possibility consists in embodying the transmitter in an in-phase/quadrature-phase architecture. For this, Fig. 16 shows a block diagram of a test system 1600 for testing a signal path for an in-phase/quadrature-phase-based RFIC (I/Q-based RFIC) according to an embodiment of the invention. The setup and mode of operation of the test system 1600 are similar to those already shown and described in Fig. 13 and Fig. 15. The difference lies in using an in- phase/quadrature-phase transmitter as already described in Fig. 2. The phase-locked loop of the transmitter module, which is already present, is here replaced with a phase- modulated phase-locked loop 130, or is extended such that a phase-modulated test signal may be provided.

In turn, the signal path under test extends from the phase- locked loop 130 of the test signal generator 110 to the signal processing means 140, wherein the signal path partly comprises an in-phase branch and a quadrature-phase branch.

The input A 1610 of the in-phase branch 212 and the input B 1620 of the quadrature-phase branch 214 of the transmitter module are supplied with constant signals, such as a logical zero or a logical one, for testing the signal path. These levels are easily kept and do not require any additional expenses, since the signals are available in the circuit anyway. By a suitable selection of the signals at the input A 1610 of the in-phase branch 212 and the input B 1620 of the quadrature-phase branch 214, for example, either the in-phase branch or the quadrature-phase branch 214 of the transmit module, or a combination of both branches, may be tested. For example, by applying a logical one to the input A 1610 of the in-phase branch 212 and a logical zero to the input B 1620 of the quadrature-phase branch 214, the in-phase branch 212 is activated. Additionally, by evaluating the detector 642 connected to the output of the low-pass filter 630 of the in-phase branch 252 of the receiver module, the in-phase branch 252 of the receiver may be tested. By evaluating the detector 640 connected to the output of the low-pass filter 630 of the quadrature-phase branch 254, the quadrature-phase branch 254 of the receiver may be tested.

Thus, in turn, a test system for detecting frequency- dependent asymmetries and non-linearities may be realized according to the principles described in Fig. 6 and Fig. 10.

The phase-modulated phase-locked loop 130 is leveraged as a stimulus to generate a test signal, wherein the test signal is down converted, e.g. for determining frequency-dependent asymmetries, by the in-phase/quadrature-phase mixer 620 of the receiver part which is supplied with the reference signal of the phase-modulated phase-locked loop 130 of the receiver (and thus corresponds to the test system of Fig. 6, for example) , and, on the other hand, the reference signal is kept constant (however, non-zero constant), e.g. for detecting non-linearities, whereby the test signal is not down converted (and thus corresponds to the test system of Fig. 10, for example). The baseband input signals of the transmitter (TX BB input)

(the signal at the input A 1610 and the signal at the input B

1620) may comprise any value. However, it is simple to use a logical one and/or a logical zero, for example. In this way, it is also possible to select the in-phase branch 212 or the quadrature-phase branch 214. Other static values lead to different phases of the test signal φ(t) . For example, an

ADPLL (all digital phase-locked loop) with digital phase control may be used for modulation. An analog phase-locked loop may also work, but it is more difficult to achieve equal modulation of the transmitter (TX) (of the phase-locked loop of the test signal generator 110) and of the receiver (of the phase-locked loop 1320 of the signal processing means 140). As already mentioned, it is also possible to use one modulated (analog) phase-locked loop and route it to both uses (to couple the test signal into the signal path, on the one hand, and to provide it as a reference signal to the mixer 620, on the other hand) . For this, for example, a modulated analog phase-locked loop may be used, too. For example, an NCO (numerical controlled oscillator) may be used to serve as a sinusoidal phase modulation source (modulator) . Other waveforms work also, but an NCO is easy.

Further, the roles of the in-phase branches and the quadrature-phase branches may be exchanged to verify both in- phase and quadrature-phase transmit and receive paths . The symmetry of the phase-modulation paths in the transmitter part (TX) and the receiver part (RX) may be measured. By an intentional phase difference between the modulation sources (the different phase-modulated phase-locked loops) it may be verified that the signal path is not dead. For example, a cancellation relies on identical modulation. In in-phase/quadrature-phase-based circuits, non-idealities may occur, for example, such as described in Fig. 4. Such non-idealities, e.g. phase mismatches (phase differences) or gain mismatches (gain differences) between an in-phase branch and a quadrature-phase branch, may develop by small differences in the both branches by which the symmetry of the both branches is destroyed.

Fitting the test system illustrated in Fig. 16, Fig. 17 shows a schematic model 1700 of an in-phase/quadrature-phase-based

RFIC with a loopback configuration according to an embodiment of the invention. Model 1700 includes only those components which are important for measuring the in-phase/quadrature- phase mismatches. Other components are neglected or summarized to constant parameters.

For example, the low-pass filters of the transmit part are not taken into consideration, since the input signal A 1610 and the input signal B 1620 in this example are static (time constant) during the testing of the signal path. Further, the both 0°/90° phase-shifting units, respectively arranged between the phase-locked loops and the in-phase/quadrature- phase mixers 218, 620, are taken into consideration by using a sinus function (e.g. a (t) =sin (Ωt+φ (t-τ) ) , u(t)= sin(Ωt+φ(t- T)), where φ(t-τ) and φ(t-T) represent the phase modulation signals of the phase-locked loops) for the in-phase branches 212, 252, and by using a cosine function (e.g. b(t) cos (Ωt+φ (t-τ) , v(t) =cos (Ωt+φ (t-T) ) where φ(t-τ) and φ(t-T) represent the phase modulation signals of the phase-locked loops) for the quadrature-phase branches 214, 254.

In Fig. 17, the test signal in the in-phase branch 212 of the transmit part before the in-phase/quadrature-phase mixer 218 of the transmit part is designated as a(t), the test signal in the quadrature-phase branch 214 of the transmit part before the in-phase/quadrature-phase mixer 218 of the transmit part is designated as b(t), the test signal at the output of the transmit part after the combiner 230 is designated as s(t), the test signal at the input of the receiver part before the in-phase/quadrature-phase mixer 620 of the receiver part is designated as r(t), the reference signal in the in-phase branch 252 of the receiver part before the in-phase/quadrature-phase mixer 620 of the receiver part is designated as u(t), the reference signal in the quadrature-phase branch 254 of the receiver part before the in-phase/quadrature-phase mixer 620 of the receiver part is designated as v(t), the test signal in the in-phase branch 252 of the receiver part after the in-phase/quadrature-phase mixer 620 of the receiver part is designated as x(t), and the test signal in the quadrature-phase branch 254 of the receiver part after the in-phase/quadrature-phase mixer 620 of the receiver part is designated as y(t).

The gain imbalances 1770, 1780 (gain mismatches) may also be inserted at any of the two other mixer ports (inputs or outputs) . In other words, the gain difference 1770 of the transmit part may also be inserted before the in- phase/quadrature-phase mixer 218 of the quadrature-phase branch 214 or before or after the in-phase/quadrature-phase mixer 218 of the in-phase branch 212. Equally, the gain difference 1780 of the receiver part may be inserted before the in-phase/quadrature-phase mixer 620 in the in-phase branch 252 of the receiver part, after the mixer 620 or between the mixer 620 and the phase-locked loop 1320 of the signal processing means 140.

Phase imbalances are modeled as time delays, because the modulations are delayed also. The transmitter phase imbalance

1750 may also be modeled after any of the two mixers 218 or between the mixer 218 and the phase-locked loop 130 of the test signal generator 110. Equally, the receiver phase imbalance 1760 may also be modeled before any of the two mixers 620 or between the mixer 620 and the phase-locked loop 1320 of the signal processing means 140.

The low-pass filters 630 (L (ω) , L) of the receiver are modeled as ideal with a corner frequency Ω/2, passing baseband perfectly, and suppressing the upper image.

The signal path gains and the loopback attenuation are lumped into gain parameter G 1702. The signal path and loopback delays are lumped into parameter γ 1704.

In contrast to the test system shown in Fig. 16, the signal processing means 140 comprises an additional combiner 1710 in the schematic model 1700. The combiner 1710 is configured to overlay a signal X(t) at the output 1720 of the low-pass filter 630 of the in-phase branch 252 of the receiver part with a signal Y(t) at the output 1730 of the low-pass filter 630 of the quadrature-phase branch 254 and to provide the overlaid signal Z at an output 1740.

Thus, the skew δ 1750 (the phase difference) of the transmitter (TX) , the gain mismatch g 1770 of the transmitter (TX) , the skew ε 1760 (the phase difference) of the receiver (RX) and the gain mismatch h 1780 of the receiver (RX) are to be measured, wherein the loopback delay γ 1704 and the loopback gain G 1702 are unknown.

Here, the controllable input quantities are the phase τ (in units of time) of the transmitter (precise) , which is established by the phase-locked loop 130 (Osc) of the test signal generator 110, the phase T (in units of time) of the receiver (precise) , which is established by the phase-locked loop 1320 (Osc) of the signal processing means 140, the signal A at the input 1610 of the in-phase branch 212 of the transmitter and the signal B at the input 1620 of the quadrature-phase branch 214 of the transmitter (for example, a logical zero level and a logical one level can be generated most accurately) . Thus, a phase value may be converted to a corresponding time value.

The levels or activity amounts at X', Y', Z' (at the outputs 1720, 1730 of the both low-pass filters 630 and at the output 1740 of the combiner 1710) result as available information for the evaluation (e.g. "no activity" can be measured very accurately) .

By collecting the available information (X, Y, Z) under various combinations of available inputs (τ, T, a, b) , all four mismatch components (δ, g, ε, h) may be computed and/or obtained. Each combination may lead to an equation for a mismatch component. By using enough various combinations all mismatch components may be determined.

Some embodiments according to the invention relate to a method for measuring the phase difference between two mixed phase-locked loops by controlling their phases. For this, Fig. 18 shows a schematic model illustration of a test system for determining a phase difference α between two phase- modulated phase-locked loops. The model illustration 1800 shows a first phase-modulated phase-locked loop 1810 and a second phase-modulated phase-locked loop 1820, whose output signals are mixed by a mixer 1830. The mixed signal x(t) is filtered by a low-pass filter 1840, and the filtered signal X(t) is provided at an output of the low-pass filter 1840.

For this, first the signal X(t) at the output of the low-pass filter 1840 must be computed as a function of skew α 1850 and the phase φ(t) (of the first phase-locked loop 1810) and the phase ψ(t) (of the second phase-locked loop 1820) .

a(f)= sin(Ωf +φ{t - τ))

r(t)=a(t - α)

r(t)= sin(Ωt - Ωα +φ(t-a -τ))

u(t) = sin(Ωt +ψ(t)) x(t) = r(t).u(t)

= —cos(ψ(t)-φ(t-a -τ)+Ωα)+—cos(2ΩΩf...) χ(t)= —cos(ψ(t)-φ(t -a -τ)+Ωα) 2

With this result, for example, the skew α (phase difference) between two phase-modulated phase-locked loops may be measured in two different manners by controlling their phases φ(t) and ψ(t) .

A possibility of measuring the skew between carriers (signals) consists in using static phase adjustment.

φ(t)=Ωτ, ψ(t)=ΩT

The filtered output signal X is thus a DC voltage signal. If T and/or x is adjusted such that the filtered output signal X reaches a maximum, the phase difference α 1850 will be obtained.

α = T - τ

Alternatively, the filtered output signal X may also be adjusted to a minimum or to X = 0. A further possibility of measuring the skew between phase modulations consists in using dynamic phase modulation.

ψ(t) = φ(t)

χ(t)= —cos(φ(t)-φ(t -a -τ)+Ωα)

Thus, the filtered output signal X is a dynamic signal. It becomes static for τ = α. Thus, the skew α 1850 may be determined by adjusting τ, wherein τ is adjusted such that the activity of the filtered output signal X achieves a minimum (or zero) . Alternatively, τ may also be adjusted for a maximum activity at the output X.

Here, for example, the fact that an ADPLL enables a very accurate phase adjustment and a very accurate phase modulation through digital control may be exploited. Yet, the method may apply also to analog phase-locked loops .

The arrangement shown in Fig. 18 may also be found in the model 1700 of a test system, shown in Fig. 17, wherein the first phase-modulated phase-locked loop 1810 corresponds to the phase-locked loop 130 of the test signal generator 110, the second phase-modulated phase-locked loop 1820 corresponds to the phase-locked loop 1320 of the signal processing means 140, the mixer 1830 corresponds to the in-phase/quadrature- phase mixer 620 of the receiver part, and the low-pass filter 1840 corresponds to the low-pass filter 630 in the in-phase branch 252 and in the quadrature-phase branch 254. Accordingly, the loopback delay γ 1704 may be determined by the method described.

Some embodiments according to the invention relate to a method for measuring a phase imbalance in an in- phase/quadrature-phase-based RFIC, such as schematically illustrated in Fig. 17. The skews between the transmitter

(TX) and the receiver (RX) phase modulation (the test signal and the reference signal) at the in-phase/quadrature-phase mixer 630 of the receiver part (RX) and measured at the signal X (at the output 1720 of the low-pass filter 630 of the in-phase branch 252) and the signal Y (at the output 1730 of the low-pass filter 630 of the quadrature-phase branch

254) depend on the phase imbalances of the transmitter (TX) and the receiver (RX) , the loopback delay, the input signal A 1610 of the in-phase branch 212 and the input signal B 1620 of the quadrature-phase branch 214, wherein the input signal A 1610 of the in-phase branch 212 and the input signal B 1620 of the quadrature-phase branch 214 may control whether the transmitter (TX) modulation (the test signal), takes the in-phase branch 212 or the quadrature-phase branch 214 or a combination of both branches.

The measurement of the modulation skews at the outputs 1720, 1730 of the low-pass filters 630 (X and Y) for multiple settings of the input signals A 1610 and B 1620 enables computing the transmitter (TX) and receiver (RX) phase imbalances (the phase differences of the test signal and the reference signal in the different branches).

For example, comparing the modulation skews between the in- phase branch 212 of the transmitter (A = 1, B = 0) and the quadrature-phase branch 214 of the transmitter (A = 0, B = 1) measured at the output of the same low-pass filter 630 (at the same branch of the receiver, e.g. the output signal X 1720) , may reveal the phase imbalance 1750 of the transmitter (the phase imbalance 1750 between the in-phase branch 212 and the quadrature-phase branch 214 of the transmitter part) .

In a similar manner, the phase imbalance 1760 of the receiver for any transmitter phase modulation may reveal by comparing the modulation skews between the in-phase branch 252 of the receiver (the output signal X 1720) and the quadrature-phase branch 254 of the receiver (the output signal Y 1730) .

Further embodiments according to the invention relate to a method for measuring a gain imbalance. For example, such a method may be employed in in-phase/quadrature-phase-based RFICs, as is schematically shown in Fig. 17, for example.

The carrier phase of the receiver (the test signal arriving at the receiver) depends on the weighting of the input signal A 1620 of the in-phase branch 212 of the transmitter (TX), the weighting of the input signal B 1620 of the quadrature- phase branch 214 of the transmitter (TX), the gain imbalances g 1770 of the quadrature-phase branch 214 of the transmitter (TX) and the phase imbalance δ 1750 of the transmitter (TX) .

The measurement of a carrier skew (test signal skew) at the output X 1720 of the in-phase branch or at the output Y 1730 of quadrature-phase branch of the receiver part for two settings of the input signal A 1610 of the in-phase branch 212 and the input signal B 1620 of the quadrature-phase branch 214 enables computing the gain imbalance g 1770 of the transmitter (TX) for known phase imbalance δ 1750 of the transmitter (TX) .

For example, ideally, the carrier phase difference between a state with input signals A = I and B = O and a state with the input signals A = I and B = 1 is equal to 45 degree. A deviation depends on the phase of the transmitter (TX) and on the gain imbalance g 1770 of the transmitter (TX) . The gain imbalance g 1770 of the transmitter (TX) may be computed for known phase imbalance δ 1750 of the transmitter (TX) . Carrier skew measurements at the in-phase branch 252 of the receiver (RX I) and the quadrature-phase branch 254 of the receiver (RX Q) differ ideally by 90 degree with deviations caused by phase and gain imbalance of the receiver.

Measuring the carrier skew at the outputs 1720, 1730 of the in-phase branch 252 and the quadrature-phase branch 254 of the receiver for any input carrier phase (phase of the test signal) enables computing the gain imbalance h 1780 of the receiver (RX) for known phase imbalance ε 1760 of the receiver (RX) .

For example, ideally, a 45 degree carrier skew leads to a signal Z = X - Y = O at the output 1740 of the combiner 1710. Adjusting the phase of the receiver (RX) (the phase of the reference signal) to a output signal Z=O enables computing the gain imbalance h 1780 of the receiver (RX) for a known phase imbalance ε 1760 of the receiver (RX) .

Some embodiments according to the invention relate to an algorithm, or a method, for determining phase imbalances and gain imbalances, comprising:

- determining a loopback delay; - determining a phase imbalance of a transmitter part (TX) ;

- determining a phase imbalance of a receiver part (RX) ;

- computing a gain imbalance of a transmitter part (TX) ;

- computing a gain imbalance of a receiver part (RX) .

Some embodiments according to the invention relate to a method for determining a loopback delay γ 1704 in an in- phase/quadrature-phase-based RFIC, such as schematically shown in Fig. 17. Here, in a first step, the input signals are set (e.g. A = I, B = O, non-constant φ(t), ψ(t) = φ(t), T = 0) .

Afterwards, τ is adjusted until the output signal X at the output 1720 of the in-phase branch 252 of the receiver part is constant for τ = ii. Then γ - -X_\.

Mathematically, this may be formulated as follows:

s(t) = sin(Ωt + cp(t - τ))

r(t) = G • s(t -_Y)

r(t) = G • sin(Ωt - Ωγ + φ(t - y - τ))

u(t) = sin(Ωt + φ(t))

x(t) = r(t) • u(t)

C C

= — cos(φ(t) - cp(t - Y - τ) + Ωy) + — cos(2Ωt + ...)

X(t) = - cos(cp(t) - φ(t - Y - τ) + ΩY)

X(t) ≡ const => X₁ = -Y

Further embodiments according to the invention relate to a method for determining a phase imbalance δ 1750 of a transmitter in an in-phase/quadrature-phase-based RFIC, such as schematically shown in Fig. 17. Here, first the input signals are set (e.g. A = O, B = I, φ(t) , τ = - γ, ψ(t) = φ(t) ) .

Afterwards, the phase T of the phase-locked loop 1320 of the signal processing means 140 is adjusted until the output signal X at the output 1720 of the in-phase branch 252 of the receiver part is constant for T = T₂. Then δ = T₂.

Mathematically, this may be formulated as follows:

s(t)= gcos(Ω/ -Ωδ +φ(t -δ +γ))

r(t) = G • s(t -_Y)

r(t) = G • g ■ sin(Ωt - Ωδ - Ωγ + φ(t - δ))

u(t) = sin(Ωt + φ(t - T))

x(t) = r(t) • u(t)

C^* C"

= — cos(φ(t - T)- φ(t - δ) + Ωδ + Ωγ) + — cos(2Ωt + ...)

X(t) = — cos(φ(t -T)- φ(t - δ) + Ωδ + Ωγ)

X(t) ≡ const => T₂ = δ

Some embodiments according to the invention relate to a method for determining a phase imbalance ε 1760 of a receiver in an in-phase/quadrature-phase-based RFIC, such as schematically shown in Fig. 17. Here, first the input signals are set (e.g. A = I, B = O, φ(t), τ = - γ, ψ(t) = φ(t)).

Afterwards, the phase T of the phase-locked loop 1320 of the signal processing means 140 is adjusted until the output signal Y at the output 1730 of the quadrature-phase branch 254 of the receiver part is constant for T = T₃. Then, ε = -T₃.

Mathematically, this may be formulated as follows:

r(t) = G • sin(Ωt - Ωy + cp(t))

v(t) = h cos(Ωt + φ(t - T))

y(t) = r(t) • h • v(t - ε)

= r(t) • h • cos(Ωt - Ωε + φ(t - T - ε))

= — sin(- Ωy + φ(t) + Ωε - φ(t - T - ε)) + — sin(2Ωt + ...)

Y(t) = — sin(φ(t) - φ(t - T - ε) + Ωε - Ωy)

Y(t) ≡ const => T₃ = -ε

Further embodiments according to the invention relate to a method for calculating a gain imbalance g 1770 of a transmitter in an in-phase/quadrature-phase-based RFIC, such as schematically shown in Fig. 17. Here, first the input signals are set (e.g. A = I, B = I, φ(t) = Ω.γ, ψ(t) = ψ, which corresponds to a signal without a (phase) modulation) .

Afterwards, ψ is adjusted until the output signal X at the output 1720 of the in-phase branch 252 of the receiver part comprises a maximum for ψ = ψ₄. Then, the gain imbalance g 1770 may be computed.

For example, here, first a phase p of the test signal r(t) present at the in-phase/quadrature-phase mixer 620 is computed as a function of the gain imbalance g 1770, which mathematically may be formulated as follows:

s(t) = sin(Ωt + Ωγ) + g cos(Ωt - Ωδ + Ωy)

r(t) = G • s(t - Y)

= G sin(Ωt) + Gg cos(Ωt - Ωδ)

= G sin(Ωt) + Gg cos(Ωδ) cos(Ωt) + Gg sin(Ωδ) sin(Ωt)

= [G + Gg sin(Ωδ)] sin(Ωt) + Gg cos(Ωδ) cos(Ωt)

= R sin(Ωt + p)

g cos(Ωδ) p = arctan ——

1 + g sin(Ωδ)

Afterwards, ψ« may be determined, wherein the output signal X at the output 1720 of the in-phase branch 252 of the receiver part comprises a maximum. Mathematically, this may be formulated as follows:

r(t) = R sin(Ωt + p) u(t) = sin(Ωt + ψ)

x(t) = r(t)^• u(t)

= R sin(Ωt + p) sin(Ωt + ψ)

R R = — cos(p - ψ) cos(2Ωt + ...)

χ(t) = j cos(p - ψ)

ψ₄ = arg max X = p ψ

Then, the gain imbalance g 1770 of the transmitter may be computed via ψ₄, which mathematically may be formulated as follows :

g cos(Ωδ) ψ, = arctan / ,

1 + g sin(Ωδ)

cos(Ωδ) tan ψ, =

— + sin(Ωδ) g

1 . , _N cos(Ωδ)

— + sm(Ωδ) = —- g tan ψ₄

g = cos(Ωδ) , /_^^N i—'- - sin(Ωδ) tan ψ₄ Some embodiments according to the invention relate to a method for determining a gain imbalance h 1780 of a receiver in an in-phase/quadrature-phase-based RFIC, such as schematically shown in Fig. 17.

Here, first the input signals are set (e.g. A = I, B = O, φ(t) = π/4 + Ωγ, ψ(t) = ψ, which corresponds to a non- (phase) modulated signal).

Afterwards, ψ is adjusted until the output signal Z at the output 1740 of the combiner 1710 is zero at ψ = ψs. Then, the gain imbalance h 1780 may be computed.

For this, for example, first the output signal Z at the output 1740 of the combiner 1710 is determined as a function of ψ, which mathematically may be formulated as follows:

Ω _ ε π

For ψ = ψ₅, Z is equal to zero:

. G { π\ Gh . ( _ π

T^cov^{5 ""}4J^~T^sml^{Ψs ~} J

Thus, the gain imbalance h 1780 of the receiver may be computed based on ψ₅, which mathematically is represented as follows:

cos ψ₅ h = — ^⁴ sinl ψ₅ - Ωε

4

In some embodiments according to the invention, measuring the gain imbalance of the transmitter (TX) relies on the input signal A and the input signal B being equal to 1. The equality (of signal A and signal B) can be improved by applying the same signal to the input A and the input B. For this, Fig. 19 shows a circuit diagram of an apparatus for providing equal signal levels. Here, the level of a logical zero or a logical one may be applied to the output A and/or to the output B of the apparatus by the four switches 1910.

Some embodiments according to the invention relate to a method for testing a signal path, wherein the method is also applicable to RFICs with an analog baseband.

Some further embodiments according to the invention relate to a method for- testing a signal path, wherein no external waveform generators nor external waveform analyzers are required.

Further embodiments according to the invention relate to a test system for testing a signal path and a method for testing a signal path, wherein the measurement precision is not limited by the inaccuracy of on-chip digital-analog- converter (DAC) or analog-digital-converter (ADC) , nor by the inaccuracy of an external waveform generator or an external waveform analyzer.

Determining when a value is zero/minimum/maximum or determining a minimum/maximum activity requires no linearity or (high) accuracy, just monotonicity, for example. Only the phase adjustment must be as linear and precise as possible, which is true particularly for an ADPLL, for example.

Some embodiments according to the invention relate to a method for testing a signal path, wherein in- phase/quadrature-phase imbalances may be measured by a variation of the phase of the phase-locked loop of the transmitter (of the test signal generator) and/or the phase of the phase-locked loop of the receiver (of the signal processing means) in combination with multiple baseband input combinations A, B. For this, for example, output quantities

(X, Y, Z) may be measured, static phases may be adjusted to obtain a minimum or maximum output signal X, Y, Z or an output signal equal to zero, or a delay of phase modulations may be adjusted to achieve a minimum or maximum activity of an output quantity X, Y, Z.

Some embodiments according to the invention relate to a method in which other combinations of the values for the input signals A, B are used instead of zero and one. For example, it is also possible to use dynamic input signals A, B instead of static signals.

Further embodiments according to the invention relate to a method in which input signals are adjusted to obtain a maximum activity of an output signal X, Y, Z instead of a minimum activity. Adjusting the output signals X, Y, Z to a minimum, a maximum or equal to zero may be equivalent. For example, it is also possible to measure the output signals X, Y, Z instead of adjusting them to a minimum, a maximum or zero, which would be faster, but would require a precision measurement. Furthermore, a static transmitter phase adjustment may be equivalent to a static receiver phase adjustment .

For calculating phase differences, or phase imbalances and gain imbalances, the following trigonometric formulas are used as a basis, among other things:

sin x ■ sin y = — (cos(x — y) — cos(x + y))

sin x^■ cos y = — (sin(x - y) + sin(x + y))

x + y . x - y sin x - sin y = 2 cos sin

2 2

cos (x - y) = cos x cos y + sin x sin y

a sin x + b cos x = Va² + b² sin x + arctan — Fig. 20 shows a flow diagram of a method 2000 for testing a signal path according to an embodiment of the invention. Here, first a test signal is generated 2010 by a test signal generator, wherein the test signal generator comprises a modulator and a phase-locked loop. The phase-locked loop of the test signal generator is configured to provide a test signal and couple it into the signal path, wherein the modulator of the test signal generator is configured to enable a phase modulation of the test signal.

Subsequently, the test signal is coupled 2020 into the signal path, and after passing through the signal path under test, the test signal is received 2030 by a signal processing means. Here, the signal processing means is configured to receive and process the test signal, wherein the signal path under test extends from the phase-locked loop of the test signal generator to the signal processing means.

Subsequently, the test signal received by the signal processing means is evaluated 2040, so as to perform an assessment of the signal path.

Some embodiments according to the invention relate to a method for testing a signal path, wherein a low-pass filter is arranged in the signal path. The low-pass filter comprises a cut-off frequency smaller than the basic frequency of the phase-locked loop of the test signal generator. Thus, only the low-frequency portion of the test signal arrives at the signal processing means. For example, by evaluating the filtered test signal, a non-linearity in the signal path may be detected.

Further embodiments according to the invention relate to a method for testing a signal path, wherein the signal path comprises a mixer and a low-pass filter. The mixer is arranged in the signal path upstream of the low-pass filter in the signal processing direction and is configured to mix the test signal propagating along the signal path with a reference signal and to provide the mixed test signal at an output. The low-pass filter, in turn, comprises a cut-off frequency smaller than the basic frequency of the phase- locked loop of the test signal generator.

The mixer mixes the test signal, which has propagated along the signal path, with the reference signal, wherein the reference signal corresponds to the original test signal provided by the phase-locked loop of the test signal generator. The mixed test signal is subsequently filtered by the low-pass filter and provided to the signal processing means. By evaluating the mixed and filtered test signal, a frequency-dependent asymmetry of the signal path may be detected, for example.

Some embodiments according to the invention relate to a method for testing a signal path, wherein the signal processing means comprises a modulator and a phase-locked loop, wherein the phase-locked loop of the signal processing means is configured to provide a reference signal, and wherein the modulator of the signal processing means is configured to enable a phase modulation of the reference signal .

Furthermore, the signal path comprises an in-phase branch, a quadrature-phase branch, a first in-phase/quadrature-phase mixer, a second in-phase/quadrature-phase mixer, a first low- pass filter and a second low-pass filter. The first in- phase/quadrature-phase mixer here includes an in-phase input, a quadrature-phase input, an input for the test signal and an input for a phase-shifted test signal, and is arranged in the signal path. The second in-phase/quadrature-phase mixer includes an input for the reference signal and an input for a phase-shifted reference signal. The first low-pass filter is arranged in the in-phase branch and comprises a cut-off frequency smaller than the basic frequency of the phase- locked loop of the test signal generator. The second low-pass filter is arranged in the quadrature-phase branch and also comprises a cut-off frequency smaller than the basic frequency of the phase-locked loop of the test signal generator. The first in-phase/quadrature-phase mixer is arranged in the signal path upstream of the second in- phase/quadrature-phase mixer, and the first and the second low-pass filter are arranged downstream of the second in- phase/quadrature-phase mixer in the signal processing direction.

For testing the signal path, signals are applied to the in- phase input and to the quadrature-phase input of the first in-phase/quadrature-phase mixer, the reference signal is applied to the second in-phase/quadrature-phase mixer, and the test signal is coupled into the signal path. Afterwards, the test signal is evaluated after passing through the signal path to perform an assessment of the signal path.

The assessment of the signal path may include, for example, determining non-idealities, non-linearities, frequency- dependent asymmetries, phase differences, phase imbalances, gain differences, gain imbalances, phase mismatches or gain mismatches .

For example, these properties of the signal path may be distinguished and evaluated by a variation of the test signal, the reference signal, the signal at the in-phase input of the first in-phase/quadrature-phase mixer and/or the signal at the quadrature-phase input of the first in- phase/quadrature-phase mixer: By a variation of the phase modulation, or the phase of the test signal and/or the reference signal, for example, a maximum or a minimum of a signal or a static signal may be generated at the output of the first low-pass filter or at the output of the second low-pass filter, whereby the quantity of a property, such as a non-ideality, a non- linearity, a frequency-dependent asymmetry, a phase difference, a phase imbalance, a gain difference, a gain imbalance, a phase mismatch or a gain mismatch of the signal path may be determined.

Here, it may be sufficient, for example, to apply static (time-constant) signals to the in-phase input and to the quadrature-phase input of the first in-phase/quadrature-phase mixer .

Some embodiments according to the invention relate to RFICs comprising a transmitter part and a receiver part. However, the test system described may be integrated in any circuit for testing a signal path.

Some further embodiments according to the invention relate to an RFIC, wherein a receiver part comprises an in-phase branch and a quadrature-phase branch, but also a non-in- phase/quadratur-phase architecture with only one branch is possible for the receiver part.

In some embodiments according to the invention, the test signal generator and the signal processing means are integrated on different devices coupled to each other via the signal path under test. For example, the signal paths may partly also be a radio link or an optical connection. In some further embodiments according to the invention, the signal path is part of a device, wherein the device already comprises a modulated phase-locked loop. Therefore the additional effort for implementing the test system is minimized.

Some embodiments according to the invention relate to test system applicable in a charge sampling receiver, wherein a charge sampling receiver comprises a combined mixer and low pass filter.

In some embodiments according to the invention, the signal processing means comprises a phase-locked loop, wherein the basic frequency of the phase-locked loop of the signal processing means corresponds to the basic frequency of the phase-locked loop of the test signal generator, with a tolerance of ± 5 % .

The basic frequency of a phase-modulated phase-locked loop corresponds to the frequency of the signal output of the phase-locked loop, if there is no phase modulation.

In some embodiments according to the invention, the signal path under test comprises an in-phase branch and a quadrature-phase branch.

In some further embodiments according to the invention, signal waveforms, such as sinus or cosine, are indicated for signals, such as the test signal or the reference signal. However, these are only intended as examples of possible signal waveforms.

In the test systems described, the signal path between the phase-locked loop of the test signal generator and the signal processing means is tested. However, as is indicated in some embodiments, a circuit arranged in the signal path may be tested, too, if, for example, the behavior of the signal path without the circuit under test is known.

In the present application, same numerals are used for objects and functional units having the same or similar functional properties.

In particular, it should be noted that depending on the circumstances, the inventive scheme may also be implemented in software. Implementation may occur on a digital storage medium, in particular a disc or CD with electronically readable control signals which can interact with a programmable computer system such that the corresponding method is performed. Generally, the invention thus also consists in a computer program product with a program code, stored on a machine-readable carrier, for performing the inventive method when the computer program product runs on a computer. In other words, the invention may thus be realized as a computer program having a program code for performing the method, when the computer program product runs on a computer .

Claims

1. Test system (100; 600; 1000; 1300; 1500; 1600) for testing a signal path, comprising:

a test signal generator (110) comprising a modulator (120) and a phase-locked loop (130), wherein the phase-locked loop (130) of the test signal generator

(110) is configured to provide a test signal and couple it into the signal path (102) under test, and wherein the modulator (120) of the test signal generator (110) is coupled to the phase-locked loop (130) of the test signal generator (110) and is configured to enable a phase modulation of the test signal; and

a signal processing means (140) configured to receive and process the test signal, wherein the signal path (102) under test extends from the phase-locked loop

(130) of the test signal generator (110) to the signal processing means (140).

2. Test system according to claim 1 for testing a signal path, wherein the signal processing means (140) is configured to perform an evaluation of the signal path (102) based on the received test signal.

3. Test system according to claim 1 or 2 for testing a signal path, wherein the signal path (102) includes a low-pass filter (630), wherein the low-pass filter (630) comprises a cut-off frequency smaller than a basic frequency of the phase-locked loop (130) of the test signal generator (110).

4. Test system according to one of claims 1 to 3 for testing a signal path, wherein the signal path (102) comprises a mixer (620), wherein the mixer (620) is configured to mix the test signal with a reference signal .

5. Test system according to claim 4 for testing a signal path, wherein the signal path (102) comprises an in- phase branch and a quadrature-phase branch and the mixer is an in-phase/quadrature-phase mixer.

6. Test system according to claim 4 or 5 for testing a signal path, wherein the signal processing means (140) comprises a modulator (1310) and a phase-locked loop

(1320), wherein the phase-locked loop of the signal processing means (140) is configured to provide a reference signal at an input of the mixer, and wherein the modulator (1310) of the signal processing means

(140) is configured to enable a phase modulation of the phase-locked loop (1320) of the signal processing means

(140) .

7. Test system according to claim 5 or 6 for testing a signal path, wherein the signal processing means (140) comprises a combiner (1740), wherein the combiner (1740) is configured to overlay a signal in the in-phase branch with a signal in the quadrature-phase branch and to output the overlay signal.

8. Test system according to one of claims 5 to 7 for testing a signal path, wherein the signal path (102) comprises a second in-phase/quadrature-phase mixer (218) which is arranged in the signal path (102) upstream of the first in-phase/quadrature-phase mixer (630) in the signal processing direction, and which comprises an in- phase input and a quadrature-phase input and is configured to mix the test signal with a signal present at the in-phase input, and being configured to mix the test signal with a signal present at the quadrature- phase input.

9. Test system according to one of claims 1 to 7 for testing a signal path, comprising a further phase- modulated phase-locked loop and a combiner, wherein the further phase-modulated phase-locked loop is configured to provide a further test signal, and wherein the combiner is arranged in the signal path and is configured to overlay the test signal and the further test signal and to output the overlay signal.

10. Test system according to one of claims 1 to 7 for testing a signal path, wherein the signal path comprises an amplifier configured to enable an amplitude modulation of the test signal.

11. RFIC (radio frequency integrated circuit) having a test system according to one of claims 1 to 10.

12. Method (1200) for testing a signal path, comprising:

generating (2010) a test signal by a test signal generator, wherein the test signal generator comprises a modulator and a phase-locked loop, wherein the phase- locked loop of the test signal generator is configured to provide a test signal and couple it into the signal path, and wherein the modulator of the test signal generator is configured to enable a phase modulation of the test signal;

coupling (2020) the test signal into the signal path; receiving (2030) the test signal by a signal processing means, wherein the signal processing means is configured to receive and process the test signal, and wherein the signal path under test extends from the phase-locked loop of the test signal generator to the signal processing means;

evaluating (2040) the test signal received by the signal processing means, so as to perform an assessment of the signal path.

13. Method according to claim 12 for testing a signal path, wherein the test signal is filtered by a low-pass filter arranged in the signal path and an evaluation of the filtered test signal is performed for assessing the signal path.

14. Method according to claim 13 for testing a signal path, wherein a mixer arranged in the signal path upstream of the low-pass filter in the signal processing direction mixes the test signal with a reference signal, wherein the mixed test signal is filtered by the low-pass filter and wherein the mixed and filtered test signal is evaluated by the signal processing means to perform an assessment of the signal path.

15. Method according to claim 12 for testing a signal path, wherein the signal processing means comprises a modulator and a phase-locked loop, wherein the phase- locked loop of the signal processing means is configured to provide a reference signal, and wherein the modulator of the signal processing means is configured to enable a phase modulation of the reference signal, and wherein the signal path under test comprises: an in-phase branch;

a quadrature-phase branch;

a first in-phase/quadrature-phase mixer comprising an in-phase input, a quadrature-phase input, an input for the test signal and an input for a phase- shifted test signal;

a second in-phase/quadrature-phase mixer comprising an input for the reference signal and an input for a phase-shifted reference signal;

a first low-pass filter arranged in the in-phase branch and comprising a cut-off frequency smaller than the basic frequency of the phase-locked loop of the test signal generator; and

a second low-pass filter arranged in the quadrature- phase branch and comprising a cut-off frequency smaller than the basic frequency of the phase-locked loop of the test signal generator, wherein the first in-phase/quadrature-phase mixer is arranged in the signal path upstream of the second in- phase/quadrature-phase mixer and the first low-pass filter and the second low-pass filter are arranged downstream of the second in-phase/quadrature-phase mixer in the signal processing direction;

the method further comprising:

applying a first input signal to the in-phase input of the first in-phase/quadrature-phase mixer; applying a second input signal to the quadrature-phase input of the first in-phase/quadrature-phase mixer; and applying the reference signal to the second in- phase/quadrature-phase mixer.

16. Method according to claim 15 for testing a signal path, wherein the first input signal at the in-phase input and the second input signal at the quadrature-phase input are static signals.

17. Method according to claim 15 or 16 for testing a signal path, wherein a variation of the test signal, the reference signal, the first input signal at the in-phase input of the first in-phase/quadrature-phase mixer, the second input signal at the quadrature-phase input of the first in-phase/quadrature-phase mixer or a combination of variations of these signals is made so as to be able to distinguish and evaluate different properties of the signal path.

18. Method according to one of claims 15 to 17 for testing a signal path, wherein a variation of the phase of the test signal or of the phase of the reference signal generates a maximum or a minimum of a signal or a static signal at the output of the first low-pass filter or at the output of the second low-pass filter to be able to thereby determine the quantity of a property of the signal path.

19. Method according to one of claims 15 to 18 for testing a signal path, wherein repeated performing of the steps of coupling-in the test signal, applying the both input signals, applying the reference signal and evaluating the test signal, after the test signal passed through the signal path, is made with different variations of coupled-in and applied signals to be able to determine a plurality of different properties of the signal path for evaluating the signal path.

20. Computer program with a program code for performing the method according to one of claims 12 to 19, when the computer program runs on a computer or a microcontroller .