DIGITAL SUBCARRIER REGENERATION APPARATUS FOR USE IN VIDEO SIGNAL PROCESSING
This invention relates -to digital video processing using colour subcarrier and, in the most important example, to chrominance demodulation.
One object of the present invention is to provide a circuit which allows synchronous demodulation of a composite video signal using a clock which is phase locked to the line rate of the composite signal. It will be understood that in a broadcast quality video signal, there will be a well-defined (albeit complex) relationship between the line frequency and the colour subcarrier frequency. To demodulate a composite signal synchronously, requires a high degree of subcarrier stability to prevent phase demodulation errors. Typically, a crystal oscillator which has been designed to operate at the subcarrier frequency is used for demodulation, because of its high degree of phase stability. It is a wide requirement for demodulation to be conducted on a video signal which is not necessarily of broadcast quality. A decoder may, for example, be required to handle signals from a video recorder. In such a circumstance, the line frequency may depart from its normal value, with the defined relationship between line frequency and colour subcarrier being lost. An oscillator which is locked to the line standard of the composite signal will track the deviations of the line frequency from its normal rate. In some cases, the deviation may be of the order of several percent, for example, when a video recorder is played in shuttle mode. If this clock is subsequently used to generate a subcarrier frequency for synchronous demodulation, the demodulation phase error may be excessive. In one known arrangement, the composite video signal is supplied to a line-locked clock generator which provides clock pulses locked to a multiple of the instantaneous line frequency. Where the line frequency of the video signal varies, the clock of course follows but an additional output is provided which represents the departure of the instantaneous line frequency from a reference value. A subcarrier synthesizer receives both the line- locked clock and the error signal and is able to generate subcarrier at the true frequency. A further control input is provided to enable the phase of the subcarrier to be controlled in burst locking.
Whilst this approach has some merit, it is only applicable in an environment where there is available an error signal representing the deviations of instantaneous line frequency. In many applications, the problem remains of generating in a digital environment locked to a non- standard line frequency, a digital subcarrier at the precise subcarrier frequency and at a phase sufficiently close to avoid excessive phase errors in the demodulation process. Accordingly, the present invention consists in one aspect in digital subcarrier regeneration apparatus for use in the processing of a video signal having a line frequency not assumed to be standard, comprising a subcarrier synthesizer having a control signal input and capable of providing subcarrier samples at a frequency determined by said control signal at a sample rate locked to said line frequency; comparator means for comparing said subcarrier samples with a reference at a stable frequency and means for applying the result of said comparison as the control signal to said subcarrier synthesizer, thereby to produce digital subcarrier at the appropriate fixed frequency.
In a further aspect, the present invention consists in a method'of generating a digital subcarrier signal for synchronous demodulation of a composite video signal, comprising the steps of providing subcarrier samples at a controllable frequency and at a sample rate locked to the line frequency of said video signal; providing a reference at a stable frequency; comparing the subcarrier samples with said reference and controlling the frequency of said subcarrier samples in dependence upon the results of the said comparison.
The invention will now be described by way of example with reference to the accompanying drawings in which:-
Figure 1 is a diagram of a subcarrier regeneration circuit according to one embodiment of the present invention; Figure 2 is a diagram of a subcarrier regeneration circuit according to a second embodiment of the present invention; and
Figure 3 is a block diagram illustrating a decoder utilising subcarrier regeneration according to the present invention. Referring to Figure 1 , two digital synthesizers (10) and (12) generate the demodulator subcarrier frequency. For example, with a PAL video input, the synthesizers will be programmed to generate 4.43361875 MHz. The reference synthesizer (10) is clocked by a stable crystal source (14) at a nominal frequency which is greater than twice the subcarrier frequency, to satisfy Nyquist criteria. In one example, a reference frequency of 32 MHz is used. The subcarrier frequency which is generated in digital form by the reference synthesizer (10), has the same stability as the reference crystal which is used to clock the reference synthesizer.
Note, in theory any frequency could be synthesized and used for phase comparison. The subcarrier frequency is chosen because it can be used directly for demodulation of the composite waveform and therefore minimises the amount of circuitry required.
The second synthesizer (12) is clocked by an oscillator which is locked to the line rate of input video waveform at input terminal (16). A typical oscillator and phase lock mechanism is used to lock this oscillator to the input composite video. In one example, the oscillator frequency is 27 MHz which is an integral multiple of the input line rate (1728 X line rate for 625 line standards and 1716 X line rate for 525 line standards). Each output of the two synthesizers is converted to an analogue signal by an 8-bit digital to analogue converter (18), which is then low pass filtered in respective filters (20) to remove alias energy at the output. The two analogue signals are then mixed by an analogue mixer (22) to generate a low frequency product which is the instantaneous phase error between the two signals. The phase error signal passes to an amplifier (24) and a low pass filter (26) before being converted to an 8-bit digital signal using an analogue to digital converter (28) with a sample rate which is locked to line frequency. In the present example, the sample frequency is 3.375 MHz which is one eighth of the 27 MHz frequency of the oscillator for the second synthesizer (12).
Accordingly, any change in frequency of the line-locked oscillator which has been caused by deviations in line frequency, will cause an instantaneous phase error to be generated at the output of the analogue to digital converter (28). Effectively, the inherent stability of the free running reference crystal (14) has been used for comparison with the line locked oscillator. A digital processing block (30) converts the instantaneous phase error to a frequency offset value using proportional and integrated contributions from the instantaneous phase sample. In the present example, the phase error is sampled approximately every 300 nsec. The frequency offset value, which is formatted into two 16-bit words, is written to the subcarrier synthesizer (12) once every 600 nsec. Hence, in this example, the update rate is one sixteenth of the frequency of the line-locked oscillator which is approximately 1.7 MHz.
To complete the process of generating a subcarrier at the correct frequency and phase for accurate demodulation, a burst phase error signal, which is generated when the subcarrier frequency is mixed with the composite waveform during the period of the burst, is used to control the phase of the synthesized subcarrier.
The burst phase error which has been converted to a frequency offset error by taking proportional and integrated contributions from each phase error measurement, is sent to the reference synthesizer once per line. The reference synthesizer then produces a subcarrier frequency which is phase- locked to the subcarrier frequency from the input composite signal.
The mechanism of phase tracking between the reference and subcarrier synthesizers which has been described above, then adjusts the subcarrier synthesizer so that it also is phase-locked to the input. An output can be taken from the subcarrier synthesizer as shown at an output terminal (32). ln summary, the circuit described above will compare a stable crystal frequency with that generated by an oscillator which is locked to the line rate of a composite input signal. The error signal is then used to adjust the synthesised subcarrier frequency to maintain a constant subcarrier frequency which is independent of line rate deviations.
The secondary step of ensuring phase locking between regenerated subcarrier and incoming chrominance need not necessarily be conducted by controlling the phase of the reference; a separate phase shifter could as an alternative be added at the subcarrier output of the described apparatus. Also, the phase locking could be combined in the phase and frequency correction steps previously described.
A further embodiment of the present invention will now be described with reference to Figure 2. This embodiment employs digital rather than analogue techniques for comparing two signals and is therefore better suited to integrated circuit implementation.
A digital subcarrier generator (50) receives at input (52) a clock locked to the line syncs of the input video and generates a sequence of subcarrier samples. These subcarrier samples are compared in phase discriminator (54) with samples from a stable, crystal locked subcarrier frequency oscillator (56). These samples are provided through analogue to digital converter (58), again clocked by the line-locked clock derived from the input video. The phase discriminator (54) includes a loop filter and provides an error signal to the digital subcarrier generator (50) to enable it to provide at output terminal (60) digital subcarrier samples at the subcarrier frequency set by the stable oscillator (56), at the required sample rate locked to line frequency. More specifically, a phase accumulator in subcarrier generator (50) is incremented once per sample clock with the size of the increment is modified by the error signal from the phase discriminator (54). The output of the phase accumulator is used to address a look-up table which provides the subcarrier samples.
It will be observed that the characteristics of the feedback loop through phase discriminator (54) can be chosen to provide a resilience to quantisation or other errors in the ADC (68) whilst preserving sufficient bandwidth to track instabilities in the line-locked clock.
The stable, subcarrier frequency oscillator (56) is provided at input terminal (62) with a chrominance signal from the input video signal to enable the subcarrier to be burst locked to the input video.
The error signal from the phase discriminator (54) can be made available on a line (64) for subsequent use in the video processing. Thus, for example, where demodulation is conducted at an early stage in the decoding of a composite signal, what is demodulated will include not only chrominance but also high frequency luminance. After separation in a comb filter with line and perhaps field delays, the "demodulated" high frequency luminance will require to be "modulated" before combination with low frequency luminance. In the case where the signal has been delayed in the comb by one or more fields, there may be a significant difference between subcarrier as it is currently being regenerated and the regenerated subcarrier that was used to "demodulate" the high frequency luminance. By keeping track of the error signal on line (64) the "re-modulation" of high frequency luminance can be conducted using the historically correct subcarrier. This approach can be described in more detail with reference to
Figure 3, which is a block diagram illustrating a decoder which makes use of subcarrier regeneration according to the present invention.
A composite video signal at input terminal (100) is taken to high and low pass filters (102, 104) respectively. The output of the high pass filter (102), being chrominance and high frequency luminance, is taken to a demodulator (106). This receives subcarrier from a subcarrier regeneration unit (108) which is in accordance with, for example, Figure 2. Thus, the subcarrier regenerator (108) receives as inputs a line-locked clock and a colour burst signal and produces as outputs, the subcarrier and an error signal.
The outputs of the demodulator (106) (broadly U and V but including in both cases high frequency luminance) are taken to a Y, UV separator (110) which outputs U, V and "demodulated" Y. This latter signal is passed to a modulator (112) receiving subcarrier from a further subcarrier regenerator (114) in accordance with the present invention. This subcarrier regenerator is broadly in accordance with the Figure 2 embodiment but has a further input terminal receiving the error signal from subcarrier regenerator
(108), through a matching delay (116). This delayed error signal is used in subcarrier regenerator (114) to ensure that the subcarrier supplied to modulator (112) corresponds with that used at the relevant time for demodulation. If appropriate, colour burst information can be included in the error signal to remove the need for a colour burst input in the second subcarrier regenerator.
The output from modulator (112) is combined in adder (118) with the output of low pass filter (104) through a further matching delay (120).
It was noted above, in relation to the first embodiment, that operating at the subcarrier frequency offers economy of processing but is not an essential requirement. In a specific example of a multi-standard decoder, a common frequency can be chosen for the stable reference which is used, as appropriate, to derive the PAL or NTSC subcarrier frequency.
Whilst the specific description given above has concentrated on chrominance demodulation, there are other applications in which it is necessary to regenerate subcarrier. Examples are colour correction, special effects and the correction of phase errors.