USRE49157E1 - Power converter with demand pulse isolation - Google Patents

Abstract

The present invention provides a switched-mode power converter with regulation demand pulses sent across a galvanic isolation barrier.

Description

CROSS-REFERENCE TO RELATED APPLICATIONS

This applicationNotice: The following multiple reissue applications have been filed for the reissue of U.S. Pat. No. 9,071,152: (1) reissue application Ser. No. 15/090,929, filed on Apr. 5, 2016 and reissued as U.S. Reissue Pat. No. RE47,031; (2) reissue application Ser. No. 15/168,998, filed on May 31, 2016 and reissued as U.S. Reissue Pat. No. RE47,713, which is a reissue continuation of Ser. No. 15/090,929; (3) reissue application Ser. No. 15/202,746, filed on Jul. 6, 2016 and reissued as U.S. Reissue Pat. No. RE47,714, which is a reissue continuation of Ser. No. 15/090,929; (4) reissue application Ser. No. 16/547,850, filed on Aug. 22, 2019, which is a reissue continuation of Ser. No. 15/202,746; (5) the present reissue application, which is a reissue continuation of Ser. No. 15/202,746; and (6) reissue application Ser. No. 16/987,654, filed on Aug. 7, 2020, which is a reissue continuation of Ser. No. 16/547,850. U.S. Pat. No. 9,071,152 claims the benefit of the filing dates of U.S. provisional application Nos. 61/667,473, filed on Jul. 03, 2012, and 61/727,795, filed on Nov. 19, 2012, the teachings of both of which are incorporated herein by reference in their entirety.

BACKGROUND

1. Field of the Invention

The present invention relates to electronics and, more specifically but not exclusively, to switched-mode power converters.

2. Description of the Related Art

This section introduces aspects that may help facilitate a better understanding of the invention. Accordingly, the statements of this section are to be read in this light and are not to be understood as admissions about what is prior art or what is not prior art.

Switched-mode DC-DC power converters, often powered by rectified DC from AC mains, are ubiquitous as plug-in adapters used to power a plethora of electronic devices.

A typical such converter is copiously documented in the Power Integrations Design example report DER-227. Such converters are also taught in U.S. Pat. No. 4,459,651 and U.S. Patent Application Publication Nos. 2011/0026277 A1 and 2011/0018590 A1. Such converters typically generate commutation pulses on the mains side of galvanic isolation circuitry.

Some known converters use forms of absorption modulation to convey feedback information through the power transformer. In U.S. Pat. No. 8,000,115, a temporary decrease in the loading of a transformer secondary winding during a flyback pulse generates a corresponding voltage disruption of the same pulse, which disruption is detected on another transformer winding to effect primary-winding-side converter control. In U.S. Pat. No. 5,973,945, a similar method is taught, but instead of unloading a flyback pulse, temporary loading of a forward power pulse is taught. The circuitry for extracting the resulting information-bearing current disruption in the transformer primary circuit is quite involved. A similar absorption modulator is taught in U.S. Pat. No. 4,996,638.

Converters are also known wherein an analog voltage reflection of the converter output voltage seen on a primary-side winding is processed to generate a primary-side analog feedback signal which is used to control the commutating signals applied to the commutating switch to regulate converter output on its secondary side. Such feedback methods are taught in U.S. Pat. Nos. 4,597,036 and 3,889,173. Such methods are becoming less common due to the difficulty of reliably processing the analog information reflected into a primary-side winding to obtain an accurate feedback signal.

U.S. Pat. No. 4,937,727 teaches a mains-side pulse generator that is pulse-width controlled by a voltage-responsive clamp on the output side of a galvanic isolation barrier.

BRIEF DESCRIPTION OF THE DRAWINGS

Other embodiments of the invention will become more fully apparent from the following detailed description, the appended claims, and the accompanying drawings in which like reference numerals identify similar or identical elements.

FIG. 1 shows a schematic diagram of a power converter according to an embodiment of the present invention using a blocking oscillator.

FIG. 2 shows a schematic diagram of a power converter according to another embodiment of the present invention using a blocking oscillator.

FIG. 3 shows a schematic diagram of a power converter according to an embodiment of the present invention using a simple transformer.

FIG. 4 shows a schematic diagram of a power converter according to an embodiment of the present invention using a separate pulse transformer.

DETAILED DESCRIPTION

FIG. 1 shows a schematic diagram of a power converter10a. ADC voltage source5a, external to this converter, which may be derived from AC mains, may be connected to anearth ground6a.Terminals11a and12a constitute a power input port that placessource5a in circuit with a primary winding101a of a transformer100a and with a commutating switch200a, which is usually a MOSFET but may be a BJT or any other suitable electronic switch. For the diagrammed embodiment, switch200a is a MOSFET having a source S, a gate G, and a drain D. Transformer100a also comprises a regeneration winding102a which is referenced to source S of MOSFET200a, is connected through a capacitor202a to gate G of MOSFET200a, and is poled to provide regenerative feedback to gate G of MOSFET200a. Connected betweenterminal11a and gate G of MOSFET200a is aresistor201a which charges capacitor202a to enhance MOSFET200a at a slow pulse rate. Thus, MOSFET200a, transformer100a, capacitor202a, andresistor201a form an input-side blocking oscillator which acts as a driver circuit toggling ON and OFF MOSFET200a.

Transformer100a also comprises a secondary winding104a which may be connected to a floatingcommon terminal14a. A diode300a and acapacitor301a form a rectifier circuit to rectify and filter voltage pulses from winding104a to supply power through a power outputport comprising terminals13a and14a to an external load represented byresistor7a connected in circuit therewith, one end of which may be referred to a floating common8a. Thepower input port11a/12a and thepower output port13a/14a may be galvanically isolated from each other.

Flyback pulses of transformer100a occur when MOSFET200a ceases conduction, i.e., turns OFF. Winding104a is poled to cause diode300a to rectify only these flyback pulses.

Forward pulses, of opposite polarity to the flyback pulses, occur while MOSFET200a is ON. Another diode500a, poled to rectify forward pulses, and anothercapacitor501a form an auxiliary rectifier circuit to rectify and filter forward pulses from winding104a, and to store energy for triggering the input-side blocking oscillator formed by MOSFET200a, transformer100a, capacitor202a, andresistor201a.Resistor201a is made sufficiently large to set a low free-running frequency of the blocking oscillator, perhaps 1 KHz or less, to minimize power consumption. Nevertheless, the miniscule power thus provided suffices to chargecapacitor501a to a voltage related, through the turns ratio of transformer100a, to the voltage at the power input port, even with the power output port short-circuited.

This magnetically-coupled blocking oscillator may be triggered through any transformer winding magnetically coupled thereto. Therefore, just as MOSFET200a may be turned ON through winding102a, it may as easily be triggered through winding104a. To trigger thusly, diode500a is briefly short-circuited by a switch502a which is driven by a demand pulse generator503a to source a pulse of energy fromcapacitor501a into transformer100a. When this is done, the voltage at the cathode of diode500a falls rapidly to the voltage on its anode, also being the voltage acrosscapacitor501a. Since winding104a is coupled to winding101a, the voltage on drain D of MOSFET200a also rapidly falls from near the voltage on terminal11a to near the voltage on terminal12a. Since winding102a is also magnetically coupled, the voltage at its node shared with capacitor202a abruptly rises, turning ON MOSFET200a. This triggering action occurs in a few tens of nanoseconds. Until regeneration is established in MOSFET200a through winding102a, triggering energy is supplied bycapacitor501a of the auxiliary rectifier circuit. However, once regeneration is established in MOSFET200a,capacitor501a is charged for the duration of the ON time of MOSFET200a, fully replacing any energy lost during triggering. The demand pulse generator503a may be used to adjust the commutation frequency of the converter10a to cause its output to attain a desired value, as will be described below.

It is important to understand certain important advantages of this embodiment. Firstly, this embodiment allows minimal, simple, and robust circuitry to be galvanically associated with the power input port where high voltages and mains transients may be expected. According to this embodiment, more complex and vulnerable regulation circuitry may be galvanically associated with the power output port where voltages are often lower and protection is more easily implemented. Secondly, the control of a flyback converter that may cross from the discontinuous conduction mode (DCM), through the critical conduction mode, to the continuous conduction mode (CCM), is well known to be problematic. This embodiment simply avoids that problem. In the embodiment shown inFIG. 1, transformer100a is used during the conduction of MOSFET200a as a forward converter supplying the auxiliary rectifier circuit, and during the flyback of transformer100a as a flyback converter supplying power to the power output port. During these cycle portions, it is difficult and impractical to re-trigger the blocking oscillator through transformer100a to generate another energy-bearing cycle. Once the flyback pulse has reset the inductance of transformer100a, i.e., has depleted energy from its magnetic field, transformer100a is free, until the next ON time of MOSFET200a, to be used as a magnetically coupled isolator to convey trigger information between its windings. InFIG. 1, the information thus conveyed is a pulse from pulse generator503a which, responsive to the output of comparator401a, indicates the need for another energy-bearing cycle, and moreover re-triggers the blocking oscillator to provide that energy-bearing cycle. Since it is difficult or impractical to re-trigger until transformer100a energy has been depleted, this converter will, if driven as hard as possible, approach critical conduction, but refuse to enter the critical conduction mode.

This converter may be fitted with areference voltage400a and a comparison circuit401a. When the voltage at terminal13a falls below the comparison voltage, comparison circuit401a causes pulse generator circuit503a to pulse, turning ON switch502a, triggering an energy-bearing ON cycle of the blocking oscillator, and chargingcapacitor301a. Asload7a drainscapacitor301a, terminal13a voltage repeatedly falls to the voltage ofreference400a, causing comparison circuit401a to initiate energy-bearing ON cycles. An interesting property of this embodiment is that the bottom of its output ripple corresponds to the voltage ofreference400a, and the amplitude of its ripple decreases with increased current inload7a.

FIG. 2 shows a schematic diagram of apower converter10b. As in converter10a ofFIG. 1 above,converter10b is powered, throughterminals11b and12b, from anexternal source5b, that may be referred to earth ground6b. Power fromconverter10b flows throughterminals13b and14b through aload7b, which may be referred to a floating common8b. AMOSFET200b, preferably ON Semiconductor type NDD02N60, forms an input-side blocking oscillator with a (preferably 1 nF)capacitor202b, a (preferably 66 megohm)resistor201b, and a transformer100b. Transformer100b comprises a winding101b, preferably about 250 uH, andwindings102b and104b, preferably about 3.09 uH each, and a winding103b, preferably about 193 nH, which may be a single turn. Acapacitor212b provides a short local circuit for high frequency currents and preferably comprises a 4.7 uF capacitor and a 100 nF capacitor (neither explicitly shown) in parallel. Aresistor210b, preferably about 180 ohms, and acapacitor211b, preferably about 10 pF, filter out capacitive spikes generated by fast transitions ofMOSFET200b. WhenMOSFET200b is turned on, the current therein rises, but is limited by atransistor208b, the base of which is driven by a voltage across aresistor209b, which voltage is responsive to current throughMOSFET200b. WhenMOSFET200b current reaches about 250 mA,transistor208b shunts current at gate G ofMOSFET200b to ground, limiting gate G voltage to prevent further current rise. With current rise prevented, the voltages across the windings of transformer100b collapse. Thus, a regenerative turn-OFF ofMOSFET200b begins, and the voltage at its drain D flies positive past the voltage onterminal11b until the energy in its magnetic field finds a current path through one of its windings. A corresponding negative voltage occurs at the shared node of winding102b and acapacitor204b, preferably about 100 pF, which immediately couples through a resistor207b, preferably about 47 ohms, vigorously turning offMOSFET200b. Within a few nanoseconds, the same transition couples through aresistor203b, preferably about 1K, and acapacitor202b, preferably about 1 nF, to join the signal passing throughcapacitor204b, to reinforce the OFF transition at gate G ofMOSFET200b. Both the OFF and ON transitions at gate G ofMOSFET200b are regenerative and follow the path just described. To prevent damage toMOSFET200b, its gate voltage should be limited.Resistor203b and adiode205b, preferably an 8.2 volt zener, form an L-network to limit that voltage. Since the voltage at the cathode ofdiode205b is capacitively coupled to resistor207b, andresistor201b is pulling up on resistor207b, the gate G voltage ofMOSFET200b would be free to rise, turnON MOSFET200b continually, and perhaps damage its gate, if means for limiting gate voltage were not provided. Anotherzener diode206b, preferably the zenered base-emitter junction of an NXP type PMBT 3904, is used to limit the gate voltage rise. This device is used because, at high temperature, excess leakage ofdiode205b would shunt to ground the current ofresistor201b, preventing the blocking oscillator from starting. Most of the current from winding102b, being too great fordiode206b to conduct without damage, flows indiode205b.

As inFIG. 1, when the voltage at the node of winding104b and adiode300b, preferably type 1N4148, flies back, the energy in transformer100b is dumped into acapacitor301b, preferably 4.7 uF, ultimately to be consumed byload7b. As inFIG. 1, adiode500b, preferably type 1N4148, and acapacitor501b, preferably 220 nF, form a forward converter to supply an auxiliary voltage.

Please note that, in this embodiment, the poling of winding104b,diode300b, anddiode500b are reversed, and the output polarity is reversed, with respect toFIG. 1. This reversal illustrates that this embodiment will function with either poling, and that polarity is of little practical concern in an isolated supply. The rectifiers and windings are so poled that the auxiliary supply forms a forward converter, and the output forms a flyback converter with the remaining circuitry. Aswitch502b is, in this embodiment, a PNP transistor, preferably type MMBT 3906. This switch also coacts with another winding103b of transformer100b, which may be a single turn, and acapacitor504b, to form an output-side triggering blockingoscillator503b corresponding to pulse generator503a ofFIG. 1, which triggering blocking oscillator is magnetically coupled through transformer100b to the above-described input-side, power-blockingoscillator comprising MOSFET200b. Thus, an input-side, master blockingoscillator comprising MOSFET200b and an output-side, slave blockingoscillator comprising switch502b are magnetically coupled to each other through transformer100b. The auxiliary voltage ofcapacitor501b flows through aresistor406b, preferably 27K, to feed anotherzener diode400b, preferably another zenered PMBT3904, corresponding toreference400a ofFIG. 1. A capacitor407b, preferably 100 nF, bypassesdiode400b at high frequencies. A dual transistor402b, preferably NXP type BS846, is connected as a current mirror, and mirrors the current in aresistor404b, the latter current being set by the reference voltage ofdiode400b. This current sets the free running oscillation frequency of blocking oscillator/pulse generator503b. Since the transformer100b current flowing inMOSFET200b is set bytransistor208b, the per-cycle energy in transformer100b is quantized. Setting the current inresistor404b, preferably 100K, therefore sets a maximum frequency of blocking oscillator/demand-pulse generator503b, thereby setting the maximum frequency for these energy-quantized cycles, thus limiting maximum converter power, even in the event of an output short-circuit. Adiode403b, preferably type 1N4148, compensates the base-emitter voltage of dual-transistor402b. Dual transistor402b,resistor404b,diode403b, and aresistor405b form a current comparator corresponding to comparator401a ofFIG. 1.Resistor405b, preferably about 82K for a 5V output, provides feedback by robbingresistor404b current from the current mirror of dual-transistor402b as output voltage increases, thus setting operating frequency roughly in proportion to the demand ofload7b.

FIG. 3 shows a schematic diagram of apower converter10c arranged to use a simple, two-winding transformer. The function ofconverter10c closely parallels that ofconverters10a and10b ofFIGS. 1 and 2, save that components have been added to replace the functions of regenerative (tickler) windings needed by blocking oscillators. As in the previous figures, asource5c may be referenced to anearth ground6c, and load7c may be referenced to a floating common8c. As inFIG. 1, atransformer100c primary winding101c is in circuit with a switch200c andterminals11c and12c. As inFIG. 1, flyback pulses on a secondary winding104c oftransformer100c charge acapacitor301c through adiode300c to supply energy to the load7c throughterminals13c and14c. As inFIG. 1, forward pulses on the secondary winding oftransformer100c charge acapacitor501c through adiode500c. As inFIG. 1, acomparison circuit401c compares the voltage on theoutput terminal13c with a reference400c. As inFIG. 1, aswitch502c is driven by a demand pulse generator503c.

We now depart from theFIGS. 1 and 2 function. A fast oscillator505c, preferably about 100 KHz, drives an AND gate506c which is also driven bycomparison circuit401c. If the voltage betweenterminals13c and14c is smaller than that of reference400c, gate506c passes oscillator505c pulses to trigger pulse generator503c, which initiates, throughtransformer100c additional energy-bearing pulses by eventually driving switch200c, as described below. If, however, the output voltage is adequate, then gate506c does not pass oscillator505c pulses.

The pulses of energy fromcapacitor501c sourced totransformer100c, though aswitch502c, during the pulse of generator503c, under the command of gate506c, appear as voltage pulses across the primary winding oftransformer100c. These pulses are detected and processed to logic levels by ademand pulse detector215c and passed through an OR gate214c to a pulse generator that turns ON switch200c to energizetransformer100c to begin an energy-bearing cycle. When switch200c turns OFF, the subsequent flybackpulse charges capacitor301c throughdiode300c, as previously described. Sincecapacitor501c is charged from the converter forward pulse, its voltage persists even in the presence of a short-circuit load, allowing the converter to recover once the short-circuit is removed.

Had no energy-bearing cycle ever occurred, there might be insufficient, or no, charge incapacitor501c to be used to initiate energy-bearing cycles as described above. Therefore, aslow pulse oscillator213c, preferably about 1 KHz, is also connected to gate214c, through which it initiates energy-bearing cycles by triggering apulse generator216c, thus turning on switch200c. These infrequent pulses cause energy-bearing cycles that are sufficient to chargecapacitor501c, which also may supply power to generator503c, gate506c, oscillator505c, reference400c, andcomparison circuit401c. Of course,slow oscillator213c must somehow be powered along with gate214c andpulse generator216c. A bias supply (not shown but well known in the art) powered fromterminals11c and12c, may be used to power these components of the circuit.

FIG. 4 shows a schematic diagram of apower converter10d, comprising aseparate transformer110d to transmit demand pulses across a galvanic isolation barrier. As inFIG. 1 above,converter10d is powered, throughterminals11d and12d, from anexternal source5d, and power output fromconverter10d flows throughterminals13d and14d.

Input voltage fromterminals11d and12d powers aslow oscillator213d, preferably of less than 1 KHz frequency, and a start-upregulator232d which, through a supply node +5d, initially powers, with a voltage preferably about 4V, logic and drive circuitry described below. Each label “+5d” inFIG. 4 refers to a supply node that is initially about 4 volts when the input-side logic is starting to function and about 5 volts when in regulation. Acapacitor221d and aresistor222d differentiate transitions of aslow pulse oscillator213d to provide pulses of about 200 nS duration. These pulses pass though aNAND gate223d to clock a D-type flip-flop220d through a node CKa.

Responsive to its clock pulse, flip-flop220d turns ON aswitch200d, preferably a MOSFET, ON Semiconductor type NDD02N60, which is in circuit with a primary winding101d of a transformer100d, with asense resistor209d, and withterminals11d and12d. Current then flows in this circuit, and the voltage ofsource5d is impressed upon primary winding101d. According to the turns-ratio between primary winding101d and a secondary winding104d of transformer100d, a voltage appears across winding104d. This latter voltage charges acapacitor416d through adiode417d.

As current inresistor209d rises, a voltage is applied to an input of acomparator217d, which voltage is compared with areference216d, also connected to an input ofcomparator217d. When current inresistor209d exceeds a value set byreference216d,comparator217d issues a reset signal which propagates throughNAND gates218d and219d to a node /Ra where the reset signal resets flip-flop220d, turning OFFswitch200d.

Whenswitch200d is turned ON, unavoidable gate-to-source capacitance ofMOSFET switch200d causes a current spike inresistor209d. To preventcomparator217d from prematurely resetting flip-flop220d responsive to this spike, the rise of node Qa charges a capacitor231d through aresistor230d to reach the threshold of agate219d in about 75 nS, prior to which the low voltage of capacitor231d inhibitsgate219d from resetting flip-flop220d.

Prior to its rise, node Qa has been low, and a complementary node/Qa has been high. When node Qa rises, node/Qa falls, discharging acapacitor229d through aresistor228d to the threshold ofNAND gate218d in about 2 uS, and thoughNAND gate219d resetting flip-flop220d, thus limiting the maximum ON time ofswitch200d, shouldcomparator217d fail to reset flip-flop220d.

In addition to limiting ON times ofswitch200d, it is desirable to limit maximum frequency of these ON times. To this end, the voltage across acapacitor226d is charged to a logic high through aresistor225d and applied to a node Da, the D-input of flip-flop220d. When node/Qa falls,capacitor226d is discharged through adiode227d, slowly to be recharged throughresistor225d. Until thecapacitor226d voltage is recharged to the D-input threshold voltage, flip-flop220d is inhibited from turningON switch200d.

Whenswitch200d is turned OFF, the energy in the magnetic field of transformer100d generates flyback voltage across its windings. Flyback voltage of winding104d is rectified by adiode300d and begins to charge afilter capacitor301d to begin to supply output voltage toterminals13d and14d. This flyback voltage also raises the voltage oncapacitor416d, causingdiode417d to turn OFF and adiode418d to turn ON, charging acapacitor419d. Voltage acrosscapacitor419d supplies anauxiliary regulator420d, which in turn powers afast oscillator505d, preferably of about 60 KHz frequency.Regulator420d also powers logic and drive circuitry on the winding104d side of the power converter.

The ON pulses ofswitch200d responsive tooscillator213d are sufficiently frequent to start the converter of this embodiment, but insufficiently frequent to drive it to full output. To initiate more frequent pulses, anoscillator505d drives acapacitor507d and aresistor508d to supply differentiated pulses of about 100 nS width to aNAND gate509d, which in turn drives a primary winding111d ofdemand pulse transformer110d, thus producing demand pulses across a secondary winding112d thereof. These winding112d pulses are conveyed through aNAND gate223d to clock flip-flop220d at up to the frequency ofoscillator505d.

If all of the pulses ofoscillator505d were allowed to clock flip-flop220d, under some conditions, the converter of this embodiment would produce excess output. To regulate this output, a flip-flop412d is used to gate the pulses passed byNAND gate509d. At a node CKc,oscillator505d clocks a flip-flop412d, which generates a logic high at a node Qc only when a logic high is present at a node Dc at the rising edge of its clock. Thus,pulses driving transformer110d are permitted responsive to a logic high only at node Dc.

It would be wasteful of power to drive winding111d for the full duration of the differentiated pulse atresistor508d. Therefore, whenswitch200d turns ON causing a negative transition at the dotted end of winding101d, a corresponding negative transition appears at the dotted end of winding104d. This transition is coupled through asmall capacitor414d, preferably about 10 pF, through a current-limitingresistor415d to a node/Rc, the reset input of flip-flop412d, which is normally held high by aresistor413d. Thus, once the turning ON ofswitch200d has propagated through transformer100d, flip-flop412d is reset, usually in less than 20 nS.

Node Dc is usually held at a logic high by aresistor411d, thus enabling pulses gated by flip-flop412d. However, betweenterminals13d and14d is disposed a voltagedivider comprising resistors408d and409d, the voltage at the junction of which is applied to an input of acomparator401d. Should the voltage at that junction exceed the voltage of areference400d, also applied to acomparator401d input, an output ofcomparator401d will drop to a logic low, drawing current through adiode410d, thus presenting a logic low at node Dc and, after clocking, responsively at node Qc, inhibiting pulses throughgate509d that would otherwise turnON switch200d. Thus, the voltage betweenterminals13d and14d is regulated responsive to the voltage ofreference400d.

Since the voltage betweenterminals11d and12d may be high, perhaps 375V, and the desired regulated voltage at node +5d is typically 5V, it might be inefficient to obtain the power to supply the logic and drive circuitry associated with winding101d fromregulator232d. Therefore, transformer100d is fitted with an auxiliary winding102d, which is connected in circuit with aninductor235d, adiode241d, and a switch233d, preferably a MOSFET. Whileswitch200d is ON, current flows in this circuit. Whenswitch200d turns OFF,diode241d also turns OFF and energy ininductor235d generates a positive flyback voltage, causing current through adiode236d to charge a filter capacitor237d, raising the voltage of node +5d. As node +5d approaches 5V,regulator232d ceases to supply energy to node +5d, but continues to power avoltage reference242d, which drives an input of acomparator240d. Should the voltage of node +5d exceed 5V, the voltage at the junction ofresistors238d and239d, connected to another input ofcomparator240d, will exceed that ofreference242d, causing the output ofcomparator240d at node Db to drop to a logic low.

A flip-flop234d drives node Qb to turn ON switch233d responsive to clock pulses on node Qa, and to a logic high being present at node Db. When node Db drops to a logic low, node Qb follows it upon the next clock, and switch233d turns OFF. In this state,inductor235d no longer receives energy and no longer charges capacitor237d throughdiode236d. Thus, node +5d is regulated to approximately 5V, and the energy supplying node +5d is provided efficiently through transformer100d.

In one embodiment, the invention is a switched-mode power-converter comprising a power input port, a transformer comprising windings, a commutating switch connected in circuit with the input port and a winding of the transformer, a driver circuit for toggling the commutating switch, a power output port, a rectifier circuit for supplying power to the power output port, a reference voltage or current source, a comparison circuit for comparing the voltage or current at the power output port with the reference voltage or current, and a demand pulse source circuit coupled to the transformer for transmitting galvanically isolated trigger information through the transformer to the driver circuit responsive to the comparison circuit.

The converter may comprise as its driver circuit a blocking oscillator comprising the converter transformer. The converter may further comprise an input-side, master blocking oscillator for power conversion and an output-side, slave blocking oscillator for generating demand pulses. Both blocking oscillators may be mutually coupled through the converter power transformer or may drive separate transformers.

The converter may comprise inductive, capacitive, opto-coupled, or piezoelectric galvanic isolation circuitry to transmit demand pulses across the galvanic isolation barrier.

The converter may have one or more output rectifier circuits poled to rectify flyback pulses of its transformer.

The converter may comprise one or more auxiliary rectifier circuits which may be poled as forward converters.

The converter may be powered by a rectifier circuit to provide an AC/DC converter.

It should be understood that replicas of pulses generated and applied to one winding of the power transformer appear, suitably modified by turns-ratio, across all other windings of the power transformer.

Though blocking oscillators usually require tickler windings, single output embodiments of this invention may comprise a power transformer with as few as two, and in excess of five windings, with multiple output embodiments possibly comprising yet more windings.

Startup pulse generation circuitry resides on the powered side of the isolation barrier, though its pulses appear on both sides of the isolation barrier. This circuitry may comprise a blocking oscillator, another form of oscillator with drive circuitry to turn ON the commutating switch, or this circuitry may comprise an external source of pulses.

Demand pulse generator circuitry resides with the output port to be regulated, though its pulses appear on both sides of the isolation barrier. This circuitry may comprise a slave blocking oscillator, another form of oscillator with drive circuitry to turn ON the demand pulse generator switch, or may be externally applied.

Demand pulses may be generated to regulate the power converter to provide either a desired output voltage or a desired output current responsive to the voltage across or a current through an output port.

Between the commencement of start-up and the attainment of regulation, a pulse generator sources pulses to turn ON the commutating switch. This pulse generator may be the same generator that sources regulation pulses, or may be a separate pulse generator.

Each internal pulse generator is powered. The startup pulse generator is powered from the input port. The demand pulse generator is only indirectly powered from the input port by DC-DC power conversion through the power transformer and one or more rectifiers and filters powering the power output port with which the generator is associated.

Power for pulse generation circuitry may be rectified from either forward pulses, from flyback pulses, or both, appearing across one or more power transformer windings. Rectification of forward pulses helps to assure startup.

Windings, switches, and diodes may be poled to provide either polarity of input, and either polarity of output.

In each of the embodiments ofFIGS. 1-4, galvanic isolation circuitry transfers (i) power from the input-port side to the output-port side of the power converter and (ii) demand pulses from the output-port side to the input-port side. In particular, inFIG. 1, the galvanic isolation circuitry consists of transformer100a, which transfers (i) power from winding101a to winding104a and (ii) demand pulses from winding104a to winding102a. InFIG. 2, the galvanic isolation circuitry consists of transformer100b, which transfers (i) power from winding101b to winding104b and (ii) demand pulses from winding104b to winding102b. InFIG. 3, the galvanic isolation circuitry consists oftransformer100c, which transfers (i) power from winding101c to winding104c and (ii) demand pulses from winding104c to winding101c. InFIG. 4, the galvanic isolation circuitry consists of (i) transformer100d, which transfers power from winding101d to winding104d and (ii)transformer110d, which transfers demand pulses from winding111d to winding112d. Winding102d generates the bias supply for powering the +5d node.

In each of the embodiments ofFIGS. 1-4, a demand pulse generator on the output-port side of the converter generates the demand pulses that are conveyed to the input-port side of the converter via the galvanic isolation circuitry. InFIGS. 1, 2, and 3, the demand pulse generator compriseselements503a,503b, and503c, respectively. InFIG. 4, the demand pulse generator comprisesNAND Gate509d and flip-flop412d.

In each of the embodiments ofFIGS. 1-4, slow-pulse source circuitry generates pulses on the input side of the power converter. InFIGS. 1 and 2, the slow-pulse source circuitry is the corresponding input-side blocking oscillator. InFIGS. 3 and 4, the slow-pulse source circuitry isslow oscillator213c andslow oscillator213d, respectively. Note that, depending on the particular implementation, the slow-pulse source circuitry may be implemented internal to or external to the switched-mode power converter. Similarly, depending on the particular implementation, fast oscillator505c andfast oscillator505d ofFIGS. 3 and 4, respectively, may be implemented internal to or external to the switched-mode power converter.

Embodiments of the invention may be implemented as (analog, digital, or a hybrid of both analog and digital) circuit-based processes, including possible implementation as one or more integrated circuits (such as an ASIC or an FPGA), a multichip module, a single card, or a multicard circuit pack.

Also for purposes of this description, the terms “couple,” “coupling,” “coupled,” “connect,” “connecting,” or “connected” refer to any manner known in the art or later developed in which energy or signals are allowed to be transferred between two or more elements, and the interposition of one or more additional elements is contemplated, although not required. Conversely, the terms “directly coupled,” “directly connected,” etc., imply the absence of such additional elements.

Also, for purposes of this disclosure, it is understood that all gates are powered from a fixed voltage power domain (or domains) and ground unless shown otherwise. Accordingly, all digital signals generally have voltages that range from approximately ground potential to that of one of the power domains and transition (slew) quickly. However and unless stated otherwise, ground may be considered a power source having a voltage of approximately zero volts, and a power source having any desired voltage may be substituted for ground. Therefore, all gates may be powered by at least two power sources, with the attendant digital signals therefrom having voltages that range between the approximate voltages of the power sources.

Signals and corresponding nodes or ports may be referred to by the same name and are interchangeable for purposes here.

Transistors are typically shown as single devices for illustrative purposes. However, it is understood by those with skill in the art that transistors will have various sizes (e.g., gate width and length) and characteristics (e.g., threshold voltage, gain, etc.) and may consist of multiple transistors coupled in parallel to get desired electrical characteristics from the combination. Further, the illustrated transistors may be composite transistors.

The terms “source,” “drain,” and “gate” should be understood to refer either to the source, drain, and gate of a MOSFET or to the emitter, collector, and base of a bipolar device when an embodiment of the invention is implemented using bi-polar transistor technology. p Unless explicitly stated otherwise, each numerical value and range should be interpreted as being approximate as if the word “about” or “approximately” preceded the value of the value or range.

It will be further understood that various changes in the details, materials, and arrangements of the parts which have been described and illustrated in order to explain embodiments of this invention may be made by those skilled in the art without departing from embodiments of the invention encompassed by the following claims.

The use of figure numbers and/or figure reference labels in the claims is intended to identify one or more possible embodiments of the claimed subject matter in order to facilitate the interpretation of the claims. Such use is not to be construed as necessarily limiting the scope of those claims to the embodiments shown in the corresponding figures.

It should be understood that the steps of the exemplary methods set forth herein are not necessarily required to be performed in the order described, and the order of the steps of such methods should be understood to be merely exemplary. Likewise, additional steps may be included in such methods, and certain steps may be omitted or combined, in methods consistent with various embodiments of the invention.

Although the elements in the following method claims, if any, are recited in a particular sequence with corresponding labeling, unless the claim recitations otherwise imply a particular sequence for implementing some or all of those elements, those elements are not necessarily intended to be limited to being implemented in that particular sequence.

Reference herein to “one embodiment” or “an embodiment” means that a particular feature, structure, or characteristic described in connection with the embodiment can be included in at least one embodiment of the invention. The appearances of the phrase “in one embodiment” in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. The same applies to the term “implementation.”

The embodiments covered by the claims in this application are limited to embodiments that (1) are enabled by this specification and (2) correspond to statutory subject matter. Non-enabled embodiments and embodiments that correspond to nonstatutory subject matter are explicitly disclaimed even if they fall within the scope of the claims.

Claims (43)

What is claimed is:

1. Apparatus configured to provide switched-mode power conversion, the apparatus comprising:

an input port configured to receive input power;

a switch configured to commutate the input power;

galvanic isolation circuitry configured to provide galvanic isolation between the input port and an output port, wherein the galvanic isolation circuitry comprises a transformer comprising (i) a primary winding arranged in circuit with the input port and the switch and (ii) a secondary winding arranged in circuit with a rectifier and the output port, wherein the transformer is configured to transfer power from the input port to supply voltage or current to a load connected to the output port; and

a demand pulse generator galvanically connected to the secondary winding and configured to generate demand pulses applied via the galvanic isolation circuitry to the switch to adjust a frequency of the commutation of the input power to supply a desired amount of voltage or current to the load.

2. The apparatus ofclaim 1, further comprising:

a source configured to provide a reference signal; and

comparison circuitry configured to compare the output port voltage or current to the reference signal wherein frequency of the demand pulses is responsive to the comparison between the output port voltage or current and the reference signal.

3. The apparatus ofclaim 1, further comprising input-side blocking oscillator circuitry configured to drive the switch.

4. The apparatus ofclaim 3, wherein the demand pulse generator comprises output-side blocking oscillator circuitry configured to generate the demand pulses.

5. The apparatus ofclaim 1, further comprising:

a fast oscillator configured to initiate the generation of the demand pulses; and

logic circuitry configured to provide gating of the demand pulses applied to the galvanic isolation circuitry.

6. The apparatus ofclaim 1, wherein the galvanic isolation circuitry further comprises dedicated circuitry configured to convey the demand pulses across the galvanic isolation.

7. The apparatus ofclaim 1, wherein the demand pulses are conveyed from the demand pulse generator to the switch via the transformer.

8. The apparatus ofclaim 1, wherein:

the galvanic isolation circuitry divides the apparatus into (i) an input side corresponding to the primary winding of the transformer and (ii) an output side corresponding to the secondary winding of the transformer; and

the demand pulse generator is located on the output side of the apparatus.

9. The apparatus ofclaim 1, further comprising a capacitor and a diode both galvanically connected to the secondary winding, wherein:

the diode is different from the rectifier and is poled to charge the capacitor during forward pulses of the apparatus; and

the demand pulse generator is powered by energy stored in the capacitor to generate the demand pulses.

10. Apparatus configured to provide galvanically isolated switched-mode power conversion, the apparatus comprising:

an input port configured to receive input power;

a switch configured to commutate the input power;

a transformer comprising (i) a primary winding arranged in circuit with the input port and the switch and (ii) a secondary winding arranged in circuit with a rectifier and an output port, wherein the transformer is configured to supply power from the input port to a load connected to the output port; and

a first pulse source circuitry located on an input side of the apparatus and configured to generate pulses to control the switch to start the power conversion; and

a second pulse source circuitry located on an output side of the apparatus and configured to generate pulses to control the switch to continue the power conversion after being started by the first pulse source circuitry.

11. The apparatus ofclaim 10, wherein the frequency of pulses generated by the second pulse source circuitry is different from the frequency of pulses generated by the first pulse source circuitry.

12. The apparatus ofclaim 11, wherein the frequency of pulses generated by the second pulse source circuitry is greater than the frequency of pulses generated by the first pulse source circuitry.

13. The apparatus ofclaim 10, wherein the frequency of pulses generated by the first pulse source circuitry is about 1 KHz or smaller.

14. The apparatus ofclaim 13, wherein the frequency of pulses generated by the second pulse source circuitry is about 60 KHz or greater.

15. The apparatus ofclaim 10, further comprising a capacitor and a diode both galvanically connected to the secondary winding, wherein:

the diode is different from the rectifier and is poled to charge the capacitor during forward pulses of the apparatus; and

the second pulse source circuitry is powered by energy stored in the capacitor to generate the pulses.

16. In an isolated switched-mode power converter having an input port and an output port, a method of regulation comprising:

(a) comparing a voltage or current at the output port with a reference that is galvanically associated therewith;

(b) generating or gating demand pulses responsive to that comparison;

(c) applying the demand pulses to an output-port side of galvanic isolation circuitry;

(d) receiving replicas of the demand pulses from an input-port side of the galvanic isolation circuitry; and

(e) adjusting commutation frequency of the converter responsive to the demand pulses to cause the voltage or current at the output port to attain a desired value.

17. The method ofclaim 16, wherein step (b) comprises:

(b1) using a diode to charge a capacitor during forward pulses of the power converter, wherein the diode and the capacitor are galvanically connected within the output-port side of the galvanic isolation circuitry; and

(b2) generating or gating the demand pulses using energy stored in the capacitor.

18. Circuitry for controlling a flyback converter, the flyback converter comprising:

an input port;

an output port galvanically isolated from the input port such that:

the input port is on a converter primary side of the flyback converter; and

the output port is on a converter secondary side of the flyback converter; and

a power transformer configured to transfer input power received at the input port to provide output power at the output port, wherein:

the converter primary side further comprises a primary-side switch configured to selectively transfer the input power at the input port via the power transformer to the output power at the output port;

the circuitry comprises first circuitry and second circuitry, wherein, when the circuitry is connected to control the flyback converter, (i) the first circuitry is on the converter primary side and (ii) the second circuitry is on the converter secondary side;

the second circuitry (i) determines when to turn on the primary-side switch based on output port voltage or current at the output port and (ii) generates corresponding demand pulses;

the converter secondary side is configured to transmit the demand pulses to the converter primary side;

the first circuitry is configured to turn on the primary-side switch in response to the demand pulses conveyed from the converter secondary side to the converter primary side, wherein the first circuitry, and not the second circuitry, originates the determination of when to turn off the primary-side switch;

frequency with which the primary-side switch is turned on is the frequency of the demand pulses conveyed from the converter secondary side to the converter primary side to regulate the output port voltage or current;

the first circuitry is configured to determine when to turn off the switch independent of the duration of the demand pulses;

the second circuitry is configured to generate the demand pulses when a feedback signal based on the output port voltage or current is smaller in magnitude than a reference signal; and

the circuitry is configured to regulate the output port by driving the feedback signal to match the reference signal.

19. The circuitry of claim 18, wherein the second circuitry is powered by energy transferred from the primary side to the secondary side during both forward and flyback pulses of the flyback converter.

20. The circuitry of claim 18, wherein:

the converter primary side further comprises a primary-side magnetically coupled conductor;

the converter secondary side further comprises a secondary-side magnetically coupled conductor configured to be magnetically coupled to the primary-side magnetically coupled conductor to convey the demand pulses from the converter secondary side to the converter primary side;

the power transformer has a primary-side winding and a secondary-side winding;

the primary-side switch is connected in series with the primary-side winding of the power transformer;

the secondary-side winding of the power transformer is connected to the output port;

the primary-side magnetically coupled conductor is different from the primary-side winding of the power transformer; and

the secondary-side magnetically coupled conductor is different from the secondary-side winding of the power transformer.

21. The circuitry of claim 19, wherein the primary-side and secondary-side magnetically coupled conductors are part of a pulse transformer separate from the power transformer.

22. Circuitry for controlling a flyback converter, the flyback converter comprising:

an input port;

an output port galvanically isolated from the input port such that:

the input port is on a converter primary side; and

the output port is on a converter secondary side; and

a power transformer configured to transfer input power received at the input port to provide output power at the output port, wherein:

the converter primary side further comprises a primary-side switch configured to selectively transfer the input power at the input port via the power transformer to the output power at the output port;

the circuitry comprises first circuitry and second circuitry, wherein, when the circuitry is connected to control the flyback converter, (i) the first circuitry is on the converter primary side and (ii) the second circuitry is on the converter secondary side;

when the output port is in regulation, the second circuitry (i) determines when to turn on the primary-side switch based on output port voltage or current at the output port and (ii) generates corresponding demand pulses;

the converter secondary side is configured to transmit the demand pulses to the converter primary side;

the first circuitry is configured to turn on the primary-side switch in response to the demand pulses conveyed from the converter secondary side to the converter primary side, wherein, when the output port is in regulation, the first circuitry, and not the second circuitry, originates the determination of when to turn off the primary-side switch;

frequency with which the primary-side switch is turned on is the frequency of the demand pulses conveyed from the converter secondary side to the converter primary side to regulate the output port voltage or current;

the first circuitry is configured to determine when to turn off the switch independent of the duration of the demand pulses;

the second circuitry is configured to generate the demand pulses when a feedback signal based on the output port voltage or current is smaller in magnitude than a reference signal;

the circuitry is configured to regulate the output port by driving the feedback signal to match the reference signal;

when the output port is in regulation, the determination of when to turn off the primary-side switch is always originated on the converter primary side and never on the converter secondary side;

feedback from the converter secondary side to the converter primary side for regulating the output port voltage or current is provided solely by the demand pulses generated by the second circuitry; and

the second circuitry is configured to generate one or more demand pulses whenever a magnitude of the output port voltage or current is below a magnitude of the output port's regulation voltage or current.

23. The circuitry of claim 22, wherein the second circuitry is powered by energy transferred from the primary side to the secondary side during both forward and flyback pulses of the flyback converter.

24. The circuitry of claim 22, wherein the second circuitry comprises:

an oscillator configured to generate oscillator pulses; and

logic circuitry configured to selectively block certain oscillator pulses in generating the demand pulses.

25. The circuitry of claim 23, wherein the logic circuitry is configured to selectively block the certain oscillator pulses from becoming demand pulses that would otherwise result in the primary-side switch being turned on, while selectively allowing other oscillator pulses to become the demand pulses that do result in the primary-side switch being turned on.

26. The circuitry of claim 23, wherein the second circuitry is configured to process, based on a comparator output, an output-side stream of oscillator pulses to generate the demand pulses.

27. The circuitry of claim 22, wherein the second circuitry comprises:

a comparator configured to generate a comparator output based on a comparison between the feedback signal and the reference signal;

an oscillator configured to generate a stream of oscillator pulses independent of the comparator output; and

logic circuitry configured to (i) receive the comparator output and the stream of oscillator pulses and (ii) process, based on the comparator output, the stream of oscillator pulses to generate the demand pulses.

28. The circuitry of claim 22, wherein:

the converter primary side further comprises a primary-side magnetically coupled conductor;

the converter secondary side further comprises a secondary-side magnetically coupled conductor configured to be magnetically coupled to the primary-side magnetically coupled conductor to convey the demand pulses from the converter secondary side to the converter primary side;

the power transformer has a primary-side winding and a secondary-side winding;

the primary-side switch is connected in series with the primary-side winding of the power transformer;

the secondary-side winding of the power transformer is connected to the output port;

the primary-side magnetically coupled conductor is different from the primary-side winding of the power transformer; and

the secondary-side magnetically coupled conductor is different from the secondary-side winding of the power transformer.

29. The circuitry of claim 28, wherein the primary-side and secondary-side magnetically coupled conductors are part of a pulse transformer separate from the power transformer.

30. An article of manufacture comprising a flyback converter, the flyback converter comprising:

an input port;

an output port galvanically isolated from the input port such that:

the input port is on a primary side of the flyback converter; and

the output port is on a secondary side of the flyback converter; and

a power transformer configured to transfer input power received at the input port to provide output power at the output port, wherein:

the primary side further comprises a primary-side switch configured to selectively enable the input power at the input port to be transferred via the power transformer to the output power at the output port;

the secondary side further comprises a demand pulse generator that (i) determines when to turn on the primary-side switch based on output voltage or output current at the output port and (ii) generates corresponding demand pulses;

the primary side comprises a primary-side magnetically coupled conductor;

the secondary side comprises a secondary-side magnetically coupled conductor configured to be magnetically coupled to the primary-side magnetically coupled conductor to convey the demand pulses from the secondary side to the primary side;

the primary-side switch is turned on in response to the demand pulses conveyed from the secondary side to the primary side, wherein the determination of when to turn off the primary-side switch is originated on the primary side and not on the secondary side;

frequency with which the primary-side switch is turned on is the frequency of the demand pulses conveyed from the secondary side to the primary side to regulate the output voltage or the output current at the output port;

the primary side is configured to determine when to turn off the switch independent of the duration of the demand pulses;

the demand pulse generator is configured to generate the demand pulses when a feedback signal based on the output port voltage or current is smaller in magnitude than a reference signal; and

the flyback converter is configured to regulate the output port by driving the feedback signal to match the reference signal.

31. The article of claim 30, wherein the demand pulse generator is powered by energy transferred from the primary side to the secondary side during both forward and flyback pulses of the flyback converter.

32. The article of claim 30, wherein:

the power transformer has a primary-side winding and a secondary-side winding;

the primary-side switch is connected in series with the primary-side winding of the power transformer;

the secondary-side winding of the power transformer is connected to the output port;

the primary-side magnetically coupled conductor is different from the primary-side winding of the power transformer; and

the secondary-side magnetically coupled conductor is different from the secondary-side winding of the power transformer.

33. The article of claim 32, wherein the primary-side and secondary-side magnetically coupled conductors are part of a pulse transformer separate from the power transformer.

34. The article of claim 30, wherein the article comprises a load connected to the output port of the flyback converter and configured to be powered by the flyback converter.

35. An article of manufacture comprising a flyback converter, the flyback converter comprising:

an input port;

an output port galvanically isolated from the input port such that:

the input port is on a primary side of the flyback converter; and

the output port is on a secondary side of the flyback converter; and

a power transformer configured to transfer input power received at the input port to provide output power at the output port, wherein:

the primary side further comprises a primary-side switch configured to selectively enable the input power at the input port to be transferred via the power transformer to the output power at the output port;

the secondary side further comprises a demand pulse generator that, when the output port is in regulation, (i) determines when to turn on the primary-side switch based on output voltage or output current at the output port and (ii) generates corresponding demand pulses;

the primary side comprises a primary-side magnetically coupled conductor;

the secondary side comprises a secondary-side magnetically coupled conductor configured to be magnetically coupled to the primary-side magnetically coupled conductor to convey the demand pulses from the secondary side to the primary side;

the primary-side switch is turned on in response to the demand pulses conveyed from the secondary side to the primary side, wherein, when the output port is in regulation, the determination of when to turn off the primary-side switch is originated on the primary side and not on the secondary side;

frequency with which the primary-side switch is turned on is the frequency of the demand pulses conveyed from the secondary side to the primary side to regulate the output voltage or the output current at the output port;

the primary side is configured to determine when to turn off the switch independent of the duration of the demand pulses;

the demand pulse generator is configured to generate the demand pulses when a feedback signal based on the output port voltage or current is smaller in magnitude than a reference signal;

the flyback converter is configured to regulate the output port by driving the feedback signal to match the reference signal;

when the output port is in regulation, the determination of when to turn off the primary-side switch is always originated on the primary side and never on the secondary side;

feedback from the secondary side to the primary side for regulating the output port voltage or current is provided solely by the demand pulses generated by the demand pulse generator; and

the demand pulse generator is configured to generate one or more demand pulses whenever a magnitude of the output port voltage or current is below a magnitude of the output port's regulation voltage or current.

36. The article of claim 35, wherein the demand pulse generator is powered by energy transferred from the primary side to the secondary side during both forward and flyback pulses of the flyback converter.

37. The article of claim 35, wherein the demand pulse generator comprises:

an oscillator that generates oscillator pulses; and

logic circuitry that selectively blocks certain oscillator pulses in generating the demand pulses.

38. The article of claim 37, wherein the logic circuitry is configured to selectively block the certain oscillator pulses from becoming demand pulses that would otherwise result in the primary-side switch being turned on, while selectively allowing other oscillator pulses to become the demand pulses that do result in the primary-side switch being turned on.

39. The article of claim 35, wherein the demand pulse generator is configured to process, based on a comparator output, a secondary-side stream of oscillator pulses to generate the demand pulses.

40. The article of claim 35, wherein the demand pulse generator comprises:

a comparator configured to generate a comparator output based on a comparison between the feedback signal and the reference signal;

an oscillator configured to generate a stream of oscillator pulses independent of the comparator output; and

logic circuitry configured to (i) receive the comparator output and the stream of oscillator pulses and (ii) process, based on the comparator output, the stream of oscillator pulses to generate the demand pulses.

41. The article of claim 35, wherein:

the power transformer has a primary-side winding and a secondary-side winding;

the primary-side switch is connected in series with the primary-side winding of the power transformer;

the secondary-side winding of the power transformer is connected to the output port;

the primary-side magnetically coupled conductor is different from the primary-side winding of the power transformer; and

the secondary-side magnetically coupled conductor is different from the secondary-side winding of the power transformer.

42. The article of claim 41, wherein the primary-side and secondary-side magnetically coupled conductors are part of a pulse transformer separate from the power transformer.

43. The article of claim 35, wherein the article comprises a load connected to the output port of the flyback converter and configured to be powered by the flyback converter.

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