USRE43045E1 - Multi-chamber MOCVD growth apparatus for high performance/high throughput - Google Patents

Abstract

In one embodiment the present invention is a method of conducting multiple step multiple chamber chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber after the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of a different semiconductor material is deposited on the first deposited layer in the second chamber using vapor deposition.

Description

More than one reissue application has been filed for the reissue of U.S. Pat. No. 7,368,368. The reissue applications are application Ser. Nos. 13/097,601 and 12/774,345 (the present application). Application Ser. No. 13/097,601 is a continuation reissue application of the present reissue application Ser. No. 12/774,345.

BACKGROUND OF THE INVENTION

The present invention is related to vapor deposition growth of semiconductor materials and to associated apparatus and methods. More specifically, the present invention is related to a wafer processing apparatus and a wafer processing method for reducing reactant memory in the relevant apparatus chambers.

Crystal growth from vapor is employed in semiconductor technology, in particular, for producing epitaxial layers on semiconductor wafers. The term epitaxy typically describes the growth of a monocrystalline layer on the planar boundary surface of a monocrystalline substrate, generally a substrate wafer of a semiconductor material.

Epitaxial growth is often carried out using chemical vapor deposition (CVD) in CVD reactors. In such processes, the semiconductor wafer is first heated and then exposed to a gas mixture, referred to as a process gas. The process gas mixture typically consists of a source gas, a carrier gas, and, where appropriate, a dopant gas. The source gas (or gases) provides the elements that form the desired semiconductor; e.g. trimethyl gallium and ammonia to form gallium nitride. The dopant gases carry (typically as compounds) elements that add p or n-type conductivity to the epitaxial layer; e.g. magnesium to obtain p-type gallium nitride. The source and dopant gases react on or near the hot substrate surface to form the desired epitaxial layer.

In a typical CVD process, reactant gases (often diluted in a carrier gas) at room temperature enter the reaction chamber. The gas mixture is heated as it approaches the deposition surface, heated radiatively, or placed upon a heated substrate. Depending on the process and operating conditions, the reactant gases may undergo homogeneous chemical reactions in the vapor phase before striking the surface. Near the surface thermal, momentum, and chemical concentration boundary layers form as the gas stream heats, slows down due to viscous drag, and the chemical composition changes. Heterogeneous reactions of the source gases or reactive intermediate species (formed from homogeneous pyrolysis) occur at the deposition surface forming the deposited material. Gaseous reaction by-products are then transported out of the reaction chamber.

Because a p-n junction is a fundamental element in many semiconductor devices, epitaxial layers of opposite conductivity type are often grown consecutively to one another on the substrate, typically by changing the composition of the dopant gas at a desired point during the growth process. Similarly, when heterostructures are produced using CVD, the composition of the source gases is similarly changed.

Such changes in source or dopant gas composition can lead to a problem referred to as “reactant memory.” The term “reactant memory” describes the undesired contamination of the process gas with source or dopant compositions or elements that remain in the chamber from previous deposition steps. At elevated temperatures, dopant and source compositions are capable of sticking to the reactor walls and potentially re-evaporating during following epilayer depositions. When, for example, dopants re-evaporate, the possibility exists that the dopants will be included or incorporated in the subsequent epi layers. In such layers the dopants can act as impurities or can change the electronic characteristics of the layers and the subsequent devices. This effect is often more pronounced for aluminum and boron than for nitrogen in SiC epitaxy. The effect is also pronounced for telluriumand zinc in GaAs epitaxy and for magnesium in GaN epitaxy.

Doping control is intricate in the epitaxial growth procedure. The background doping can be limited by using purified gases, and high-grade materials in the critical parts of the reactor. Memory effects from earlier growth steps where dopants have been intentionally introduced are also problematic.

Several attempts have been made to overcome the problems associated with reactant memory. One such attempted solution is site-competition epitaxy. Site-competition epitaxy is based on the competition between, for example, SiC and dopant source gases for the available substitutional lattice sites on the growing SiC crystal surface. In this case, dopant incorporation is controlled by appropriately adjusting the Si:C ratio within the growth reactor to affect the amount of dopant atoms incorporated into these sites, either carbon-lattice sites (C sites) or silicon lattice sites (Si sites), located on the active growth surface of the SiC crystal. This technique has also been utilized for arsenide and phosphide growth. By using site-competition epitaxy, the impurity level of the epilayer can be controlled by adjusting the C:Si ratio, while the n-type dopant nitrogen is increased at a low C:Si ratio. Hence, the C:Si ratio must be chosen to limit the domination dopant to grow low-doped material, while intentionally doped material must be grown under the C:Si ratio most suited for the dopant of choice.

Previous methods for counteracting reactant memory have also included cleaning the reactor after each deposition, baking out the reactor, and burying the dopant by re-coating the reactor walls. Another method for controlling the effect includes etching the reactor walls after each doped layer has been grown, for example using hydrogen or a hydrochloric acid. Combinations of an etch and an active C:Si ratio control have also been utilized to avoid the problems of reactant memory. These solutions, however, suffer from several drawbacks. Each method is time-consuming and reduces output, and adds additional processing steps to the technique. These methods may also result in growth stop effects such as poor adhesion between layers. Moreover, the various proposed solutions to the problem of reactant memory can also be costly additions to production of the desired devices.

Defect control has been considerably improved by optimizing the cleaning procedure before growth, both ex-situ before loading, and in-situ as part of the growth sequence. Reactant memory has not, however, been sufficiently reduced using these techniques to allow for efficient low doping epitaxial growth of multiple layers in some processes. It would therefore be desirable to develop an improved and more efficient technique for epitaxial growth while avoiding defects caused by reactant memory.

SUMMARY OF THE INVENTION

In one embodiment the present invention is a method of conducting multiple step multiple chamber chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber after the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of a different semiconductor material is deposited on the first deposited layer in the second chamber using vapor deposition.

In a second embodiment, the invention is a method of conducting multiple step multiple semiconductor chemical vapor deposition while avoiding reactant memory in the relevant reaction chambers. The method includes depositing a layer of a first semiconductor material on a substrate using vapor deposition in a first deposition chamber, followed by evacuation of the growth chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber. The substrate is transferred to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, a second layer of a different semiconductor material is deposited on the substrate in the second chamber using vapor deposition. After the second layer is deposited and prior to opening the second deposition chamber, the vapor deposition source gases are evacuated from the second deposition chamber to reduce vapor deposition source gases remaining in the second deposition chamber following the deposition growth and the substrate is transferred to the first deposition chamber while isolating the second deposition chamber from the first deposition chamber to prevent reactants present in the second chamber from affecting deposition in the first deposition chamber and while maintaining an ambient that minimizes or eliminates growth stop effects. After the transferring step, an additional layer of the first semiconductor material is deposited on the second deposited layer in the first chamber using vapor deposition.

In another embodiment, the invention is an apparatus for reducing reactant memory during chemical vapor deposition growth of semiconductor materials. The apparatus includes two vapor deposition growth processing chambers for conducting chemical vapor deposition of a semiconductor material on a substrate; and a transfer chamber between and in communication with said deposition chambers for conveying a substrate between said deposition chambers without passing the substrate directly from one of said chambers to the other. The apparatus further includes two process isolation valves each of which is in communication with one of the respective deposition chambers and both of which are in communication with the transfer chamber for isolating said deposition chambers from said transfer chamber during vapor deposition growth in said chambers. The apparatus also includes means for conveying a substrate from one of the deposition chambers to the transfer chamber and thereafter from the transfer chamber to the other of the deposition chambers.

In a different embodiment, an apparatus for reducing reactant memory during chemical vapor deposition growth of semiconductor materials is provided. The apparatus includes at least one vapor deposition processing chamber for conducting chemical vapor deposition of n-type epitaxial layers on a substrate or previously deposited layer and at least one vapor deposition processing chamber for conducting chemical vapor deposition of p-type epitaxial layers on a substrate or previously deposited layer. The apparatus also includes at least one transfer chamber for transferring a substrate between said vapor deposition processing chambers and at least two process isolation valves, each of which is in communication with one of said respective deposition chambers and both of which are in communication with said transfer chamber for isolating said deposition chambers from said transfer chamber during vapor deposition growth in said chambers. The apparatus also includes means for transferring a substrate from one of said deposition chambers to said transfer chamber and thereafter from said transfer chamber to other of said deposition chambers.

BRIEF DESCRIPTION OF THE DRAWINGS

The present invention will be understood more fully from the detailed description given here below and from the accompanying drawings of the preferred embodiments of the invention. The drawings, however, are not intended to imply limitation of the invention to a specific embodiment, but are for explanation and understanding only.

FIG. 1 is a schematic depiction of a processed wafer formed in accordance with one embodiment of the present invention.

FIGS. 2A and 2B are schematic depictions of a two-chambered apparatus in accordance with the present invention and a method of use.

FIG. 3 is a schematic depiction of a processed wafer formed in accordance with another embodiment of the present invention.

FIGS. 4A-4C are schematic depictions of a three-chambered apparatus in accordance with the present invention, and a method of use.

DETAILED DESCRIPTION OF ILLUSTRATIVE EMBODIMENTS

The present invention now will be described more fully hereinafter with reference to the accompanying drawings, in which preferred embodiments of the invention are shown. This invention may, however, be embodied in many different forms and should not be construed as limited to the embodiments set forth herein; rather, these embodiments are provided so that this disclosure will be thorough and complete, and will fully convey the scope of the invention to those skilled in the art. In the drawings, the thickness of layers and regions are exaggerated for clarity. It will be understood that when an element such as a layer, region or substrate is referred to as being “on” another element, it can be directly on the other element or intervening elements may also be present. In contrast, when an element is referred to as being “directly on” another element, there are no intervening elements present. It will also be understood that references to a “wafer” includes one wafer as well as multiple wafers, and that wafer carriers may optionally be included in any reference to wafers. Moreover, the wafers may be transferred to different wafer carriers throughout the processing steps.

The invention described herein is a wafer processing apparatus and a wafer processing method for reducing reactant memory in the relevant apparatus chambers.FIG. 1 depicts a representative processed wafer, for example a semiconductor device precursor10, formed in accordance with one embodiment of the invention. As illustrated inFIG. 1, an n-GaN12 layer is located on aSiC substrate14. A p-GaN layer16 is located on the n-GaN layer12. The depicted structure is merely representative of a structure that may be grown in accordance with the present invention, and is not intended to limit the resulting structures in any manner. Specifically, the resulting structure is not limited to a SiC substrate, but may also include a GaN or sapphire substrate or other substrates known in the art. Similarly, the layers grown on the substrate may be different than those depicted. Suitable layers include Group III-V layers as well as others known in the art and are not limited to doped layers. As used herein, the term “substrate” refers to a substrate as well as a substrate having one or more deposited layers of one or more different materials thereon. The terms “substrate” and “wafer” are used interchangeably herein throughout.

Although structures that incorporate two or three layers (n and p-type) of gallium nitride are illustrated, those familiar with and of ordinary skill in this art will recognize that the device can include one or more quantum wells, or superlattice structures or both and that the active layer or layers can include a greater range of the Group III-V compounds than gallium nitride standing alone. These variations, however, need not be elaborated in detail in order to clearly understand the invention, and thus, they are not discussed in detail herein. Thus, the relevant portions of more elaborate devices may also be referred to as, “active layers,” “diode portions,” “diode regions,” or “diode structures,” without departing from the scope of the present invention.

For numerous reasons, a buffer layer is often included as part of the structure between the silicon carbide substrate and the first gallium nitride (or other Group III-V) layer. In many cases, the buffer layer can comprise aluminum nitride (AIN), a fixed composition of AlGaN or a graded layer of aluminum gallium nitride (AlGaN) that progresses from a higher aluminum concentration near the silicon carbide substrate to a higher gallium nitride concentration at its interface with the gallium nitride epitaxial layer. Suitable buffer layers are also disclosed in commonly owned U.S. Pat. Nos. 6,373,077 and 6,630,690, which are incorporated herein by reference. Other structural portions that can be incorporated into devices of this type and with which the invention is particularly suitable include superlattice structures for enhancing the overall crystal stability of the device, quantum wells for enhancing the output of light or tuning it to a particular frequency, or multiple quantum wells for enhancing the brightness of the device by providing the additional number of active layers and the relationships between them. In addition, it may be desirable to passivate the exposed surfaces of the epitaxial layers of the device for environmental protection.

FIGS. 2A and 2B depict a schematic of an apparatus20 according to the present invention for forming multilayer devices and a method of its use. The apparatus includes atransfer chamber22 in communication with two chemicalvapor deposition chambers24,26. The apparatus20 also includes twoisolation valves28,30, each in communication with oneCVD chamber24,26 and thetransfer chamber22; aloading valve32 in communication with thetransfer chamber22; and aload lock chamber33. Theload lock chamber33 may be a glove box purged with dry gas (i.e., Ar, N₂) or a vacuum chamber that can be purged prior to opening theloading valve32 or a combination of the two. Aninput valve35 in communication with theload lock chamber33 is included, as well as a transfer means34 and at least onegas inlet36. Theisolation valves28,30, theloading valve32, and theinput valve35 are capable of being selectively opened and closed, allowing the chambers to be isolated one from the other and from the outside atmosphere. The apparatus20 depicted inFIGS. 2A and 2B includes 3gas inlets36,38,40. Eachgas inlet36,38,40 preferably includes avalve46,48,50 to open or close the inlet as desired. Gas inlets include, but are not limited to, atransfer chamber inlet36 andreaction chamber inlets38,40. The apparatus also preferably includes a transfer chamber exhaust42 and reaction chamber exhausts43,44. Eachexhaust42,43,44 preferably includes avalve52,53,54 to open or close theexhaust42,43,44 as desired. It should be noted that the apparatus could also contain additional chambers, such as deposition chambers, cooling chambers, or other chambers known in the art. Moreover, the apparatus could also include fewer inlets and exhausts than depicted inFIGS. 2A and 2B. Similarly, the apparatus could include more inlets and exhausts than depicted.

In one embodiment of the present invention, awafer56, for example a SiC wafer, is placed in aload lock chamber33 via aninput valve35 while theloading valve32 remains in a closed position. Thewafer56 may optionally be located on a wafer carrier. After thewafer56 is placed in theload lock chamber33, theinput valve35 is closed, theload lock chamber33 is evacuated or purged with, for example, N₂, to remove O₂and moisture, along with as many other impurities as possible, from theload lock chamber33. Thewafer56 is then placed in atransfer chamber22 via aloading valve32 while theisolation valves28,30 are closed. More than one wafer may be transferred at this time. As depicted inFIG. 2A, asecond chamber26 is isolated from thetransfer chamber22 by closing theisolation valve30, and thewafer56 is transferred to thefirst chamber24 while maintaining an appropriate ambient as discussed herein. Means for transferring the wafer include an arm. After thewafer56 is transferred to thefirst chamber24, theisolation valve28 between thefirst chamber24 and thetransfer chamber22 is preferably closed during processing. An epitaxial layer, for example an n-type epitaxial layer, is then deposited on thewafer56 by chemical vapor deposition in thefirst chamber24.

After deposition, thefirst chamber24 is purged to reduce vapor deposition source gases and dopants remaining in thechamber24 after deposition and the processedsubstrate58 is transferred to thetransfer chamber22 through theisolation valve28 while minimizing growth stop effects. As used herein, the term “purged” includes the step of evacuating the chamber as well as the step of replacing one gas with another. Growth stop effects are minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valve30 between thetransfer chamber22 and thesecond chamber26 remains closed to prevent relevant dopant gases present in thefirst chamber24 from entering thesecond chamber26 and affecting later deposition in thesecond chamber26. The minimization of growth stop effects occurs by maintaining the substrate in an ambient that minimizes growth stop effects. The growth stop effects are preferably minimized by maintaining positive flow of reactant gases throughout the apparatus.

The deposition of a second epitaxial layer is depicted inFIG. 2B. As seen in the figure, theisolation valve28 between thefirst chamber24 and thetransfer chamber22 is closed and theisolation valve30 between thetransfer chamber22 and thesecond chamber26 is opened. Thewafer58 is then transferred via a transferring means34 into thesecond chamber26. After thewafer58 is transferred to thesecond chamber26, theisolation valve30 between thesecond chamber26 and thetransfer chamber30 is preferably closed during epitaxial growth. An epitaxial layer, for example a p-type epitaxial layer, is then deposited on the first epitaxial layer by chemical vapor deposition in thesecond chamber26.

After deposition, thesecond chamber26 is purged to reduce the presence of vapor deposition gases and dopants remaining in thechamber26 after deposition, and the resultingdevice60 is transferred to thetransfer chamber22 through theisolation valve30 while minimizing growth stop effects. Growth stop effects are minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valve28 between thetransfer chamber22 and the first chamber remains closed to prevent relevant dopant gases present in thesecond chamber26 from entering thefirst chamber24 and affecting later deposition in thefirst chamber24.

When the desired number of growth steps is completed, the processed wafer is transferred from thetransfer chamber22 to theload lock chamber33 via theloading valve32 and theloading valve32 is closed. Theinput valve35 remains closed during this transfer. After theload lock chamber33 has been returned to the appropriate atmosphere, theinput valve35 is opened and the processed wafer is removed from theload lock chamber33.

FIG. 3 depicts arepresentative multilayer structure62, such as a semiconductor device precursor, grown in accordance with an additional embodiment of the present invention. As withFIG. 1,FIG. 3 is merely representative of a structure that may be grown in accordance with the present invention, and is not intended to limit the resulting devices in any manner. Specifically, the resulting structure is not limited to a SiC substrate, but may also include a GaN or sapphire substrate or other substrates known in the art. Similarly, the layers grown on the substrate may be different than those depicted. Suitable layers include Group III-V layers as well as others known in the art and are not limited to doped layers. As depicted inFIG. 3, an n-GaN layer64 is located on aSiC substrate66. A p-GaN layer68 is located on the n-GaN64 layer and an additional n-GaN layer70 is located on the p-GaN layer68.

In one embodiment, the additional n-GaN layer70 depicted inFIG. 3 may be formed in the apparatus ofFIGS. 2A and 2B by transferring the processedsubstrate60 from thetransfer chamber22 through theisolation valve28 into thefirst chamber24 while isolating thesecond chamber26 from thetransfer chamber22. After transfer, a deposition step may be conducted in thefirst chamber24 to grow the desired layer onto the processedwafer60.

After deposition, thefirst chamber24 is purged to reduce the presence of vapor deposition gases and dopants remaining in thechamber24 after deposition, and the substrate is transferred to thetransfer chamber22 through theisolation valve28 while minimizing growth stop effects. Growth stop effects are minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valve30 between thetransfer chamber22 and thesecond chamber26 remains closed to prevent relevant dopant gases present in thefirst chamber24 from entering thesecond chamber26 and affecting later deposition in thesecond chamber26.

In another embodiment, the additional n-GaN layer70 depicted inFIG. 3 is deposited in a third deposition chamber.FIGS. 4A-4C are schematic illustrations of anapparatus72 according to the present invention for forming multilayer devices and a method of its use. Theapparatus72 includes atransfer chamber74 in communication with each of three chemicalvapor deposition chambers76,78,80. Theapparatus72 also includes threeisolation valves82,84,86 each in communication with one of theCVD chambers76,78,80 and thetransfer chamber74; aloading valve88 in communication with thetransfer chamber74, and aload lock chamber89. Theload lock chamber89 may be a glove box purged with dry gas (i.e., N₂, Ar) or a vacuum chamber that can be purged prior to opening theloading valve88. Aninput valve91 in communication with theload lock chamber89 is included, as well as a transfer means84 and at least onegas inlet90. Theisolation valves82,84,86; theloading valve88; and theinput valve91 are capable of being selectively opened and closed, allowing thechambers74,76,78,80 to be isolated one from the other. Theapparatus72 depicted inFIGS. 4A-4C includes 4gas inlets90,92,94,96. Eachgas inlet90,92,94,96 preferably includes avalve102,104,106,108 to open or close theinlet90,92,94,96 as desired. Gas inlets include, but are not limited to, atransfer chamber inlet90, andreaction chamber inlets92,94,96. The apparatus also preferably includes atransfer chamber exhaust98 and reaction chamber exhausts99,100,101. Eachexhaust98,99,100,101 preferably includes avalve109,110,111,112 to open or close theexhaust98,99,100,101 as desired. It should be noted that theapparatus72 could also contain additional chambers, such as deposition chambers, cooling chambers, or other chambers known in the art as well as additional or fewer inlets and exhausts.

In an embodiment of the present invention, awafer114, for example a SiC wafer, is placed in aload lock chamber89 via aninput valve91 while theloading valve88 remains in a closed position. The after114 may optionally be located on a wafer carrier. After thewafer114 is placed in theload lock chamber89, theinput valve91 is closed, and theload lock chamber89 is purged with, for example, N₂, to remove O₂and moisture, along with any other impurities, from theload lock chamber89. thewafer114 is then placed in atransfer chamber74 via aloading valve88 while theisolation valves82,84,86 are closed. More than one wafer may be transferred at this time. As depicted inFIG. 4A, the second andthird chambers78,80 are isolated from thetransfer chamber74 by closing theisolation valves84,86, and thewafer114 is transferred to thefirst chamber76 while maintaining an appropriate ambient as discussed herein. After thewafer114 is transferred to thefirst chamber76, theisolation valve82 between thefirst chamber76 and thetransfer chamber74 is preferably closed during processing. An epitaxial layer, for example an n-type epitaxial layer, is then deposited on thewafer116 by chemical vapor deposition in thefirst chamber76.

After deposition, thefirst chamber76 is purged to reduce vapor deposition source gases and dopants remaining in thechamber76 after deposition and the processedsubstrate116 is transferred to thetransfer chamber74 through theisolation valve82 while minimizing growth stop effects. Growth stop effects are minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valves84,86 between thetransfer chamber74 and the second andthird chambers78,80 remain closed to prevent relevant dopant gases present in thefirst chamber76 from entering the second andthird chambers78,80 and affecting later deposition in the second andthird chambers78,80.

The deposition of a second epitaxial layer is depicted inFIG. 4B. As seen in the figure, theisolation valves82,86 between thetransfer chamber74 and the first andthird chambers76,80 are closed and theisolation valve84 between thetransfer chamber74 and thesecond chamber78 is opened. Thewafer116 is then transferred via a transferring means118 into thesecond chamber78. After thewafer116 is transferred to thesecond chamber78, theisolation valve84 between thesecond chamber78 and thetransfer chamber74 is preferably closed during processing. An epitaxial layer, for example a p-type epitaxial layer, is then deposited on the first epitaxial layer by chemical vapor deposition in thesecond chamber78.

After deposition, thesecond chamber78 is purged to reduce the presence of vapor deposition gases and dopants remaining in thechamber78 after deposition, and the resultingdevice120 is transferred to thetransfer chamber74 through theisolation valve84 while minimizing growth stop effects. Growth stop effects are minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valve82,86 between thetransfer chamber74 and the first andthird chambers76,80 remain closed to prevent relevant dopant gases present in thesecond chamber78 from entering the first andthird chambers76,80 and affecting later deposition.

The deposition of a third epitaxial layer is depicted inFIG. 4C. As seen in the figure, theisolation valves82,84 between thetransfer chamber74 and the first andsecond chambers76,78 are closed and theisolation valve86 between thetransfer chamber74 and thethird chamber80 is opened. Thewafer120 is then transferred via a transferring means122 into thethird chamber80. After thewafer120 is transferred to thethird chamber80, theisolation valve86 between thethird chamber80 and thetransfer chamber74 is preferably closed during processing. An epitaxial layer, for example an n-type epitaxial layer, is then deposited on the first epitaxial layer by chemical vapor deposition in thethird chamber80.

After deposition, thethird chamber80 is purged to reduce the presence of vapor deposition gases and dopants remaining in thechamber80 after deposition, and the resultingdevice124 is transferred to thetransfer chamber74 through theisolation valve86 while minimizing growth stop effects. Growth stop effects may be minimized by utilizing appropriate ambients, such as H₂, N₂, noble gases, or Group V gases if additional deposition steps are to be conducted. Pressures suitable to vapor deposition growth techniques may also be utilized. During transfer, theisolation valves82,84 between thetransfer chamber74 and the first andsecond chambers76,78 remain closed to prevent relevant dopant gases in thethird chamber80 from entering the first andsecond chambers76,78 and affecting later deposition.

Preferred carrier (or flow) gases include noble gases, nitrogen, argon, and hydrogen. Preferred Group III source gases for the formation of Group III-V epitaxial layers are trimethyl gallium, triethyl gallium, gallium halides, diethyl gallium halide, trimethyl aluminum, triethyl aluminum, aluminum halides, diethyl aluminum halide, trimethyl indium, triethyl indium, indium halides, diethyl indium halide, trimethyl amine alane and mixtures thereof. Other Group III source gases known in the art are also contemplated as suitable for use in the present invention. Preferred Group V sources gases for the formation of Group III-V epitaxial layers are selected from the group consisting of ammonia, arsine, phosphine, symmetrical dimethyl hydrazine, unsymmetrical dimethyl hydrazine, t-butyl hydrazine, arsenic and phosphorous equivalents thereof, and mixtures thereof. Other Group V source gases known in the art are also contemplated as suitable for use in the present invention. When trimethylgallium and ammonia are selected as the reactant gases, the resulting epitaxial layers are GaN layers. While the invention has been described with reference to Group III-V epilayers, other epilayers known in the art are also contemplated as suitable for use in devices formed in accordance with the present invention.

The epitaxial layers may be selectively doped or undoped. Each chemical vapor deposition chamber is preferably dedicated for use with a single dopant gas or combination of dopant gases, such as where the chamber is to be used to deposit co-doped layers (e.g. GaN doped with both Si and Zn). By dedicating each chemical vapor deposition chamber to a single dopant, reactant memory in the resulting devices is reduced. Dopants are selected for their acceptor or donor capabilities. Donor dopants are those with n-type conductivity and acceptor dopants are those with p-type conductivity. With reference to Group III-V epilayers, suitable p-type dopants are selected from (but not necessarily limited to) the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof. Also with reference to Group III-V epilayers, suitable n-type dopants are selected from the group consisting of Si, Ge, Sn, S, Se, and Te, and mixtures thereof. The dopants are supplied to the system via the use of dopant gas sources containing the desired dopant atoms. Of course, if epilayers other than Group III-V layers are implemented, suitable p-type and n-type dopants for those layers are also contemplated in the method of the present invention.

The epitaxial layers deposited in accordance with the present invention may each be independently formed of the same or different Group III-V compounds. When the different layers are formed of the same Group III-V compound, they may be doped differently. Although each deposition chamber is preferably dedicated to a single dopant atom, the Group III and Group V reactant gases may be varied in the individual deposition chambers during deposition. The Group III and Group V reactant gases may also be varied within a particular chamber during distinct deposition processing steps.

The apparatus of the present invention includes a single gas system, the same gas system, similar gas systems, or separate gas systems. Separate gas systems for maximizing throughput are especially preferred. Moreover, the use of a transfer chamber enables transfers between different ambients, including vacuum, N₂/H₂, noble gas, and Group V overpressure.

As previously discussed, the present apparatus is not limited to three CVD processing chambers. The apparatus may include as many processing chambers as allowed by cost, space, and need constraints.

In an alternative embodiment, when more dopants are required than there are dedicated processing chambers, a bake-out step may be conducted in one chamber while deposition is occurring in a different deposition chamber. Alternative steps for removing memory effects in a growth deposition chamber include coating, etching, and/or purging the relevant chamber while deposition occurs in a different chamber. The process allows deposition to continue without growth stop effects and loss of processing time during the bake-out procedure. Moreover, additional dopants may be introduced into different layers of the device as desired.

In another embodiment, multiple deposition growth steps may occur simultaneously in different growth chambers. For example, while an n-type layer is being deposited on a substrate in afirst deposition chamber24, a p-type layer could be deposited on a different substrate in asecond deposition chamber26. Distinct deposition steps could be carried out in each of the deposition chambers simultaneously. Moreover, the start and stop times of the deposition steps can be the same or different for each deposition chamber. Additionally, more than one wafer may be present in any deposition chamber during epitaxial growth or in the transfer chamber.

In the drawings and specification, there have been disclosed typical embodiments of the invention, and, although specific terms have been employed, they have been used in a generic and descriptive sense only and not for purposes of limitation, the scope of the invention being set forth in the following claims.

Claims (66)

1. A method of conducting multiple step multiple chamber vapor deposition while avoiding reactant memory in the relevant reaction chambers, the method comprising:

depositing a layer of a first semiconductor material on a substrate using vapor deposition in a first deposition chamber;

purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber;

transferring the substrate to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects;

thereafter depositing a second layer of a different semiconductor material on the substrate in the second chamber using vapor deposition;

purging the second deposition chamber to reduce vapor deposition source gases remaining in the second deposition chamber following the deposition growth and prior to opening the second deposition chamber;

transferring the substrate to the first deposition chamber while isolating the second deposition chamber from the first deposition chamber to thereby prevent reactants present in the second chamber from affecting deposition in the first deposition chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; and

thereafter depositing an additional layer of the first semiconductor material on the second deposited layer in the first chamber using vapor deposition.

2. A deposition method according toclaim 1 wherein the step of depositing a different semiconductor material comprises depositing the same material with a different dopant.

3. A deposition method according toclaim 1 wherein the step of transferring the substrate from the first deposition chamber while isolating the chambers comprises:

transferring the substrate from the first deposition chamber to a transfer chamber while isolating the second deposition chamber from the transfer chamber; and

thereafter transferring the substrate from the transfer chamber to the second deposition chamber while isolating the first deposition chamber from the transfer chamber.

4. A deposition method according toclaim 1 wherein the step of transferring the substrate from the second deposition chamber while isolating the chambers comprises:

transferring the substrate from the second deposition chamber to a transfer chamber while isolating the first deposition chamber from the transfer chamber; and

thereafter transferring the substrate from the transfer chamber to the first deposition chamber while isolating the second deposition chamber from the transfer chamber.

5. A deposition method according toclaim 1 further comprising transferring the substrate to a third deposition chamber while isolating the first and second deposition chambers from the third deposition chamber to thereby prevent reactants present in the first and second chamber from affecting deposition in the third chamber and while maintaining an ambient that minimizes or eliminates growth stop effects; and

thereafter depositing a third layer of semiconductor material on the previously deposited layers in the third chamber using vapor deposition.

6. A deposition method according toclaim 5 wherein the step of depositing a third layer of semiconductor material comprises depositing a semiconductor material that is different from only one of the previously deposited materials.

7. A method according toclaim 1 comprising supplying gas to the deposition chambers using a singe single gas system, thereby providing a constant atmosphere in each of the deposition chambers and the transfer chamber, to allow for faster transfer times.

8. A deposition method according toclaim 1 comprising supplying gas to the deposition chambers from different gas systems, thereby providing distinct atmospheres in each of the deposition chambers.

9. A deposition method according toclaim 8 comprising introducing Group V source gases selected from the group consisting of ammonia, arsine, phosphine, symmetrical dimethyl hydrazine, unsymmetrical dimethyl hydrazine, t-butyl hydrazine, arsenic and phosphorous equivalents thereof, and mixtures thereof, and mixtures thereof, and depositing a Group Ill-V semiconductor material.

10. A deposition method according toclaim 8 comprising introducing Group III source gases selected from the group consisting of trimethyl gallium, triethyl gallium, gallium halides, diethyl gallium halide, trimethyl aluminum, triethyl aluminum, aluminum halides, diethyl aluminum halide, trimethyl indium, triethyl indium, indium halides, diethyl indium halide, trimethyl amine alane, and mixtures thereof, and thereby depositing a Group Ill-V semiconductor material.

11. A deposition method according toclaim 1 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber comprises introducing a source gas and an n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the first deposition chamber.

12. A deposition method according toclaim 1 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a second deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the second deposition chamber.

13. A deposition method according toclaim 1 wherein the step of depositing a layer of semiconductor material on a previously deposited layer using vapor deposition in a second deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the second deposition chamber.

14. A deposition method according toclaim 1 wherein the step of depositing a layer of semiconductor material on a previously deposited layer using vapor deposition in a second deposition chamber comprises introducing a source gas and a n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the second deposition chamber.

15. A deposition method according toclaim 1 wherein the step of depositing a third layer of semiconductor material on a second deposited layer using vapor deposition in a first deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the first deposition chamber.

16. A deposition method according toclaim 1 wherein the step of depositing a third layer of semiconductor material on a second deposited layer using vapor deposition in a first deposition chamber comprises introducing a source gas and a n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the first deposition chamber.

17. A deposition method according toclaim 1 wherein the substrate is located on a wafer carrier.

18. A deposition method according toclaim 17 wherein more than one substrate is located on the wafer carrier.

19. A deposition method according toclaim 17 wherein the substrate is transferred to a second wafer carrier.

20. A deposition method according toclaim 18 wherein each substrate on the wafer carrier is transferred to a second wafer carrier.

21. A deposition method according toclaim 1 wherein more than one substrate is being processed.

22. A deposition method according toclaim 21 wherein at least one substrate is at a different processing stage than at least one other substrate.

23. A method of conducting multiple step multiple chamber vapor deposition while avoiding reactant memory in the relevant reaction chambers, the method comprising:

depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber;

purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber;

transferring the substrate to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects;

thereafter depositing a second layer of a different semiconductor material on the first deposited layer in the second chamber using vapor deposition while baking out the first deposition chamber to remove any reactants present from the first deposition step;

purging the second deposition chamber to reduce vapor deposition source gases remaining in the second deposition chamber following the deposition growth and prior to opening the chamber;

transferring the substrate to the first deposition chamber while isolating the second deposition chamber from the first deposition chamber to thereby prevent reactants present in the second chamber from affecting deposition in the first chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; and

thereafter depositing an additional layer of a third semiconductor material on the second deposited layer in the first chamber using vapor deposition.

24. A deposition growth method according toclaim 23 wherein the step of transferring the substrate while isolating the chambers comprises:

transferring the substrate from the first deposition chamber to a transfer chamber while isolating the second deposition chamber from the transfer chamber; and

hereafter transferring the substrate from the transfer chamber to the second deposition chamber while isolating the first deposition chamber from the transfer chamber.

25. A deposition growth method according toclaim 23 wherein the respective deposition steps comprise supplying gas to the deposition chambers using a single gas system, thereby providing a constant atmosphere in each of the deposition chambers and the transfer chamber, to allow for faster transfer times.

26. A deposition growth method according toclaim 23 wherein the respective deposition steps comprise supplying gas to the deposition chambers from different gas systems, thereby providing distinct atmospheres in each of the deposition chambers.

27. A deposition method according toclaim 23 wherein the respective deposition steps comprise introducing Group V source gases selected from the group consisting of ammonia, arsine, phosphine, symmetrical dimethyl hydrazine, unsymmetrical dimethyl hydrazine, t-butyl hydrazine, arsenic and phosphorous equivalents thereof, and mixtures thereof, and depositing a Group Ill-V nitride semiconductor material.

28. A deposition method according toclaim 23 wherein the respective deposition steps comprise introducing Group III source gases selected from the group consisting of trimethyl gallium, triethyl gallium, gallium halides, diethyl gallium halide, trimethyl aluminum, triethyl aluminum, aluminum halides, diethyl aluminum halide, trimethyl indium, triethyl indium, indium halides, diethyl indium halide, trimethyl amine alane, and mixtures thereof, and thereby depositing a Group Ill-V semiconductor material.

29. A deposition method according toclaim 23 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber comprises introducing a source gas and an n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the first deposition chamber.

30. A deposition method according toclaim 23 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the first deposition chamber.

31. A deposition method according toclaim 23 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a second deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the second deposition chamber.

32. A deposition method according toclaim 23 wherein the step of depositing a layer of semiconductor material on a substrate using vapor deposition in a second deposition chamber comprises introducing a source gas and a n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the second deposition chamber.

33. A deposition growth method according toclaim 23 wherein the step of depositing a third layer of semiconductor material on a substrate using vapor deposition in the first deposition chamber comprises introducing a source gas and a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the first deposition chamber.

34. A deposition growth method according toclaim 23 wherein the step of depositing a third layer of semiconductor material on a substrate using vapor deposition in the first deposition chamber comprises introducing a source gas and an n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the first deposition chamber.

35. A deposition method according toclaim 23 wherein the substrate is located on a wafer carrier.

36. A deposition method according toclaim 35 wherein more than one substrate is located on the wafer carrier.

37. A deposition method according toclaim 35 wherein the substrate is transferred to a second wafer carrier.

38. A deposition method according toclaim 23 wherein more than one substrate is being processed.

39. A deposition method according toclaim 38 wherein at least one substrate is at a different processing stage than at least one other substrate.

40. A method of conducting multiple step multiple chamber vapor deposition while avoiding reactant memory in the relevant reaction chambers, the method comprising:

depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber;

purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber;

transferring the substrate to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects;

thereafter depositing an additional layer of a different semiconductor material on the first deposited layer in the second chamber using vapor deposition;

thereafter transferring the substrate to a third deposition chamber while isolating the first and second deposition chambers from the third deposition chamber to thereby prevent reactants present in the first and second chamber from affecting deposition in the third chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; and

thereafter depositing an additional layer of a different semiconductor material on the substrate in the third chamber using vapor deposition in which the additional layer is different from only one of the previously deposited materials.

41. A method of conducting multiple step multiple chamber vapor deposition while avoiding reactant memory in the relevant reaction chambers, the method comprising:

depositing a layer of semiconductor material on more than one a substrate on a wafer carrier using vapor deposition in a first deposition chamber;

purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber;

transferring the substrates substrate to a second deposition chamber on a second wafer carrier while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects;

thereafter depositing an additional layer of a different semiconductor material on the first deposited layer in the second deposition chamber using vapor deposition;

wherein one of the layers of semiconductor material is a p-type group III-V layer and the other layer of semiconductor material is an n-type group III-V layer.

42. The method of claim 41 wherein the layers of semiconductor material are deposited by epitaxial growth.

43. The method of claim 42 further comprising producing at least one of a quantum well and a superlattice structure during the multiple step multiple chamber vapor deposition.

44. The method of claim 42 wherein at least one of the n-type group III-V layer and the p-type group III-V layer comprises gallium nitride.

45. The method of claim 41 wherein the transferring the substrate to the second deposition chamber while isolating the chambers comprises:

transferring the substrate from the first deposition chamber to a transfer chamber while isolating the second deposition chamber from the transfer chamber; and

thereafter transferring the substrate from the transfer chamber to the second deposition chamber while isolating the first deposition chamber from the transfer chamber.

46. The method of claim 42 further comprising supplying ambient source gas to at least one of the deposition chambers, wherein the ambient source gas is selected from a group consisting of trimethyl gallium, triethyl gallium, gallium halides, diethyl gallium halide, trimethyl aluminum, triethyl aluminum, aluminum halides, diethyl aluminum halide, trimethyl indium, triethyl indium, indium halides, diethyl indium halide, trimethyl amine alane, and mixtures thereof.

47. The method of claim 42 wherein the depositing of the p-type group III-V layer comprises introducing a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the deposition chamber.

48. The method of claim 42 wherein the depositing of the n-type group III-V layer comprises introducing an n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the deposition chamber.

49. The method of claim 48 wherein the depositing of the p-type group III-V layer comprises introducing a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the deposition chamber.

50. The method of claim 41 wherein the substrate is located on a wafer carrier.

51. The method of claim 50 wherein more than one substrate is located on the wafer carrier.

52. The method of claim 50 wherein the substrate is transferred to a second wafer carrier.

53. A method of conducting multiple step multiple chamber vapor deposition, the method comprising:

depositing a layer of semiconductor material on a substrate using vapor deposition in a first deposition chamber;

purging the first deposition chamber to reduce vapor deposition source gases remaining in the first deposition chamber following the deposition growth and prior to opening the chamber; and

transferring the substrate to a second deposition chamber while isolating the first deposition chamber from the second deposition chamber to thereby prevent reactants present in the first chamber from affecting deposition in the second chamber and while maintaining the substrate in an ambient that minimizes or eliminates growth stop effects; and

thereafter depositing an additional layer of a semiconductor material on the first deposited layer in the second chamber using vapor deposition;

wherein the depositing of at least one of the layers of semiconductor material comprises depositing the layer of semiconductor material at high temperature.

54. The method of claim 53 wherein the substrate is raised to a temperature of at least about 960 degrees C. while in at least one of the deposition chambers.

55. The method of claim 53 wherein the transferring the substrate to the second deposition chamber while isolating the chambers comprises:

transferring the substrate from the first deposition chamber to a transfer chamber while isolating the second deposition chamber from the transfer chamber; and

thereafter transferring the substrate from the transfer chamber to the second deposition chamber while isolating the first deposition chamber from the transfer chamber.

56. The method of claim 53 wherein one of the layers of semiconductor material is a p-type group III-V layer and the other layer of semiconductor material is an n-type group III-V layer.

57. The method of claim 56 wherein the layers of semiconductor material are deposited by epitaxial growth.

58. The method of claim 57 further comprising producing at least one of a quantum well and a superlattice structure during the multiple step multiple chamber vapor deposition.

59. The method of claim 58 wherein at least one of the n-type group III-V layer and the p-type group III-V layer comprises gallium nitride.

60. The method of claim 56 further comprising supplying ambient source gas to at least one of the deposition chambers, wherein the ambient source gas is selected from a group consisting of trimethyl gallium, triethyl gallium, gallium halides, diethyl gallium halide, trimethyl aluminum, triethyl aluminum, aluminum halides, diethyl aluminum halide, trimethyl indium, triethyl indium, indium halides, diethyl indium halide, trimethyl amine alane, and mixtures thereof.

61. The method of claim 56 wherein the depositing of the p-type group III-V layer comprises introducing a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the deposition chamber.

62. The method of claim 56 wherein the depositing of the n-type group III-V layer comprises introducing an n-type dopant gas including atoms selected from the group consisting of Si, Ge, Sn, S, Se, Te, and mixtures thereof into the deposition chamber.

63. The method of claim 62 wherein the depositing of the p-type group III-V layer comprises introducing a p-type dopant gas including atoms selected from the group consisting of Be, Mg, Zn, Ca, Mn, Sr, C, and mixtures thereof into the deposition chamber.

64. The method of claim 53 wherein the substrate is located on a wafer carrier.

65. The method of claim 64 wherein more than one substrate is located on the wafer carrier.

66. The method of claim 64 wherein the substrate is transferred to a second wafer carrier.

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