FIELD OF THE INVENTIONThe present invention is related generally to meters for measuring power and more particularly to a smart meter system.
BACKGROUNDIn smart meter system voltage and current sensing, electrical isolation between the high voltage and the low voltage domains is necessary. One common way to achieve that is to use voltage and current transformers. The average power dissipated in resistive loads, e.g. household appliances, can be calculated as the product of root-mean-squares of current and voltage averaged over a time period. But for non-resistive loads, such as AC motors, the average AC power can be calculated by the direct product of current and voltage averaged over a period of time. Since the voltage induced across a transformer is proportional to the rate of change of current, a direct measurement of the current cannot be easily done directly from the outputs of a current transform. On the other hand, a direct current sensing can be easily done by measuring the voltage drop across a small shut resistor connected in series with the power line. Another advantage of using resistors and optically coupled isolators is the fact that voltage and current sensing's cannot be tampered as in the case of transformers by placing a strong external magnets in the close proximity as to saturate the transformer cores. In addition, the transformer-less approach is the smaller size as compared with that of transformers to enable a compact form factor design. Furthermore, the cost of resistors and isolators are less as compared to that of the transformers.
There is a need to enhance system performance, reliability, testability and manufacturability of the smart meter during the product production and prototyping. Accordingly, what is needed is a system and method that addresses such needs. The system and method must be easily implemented, cost effective and adaptable to existing systems. The present invention addresses such a need.
SUMMARYA transformer-less method and system for voltage and current sensing using voltage drops across resistors is disclosed. Using optically coupled isolators, the sensed voltages in the high voltage power lines are optically coupled and electrically isolated to the low voltage circuits. The circuit designs for voltage and current sensing's and electrical isolation are disclosed.
In a first aspect a method of sensing current within a smart meter is disclosed. The method includes coupling at least one resistor to a high voltage portion of the smart meter. The method also includes optically coupling the high voltage portion to a low voltage portion of the smart meter.
In a second aspect, a method of sensing voltage within a smart meter is disclosed. The method includes coupling a resistor voltage divider to a high voltage portion of the smart meter. The method also includes optically coupling the high voltage portion to a low voltage portion of the smart meter.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is an illustration of smart meter system.
FIG. 2 is an illustration of a smart meter in accordance with an embodiment.
FIG. 3 is an illustration of circuit design for current sensing transistor in an open source configuration with load resistor connected to the emitter.
FIG. 4 is an illustration of the output transistor in the open drain configuration with a load resistor connected to the collector.
FIG. 5 is an illustration of circuit for voltage sensing transistor in an open source configuration with a load resistor connected to the emitter.
FIG. 6 is an illustration of circuit for voltage sensing transistor in an open drain configuration with a load resistor connected to the collector.
FIG. 7 is an illustration of circuit for voltage and current sensing for the open source configuration for a 3-phase power line application.
DETAILED DESCRIPTIONThe present invention is related generally to meters for measuring power and more particularly to a smart meter system. The following description is presented to enable one of ordinary skill in the art to make and use the invention and is provided in the context of a patent application and its requirements. Various modifications to the preferred embodiments and the generic principles and features described herein will be readily apparent to those skilled in the art. Thus, the present invention is not intended to be limited to the embodiments shown, but is to be accorded the widest scope consistent with the principles and features described herein.
FIG. 1 is an illustration of thesmart meter system50 in accordance with an embodiment. Thesmart meter system50 comprises alocal server1 connected to acoordinator2 and smart meters3 (smart meter1-N). In one embodiment, thelocal server1 is connected to thecoordinator2 via wires. In another embodiment, thelocal server1 is connected to thecoordinator2 wirelessly.
Thesmart meter system50 is a many-to-one data communication topology. In this embodiment, thelocal server1 issues a command to thecoordinator2 which executes the command by sending a corresponding data packet wirelessly to thesmart meters3 by a radio frequency (RF) link, e.g. ZigBee that may or may not support an industry standard such as IEEE 802.14.5. Then thesmart meters3 send an appropriate response back to thecoordinator2 by the same RF link. Power usage data sent by thesmart meters3 can be stored in a database hosted in thelocal server1 or aninternet cloud4.
The power usage can be accessed for example by displaying web pages using any device that is connected to the local server or the internet. The database can be analyzed to determine optimal power usage and distribution. The power usage can also be analyzed to enable system control, e.g. cut off the power if necessary.
Thelocal server1 issues commands to thecoordinator2 through a coordinator-server interface control register. The coordinator server interface control register typically resides within thecoordinator2 and allows for the communication between thelocal sever1 and thecoordinator2. The coordinator server interface control register streamlines and enhances the performance of tasks betweenserver1 andcoordinator2.
FIG. 2 is an illustration of asmart meter3 in accordance with an embodiment. Thesmart meter3 comprises a power supply35, a battery backup36, a liquid crystal display or LCD display37, a RF controller System-on-Chip (SOC)38, and voltage andcurrent sensors39. The battery backup36 provides a non-interruptible power supply in the event of a power failure. The battery backup36 enables the detection of power failure in thesmart meter3. The status of the battery backup36 is reported in the STATUS register.
A key feature of the present invention is that there is no need for a transformer when sensing voltage and current. This is made possible by optically isolating a high voltage portion of the smart meter from a low voltage portion. In so doing, resistors can be utilized to provide the current or voltage sensing properties of the smart meter. By eliminating the transformer the smart meter can be physically smaller, less costly and will not be tampered as in the case when the transformer core is placed in a saturation condition. To describe the features of the present invention in more detail refer now to the following description in conjunction with the accompanying Figures.
FIG. 3 is an illustration of circuit design for a current sensing portion of voltage andcurrent sensors39 in thesmart meter3 ofFIG. 2 for a single-phase power line system. The first terminal of a small shunt resistor RS7 is connected in series with the hot line ofpower line pair6 which is ahigh voltage portion100; theother power line5 is the neutral or ground line. The cathode terminal of an infra-red (IR)LED9 is connected to the first terminal of resistor RS. The anode terminal of IR LED is connected with the first terminal ofresistor RD10. The second terminal ofRD10 is connected to the negative terminal of avoltage source VB8. The positive terminal of VBis connected to the second terminal of RS7.
- Anoptical transistor12 has a base terminal B that is optically coupled to the IF LED which is alow voltage portion102. The collector terminal C is connected to the VDDterminal11. The emitter terminal E is connected to the first terminal of aresistor RL13 in an emitter follower configuration. The second terminal ofRL13 is connected to the VSSterminal14. Anoutput signal VO15 is connected to the emitter terminal E of theoptical transistor12. The optically coupled isolator comprises of theIR LED9 and theoptical transistor12.
 
TheIF LED9 is biased in the forward conduction region using avoltage source VB8. This bias condition is determined by choosing a current-limitingresistor RD10 that is equal to the difference of biasvoltage source VB8 and the forward voltage VFof the IR LED diode divided by the forward current IF of the IR LED diode. This bias condition enables the IR LED diode to operate at a voltage bias condition to maximize the sensitivity of the optically coupled isolator and minimize the current consumption.
FIG. 4 is an illustration of the output transistor in the open drain configuration with aload resistor RL45. The first terminal ofRL45 is connected to VDDand the second terminal ofRL45 is connected to the collector terminal C of theoptical transistor46. Theoutput voltage VO48 is taken from the collector terminal C of theoptical transistor46.
FIG. 5 is an illustration of circuit for voltage sensing transistor in the open source configuration with aload resistor RL58. The voltage sensing circuit comprises of a voltage divider consisting ofresistor R151 andR252 that are connected in series across thehot power lines49 and theneutral power line50 where the first terminal ofR151 is connected to thehot power lines49, the second terminal ofR151 is connected to the first terminal ofR252, and the second terminal ofR252 is connected to theneutral power line50. The first terminal ofresistor R252 is connected to the cathode terminal of theIR LED54. The anode terminal ofIR LED54 is connected to the first terminal ofresistor RD55. The second terminal ofRD55 is connected to the negative terminal of avoltage source VB53. The positive terminal ofVB53 is connected to the second terminal ofR252.
Anoptical transistor57 has a base terminal B that is optically coupled to the IF LED. The collector terminal C is connected to the VDDterminal56. The emitter terminal E is connected to the first terminal of aresistor RL58 in the open emitter configuration. The second terminal ofRL58 is connected to the VSSterminal59. The output voltage VOis taken from the emitter terminal E of theoptical transistor57.
FIG. 6 is an illustration of circuit for voltage sensing transistor in the open drain configuration with aload resistor RL69. Anoptical transistor69 has a base terminal B that is optically coupled to theIF LED66. The emitter terminal E is connected to the Vssterminal71. The collector terminal C is connected to the second terminal of aresistor RL69 in the open drain configuration. The first terminal ofRL69 is connected to the VDDterminal68. Theoutput voltage VO72 is taken from the collector terminal C of theoptical transistor70.
FIG. 7 is an illustration of circuit for voltage and current sensing for the open source configuration for a 3-phase power line application. Thecircuit SI173 senses the current of L1 phase; thecircuit SV174, senses the voltage of L1 phase; thecircuit SI275, senses the current of L2 phase; thecircuit SV276, senses the voltage of L2 phase; thecircuit SI377, senses the current of L3 phase; thecircuit SV378, senses the voltage of L3 phase.
A smart meter system voltage and current sensing are performed as voltage drops across a shut resistor in series with the power line or from a voltage divider connected across the power lines. These voltages are optically coupled and electrically isolated to the inputs of the low voltage circuits by using optically coupled isolators. Circuits for the voltage and current sensing method are described using resistors and optically coupled isolators. The advantages of this transformer-less method as compared to the transformer approach are direct sensing of current and voltage that enables AC power and energy measurements for non-resistive loads, tamper proof for secure power measurements, compact sizes, and low costs.
Although the present invention has been described in accordance with the embodiments shown, one of ordinary skill in the art will readily recognize that there could be variations to the embodiments and those variations would be within the spirit and scope of the present invention. Accordingly, many modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the present invention.