This application claims the benefit of Korean Patent Application No. 2003-43804, filed on Jun. 30, 2003, which is hereby incorporated by reference for all purposes as if fully set forth herein.
BACKGROUND OF THE INVENTION1. Field of the Invention
The present invention relates to a liquid crystal display device using poly-silicon, and more particularly to a liquid crystal display device and a fabricating method thereof that reduce the number of processes and production cost.
2. Discussion of the Related Art
Silicon is divided into two main classes of amorphous silicon and crystalline silicon in accordance with crystallization state.
Amorphous silicon can be deposited into a thin film at a low temperature below 350° C. Because of this, amorphous silicon is mainly used for thin film transistors of liquid crystal display devices. However, it is difficult to apply amorphous silicon to a large-size liquid crystal display device that requires an excellent electrical characteristic due to its low mobility below 0.5 cm2/Vs.
When compared with amorphous silicon, poly-silicon (crystalline silicon) has a high mobility of several tens to hundreds of cm2/Vs. Thus, there has been active research on high-density and large-size liquid crystal display (LCD) devices by applying poly-silicon to the semiconductor layer of the thin film transistors (TFT) of the LCD devices. In particular, when the poly-silicon TFTs are applied to a liquid crystal display panel, the TFTs of the screen area and the driving circuits can be fabricated or integrated together on the same substrate.
In general, the electrical properties of poly-silicon depend on the size of its crystal grain. That is, the bigger the size of crystal grain is, the higher the mobility of poly-silicon is.
Such a poly-silicon layer can be formed with various methods. It can be directly deposited on a substrate, or it can be formed by crystallizing amorphous silicon which is deposited on a substrate. Plasma enhanced chemical vapor deposition (PECVD) method is generally used to directly deposit poly-silicon on a substrate in which poly-silicon is deposited using a mixture gas of SiF4, SiH4and H2at a deposition temperature above 400° C. Due to the difficulty of controlling the crystal grain, this direct-depositing method is not preferred for an actual liquid crystal display device. The methods of crystallizing amorphous silicon into poly-silicon includes solid phase crystallization (SPC) in which amorphous silicon that is deposited on a substrate is heated in a furnace and is then crystallized, and a method in which amorphous silicon that is deposited on a substrate is irradiated by an excimer laser and is then crystallized. The crystallizing method using an excimer laser is mainly used to form a poly-silicon layer in an LCD device because its process temperature is low and it is relatively easy to control the crystal grain.
Recently, a new crystallizing process called sequential lateral solidification (hereinafter ‘SLS’) has been introduced in the industry in which an excimer laser is irradiated on an amorphous silicon thin film to completely melt the thin film, and then the crystals of the thin film grow vertically from the side surface. This SLS technique is disclosed in International Patent No. WO 97/45827 and Korea Patent Publication (Laid-Open) No. 2001-004129.
FIGS. 1 and 2 represent a related art poly-silicon TFT in a liquid crystal display device.
Referring toFIGS. 1 and 2, the poly-silicon TFT of the liquid crystal display device (top-gate type) includes agate electrode6 connected to agate line2, asource electrode8 connected to thedata line4, a drain electrode connected to apixel electrode22, and anactive layer14 to form a channel in response to a control signal applied to thegate electrode6.
Theactive layer14 includes achannel area14C, asource area14S, adrain area14D and a lightly doped drain (herein after ‘LDD’)area14L, wherein thechannel area14C is a poly-silicon layer formed on abuffer film16, overlaps thegate electrode6, and is not doped with impurities. When the poly-silicon TFT is N-type, thesource area14S and thedrain area14D are doped with n+ ions, and theLDD area14L is doped with n− ions. TheLDD area14L is located between thechannel area14C and thesource area14S and between thechannel area14C and thedrain area14D to reduce the off-current of the poly-silicon TFT.
Thegate electrode6 overlaps thechannel area14C of theactive layer14 with agate insulating film12 therebetween, and forms a channel through which electric currents flow between thesource electrode8 and thedrain electrode10 in response to a scan voltage supplied from thegate line2. Thesource electrode8 is connected to thesource area14S of theactive layer14 through asource contact hole24S that runs through thegate insulating film12 and aninterlayer insulating film26. Thedrain electrode14D is connected to thedrain area14D of theactive layer14 through adrain contact hole24D that runs through thegate insulating film12 and theinterlayer insulating film26.
The poly-silicon TFT supplies a data voltage of thedata line4 to thepixel electrode22 connected to thedrain electrode10, in response to a scan pulse from thegate line2.
An aligningmark28 is formed at four edges of the substrate of the liquid crystal display device. The aligningmark28 is used to align the masks in the fabricating process. The aligningmark28 is formed with a semiconductor layer along with theactive layer14 at the same time.
FIGS. 3A to 3F illustrate a fabricating method of the liquid crystal display device.
Referring toFIG. 3A, abuffer film16 is formed by depositing an insulating material such as SiO2or SiNxon the entire surface of alower substrate1. An amorphous silicon layer is deposited on the entire surface of thebuffer film16. Hydrogen contained in the amorphous silicon layer is removed through a dehydrogenation process in which the amorphous silicon layer is heated at about 400° C. After the dehydrogenation process, the amorphous silicon layer is crystallized by a laser annealing into a poly-silicon layer.
Referring toFIG. 4A, when the SLS method is used for the laser crystallization process, amask41 is aligned on theamorphous silicon layer43. Themask41 includes atransmitting pattern41aand ashielding pattern41b, wherein thetransmitting pattern41atransmitslaser beam42 and theshielding pattern41bblocks thelaser beam42. Thelaser beam42 is irradiated on theamorphous silicon layer43 through themask41. Then, theamorphous silicon layer43 exposed to thelaser beam42 through thetransmitting pattern41aof themask41 is melted. Theamorphous silicon layer43 on which thelaser beams42 are irradiated is melted down to reach the interface that is in contact with thebuffer film16. Theamorphous silicon layer43 melted in this way becomes crystallized as its temperature becomes lower. Crystallization is induced from seeds that exist at the side surface that is in contact with the adjacentamorphous silicon layer43, which is in a solid state. Through this crystallization process, theamorphous silicon layer43 irradiated by thelaser beams42 transforms into a poly-silicon layer44 as illustrated inFIGS. 4A and 5A. Subsequently, at least one of themask41 and thesubstrate1 moves to align thetransmitting pattern41aof themask41 to theamorphous silicon layer43 that has not been crystallized. Then, thelaser beam42 is irradiated on theamorphous silicon layer43 through themoved mask41. After the rest of theamorphous silicon layer43 is melted, crystallization again proceeds from the seeds existing at the side surface, i.e., the interface with the poly-silicon layer44, as its temperature becomes lower. The entire surface or part of theamorphous semiconductor layer43 is crystallized to become the poly-silicon layer44 through two repetitions of such an exposure process, as illustrated inFIGS. 4B and 5B.
Referring toFIG. 6A, a photo-resist47 is spread over the entire surface of the poly-silicon layer44. Amask45 is aligned on the photo-resist47 for patterning. Themask45 has a transmittingpattern45aand ashielding pattern45b, wherein the transmittingpattern45ais for defining the active area and the aligning mark by transmitting thelaser beam46, and theshielding pattern45bis for blocking thelaser beam46. After the photo-resist47 is developed as inFIG. 6B, the poly-silicon layer44 is dry-etched through the remaining pattern of the photo-resist47. After the dry-etch process, when the remaining patterns of the photo-resist47 are removed by a stripping process, the pattern of theactive layer14 and the aligningmark28 are formed on thesubstrate1, as illustrated inFIG. 3A.
FIG. 7 summarizes a process sequence from thebuffer layer16 to theactive layer14 and the aligningmark28. The process sequence includes the following steps in order: a deposition process of the buffer layer16 (step S11), a deposition process of the amorphous silicon layer43 (step S12), a dehydrogenation process (step S13), a laser crystallization process (step S14), a photolithography process for defining theactive layer14 and the aligningmark28, which includes a photo-resist spreading process, an exposure process and a development process (step S15), an etching process of the poly-silicon layer44 (step S16), and removing process of the photo-resist (step S17).
Referring toFIG. 3B, an insulating material such as SiO2or SiNxis deposited on the entire surface of thebuffer layer16 on which theactive layer14 and the aligningmark28 have been formed, thereby forming agate insulating film12. A gate metal layer such as aluminum and aluminum/neodymium is deposited on the entire surface of thelower substrate1 where thegate insulating film12 has been formed. The mask for defining the gate metal patterns is aligned on the gate metal layer. And, the gate metal layer is patterned by performing another photolithography process including a spreading process, an exposure process and a development process of a photo-resist, an etching process and a removing process of the photo-resist. As a result, agate electrode6 of the poly-silicon TFT, agate line2 and a gate pad (not shown) are formed on thegate insulating film12.
When thegate electrode6 is formed in this way, n− ions are injected into theactive layer14 using thegate electrode6 as a mask. Then, theLDD area14L is formed at both sides of theactive layer14C of pure poly-silicon that overlaps thegate electrode6.
Referring toFIG. 3C, a photo-resist (not shown) is spread on the entire surface of thelower substrate1 where the gate metal patterns have been formed. A mask is aligned on the photo-resist to define asource area14S and adrain area14D of theactive layer14. The photo-resist patterns are formed on thelower substrate1 by an exposure and development process, with the photo-resist patterns exposing thesource area14S and thedrain area14D of theactive layer14. n+ ions are then injected into thesource area14S and thedrain area14D of theactive layer14 with the photo-resist patterns.
Referring toFIG. 3D, an insulating material such as SiO2or SiNxis deposited on the entire surface of thegate insulating film12, thereby forming aninterlayer insulating film26 on thegate insulating film12. A photo-resist (not shown) is spread on the entire surface of theinterlayer insulating film26. And, a mask is aligned on the photo-resist to define asource contact hole24S and adrain contact hole24D. The photo-resist patterns are formed on theinterlayer insulating film26 through an exposure and development process. Theinterlayer insulating film26 and thegate insulating film12 are etched with the photo-resist patterns. As a result, thesource contact hole24S and thedrain contact hole24D that run through theinterlayer insulating film26 and thegate insulating film12 are formed, with thesource area14S and thedrain area14D of theactive layer14 being exposed.
Referring toFIGS. 3E and 3F, a metal layer is deposited on the entire surface of theinterlayer insulating film26 where thesource contact hole24S and thedrain contact hole24D have been formed. A photo-resist (not shown) is spread on the entire surface of the metal layer. And, a mask is aligned on the photo-resist to define asource electrode8 and adrain electrode10. The photo-resist patterns are formed on the metal layer by an exposure and development process. The metal layer is etched with the photo-resist patterns, and the photo-resist patterns are removed. As a result, thesource electrode8 and drainelectrode4 are formed on thelower substrate1, along with adata line4 and data pads (not shown) at the same time. Thesource electrode8 is connected to thesource area14S of theactive layer14 through thesource contact hole24S. Thedrain electrode10 is connected to thedrain area14D of theactive layer14 through thedrain contact hole24D. An inorganic or organic insulating material is formed on the entire surface of theinterlayer insulating film26 where thesource electrode8 and thedrain electrode10 have been formed in this way, thereby forming aprotective film18. A photo-resist (not shown) is spread on the entire surface of theprotective film18. And, a mask is aligned on the photo-resist to define apixel contact hole20. The photo-resist patterns are formed on theprotective film18 through an exposure and development process. Theprotective film18 is etched with the photo-resist patterns. As a result, thepixel contact hole20 that runs through theprotective film18 is formed, with part of thedrain electrode10 being exposed.
A transparent conductive material, for example, ITO is deposited on the entire surface of the protective film where thepixel contact hole20 has been formed. A photo-resist (not shown) is spread on the entire surface of the transparent conductive material layer. And, a mask is aligned on the photo-resist to define the pixel electrode22 (SeeFIG. 2). The photo-resist patterns are formed on the transparent conductive material layer by an exposure and development process. The transparent conductive material layer is etched with the photo-resist patterns. As a result, thepixel electrode22 connected to thedrain electrode10 through thepixel contact hole20 is formed, as illustrated inFIGS. 1 and 2.
However, the fabricating method of the poly-silicon TFT of the related art, as described above, is disadvantageous in that it requires a large number of processes and a long time, and that materials such as photo-resist are wasted. Also, due to such problems, the production cost is high.
SUMMARY OF THE INVENTIONAccordingly, the present invention is directed to a liquid crystal display device and a fabricating method thereof that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An advantage of the present invention is to provide a liquid crystal display device and a fabricating method thereof that reduce the number of processes and production cost.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, a liquid crystal display device may, for example, include a poly-silicon pattern that is patterned by a concurrent etching process of amorphous silicon and poly-silicon; and a display area where the poly-silicon pattern is formed.
The poly-silicon pattern is an active layer included in each of a plurality of thin film transistors that are formed in the display area.
The liquid crystal display device further includes a second poly-silicon pattern formed on a non-display area of the liquid crystal display device.
The second poly-silicon pattern is an aligning mark.
In another aspect of the present invention, a method of fabricating a liquid crystal display device may, for example, include forming an amorphous silicon on a substrate; forming a poly-silicon pattern by partially crystallizing the amorphous silicon; and etching the amorphous silicon and the poly-silicon pattern at the same time to remove the amorphous silicon and leave the poly-silicon pattern on the substrate.
In the fabricating method, the poly-silicon pattern is an active layer included in each of a plurality of thin film transistors.
In the fabricating method, the poly-silicon pattern is an aligning mark.
In still another aspect of the present invention, a method of fabricating a liquid crystal display device may, for example, include forming a buffer layer on a substrate; forming an amorphous silicon on the buffer layer; forming a poly-silicon pattern by partially irradiating a laser beam on the amorphous silicon and inducing the growth of crystal from the side surface of an area on which the laser beam is irradiated; and etching the amorphous silicon and the poly-silicon at the same time to remove the amorphous silicon and leave the poly-silicon pattern on the substrate.
In the fabricating method, the poly-silicon pattern is an active layer included in each of a plurality of thin film transistors.
In the fabricating method, the poly-silicon pattern is an aligning mark.
The fabricating method further includes the steps of: forming a gate insulating film on the buffer layer to cover the poly-silicon pattern; forming a gate electrode of the thin film transistor that partially overlaps with the poly-silicon pattern by forming a gate metal layer on the gate insulating film and patterning the gate metal layer; forming a doping area on the poly-silicon pattern by injecting impurities at a low concentration into the poly-silicon pattern other than the part thereof that overlaps with the gate electrode by using the gate electrode as a mask; forming a source area and a drain area on the poly-silicon pattern by injecting impurities at a high concentration into part of the doping area; forming a interlayer insulating film on the gate insulating film to cover the gate electrode and forming a first contact hole that runs through the interlayer insulating film and the gate insulating film to expose the source area and the drain area; forming a source electrode of the thin film transistor connected to the source area and a drain electrode of the thin film transistor connected to the drain area; forming a protective film on the interlayer insulating film to cover the source electrode and the drain electrode; and forming a second contact hole on the protective film to expose the drain electrode and forming a pixel electrode connected to the drain electrode.
In yet another aspect of the present invention, a method of fabricating a liquid crystal display device having a plurality of thin film transistors may, for example, include forming an amorphous silicon layer on a substrate; partially crystallizing the amorphous silicon layer using a laser annealing method, wherein the partially crystallized silicon layer has a poly-silicon region and an amorphous silicon region; and etching the partially crystallized silicon layer to remove the amorphous silicon region and leave the poly-silicon region on the substrate without using a photo-resist pattern.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.
BRIEF DESCRIPTION OF THE DRAWINGSThe accompanying drawings, which are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification, illustrate embodiments of the invention and together with the description serve to explain the principles of the invention.
In the drawings:
FIG. 1 is a plan view illustrating an aligning mark and a cell of a related art liquid crystal display device;
FIG. 2 is a sectional view illustrating the sectional structure of the liquid crystal display device, taken along the lines ‘I-I’ and ‘II-II’ ofFIG. 1;
FIGS. 3A to 3F are sectional views illustrating a fabricating process of the liquid crystal display device shown inFIG. 1;
FIGS. 4A and 4B are sectional views illustrating a method of forming a poly-silicon pattern shown inFIG. 3A by a sequential lateral solidification (SLS) method;
FIGS. 5A and 5B are plan views illustrating the arrangement of the amorphous silicon and the poly-silicon shown inFIGS. 4A and 4B, respectively;
FIGS. 6A and 6B are sectional views illustrating a photolithography process that defines an active layer pattern and an aligning mark with the poly-silicon layer in a fabricating method of the liquid crystal display device of the related art;
FIG. 7 is a flow chart illustrating a fabricating method of the related art liquid crystal display device;
FIG. 8 is a schematic view illustrating a transmitting pattern (or slit) formed in a mask according to an embodiment of the present invention;
FIGS. 9A and 9B are plan views illustrating a poly-silicon portion formed by a sequential lateral solidification (SLS) method;
FIG. 10 is a flow chart illustrating a fabricating method of a liquid crystal display device according to an embodiment of the present invention;
FIG. 11 is a plan view illustrating an aligning mark pattern and an active layer pattern formed in the liquid crystal display device according to the embodiment of the present invention; and
FIGS. 12A to 12K are sectional views illustrating the fabricating method of the liquid crystal display device according to the embodiment of the present invention.
DETAILED DESCRIPTION OF THE ILLUSTRATED EMBODIMENTSReference will now be made in detail to an embodiment of the present invention, example of which is illustrated in the accompanying drawings. With reference toFIGS. 8 to 12K, an embodiment of the present invention will be explained.
Referring toFIG. 8, amask141 according to an embodiment of the present invention has transmittingpatterns141afor transmitting a laser beam and shieldingpatterns141bfor blocking the laser beam. The transmittingpatterns141aare divided into a first shot domain SD1 and a second shot domain SD2 for defining areas corresponding to an active layer and an aligning mark of a LCD device. The width of each of the transmittingpatterns141ais equal to or less than twice the length of grains grown by seeds that usually form near solid state silicon.
A SLS crystallization process with themask141 will be explained in detail. When a laser beam is irradiated on an amorphous silicon layer through the first shot domain SD1 and the second shot domain SD2, the amorphous silicon corresponding to the transmittingpatterns141aof the mask is melted. At this moment, the amorphous silicon exposed to the laser beam is almost completely melted, and crystallization starts from seeds near the side surface, which is the interface between the melted silicon and the solid silicon, as the temperature of the melted amorphous silicon becomes lower. Assuming that the width of the laser beam is ‘W’ for illustrating purposes, when any one of the mask or a substrate (not shown) moves by ½W in a horizontal direction, the laser beam is irradiated again through the mask on the portion of the amorphous silicon that corresponds to the transmitting patterns of the moved mask (the amorphous silicon that has not been irradiated by the first laser beam), and then the portion of the amorphous silicon transforms into poly-silicon, as the temperature of the irradiated amorphous silicon becomes lower.
FIG. 10 is a flow chart illustrating a fabricating method of a liquid crystal display device according to an embodiment of the present invention.
Referring toFIG. 10, a fabricating method of a liquid crystal display device according to an embodiment of the present invention includes depositing a buffer layer on a substrate and depositing an amorphous silicon layer on the buffer layer. (steps S1 and S2). Subsequently, a dehydrogenation process is performed to remove hydrogen contained in the amorphous silicon layer (step S3), and then a laser beam is irradiated twice through the mask ofFIG. 9 on the areas of the amorphous silicon layer corresponding to a pattern of an active layer and a pattern of an aligning mark to induce the crystallization of the amorphous silicon layer, thereby transforming the areas of the amorphous silicon layer corresponding to the pattern of the active layer and the pattern of the aligning mark into a poly-silicon layer. (step S4) Then, the fabricating method further includes etching the substrate that has both the poly-silicon layer and the amorphous silicon layer at the same time. (step S5) In the etching process of step S5, the poly-silicon has a low etching rate because of its dense structure, but the amorphous silicon has a high etching rate because of its loose structure. Due to this, the amorphous silicon is etched deeper and faster than the poly-silicon under the same etching condition. As a result, as the etching process progresses, only theactive layer114 and aligningmark128 of poly-silicon remain on the substrate as inFIG. 11.
As explained in an earlier section, the related art LCD device requires a photolithography process (step S15) including a photo-resist spreading process, an exposure and development process, and a photo-resist removing process (step S17) in order to define the aligning mark and the active layer of the active area. Compared with this, the fabricating method of the liquid crystal display device according to the embodiment of the present invention can form theactive layer114 and the aligningmark128 only with the selective laser crystallization process (step S4) and etching process (step S5) by taking advantage of the etching rate difference between the poly-silicon layer144 and theamorphous silicon layer143 under the same etching condition.
The fabricating method of the liquid crystal display device in accordance with the principles of the present invention will be described in more detail in conjunction withFIGS. 12A to 12K.
Referring toFIG. 12A, a fabricating method of a liquid crystal display device according to an embodiment of the present invention forms abuffer film116 by depositing an insulating material such as SiO2or SiNxon the entire surface of alower substrate101. Then, anamorphous silicon layer143 is deposited on the entire surface of thebuffer film116. Subsequently, a dehydrogenation process is performed to remove hydrogen contained in the amorphous silicon in which the amorphous silicon layer is heated at about 400° C. After the dehydrogenation process, a laser annealing using a SLS method is performed to transform the amorphous silicon layer into a poly-silicon layer.
As explained in an earlier section with regards to the SLS crystallization process, the following processes are performed to complete the laser annealing using a SLS method according to an embodiment of the present invention. Referring toFIG. 12B, amask141 is aligned on theamorphous silicon layer143 for crystallization. Themask141 has a transmittingpattern141aand ashielding pattern141b, wherein the transmitting pattern transmits alaser beam142 and the shielding pattern141B blocks thelaser beam142. Thelaser beam142 is irradiated successively two times on theamorphous silicon layer143 through themask141. Referring toFIGS. 12B and 12C, when irradiating a first laser beam, thelaser beam142 is irradiated on theamorphous silicon layer143 through a first shot domain SD1 and a second shot domain SD2, thereby melting theamorphous silicon layer143 of the areas corresponding to the transmittingpattern141a. At this moment, theamorphous silicon layer143 on which thelaser beam142 is irradiated is melted down to reach the interface that is in contact with thebuffer film116. Theamorphous silicon layer143 melted in this way becomes crystallized as its temperature becomes lower. At this moment, crystallization is induced from seeds that exist at the side surface that is in contact with the adjacentamorphous silicon layer143, which is in a solid state, and the grains grows vertically from the seeds near the side surface, as shown inFIG. 9A. In this way, theamorphous silicon layer143 irradiated with the first laser beam transforms into a poly-silicon layer144, which subsequently becomes part of an aligning mark and an active layer.
Subsequently, assuming that the width of thelaser beam142 is ‘W’ for illustrating purposes, when any one of themask141 or alower substrate101 moves by ½W in a horizontal direction, the laser beam (second laser beam) is irradiated on theamorphous silicon143 through the first shot domain SD1 and second shot domain SD2 of themask141. For this operation, thelower substrate101 may be installed on an X-Y stage (not shown) so that its transfer can be made in both axial directions of X axis and Y axis, and themask142 is installed at an X-Y robot (not shown) for moving themask142. With this two times of the laser irradiation, only the amorphous silicon corresponding to the areas of the active layer and the aligning mark are transformed into poly-silicon, as illustrated inFIG. 9B.
Referring toFIG. 12D, after the laser annealing process, an etching process (dry or wet etching) is performed on the substrate having the poly-silicon layer144 and theamorphous silicon layer143 distributed in the same layer to define the active layer and the aligning mark without a photo-resist pattern. Theamorphous silicon layer143 is etched much faster than the poly-silicon layer144 in the etching process. This is because the poly-silicon has a low etching rate due to its dense structure, and the amorphous silicon has a high etching rate due to its loose structure. Accordingly, theamorphous silicon layer143 is etched deeper and faster under the same etching condition than the poly-silicon layer144. As a result, as the etching process progresses, only theactive layer114 and the aligningmark128 of the poly-silicon layer144 are left on the substrate.
Although the pattern of theactive layer114 of poly-silicon has a rectangular shape inFIG. 11, it should be understood that the pattern of the active layer is not limited to such a pattern shape, and that it can be formed to have various shapes such as ‘L’, ‘C’ or ‘S’. In the same manner, although the pattern of the aligningmark128 of poly-silicon has a ‘+’ shape inFIG. 11, it should be understood that the pattern of the aligning mark is not limited to such a pattern shape, and that it can be formed to have various shapes such as a circle or quadrangle. The shapes of these patterns can be modified by changing the shape of the transmittingpattern141 in themask141.
Referring toFIG. 12F, the fabricating method of the liquid crystal display device according to the embodiment of the present invention forms agate insulating film112 on thebuffer layer116 by depositing an insulating material such as SiO2or SiNxon the entire surface of thebuffer layer116, wherein the insulating material covers theactive layer114 and the aligningmark128. A gate metal layer such as aluminum and aluminum/neodymium is deposited on the entire surface of thelower substrate101 where thegate insulating film112 has been formed. A photolithography process with a mask is performed to form gate metal patterns, which includes a spreading process a photo-resist, an exposure and development process, an etching process and a removing process of the photo-resist. As a result, agate electrode106 of a poly-silicon TFT, a gate line and a gate pad (not shown) are formed on thegate insulating film112.
When thegate electrode106 is formed in this way, n− ions are injected into theactive layer114 using thegate electrode106 as a mask. Herein, n− ions are impurities such as phosphorus (P) or arsenic (As), and their concentration is in a range of 1012˜1013/cm2, which is relatively low. Then, anLDD area114L is formed at both sides of theactive layer114C of pure poly-silicon that overlaps thegate electrode106.
Referring toFIG. 12G, a photo-resist is spread on the entire surface of thelower substrate101 where the gate metal patterns have been formed. A mask is aligned on the photo-resist to define asource area114S and adrain area114D of theactive layer114. The photo-resist patterns are formed on thelower substrate101 by an exposure and development process, with the photo-resist patterns exposing thesource area114S and thedrain area114D. n+ ions are then injected into thesource area114S and thedrain area114D of theactive layer114 with the photo-resist patterns. Herein, n+ ions are impurities such as phosphorus (P) or arsenic (As), and their concentration is 1˜2×1015/cm2, which is relatively high.
Referring toFIG. 12H, aninterlayer insulating film126 is formed on thegate insulating film112 by depositing an insulating material such as SiO2or SiNxon the entire surface of thegate insulating film112, wherein the insulating material covers the gate metal patterns including thegate electrode106. A photo-resist (not shown) is spread on the entire surface of theinterlayer insulating film126. And, a mask is aligned on the photo-resist to define to define asource contact hole124S and adrain contact hole124D, and forms photo-resist patterns on theinterlayer insulating film126 through an exposure and development process, with the photo-resist pattern exposing the area of thesource contact hole124S and the area of thedrain contact hole124D. Then, theinterlayer insulating film126 and thegate insulating film112 are etched to expose thesource area114S and thedrain area114D of theactive layer114.
Referring toFIG. 12I, a metal layer is deposited on the entire surface of theinterlayer insulating film126 where thesource contact hole124S and thedrain contact hole124D have been formed. Subsequently, a photo-resist (not shown) is spread on the entire surface of the metal layer. And, a mask is aligned on the photo-resist to define asource electrode108 and adrain electrode110. The photo-resist patterns are formed on the metal layer by an exposure and development process. The metal layer is etched with the photo-resist patterns, and the photo-resist patterns are removed. As a result, thesource electrode108 anddrain electrode110 are formed on thelower substrate101, along with data lines and data pads (not shown) at the same time. Thesource electrode108 is connected to thesource area114S of theactive layer114 through thesource contact hole124S. Thedrain electrode110 is connected to thedrain area114D of theactive layer114 through thedrain contact hole124D. Next, an inorganic or organic insulating material is formed on the entire surface of theinterlayer insulating film126 to form aprotective film118, wherein the insulating material covers thesource electrode108 and thedrain electrode110. A photo-resist (not shown) is spread on the entire surface of theprotective film118. And, a mask is aligned on the photo-resist to define apixel contact hole120. The photo-resist patterns are formed on theprotective film118 through an exposure and development process. Theprotective film118 is etched with the photo-resist patterns. As a result, thepixel contact hole120 that runs through theprotective film118 is formed, with part of thedrain electrode110 being exposed, as illustrated inFIG. 12J.
Next, a transparent conductive material, for example, ITO is deposited on the entire surface of theprotective film118 where thepixel contact hole120 has been formed. A photo-resist (not shown) is spread on the entire surface of the transparent conductive material layer. And, a mask is aligned on the photo-resist to define thepixel electrode122. The photo-resist patterns are formed on the transparent conductive material layer by an exposure and development process. The transparent conductive material layer is etched with the photo-resist patterns. As a result, thepixel electrode122 connected to thedrain electrode110 through thepixel contact hole120 is formed, as illustrated inFIG. 12K.
As described above, the liquid crystal display device and the fabricating method thereof according to the present invention performs a laser annealing using a SLS method only on the portion of the amorphous silicon layer corresponding to the active pattern area and the aligning mark area of the LCD device, thereby transforming amorphous silicon into poly-silicon, and performs an etching in which the poly-silicon region and the amorphous silicon region in the silicon layer are subject to the same etching condition at the same time. As a result, the liquid crystal display device and the fabricating method thereof according to the present invention can form the active pattern and the aligning mark pattern by the etching process without a mask or a photo-resist by taking advantage of the etching rate difference between poly-silicon and amorphous silicon.
It will be apparent to those skilled in the art that various modifications and variation can be made in the present invention without departing from the spirit or scope of the invention. Thus, it is intended that the present invention cover the modifications and variations of this invention provided they come within the scope of the appended claims and their equivalents.