US7123666B2 - Gaussian minimum shift key transmitter with feedforward phase compensation - Google Patents

Abstract

A method and apparatus for generating a burst FSK signal having precisely shaped transitions between modulation states. The apparatus uses feedforward compensation of phase gain and phase preemphasis coefficients for compensating the frequency conversion gain of the apparatus, and the phase gain coefficient is used for stabilizing a frequency synthesis loop. The phase gain and preemphasis coefficients are determined in a calibration within the time constraints of on-line signal bursts based upon measured phase errors and accelerated predicted phase gain and preemphasis phase errors.

Description

BACKGROUND OF THE INVENTION

1. Fields of the Invention

The invention relates generally to frequency shift key (FSK) signal generators and more particularly to an FSK generator having high speed automatic calibration loops for determining phase gain and phase preemphasis correction coefficients and then using feedforward compensation for providing precisely shaped frequency transitions between modulation states in a burst mode modulated signal. The invention also relates particularly to a frequency hopping signal generator using phase gain coefficients for is stabilizing loop gain of a frequency synthesis loop. The invention also relates particularly to an apparatus and a method for dynamic measurement of phase error of a modulated signal.

2. Description of the Prior Art

Minimum frequency shift key (MSK) modulation is commonly used in modern communication systems. In order to meet regulations for spectrum management, existing systems use filters for softening the transitions between FSK modulation states. However, recent regulations for FSK signal systems such as the Global System for Mobile Communications (GSM) system are so strict that the transitions between states are required to follow near Gaussian paths in order to meet spectrum requirements. Signals for such systems are sometimes known as Gaussian MSK (GMSK) signals. Unfortunately, the filters for providing GMSK signals are difficult to produce and expensive. Workers in the art have proposed eliminating such filters by using correction circuitry for shaping the modulation frequency or phase during the transitions. Unfortunately, the methods developed heretofore are not suitable for practical application in a burst mode.

SUMMARY OF THE INVENTION

It is therefore an object of the present invention to provide methods and apparatus having high speed automatic calibration loops and feedforward compensation of phase gain and phase preemphasis coefficients for providing precisely shaped frequency transitions between modulation states in a burst mode modulated signal.

Briefly, in a preferred embodiment, a transmitter of the present invention includes a Gaussian shaper, a frequency synthesizer, a feedforward converter, a phase gain compensator, a phase preemphasis compensator, a phase quantizer, and a switched loop phase detector. The Gaussian shaper shapes binary input data for providing a digital Gaussian shaped input data signal. The frequency synthesizer uses the shaped input data signal and divide numbers in a frequency synthesis loop for generating a radio frequency (RF) modulated output signal at hopping carrier frequencies in bursts. The synthesis loop includes a voltage controlled oscillator (VCO). Inside the bandwidth of the synthesis loop, the modulation is controlled by the synthesis loop. Outside the bandwidth of the synthesis loop, the modulation is controlled by a feedforward signal that couples into the input of the VCO. The feedforward converter provides the feedforward signal by scaling the input data signal with phase gain coefficients corresponding to carrier frequencies and preemphasizing the input data signal with a phase preemphasis coefficient. The coefficients are determined in an initial calibration mode and then re-determined within calibration burst time slots between on-line signal bursts during high speed on-line burst signal communication. The phase gain coefficients are also used in a loop normalizer in the frequency synthesizer for stabilizing the loop gain of the frequency synthesis loop.

For calibration, the input data signal is a fixed input data signal and then a shaped sequential input data signal. The phase quantizer provides a quantized phase signal for the phase of the RF modulated signal. The switched loop phase detector includes a phase measurement loop for finding a phase calibration that minimizes a phase difference between the quantized phase signal and a fixed input phase signal that is determined from the fixed input data signal. This phase calibration eliminates an unknown erroneous phase offset. Then, the phase measurement loop is opened and the switched loop phase detector uses the phase calibration for calibrating phase of a sequential input phase signal for the sequential input data signal. The calibrated sequential input phase signal is compared to the quantized phase signal for determining measured phase errors.

The phase gain compensator includes a phase gain error predictor, a gain loop accelerator, a phase gain correlator and a gain accumulator. Predicted phase gain errors are determined from the sequential input data signal by the phase gain error predictor and the gain loop accelerator. With the phase measurement loop open, the phase gain correlator and the gain accumulator act within a gain calibration loop for correlating the predicted phase gain errors with the measured phase errors. The gain calibration loop uses feedback through the feedforward converter, the frequency synthesizer, the phase quantizer and the switched loop phase detector for determining the phase gain coefficients for carrier frequencies, respectively, that minimize the phase gain error correlations. Similarly, the phase preemphasis compensator includes a phase preemphasis error predictor, a preemphasis loop accelerator, a phase preemphasis correlator and a preemphasis accumulator. Predicted phase preemphasis errors are determined from the sequential input data signal by the phase gain error predictor and the gain loop accelerator. With the phase measurement loop open, the phase preemphasis correlator and the preemphasis accumulator act within a preemphasis calibration loop for correlating the predicted phase preemphasis errors with the measured phase errors. The preemphasis calibration loop uses feedback through the feedforward converter, the frequency synthesizer, the phase quantizer and the switched loop phase detector for determining the phase preemphasis coefficient that minimizes the phase preemphasis error correlations.

For operation, the input data signal is a shaped burst on-line input data signal. The feedforward converter and the frequency synthesizer use the on-line input data signal, the phase gain coefficients and the phase preemphasis coefficients for providing the burst modulated output signal.

In order to reduce (improve) the time for burst calibration, the switched loop phase detector uses a closed phase measurement loop for eliminating an arbitrary phase offset, then opens the phase measurement loop for providing dynamic phase measurement errors. The phase measurement errors are compared to predicted phase gain and preemphasis errors in fast response gain calibration and preemphasis calibration loops, respectively, using feedforward compensation for determining the phase gain and phase preemphasis coefficients. For operation, the phase measurement, and gain and preemphasis calibration loops open.

In order to further reduce time for burst calibration, the gain and preemphasis loop accelerators use predetermined acceleration coefficients based upon the known characteristics of a pseudorandom binary sequence (PRBS) input data signal for weighting predicted estimates of phase gain and phase preemphasis errors in order to provide the predicted phase gain and preemphasis errors.

In order to reduce time for hopping between carrier frequencies, the loop normalizer uses the phase gain coefficients to normalize a frequency dependent loop gain of the frequency synthesis loop.

An advantage of the present invention is that modulation in an output signal is precisely calibrated within the time constraints of the burst time slots of a burst mode signal system.

These and other objects and advantages of the present invention will no doubt become obvious to those of ordinary skill in the art after having read the following detailed description of the preferred embodiments which are illustrated in the various figures.

IN THE DRAWINGS

FIG. 1 is a block diagram of a Gaussian minimum frequency shift key (GMSK) transmitter of the present invention;

FIG. 2 is a block diagram of a frequency synthesizer of the transmitter ofFIG. 1;

FIG. 3 is a block diagram of a feedforward converter of the transmitter ofFIG. 1;

FIG. 4 is a block diagram of a phase gain compensator of the transmitter ofFIG. 1;

FIG. 5 is block diagram of a phase preemphasis compensator of the transmitter ofFIG. 1;

FIG. 6 is a block diagram of a phase quantizer of the transmitter ofFIG. 1;

FIG. 6A is an alternative embodiment phase quantizer of the transmitter ofFIG. 1;

FIG. 6B is a signal diagram of a quantized phase signal for the phase quantizer ofFIG. 6;

FIG. 6C is a signal diagram of a quantized phase signal for the alternative phase quantizer ofFIG. 6A;

FIG. 7 is a block diagram of a switched loop phase detector of the transmitter ofFIG. 1;

FIG. 7A is a block diagram of a phase wrapper of the switched loop phase detector ofFIG. 7;

FIG. 8 is a signal diagram showing starting and calibrated input phase signals with respect to a quantized phase signal for the switched loop phase detector ofFIG. 7;

FIG. 9 a flow chart of a calibration method for the transmitter ofFIG. 1;

FIGS. 10A and 10B are block diagrams showing gain and preemphasis calibration loops for determining phase gain and preemphasis coefficients, respectively, for the transmitter ofFIG. 1;

FIG. 11A is a chart of the phase gain coefficients ofFIG. 10A versus carrier frequency for the transmitter ofFIG. 1; and

FIG. 11B is a chart showing phase gain and preemphasis coefficients ofFIGS. 10A and 10B versus modulating frequency for the transmitter ofFIG. 1.

DETAILED DESCRIPTION OF THE PREFERRED EMBODIMENTS

FIG. 1 is a block diagram of a Gaussian minimum shift key (GMSK) signal generator or transmitter referred to by thegeneral reference number10 for providing a radio frequency (RF) GMSK frequency modulated output signal. TheGMSK transmitter10 is described herein as adapted for the Global System for Mobile Communications (GSM). However, the idea of theGMSK transmitter10 of the present invention can be applied to other systems where the accuracies of the modulation states and the paths of the transitions between the modulation states is important. GSM is also known as Groupe Speciale Mobile.

TheGMSK transmitter10 includes a Gaussianinput data shaper12, aninput mode switch14, anoutput mode switch16, afrequency synthesizer20, aphase coefficient memory22, afeedforward converter30, aphase gain compensator40, aphase preemphasis compensator50, aphase quantizer60, and a switchedloop phase detector70. TheGMSK transmitter10 has two modes: a calibration mode where compensation coefficients are determined and an on-line operation mode where the compensation coefficients are used to improve the precision of the modulation for transmitting communication data. An initial or full calibration is used when theGMSK transmitter10 is turned on or by request from system software, and a burst calibration is used during designated burst time slots interspersed with the burst time slots of on-line operation. For a calibration (initial or burst) themode switch14 first selects a fixed level, preferably 0, and then a pseudorandom binary sequence (PRBS). For on-line operation, themode switch14 selects on-line binary data to be transmitted. Themode switch14 passes the selection to theGaussian shaper12.

TheGaussian shaper12 uses a finite impulse response (FIR) filter for shaping the binary data from themode switch14 into a multilevel digital input data signal, denoted as Ydata, having Gaussian shaped transitions between binary data states. In the calibration mode the Ydata input data signal is a calibration input data signal having fixed and then shaped sequential values for providing a calibration modulated output signal having fixed and then sequential frequency modulation. In the operation mode the Ydata input data signal is shaped on-data for providing an on-line modulated output signal having on-line frequency modulation. In a preferred embodiment the Ydata input data signal has nineteen bits. Digital data and calibration signals in the present invention have a sufficient number of bits to enable the RF modulated output signal to have a fractional spacing of less than one Hertz and a root mean square (RMS) phase error of less than about one degree.

The Gaussian shaped Ydata drives thefrequency synthesizer20, thefeedforward converter30, thephase gain compensator40, thepreemphasis gain compensator50, and the switchedloop phase detector70. Thefrequency synthesizer20 uses a reference clock signal, the Ydata, a feedforward signal FFS, and a divide number N comprised of an integer number and a fraction for providing the GMSK RF output signal. The fraction of the divide number N is an irrational number.

Thephase coefficient memory22 stores phase gain coefficients, denoted by γ, for a calibration list of divide numbers N, respectively, and stores a phase preemphasis coefficient, denoted by ζ, that are determined in the calibration mode. During on-line operation, theoutput mode switch16 passes the stored phase gain coefficient γ for the divide number N currently in use, to thefrequency synthesizer20 and thefeedforward converter30, and passed the stored phase preemphasis coefficient ζ to thefeedforward converter30. Interpolation between values of the divide number N may be used for providing the phase gain coefficient γ when the divide number N currently in use is between two divide numbers N in the calibration list of the divide numbers N. Thefeedforward converter30 scales the Ydata according to the stored phase gain coefficient γ and preemphasizes the Ydata according to the stored phase preemphasis coefficient ζ and then provides the scaled and preemphasized Ydata as the feedforward signal FFS.

For calibration, theoutput mode switch16 passes an output from thephase gain compensator40 to thefeedforward converter30 until a phase gain calibration loop82 (FIG. 10A) drives the output to converge to the correct phase gain coefficient γ for the divide number N currently in use. Theoutput mode switch16 also passes an output from thephase preemphasis compensator50 to thefeedforward converter30 until a phase preemphasis calibration loop84 (FIG. 10B) drives the output to converge to the correct phase preemphasis coefficient ζ.

Thephase gain compensator40 generates the phase gain coefficients γ from the Ydata and measured phase error φ_eand thephase preemphasis compensator50 generates the phase preemphasis coefficient ζ from the Ydata and the measured phase errors φ_e. The phase gain coefficients γ are also used for stabilizing (normalizing) the loop gain of a frequency synthesis phase lock loop86 (FIG. 2) in thefrequency synthesizer20 for on-line operation and burst calibration modes.

Thephase quantizer60 quantizes the phase of the GMSK RF signal for providing quantized phases φ_qin a quantized phase signal. The switchedloop phase detector70 integrates the Ydata for providing a calibrated input phase signal and then compares the phases in the calibrated input phase signal to the quantized phases φ_qfor providing the measured phase errors φ_eused by thephase gain compensator40 and thephase preemphasis compensator50.

The term “frequency conversion gain” refers to a ratio of the frequency modulation deviation Δfo of the modulated output signal to the desired frequency deviation Δf_inrepresented by the value of the Ydata input data signal. The term “phase gain” refers to a ratio of the phase deviation of the modulated output signal to the desired input phase deviation derived by integrating the value of the Ydata input data signal. The term “phase preemphasis” refers to an increase in phase gain in response to an increase in modulating frequency f_m. The phase gain error and the phase preemphasis error refer to the difference between the actual and the desired phase gain and phase preemphasis, respectively. It should be noted that a voltage controlled oscillator (VCO)104 in thefrequency synthesizer20 also has a frequency dependent frequency conversion gain for the ratio the frequency modulation deviation Δfo to a change in level of the input drive signal to theVCO104.

FIG. 2 is a block diagram of thefrequency synthesizer20. Thefrequency synthesizer20 uses thefrequency synthesis loop86 for providing the RF GMSK modulated output signal. Theloop86 includes theVCO104, afractional divider106, aphase comparator108, aloop normalizer112, aloop filter114, and afeedforward summer116. TheVCO104 issues the GMSK RF signal. In a preferred embodiment the RF output frequency hops in steps of about 13 megahertz within ranges from about 3296 megahertz to about 3396 megahertz, about 3420 megahertz to about 3570 megahertz, about 3504 megahertz to about 3660 megahertz, and about 3700 megahertz to about 3820 megahertz. More than one physical VCO may be switched in and out of thefrequency synthesizer20 in order to cover the ranges. In addition, the RF output signal is burst on and off in time slots of about five hundred seventy microseconds.

Thefractional divider106 frequency divides the GMSK RF signal by a divide number derived from the Ydata and the divide number N for providing a frequency divided signal. In conceptual terms the sum of the divide number N sets the carrier frequency of the GMSK RF signal, and the Ydata modulates the frequency of the GMSK RF signal for modulating frequencies f_mthat are inside a synthesis bandwidth BW₁(FIG. 11B) of theloop86. The frequency divided signal from thefractional divider106 is issued to thephase comparator108. Thephase comparator108 provides a loop error signal by comparing the phase of the frequency divided signal to the phase of the reference clock signal. Preferably, the reference clock signal has a frequency of about twenty-six megahertz.

Theloop normalizer112 amplifies the loop error signal by the phase gain coefficient γ for the current divide number N either before or after theloop filter114 in order to adjust the gain of thesynthesis loop86 to compensate for variations in voltage to frequency conversion gain of theVCO104 at different output frequencies. The effect of the adjustment is to normalize the loop gain of thesynthesis loop86 to the same preselected gain across the range of VCO output frequencies. After adjustment, the product of the gain of theloop normalizer112 and the frequency conversion gain of theVCO104 is held constant for all output frequencies. For the burst calibration and operation of the preferred embodiment, thephase lock loop86 must settle in less than about one-hundred seventy microseconds. Because the compensation adjustment holds the loop gain constant, the frequency response of theloop86 can be designed for a fast settling time without being unstable at some output frequency.

The γ multiplied signal is received by theloop filter114. Theloop filter114 applies frequency domain poles and/or zeroes to provide the desired settling time, and a frequency response for stabilizing thefrequency synthesis loop86. Theloop filter114 then passes the filtered signal to thefeedforward summer116. Thefeedforward summer116 adds the filtered signal with the feedforward signal FFS and provides the sum to theVCO104 to control the frequency of theVCO104 for the GMSK RF signal. The feedforward signal FFS controls the frequency of theVCO104 for modulating frequencies outside the bandwidth BW₁(FIG. 11B) of thesynthesis loop86.

FIG. 3 is a block diagram of thefeedforward converter30 for feedforward scaling the Ydata input data signal. Thefeedforward converter30 can be constructed as a two tap finite impulse response (FIR) filter where the phase gain coefficient γ and the phase preemphasis coefficient ζ are fed to the two taps. In a preferred embodiment, thefeedforward converter30 includes aphase scaler120 for gain scaling the Ydata input data signal and aphase preemphasizer121 for accentuating the higher frequencies of the Ydata input data signal. Thephase preemphasizer121 includes adelay122, first andsecond preemphasis multipliers124 and126, respectively, afirst summer128, and asecond summer132.

Thedelay122 delays the Ydata. Thefirst multiplier124 multiplies delayed Ydata by the phase preemphasis coefficient ζ for providing a first product. Thesummer128 adds a scaling constant C, preferably providing one sixteenth of full scale of the Ydata referred to the output of thesecond multiplier126, to the phase preemphasis coefficient ζ for providing an offset preemphasis coefficient. Thesecond multiplier126 multiplies the Ydata by the offset preemphasis coefficient for providing a second product. Thesecond summer132 takes a difference between the first and second products for providing a preemphasized signal. The combination of themultipliers124 and126 and thesummers128 and132 accentuates the Ydata at higher modulating frequencies f_mwithout effecting the lower modulating frequencies f_m. The phase scaling and the phase preemphasis scaling are independent of each other and thephase scaler120 and thephase preemphasizer121 may be disposed before or after the other. Thephase scaler120 receives the preemphasized signal through a delay, multiplies the delayed preemphasized signal by the phase gain coefficient γ, and issues a digital feedforward signal.

Thefeedforward converter30 also includes a digital-to-analog converter (DAC)142, and a low pass filter (LPF)144. TheDAC142 receives the digital feedforward signal through a delay and converts the delayed digital feedforward signal to an analog DAC output signal. TheLPF144 has a filter bandwidth BW₂(FIG. 11B) for low pass filtering the DAC output signal to remove noise that was generated by theDAC142 and provides the filtered signal as the feedforward signal FFS to thefrequency synthesizer20.

FIG. 4 is a block diagram of thephase gain compensator40 for determining phase gain coefficients γ during calibration of theGMSK transmitter10. The phase gain coefficients γ that are determined during calibration are stored in thephase coefficient memory22. Thephase gain compensator40 includes a phasegain error predictor154, again loop accelerator156 including again acceleration multiplier157 and again acceleration memory158, aphase gain correlator164, and again accumulator166. The phasegain error predictor154 maps the Ydata according to a precalculated prediction of phase conversion gain error (an integral of frequency conversion gain error) transfer function to a predicted phase gain error estimate for the GMSK RF signal. The precalculated prediction of the phase conversion gain error is based upon models and known average characteristics of the elements of theGMSK transmitter10 and especially theVCO104, or else measured during the design of theGMSK transmitter10.

The phasegain error predictor154 passes the predicted phase gain error estimate to thegain acceleration multiplier157. Thegain acceleration multiplier157 weights the digital information in the predicted phase gain error estimate according to precomputed gain loop acceleration coefficients stored in thegain acceleration memory158 to provide an accelerated predicted phase gain error estimate. The accelerated predicted phase gain error estimate is used for a predicted phase gain error, denoted as167. The predictedphase gain error167 is passed through a delay to thephase gain correlator164. Thecorrelator164 correlates the predictedphase gain error167 with the measured phase error φ_efrom the switchedloop phase detector70 for providing a phase gain error correlation, denoted as168, sometimes known as a gradient. During the calibration, the gain calibration loop82 (FIG. 10A) acts to find the phase gain coefficient γ to minimize thiscorrelation168, thereby determining the phase gain coefficient γ that correctly compensates the modulated GMSK signal for providing precise modulation.

The phasegain error correlation168 is integrated by theaccumulator166 and the integrated phase gain error correlation is issued as the phase gain coefficient γ to thephase coefficient memory22 for each of a calibration list of the divide numbers N. The phase gain coefficients γ are used to improve the accuracy of the frequency modulation Δfo. The phase gain coefficients γ are also used to stabilize the gain of thefrequency synthesis loop86 in thefrequency synthesizer20 to compensate for the variation in voltage to frequency conversion gain of theVCO104 for different output frequencies.

FIG. 5 is a block diagram of thephase preemphasis compensator50 for determining a phase preemphasis coefficient ζ during calibration of theGMSK transmitter10. The phase preemphasis coefficient ζ that is determined during calibration is stored in thephase coefficient memory22. Thephase preemphasis compensator50 includes the phase gain error predictor154 (preferably shared with the phase gain compensator40), a phasepreemphasis error predictor169, apreemphasis loop accelerator170 including apreemphasis acceleration multiplier171 and apreemphasis acceleration memory172, aphase preemphasis correlator176, and apreemphasis accumulator178. The phasegain error predictor154 maps the Ydata according to the predetermined phase gain error transfer function to a predicted phase gain error estimate for the GMSK RF signal as described above. The phasepreemphasis error predictor169 maps the predicted phase gain error estimate according to a precalculated prediction of the frequency response transfer function to a predicted phase preemphasis error estimate for the GMSK RF signal. The precalculated prediction of the phase preemphasis error estimate is based upon models and known average characteristics of the elements of theGMSK transmitter10 and especially thefilter144, or else measured during the design of theGMSK transmitter10.

The phasepreemphasis error predictor169 passes the predicted phase preemphasis error estimate to thepreemphasis acceleration multiplier171. Thepreemphasis acceleration multiplier171 weights the digital information in the predicted phase preemphasis error estimate according to precomputed preemphasis loop acceleration coefficients stored in thepreemphasis acceleration memory172 to provide an accelerated predicted phase preemphasis error estimate. The accelerated predicted phase gain error estimate is used for a predicted phase preemphasis error, denoted as179. The predictedphase preemphasis error179 is passed through a delay to thephase preemphasis correlator176. Thecorrelator176 correlates the predictedphase preemphasis error179 with the measured phase error φ_efrom the switchedloop phase detector70 for providing a phase preemphasis error correlation, denoted as180, sometimes known as a gradient. During the calibration, the preemphasis calibration loop84 (FIG. 10B) acts to find the phase preemphasis coefficient ζ to minimize thiscorrelation180. The phase preemphasis coefficient ζ compensates for the frequency response of theLPF144 that was used to filter the noise from theDAC142 in order to provide precisely shaped transitions between modulation states.

The gain loop acceleration coefficients and the preemphasis loop acceleration coefficients are Kalman filter coefficients that are pre-computed using a recursive least squares (RLS) algorithm and the input data for the pseudorandom binary sequence (PRBS) that is used for calibration in order to increase the speed at which the gain calibration loop82 (FIG. 10A) and preemphasis calibration loop84 (FIG. 10B) converge to the final phase gain and phase preemphasis coefficients γ and ζ. Such loop filter coefficients would be calculated on the fly from noisy unknown data but more time would be required. The pre-computation of the acceleration coefficients in the present invention is possible because the PRBS calibration sequence is essentially noiseless and is known in advance. For initial calibration the total time for the phase preemphasis coefficient ζ and the phase gain coefficient γ for a selected divide number N to converge is less than about one-hundred milliseconds. For a calibration list of fifty divide numbers N, the time for the fifty convergences is less than about 5 seconds. For burst calibration, because previous phase gain and preemphasis coefficients γ and ζ are known to start and only need to be fine-tuned, the time for determining the measured phase error φ_eand the coefficients γ and ζ is less than about four hundred microseconds, and the total time for burst calibration is less than about five-hundred seventy microseconds including one-hundred seventy microseconds for thesynthesis loop86 in thefrequency synthesizer20 to converge to a new carrier frequency.

FIG. 6 is a block diagram of thephase quantizer60. Thephase quantizer60 includes aK frequency divider182, a firstbinary divider184, a secondbinary divider185 including aninverter186, and agated combiner187. Thegated combiner187 includes an in-phase (I)gate188, a quadrature phase (Q)gate192, and aGray coder194. TheK frequency divider182 divides the frequency of the GMSK RF signal by K and passes an F_Ksignal to the first and secondbinary dividers184 and185. The divide number K is an integer number that is selected so that the frequency of the F_Ksignal is greater than 2 times the frequency of the reference clock. In order to ensure that all phase points of the RF output signal are sampled the difference between the frequency of the F_Ksignal and the reference signal is an irrational number.

The firstbinary divider184 divides the frequency of the F_Ksignal by two and issues an I signal to theI gate188. Theinverter186 inverts the F_Ksignal and then the secondbinary divider185 divides the inverted F_Ksignal by two and issues a Q signal to theQ gate192. The I and Q signals have a phase difference of 90° (quadrature). The first and secondbinary dividers184 and185 are implemented with dynamic (D) type flipflops with feedback from a Q output to a D input. It should also be noted that the “Q” notation that is conventionally used for an output of a D-type flipflop is not in any way related to the “Q” notation that is conventionally used to denote a quadrature phase relationship between I and Q signals.

TheI gate188 provides an I gated signal in one bit (two phase states) for a quantized phase φ_qdifference between the reference clock as a gating signal and the I signal. TheQ gate192 provides a Q gated signal in one bit (two phase states) for a quantized phase difference between the reference clock as a gating signal and the Q signal. The I andQ gates188 and192 are also implemented with D-type flipflops. The Gray coder194 combines the I and Q gated signals for providing a quantized phase signal (FIG. 6B) at a phase carrier frequency as a repeating staircase in two bits (four phase states) for the quantized phases φ_qof the GMSK RF signal.

FIG. 6A is a block diagram of an alternative embodiment of thephase quantizer60, where the alternative embodiment is referred to as aphase quantizer60A. The phase quantizer60A includes a2K frequency divider182A and agate187A. Thegate187A is implemented with a D type flipflop. The2K frequency divider182A divides the frequency of the GMSK RF signal by two times K and passes an F_2Ksignal to thegate187A. Thegate187A provides the quantized phase signal (FIG. 6C) at a phase carrier frequency in one bit (two phase states) for the phase difference between the reference clock as a gating signal and the F_2Ksignal. The two phases states represent the F_2Ksignal ahead or behind the reference clock signal. The quantized phase signal carries the quantized phases φ_qof the GMSK RF signal.

FIG. 6B shows the quantized phase signal versus continuous time for the quantized phases φ_qissued by thephase quantizer60 in four phase states Θ₁, Θ₂, Θ₃and Θ₄. The continuous time is equivalent to a continuously increasing (rotating) phase of the GMSK RF signal. Variations, denoted Δφ_q, in the times of the transitions between the phase states Θ₁, Θ₂, Θ₃and Θ₄are representative of phase modulation carried on the GMSK RF signal.

FIG. 6C shows the quantized phase signal versus continuous time for the quantized phases φ_qissued by thephase quantizer60A in two phase states Θ₁and Θ₂. The continuous time is equivalent to a continuously increasing (rotating) phase of the GMSK RF signal. Variations, denoted Δφ_q, in the times of the transitions between the phase states Θ₁and Θ₂are representative of phase modulation carried on the GMSK RF signal.

FIG. 7 is a block diagram of the switchedloop phase detector70 used for determining the measured phase error φ_efor calibration. The switchedloop phase detector70 includes anideal phase generator202, aphase hold comparator204, afeedback return206 and amode switch208. Theideal phase generator202 includes a frequency offsetsummer212, afeedback summer214, and an integratingphase wrapper216. The phase holdcomparator204 includes aphase comparator218 and a track/hold circuit222. Thefeedback summer214, thephase wrapper216 thephase hold comparator204, thefeedback return206, and themode switch208 make up aphase measurement loop224 constructed as a digital phase lock loop (DPLL).

The frequency offsetsummer212 adds a frequency offset to the Ydata input data signal for providing a frequency offset Ydata input data signal225. The frequency offset is a value that corresponds to the divide number N used by thefrequency synthesizer20 for setting the frequency of the GMSK RF signal minus two times the divide number K used in the phase quantizer60 (or four times K for thephase quantizer60A). It should be noted that the level of the frequency offset corresponds to the phase carrier frequency for the quantized phase signal.

To start calibration, the mode switch14 (FIG. 1) passes the fixed data to theGaussian shaper12. TheGaussian shaper12 provides a corresponding fixed input data signal for the Ydata. Themode switch208 closes theloop224 and thefeedback summer214 subtracts the feedback from themode switch208 from the frequency offset Ydata input data signal225 for providing an adjusted frequency offsetsignal226 to thephase wrapper216. Thephase wrapper216 integrates thesignal226 for providing aninput phase signal227 in the shape of a jagged sawtooth having a frequency equal to the phase carrier frequency of the phase quantized signal. The phase of theinput phase signal227 is the phase represented by the Ydata input data signal. At the start of a calibration, this phase, denoted as a first input data phase φ₁(FIG. 8), has an unknown phase offset. The calibration removes this unknown phase offset.

FIG. 7A is a block diagram of thephase wrapper216 of a preferred embodiment. When the sawtoothinput phase signal227 approximately reaches a preset upper limit thephase wrapper216 resets theinput phase signal227 to an approximate preset lower limit. The upper and lower limits are designed to correspond to the upper and lower full scale limits of the quantized phase signal when the quantized phase signal cycles from 360° to 0°. Thephase wrapper216 is a modulo P counter shown here with aninput summer232 and amodulo P limiter234 where “P” is the full scale count of the counter with the understanding that in a preferred embodiment thesummer232 and themodulo P limiter234 may operate as a single unit. Theinput summer232 adds thesignal226 to the wrappedinput phase signal227 of the modulo P limiter to increment thesignal227 provided by themodulo P limiter234. Theinput phase signal227 increases by increments until it reaches the modulo P where it turns over to start incrementing again. The stairs in the wrappedinput phase signal227 have the time of the sample time of the counter and the amplitudes of the increments. The amplitude increments in the counter represent frequency increments in the desired frequency of the modulated output signal. The effect of the modulo P counter is to integrate thesignal226 representing the frequency of the Ydata input data signal to provide thesignal227 representing the phase of the Ydata input data signal.

Returning toFIG. 7, thephase comparator218 compares the phase of theinput phase signal227 to the quantized phase φ_qin the quantized phase signal for providing a phase difference to the track/hold circuit222. In order to guard against erroneous 360° wrap around measurements caused by small phase noise perturbations, the track/hold circuit222 holds a level of a previous phase difference when the absolute value of a current phase difference goes to 180° or more. The limited phase difference from the track/hold circuit222 is passed to thefeedback return206. Thefeedback return206 has a loop filter for filtering the phase difference to insert frequency domain poles and/or zeroes in order to stabilize theloop224 when theloop224 is closed and passes the filtered phase difference through themode switch208 to thefeedback summer214.

Thefeedback summer214 subtracts the filtered phase difference from the frequency offset Ydata input data signal225 and passes the sum as thesignal226 to thephase wrapper216. The action of theclosed loop224 minimizes the phase difference by driving thephase wrapper216 to provide a phase calibration Δφ_c(FIG. 8) at its output that phase shifts or offsets the first phase φ₁of theinput phase signal227 to a calibrated input data phase φ_cwhere the unknown first phase offset is eliminated. It may be noted that at this stage of the calibration mode the calibrated input data phase φ_cand the quantized phases φ_qare constant because the Ydata is constant. Theloop224 must have a fast response for providing the phase calibration Δφ_cwithin a short time for calibration within a small portion of the time slot for a burst signal system. The remaining portion of the calibration burst time is required for determining the phase gain and phase preemphasis coefficients γ and ζ after theloop224 has been opened.

Continuing the calibration mode, after a time period that enables the phase of theinput phase signal227 to converge to the calibrated desired input data phase φ_c, the mode switch14 (FIG. 1) switches to the PRBS and theGaussian shaper12 provides shaped PRBS data as a sequential input data signal for Ydata. It should be noted that the levels of the Ydata represent the desired frequencies of the modulated output signal. Themode switch208 opens thephase measurement loop224. The calibrated desired input data phase φ_cat the offset of the phase calibration Δφ_cis now modulated directly by the integrated sequential input data signal Ydata. The quantized phase φ_qof the quantized phase signal is also modulated by the Ydata sequential input data signal through thefrequency synthesizer20 and thefeedforward converter30. The limited phase difference from thephase hold comparator204 is provided as the measured phase error φ_eto thephase gain compensator40 and thephase preemphasis compensator50 for determining the phase gain coefficients γ and the phase preemphasis coefficient ζ.

FIG. 8 shows the quantized phase signal versus continuous time overlaid against the input phase signal227 (FIG. 7). Theinput phase signal227 begins a new calibration as the fixed input phase signal at the unknown first input data phase, denoted as φ₁, and then converges to the calibrated input phase signal having the calibrated desired input data phase, denoted by φ_c, when theloop224 provides the phase calibration Δφ_c.

At the start of the calibration, thephase measurement loop224 is closed and the Ydata is a fixed input data signal having a fixed level. The modulated output signal has a fixed phase also. The frequency offset data signal225 (FIG. 7) is a frequency offset fixed data signal having a fixed level. The signal226 (FIG.7)is a feedback adjusted fixed data signal that is the difference of the frequency offset fixed data signal and the feedback of the phase measurement loop224 (FIG. 7). Theinput phase signal227 is a fixed input phase signal that starts at the unknown phase φ₁that converges to a calibrated input phase signal having the calibrated phase φ_cwith the phase calibration Δφ_c.

Still in the calibration, thephase measurement loop224 is opened and the Ydata is a sequential input data signal a pseudorandom sequence. The modulated output signal has a sequential modulated phase derived from the Ydata sequential input data signal. The frequency offset data signal225 and thesignal226 are a frequency offset sequential data signals. Theinput phase signal227 is a calibrated sequential input phase signal that retains the phase calibration Δφ_c. The calibrated sequential input phase signal is compared to the quantized phase signal for providing the measured phase error φ_ethat is used by the gain and preemphasis calibration loops for determining the phase gain coefficients γ and the phase preemphasis coefficient ζ.

FIG. 9 is a flow chart of the calibration of the modulated output signal transmitted by theGMSK transmitter10. The calibration is used to determine the phase gain coefficients γ and the phase preemphasis coefficient ζ. The coefficients γ and ζ are then used in on-line operation for reducing errors in frequency conversion gain and frequency response of frequency conversion gain from the Ydata input data signal and the modulation states and transitions between the modulation states in the modulated output signal. Major causes of these errors are the variation in voltage to frequency conversion gain in theVCO104 over its output frequency range and the frequency response of thelow pass filter144.

The calibration mode is started at astep302 when themode switch14 selects input data of 0 and theGaussian shaper12 provides a fixed Ydata input data signal. In astep304 for burst calibration, the loop gain of thesynthesis loop86 in thefrequency synthesizer20 is adjusted by the interpolated phase gain coefficient γ for the current divide number N from the phase gain coefficients γ for the calibration list of divide numbers N that were determined previously in the initial calibration. In thestep306 theloop86 settles for the current divide number N and theVCO104 provides an RF output signal (unmodulated at this step). In astep308 the switchedloop phase detector70 closes theloop224, or it is already closed, and provides an unknown first phase φ₁for the fixedinput phase signal227 by integrating the frequency information represented by the frequency offset fixedYdata signal225. In astep312 thephase quantizer60 quantizes the phases of the RF output signal for providing the quantized phase φ_q. In astep314 the quantized phase φ_qis compared to the first phase φ₁of the fixedinput phase signal227 for providing a phase difference. In astep316 theclosed loop224 provides feedback to the frequency offset fixedYdata signal225 to shift the first phase φ₁by the phase calibration Δφ_cto calibrated desired phase φ_cfor theinput phase signal227 that minimizes the phase difference between the calibrated desired phase φ_cand the quantized phase φ_q(FIG. 8).

Next, in astep318 themode switch14 selects the pseudorandom binary sequence (PRBS), theGaussian shaper12 shapes the PRBS for providing a PRBS sequential Ydata input data signal, and thefrequency synthesizer20 begins modulating the RF output signal. In astep322 the switchedloop phase detector70 opens theloop224. In astep324 the desired sequential phases in the calibrated sequentialinput phase signal227 are compared to the quantized phases φ_q. The difference between the desired sequential phases and the actual sequential quantized phases φ_qare provided as the measured phase error φ_e.

Thephase gain compensator40 make the predicted phase gain error estimates and thephase preemphasis compensator50 make the predicted phase preemphasis error estimates in astep326. In astep328 the phase gain and preemphasis error estimates are accelerated for determining the predicted (accelerated) phase gain andpreemphasis errors167 and179. In astep332 the predicted phase gain andpreemphasis errors167 and179 are correlated with the measured phase error φ_efor forming thecorrelations168 and180. In astep334 the gain andpreemphasis calibration loops82 and84 converge to the minimum averages of thecorrelations168 and180, respectively, (and the average phase measurement errors φ_e) for determining the phase and preemphasis coefficients γ and ζ. In thestep334, it should be noted that Ydata sequential input data signal is scaled and preemphasized by the phase gain and preemphasis coefficients γ and ζ as they converge in thefeedforward converter30 for providing the feedforward signal FFS and the modulated output signal is generated in thefrequency synthesizer20 within the calibration gain andpreemphasis loops82 and84. In a burst calibration, the calibration list of phase gain coefficients γ are determined in a round robin fashion with one divide number N for each burst calibration session. For an initial calibration, astep348 is inserted to repeat thesteps302–334 until a list of phase gain coefficients γ are determined and stored for the corresponding calibration list of divide numbers N. For the initial calibration, it may not be necessary to repeat the determination of the phase preemphasis coefficient for each of the calibration list of divide numbers N.

TheGMSK transmitter10 now enters the on-line operation mode. In astep352 themode switch14 selects the on-line data and theGaussian shaper12 shapes the on-line binary data to provide a burst on-line Ydata input data signal. In a step354 thefrequency synthesis loop86 uses the phase gain coefficient γ for the current divide number N to adjust the loop gain of thefrequency synthesis loop86. The phase gain coefficient γ is interpolated for the current divide number N from the phase gain coefficients γ that are stored for the calibration list of divide numbers N. In astep356 thefeedforward converter30 scales and preemphasizes the Ydata on-line input data signal for providing the feedforward signal FFS. In astep358 thefrequency synthesizer20 uses feedforward signal FFS to theVCO104, the current divide number N, the interpolated phase gain coefficient y, and the Ydata on-line data signal in thesynthesis loop86 for providing the modulated RF GMSK output signal having precise frequency modulation.

FIG. 10A is a block diagram showing thephase gain compensator40 and thegain calibration loop82 used for determining the phase gain coefficients γ during calibration. The combination of thephase gain compensator40 and thegain calibration loop82 is a preferred embodiment of a phasegain determination system402. Thegain calibration loop82 includes thefeedforward converter30, thefrequency synthesizer20, thephase quantizer60, the switchedloop phase detector70, and thephase gain correlator164 and thegain accumulator166 in thephase gain compensator40. Thephase gain correlator164 correlates the predictedphase gain error167 with the measured phase gain error φ_efor providing the phasegain error correlation168. The action of feedback in thegain calibration loop82 minimizes the average phasegain error correlation168 causing the output of thegain accumulator166 to converge to the phase gain coefficient γ. It should be noted that the average measured phase error φ_eis also minimized by the feedback of thegain calibration loop82.

FIG. 10B is a block diagrams showing thephase preemphasis compensator50 and thepreemphasis calibration loop84 used for determining the phase preemphasis coefficient ζ during calibration. The combination of thephase preemphasis compensator50 and thepreemphasis calibration loop84 is a preferred embodiment of a phasepreemphasis determination system404. Thepreemphasis calibration loop84 includes thefeedforward converter30, thefrequency synthesizer20, thephase quantizer60, the switchedloop phase detector70, and thephase preemphasis correlator176 and thepreemphasis accumulator178 in thephase preemphasis compensator50. Thephase preemphasis correlator176 correlates the predictedphase preemphasis error179 with the is measured phase gain error φ_efor providing the phasepreemphasis error correlation180. The action of feedback in thepreemphasis calibration loop84 minimizes the average phasepreemphasis error correlation180 causing the output of thepreemphasis accumulator178 to converge to the phase preemphasis coefficient ζ. Both thegain calibration loop82 and thepreemphasis calibration loop84 operate simultaneously. It should be noted that the average measured phase error φ_eis also minimized by the feedback of thepreemphasis calibration loop84.

FIG. 11A is a chart of a typical frequency conversion gain G(fo) of theVCO104 and the compensating phase gain coefficients γ(fo) as a function of the output carrier frequency fo. The VCO frequency conversion gain G(fo) is the ratio of a frequency deviation Δfo at the carrier frequency fc to a change in the level ΔA of the analog input drive to theVCO104. The phase gain coefficient γ(fo) is a dimensionless number. It should be noted that the frequency conversion gain of a VCO is related to the phase conversion gain by a constant. For an output carrier frequency fo of frequency f_Nfor a divide number N the phase gain coefficient γ(f_N) is determined so that the product of the frequency conversion gain G(f_N) and phase gain coefficient γ(f_N) is a constant, shown here normalized to 1.0.

FIG. 11B is a chart showing frequency conversion gains before calibration g_b(f_m,f_N) and after calibration g_a(f_m,f_N) for theGMSK transmitter10 for the output frequency f_Nas a function of modulating frequency f_m. Note that the modulating frequency f_mis equal to the signal frequency (as opposed to the frequency deviation that is represented) of the Ydata input data signal. The frequency conversion gains g_b(f_m,f_N) and g_a(f_m,f_N) are the ratio of a frequency deviation Δfo in the output frequency fo of the GMSK transmitter10 (the same as the output frequency fo of the VCO104) to a change in the level Δa of the Ydata input data signal (not the same as the ΔA above for direct drive to the VCO104). It should be understood the frequency conversion gains g_b(f_m,f_N) and g_a(f_m,f_N) are shown on a logarithmic vertical scale so at any one modulating frequency f_m, the higher line on the chart dominates the overall frequency conversion gain of theGMSK transmitter10 for that modulating frequency f_m.

A frequency response450 shows the desired flat frequency response normalized to 1.0. Frequency response452A–B is provided by thefrequency synthesis loop86 in thefrequency synthesizer20. Due to the high accuracy of thefractional divider106 and the high open loop gain of thefrequency synthesis loop86, the frequency response in section452A is essentially identical to the desired frequency response450 without a need for calibration for modulating frequencies f_mlower than the synthesis loop bandwidth BW₁. However, above the synthesis loop bandwidth BW₁, the frequency response insection452B quickly diverges downward from the desired frequency response450.

Frequency responses454A–C and456A–C show the frequency responses driven by the feedforward signal FFS before g_b(f_m,f_N) and after g_a(f^m,f_N) compensation by the phase gain coefficient γ(f_N) for the selected carrier frequency f_N. In the frequency response ofsection454A at modulating frequencies f_mbelow the synthesis loop bandwidth BW₁, thefrequency synthesis loop86 counteracts and reduces the effect of the feedforward signal FFS. In the frequency response insections454B and454C at modulating frequencies f_mabove the synthesis loop bandwidth BW₁, the feedforward signal FFS is the dominant driver of the overall frequency response. In thesection454C the frequency response diverges downward from the frequency response450 above the low pass filter bandwidth BW₂of thefilter144.

Thefrequency response456A–C shows the result of the scaling thefrequency responses454A–C by the phase gain coefficient γ(f_N). Insection456A at modulating frequencies f_mbelow the synthesis loop bandwidth BW₁, thefrequency synthesis loop86 counteracts and reduces the effect of the feedforward signal FFS. However, the frequency response insections456B and456C for modulating frequencies f_mabove the synthesis loop bandwidth BW₁, the feedforward signal FFS is the dominant driver of the overall frequency response. The compensation by the phase gain coefficient γ(f_N) results in the frequency response of the section456B being nearly identical with the desired frequency response450. In thesection456C for modulating frequencies f_mabove the low pass filter bandwidth BW₂, the frequency response falls off from the desired frequency response450 due to thelow pass filter144. The phase preemphasis coefficient ζ is used to boost theresponse456C to a frequency response458 to nearly match the desired response450. Afrequency response462 shows in a general way the effect that the phase preemphasis coefficient ζ would have in the absence of the low pass filtering of thefilter144.

Although the present invention has been described in terms of the presently preferred embodiments, it is to be understood that such disclosure is not to be interpreted as limiting. Various alterations and modifications will no doubt become apparent to those skilled in the art after having read the above disclosure. Accordingly, it is intended that the appended claims be interpreted as covering all alterations and modifications as fall within the true spirit and scope of the invention.

Claims (60)

1. An apparatus for generating an output signal having modulation based upon an input data signal, comprising:

a feedforward converter for scaling said input data signal according to one of a plurality of phase gain coefficients for providing a feedforward signal;

a frequency synthesizer having a synthesis loop having a bandwidth, the frequency synthesizer for generating said output signal having said modulation controlled by said input data signal inside said bandwidth and controlled by said feedforward signal outside said bandwidth; and

a gain calibration loop including the feedforward converter and the frequency synthesizer for determining said phase gain coefficients for compensating frequency conversion gains of said input data signal to said modulation for carrier frequencies, respectively, of said output signal.

2. The apparatus ofclaim 1, wherein:

the gain calibration loop uses feedback in a burst calibration mode for determining said phase gain coefficients by minimizing measured phase errors in calibration bursts of said output signal.

3. The apparatus ofclaim 1, wherein:

the frequency synthesizer generates an on-line burst of said output signal at a particular one of said carrier frequencies and the feedforward converter scales an on-line burst of said input data signal by a particular one of said phase gain coefficients corresponding to said particular carrier frequency in an on-line operation mode when said gain calibration loop is open.

4. The apparatus ofclaim 1, further comprising:

a preemphasis calibration loop including the feedforward converter and the frequency synthesizer for determining a phase preemphasis coefficient for compensating frequency response of said frequency conversion gains; and wherein:

the feedforward converter includes a phase preemphasizer for preemphasizing said input data signal for providing said feedforward signal.

5. The apparatus ofclaim 4, wherein:

the feedforward converter includes a filter having a low pass frequency response for filtering said feedforward signal; and

said phase preemphasis coefficient compensates for said low pass frequency response.

6. The apparatus ofclaim 4, wherein:

said phase preemphasizer includes a first preemphasis multiplier for multiplying a delayed said input data signal by said phase preemphasis coefficient for providing a first product, a first summer for adding a constant to said phase preemphasis coefficient for providing an offset phase preemphasis coefficient, a second preemphasis multiplier for multiplying said input data signal by said offset phase preemphasis coefficient for providing a second product, and a second summer for taking a difference of said first and second products for providing a preemphasized signal, said preemphasized signal used for providing said feedforward signal.

7. The apparatus ofclaim 4, wherein:

the feedforward converter includes a phase scaler for scaling said input data signal by said phase gain coefficient for providing a digital feedforward signal, a digital to analog converter (DAC) for converting said digital feedforward signal to an analog DAC output signal, and a filter for low pass filtering said DAC output signal for providing said feedforward signal, said phase preemphasis coefficient compensating for said low pass filtering for providing a flat said frequency response for said frequency conversion gain.

8. The apparatus ofclaim 4, wherein:

the feedforward converter is a finite impulse response (FIR) filter having two taps, said phase preemphasis coefficient and a particular one of said phase gain coefficients for a particular one of said carrier frequencies feeding said two taps.

9. The apparatus ofclaim 4, wherein:

the frequency synthesizer generates calibration bursts of said output signal from calibration bursts of said input data signal with the gain and preemphasis calibration loops closed for determining said phase gain coefficients and said phase preemphasis coefficient; and then generates an on-line burst of said output signal at a particular one of said carrier frequencies from an on-line burst of said input data signal using a feedforward signal preemphasized by said phase preemphasis coefficient and scaled by a particular one of said phase gain coefficients corresponding to said particular carrier frequency.

10. The apparatus ofclaim 4, wherein:

the preemphasis calibration loop includes a phase preemphasis correlator for correlating measured phase errors determined from said output signal with predicted phase preemphasis errors determined from said input data signal for providing phase preemphasis error correlations; the preemphasis calibration loop using feedback for minimizing said phase preemphasis error correlations for providing said phase preemphasis coefficient.

11. The apparatus ofclaim 10, further comprising:

a phase preemphasis error predictor having a predetermined phase preemphasis error transfer function for mapping said input data signal into predicted phase preemphasis error estimates, said predicted phase preemphasis error estimates used for determining said predicted phase preemphasis errors.

12. The apparatus ofclaim 10, wherein:

said phase preemphasis error transfer function is based upon a prediction of a low pass frequency response of a filter in the feedforward converter for filtering said feedforward signal.

13. The apparatus ofclaim 10, further comprising:

a preemphasis loop accelerator using precomputed preemphasis loop acceleration coefficients based upon a known calibration sequence for said input data signal with a recursive least squares algorithm for weighting said predicted phase preemphasis error estimates for providing said predicted phase preemphasis errors.

14. The apparatus ofclaim 10, wherein:

the preemphasis calibration loop further includes a switched loop phase detector having a phase measurement loop using feedback for phase shifting a fixed input phase signal corresponding to a fixed said input data signal in a closed measurement loop by a phase calibration to a calibrated input phase signal that minimizes a phase difference between a quantized phase signal determined from said output signal and said calibrated input phase signal, the phase measurement loop including a switch for opening said phase measurement loop and a phase comparator for comparing said quantized phase signal with a calibrated sequential input phase signal corresponding to a sequential said input data signal, said calibrated sequential input phase signal having said phase calibration, for providing measured phase errors when said phase measurement loop is open, said measured phase errors used for determining said phase preemphasis coefficient.

15. The apparatus ofclaim 14, wherein:

the preemphasis calibration loop includes the feedforward converter and the frequency synthesizer for converging to said phase preemphasis coefficient by minimizing said measured phase errors.

16. The apparatus ofclaim 14, wherein:

the frequency synthesizer uses an on-line burst of said input data signal and said feedforward signal preemphasized according to said phase preemphasis coefficient and scaled according to a particular one of said phase gain coefficients for a particular one of said carrier frequencies for issuing an on-line burst of said output signal at said particular carrier frequency when said gain calibration loop, said preemphasis calibration loop, and said phase measurement loop are open.

17. The apparatus ofclaim 1, wherein:

said phase gain coefficients compensate for actual variations in a frequency dependent voltage controlled oscillator (VCO) conversion gain in the frequency synthesizer for issuing said output signal.

18. The apparatus ofclaim 1, wherein:

the gain calibration loop includes a phase gain correlator for correlating measured phase errors determined from said output signal with predicted phase gain errors determined from said input data signal for providing phase gain error correlations, the gain calibration loop using feedback for minimizing said phase gain error correlations for converging to said phase gain coefficients.

19. The apparatus ofclaim 18, further comprising:

a phase gain error predictor having a predetermined phase conversion gain error transfer function for mapping said input data signal into predicted phase gain error estimates, said predicted phase gain error estimates used for determining said predicted phase gain errors.

20. The apparatus ofclaim 19, wherein:

said phase gain error transfer function for said particular carrier frequency is based upon predictions of a frequency dependent voltage controlled oscillator (VCO) conversion gain of a VCO in the frequency synthesizer for issuing said output signal at said carrier frequencies.

21. The apparatus ofclaim 19, further comprising:

a gain loop accelerator using precomputed gain loop acceleration coefficients based upon a known calibration sequence for said input data signal with a recursive least squares algorithm for weighting said predicted phase gain error estimates for providing accelerated predicted phase gain error estimates as said predicted phase gain errors.

22. The apparatus ofclaim 1, wherein:

the gain calibration loop includes a switched loop phase detector having a phase measurement loop using feedback for phase shifting a fixed input phase signal corresponding to a fixed said input data signal in a closed phase measurement loop by a phase calibration to a calibrated input phase signal that minimizes a phase difference between a quantized phase signal determined from said output signal and said calibrated input phase signal, the phase measurement loop including a switch for opening said phase measurement loop and a phase comparator for comparing said quantized phase signal with a calibrated sequential input phase signal corresponding to a sequential said input data signal, said calibrated sequential input phase signal having said phase calibration, for providing measured phase errors when said phase measurement loop is open, said measured phase errors used for determining said phase gain coefficients.

23. The apparatus ofclaim 22, wherein:

the gain calibration loop includes the frequency synthesizer and the feedforward converter for determining said phase gain coefficients by minimizing said measured phase errors.

24. The apparatus ofclaim 22, wherein:

said fixed input data signal is a fixed level and said sequential input data signal is a pseudorandom sequence, said output signal generated from said fixed level when said phase measurement loop is closed and then generated from said pseudorandom sequence when said phase measurement loop is open.

25. The apparatus ofclaim 22, wherein:

said switched loop phase detector includes an ideal phase generator for converting said input data signal into said calibrated input phase signal when said phase measurement loop is closed and then converting said sequential input data signal into said calibrated sequential input phase signal when said phase measurement loop is open; a feedback return for providing said feedback from said phase difference for phase shifting said fixed input phase signal by said phase calibration to said calibrated input phase signal in order to minimize said phase difference when said measurement loop is closed; and the phase comparator for comparing said fixed input phase signal and then said calibrated input phase signal to said quantized phase signal for said fixed input data signal when said measurement loop is closed for providing said phase difference, and then comparing said calibrated sequential input phase signal to said quantized phase signal for said sequential input data signal when said measurement loop is open for providing said measured phase errors.

26. The apparatus ofclaim 22, wherein:

the gain calibration loop further includes a phase quantizer for quantizing phases of said output signal for providing said quantized phase signal at a phase carrier frequency.

27. The apparatus ofclaim 22, wherein:

the ideal phase generator further includes a frequency offset summer for summing said fixed input data signal with an offset value corresponding to said phase carrier frequency for providing a frequency offset fixed data signal and a phase wrapper for integrating said frequency offset fixed data signal for providing said fixed input phase signal.

28. The apparatus ofclaim 27, wherein:

the phase wrapper is further for integrating said frequency offset input data signal with said feedback for providing said phase calibration.

29. The apparatus ofclaim 27, wherein:

the frequency offset summer is further for summing said sequential input data signal with said offset value for providing a frequency offset sequential data signal, the phase wrapper for integrating said frequency offset sequential input data signal with said phase calibration for providing said calibrated sequential input phase signal.

30. The apparatus ofclaim 1, further comprising:

a Gaussian shaper for shaping binary input data for providing said input data signal.

31. A method of generating an output signal having modulation based upon an input data signal, comprising:

feedforward scaling said input data signal with one of a plurality of phase gain coefficients for providing a feedforward signal;

generating said output signal having said modulation controlled by said input data signal inside a bandwidth of a frequency synthesis loop and controlled by said feedforward signal outside said bandwidth; and

determining said phase gain coefficients using the steps of feedforward scaling said input data signal and generating said output signal for compensating frequency conversion gains of said input data signal to said modulation for carrier frequencies, respectively, of said output signal.

32. The method ofclaim 31, wherein:

determining said phase gain coefficients includes using feedback in a closed gain calibration loop for minimizing measured phase errors in calibration bursts of said output signal in a burst calibration mode.

33. The method ofclaim 31, wherein:

generating said output signal includes generating an on-line burst of said output signal at a particular one of said carrier frequencies in an on-line operation mode; and feedforward scaling said input data signal includes feedforward scaling an on-line burst of said input data signal with a particular one of said phase gain coefficients corresponding to said particular carrier frequency for providing said feedforward signal.

34. The method ofclaim 31, wherein:

feedforward scaling includes preemphasizing said input data signal with a phase preemphasis coefficient for providing said feedforward signal; and further comprising:

determining said phase preemphasis coefficient using the steps of feedforward scaling said input data signal and generating said output signal with feedback in a closed preemphasis calibration loop for compensating frequency response of said frequency conversion gains.

35. The method ofclaim 34, wherein:

feedforward scaling said input data signal includes filtering said feedforward signal with a low pass frequency response; and determining said phase preemphasis coefficient includes determining said phase preemphasis coefficient for compensating for said low pass frequency response.

36. The method ofclaim 34, wherein:

feedforward scaling said input data signal includes multiplying a delayed said input data signal by said phase preemphasis coefficient for providing a first product; adding a constant to said phase preemphasis coefficient for providing an offset phase preemphasis coefficient; multiplying said input data signal by said offset phase preemphasis coefficient for providing a second product; taking a difference of said first and second products for providing a preemphasized signal; and using said preemphasized signal for providing said feedforward signal.

37. The method ofclaim 34, wherein:

feedforward scaling said input data signal includes multiplying said input data signal by said phase gain coefficient for providing a digital feedforward signal; converting said digital feedforward signal to a digital-to-analog converter (DAC) output signal; and low pass filtering said DAC output signal for providing said feedforward signal, said phase preemphasis coefficient compensating for said low pass filtering for providing a flat said frequency response for said frequency conversion gain.

38. The method ofclaim 34, wherein:

feedforward scaling said input data signal includes feeding a two tap finite impulse response (FIR) filter with said phase preemphasis coefficient and a particular one of said phase gain coefficients for a particular one of said carrier frequencies.

39. The method ofclaim 34, wherein:

generating said output signal includes generating a calibration burst of said output signal from a calibration burst of said input data signal when gain and preemphasis calibration loops are closed for determining said phase gain and preemphasis coefficients; and then generating an on-line burst of said output signal from an on-line burst of said input data signal when said phase gain and preemphasis coefficients have been determined and said gain and preemphasis calibration loops are open.

40. The method ofclaim 34, wherein:

determining said phase preemphasis coefficient includes correlating measured phase errors determined from said output signal with predicted phase preemphasis errors determined from said input data signal for providing phase preemphasis error correlations; and converging to said phase preemphasis coefficient using feedback in a preemphasis calibration loop for minimizing said phase preemphasis error correlations.

41. The method ofclaim 40, wherein:

determining said phase preemphasis coefficient further includes mapping said input data signal into predicted phase preemphasis error estimates according to a predetermined phase preemphasis error transfer function; and determining said predicted phase preemphasis errors based upon said predicted phase preemphasis error estimates.

42. The method ofclaim 40, wherein:

feedforward scaling includes filtering said feedforward signal with a filter having a low pass frequency response, said phase preemphasis error transfer function based upon a prediction of said low pass frequency response.

43. The method ofclaim 40, wherein:

determining said phase preemphasis coefficient further includes accelerating said predicted phase preemphasis error estimates with precomputed preemphasis loop acceleration coefficients based upon a known calibration sequence for said input data signal with a recursive least squares algorithm for providing said predicted phase preemphasis errors.

44. The method ofclaim 40, wherein:

determining said phase preemphasis coefficient includes phase shifting a fixed input phase signal corresponding to a fixed said input data signal in a closed measurement loop by a phase calibration to a calibrated input phase signal that minimizes a phase difference between a quantized phase signal determined from said output signal and said calibrated input phase signal; opening said phase measurement loop; and then comparing said quantized phase signal with a calibrated sequential input phase signal corresponding to a sequential said input data signal phase shifted with said phase calibration for providing measured phase errors and using said measured phase errors for determining said phase preemphasis coefficient when said phase measurement loop is open.

45. The method ofclaim 44, wherein:

determining said phase preemphasis coefficient further includes converging to said phase preemphasis coefficient by minimizing said measured phase errors in a closed preemphasis calibration loop using the steps of feedforward scaling said input data signal and generating said output signal.

46. The method ofclaim 44, wherein:

generating said output signal includes generating an on-line burst of said output signal for a particular one of said carrier frequencies; and feedforward scaling includes preemphasizing and scaling an on-line burst of said input data signal according to said phase preemphasis coefficient and a particular one of said phase gain coefficients corresponding to said particular carrier frequency when said gain calibration loop, said preemphasis calibration loop, and said phase measurement loop are open.

47. The method ofclaim 31, wherein:

generating said output signal includes issuing said output signal with a voltage controlled oscillator (VCO) having a frequency dependent VCO frequency conversion gain, and said phase gain coefficients compensate for variations in said VCO frequency conversion gain.

48. The method ofclaim 31, wherein:

determining said phase gain coefficients includes correlating measured phase errors determined from said output signal with predicted phase gain errors determined from said input data signal for providing phase gain error correlations; and converging to said phase gain coefficients by using feedback for minimizing said phase gain error correlations.

49. The method ofclaim 48, wherein:

determining said phase gain coefficients further includes mapping said input data signal into predicted phase gain error estimates according to a predetermined phase gain error transfer function; and determining said predicted phase gain errors based upon said predicted phase gain error estimates.

50. The method ofclaim 49, wherein:

said phase gain error transfer function for said particular carrier frequency is based upon predictions of frequency dependent VCO frequency conversion gains for generating said output signal.

51. The method ofclaim 49, wherein:

determining said phase gain coefficients further includes accelerating said predicted phase gain error estimates with precomputed gain loop acceleration coefficients based upon a known calibration sequence for said input data signal with a recursive least squares algorithm for providing accelerated predicted phase gain error estimates as said predicted phase gain errors.

52. The method ofclaim 31, wherein:

determining said phase gain coefficients includes phase shifting a fixed input phase signal corresponding to a fixed said input data signal in a closed measurement loop by a phase calibration to a calibrated input phase signal that minimizes a phase difference between a quantized phase signal determined from said output signal and said calibrated input phase signal; opening said phase measurement loop; and then comparing said quantized phase signal with a calibrated sequential input phase signal corresponding to a sequential said input data signal phase shifted with said phase calibration for providing measured phase errors when said phase measurement loop is open and using said measured phase errors for determining said phase gain coefficients.

53. The method ofclaim 52, wherein:

determining said phase gain coefficients further includes converging to said phase gain coefficients by minimizing said measured phase errors with in a closed gain calibration loop using the steps of feedforward scaling said input data signal and generating said output signal.

54. The method ofclaim 52, wherein:

said fixed input data signal is a fixed level and said sequential input data signal is a pseudorandom sequence, said output signal generated from said fixed level when said phase measurement loop is closed and then generated from said pseudorandom sequence when said phase measurement loop is open.

55. The method ofclaim 52, wherein:

said step of phase shifting includes converting said fixed input data signal into said fixed input phase signal; comparing said fixed input phase signal with said quantized phase signal for providing said phase difference for said fixed input data signal; and adjusting phase of said fixed input phase signal by said phase calibration to said calibrated input phase signal by minimizing said phase difference when said phase measurement loop is closed; and said step of comparing said quantized phase signal with said calibrated sequential input phase signal includes using said phase calibration for converting said sequential input data signal into said calibrated sequential input phase signal; and providing said measured phase errors from a difference in phase between said calibrated sequential input phase signal and said quantized phase signal for said sequential input data signal when said phase measurement loop is open.

56. The method ofclaim 52, wherein:

determining said phase gain coefficients further includes quantizing phase of said output signal for providing said quantized phase signal at a phase carrier frequency.

57. The method ofclaim 56, wherein:

said step of converting said fixed input data signal into said fixed input phase signal includes offsetting said fixed input data signal with an offset value corresponding to said phase carrier frequency for providing a frequency offset fixed data signal and integrating said frequency offset fixed data signal for providing said fixed input phase signal.

58. The method ofclaim 57, wherein:

said step of adjusting phase includes integrating said frequency offset input data signal with feedback from said phase difference for providing said phase calibration.

59. The method ofclaim 57, wherein:

said step of converting said sequential input data signal includes offsetting said sequential input data signal with said offset value for providing a frequency offset sequential data signal and integrating said frequency offset sequential input data signal with said phase calibration for providing said calibrated sequential input phase signal.

60. The method ofclaim 31, further comprising:

shaping binary input data to Gaussian transitions for providing said input data signal.

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