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US7083997B2 - Bonded wafer optical MEMS process - Google Patents

Bonded wafer optical MEMS process
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US7083997B2
US7083997B2US09/921,456US92145601AUS7083997B2US 7083997 B2US7083997 B2US 7083997B2US 92145601 AUS92145601 AUS 92145601AUS 7083997 B2US7083997 B2US 7083997B2
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silicon
fabricating
sacrificial layer
microelectromechanical system
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Timothy J. Brosnihhan
Michael W. Judy
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Analog Devices Inc
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Abstract

A microelectromechanical system is fabricated from a substrate having a handle layer, a silicon sacrificial layer and a device layer. A micromechanical structure is etched in the device layer and the underlying silicon sacrificial layer is etched away to release the micromechanical structure for movement. One particular micromechanical structure described is a micromirror.

Description

PRIORITY INFORMATION
This application claims priority from provisional application Ser. No. 60/222,751 filed Aug. 3, 2000.
BACKGROUND OF THE INVENTION
The invention relates to the field of microfabricated devices, and in particular to microfabricated devices released to move by removal of a sacrificial layer.
Microelectromechanical systems (MEMS) have a broad range of applications such as, accelerometers, gyroscopes, visual displays and micro-optical systems for fiber-optic communications. The techniques used to form the micromechanical structures, such as surface micromachining, borrow technologies like thin film deposition and photolithography from the microelectronics fabrication industry.
In surface micromachining, thin films of material are typically deposited on a surface (typically known as the handle layer) using a variety of methods to form a device layer of material on a sacrificial layer of material. The micromechanical structure is then formed by patterning and etching the device layer. After the micromechanical structure is formed, a release etch is performed to remove the sacrificial material so that the micromechanical structure is released, allowing it to move and perform mechanical functions.
One actuation scheme used to move the micromechanical structure or otherwise cause it to perform its mechanical function is electrostatic actuation. Electrostatic actuation is commonly used because it does not require complicated fabrication techniques or abnormal materials, such as piezoelectric materials. Electrostatic actuation moves the micromechanical structure by electrostatic attraction between two structures with different voltages applied thereto. When the voltages are applied, the structures move to increase their capacitance by increasing the overlap area of overlapping features, or by closing the gap between the overlapping features.
Because surface micromachining lends itself naturally to creating overlapping surfaces coupled, at least in part, with the common use of electrostatic actuation has resulted in the development of a micromechanical structure used in a number of diverse applications, such as micromirrors, accelerometers, gyroscopes, etc. This structure comprises a plate formed in the device layer that is coupled via flexure assemblies to a frame formed in the device layer. The plate is released to suspend above the handle layer by the removal of the sacrificial layer underlying the plate.
The distance between the plate and the handle layer, however, limits the actuation range of the plate in this structure. This distance directly corresponds to the thickness of the sacrificial layer. An oxide, such as silicon dioxide is typically used as the sacrificial layer. An oxide, however, cannot be grown sufficiently thick to provide the desired actuation range for some applications of this structure.
One such application is micro-optical structures, such as micromirrors. While small deflections suffice for some micromirrors, large micromirrors (greater than about 300 um in diameter) require mirror rotations in the tens of microns (e.g., between about 50–80 um) to be useful. An oxide generally cannot provide for the needed separation between the device layer and the handle layer for such mirror rotations. Therefore, most large micromirrors are not made using the above-described structure. Alternative structures for large micromirrors, such as assembled, hinged or bimorph pop-up structures, have a number of disadvantages. They are often difficult to fabricate, are unreliable, provide low-yield and are many times unmanufacturable devices.
Prior art processes for forming micromirrors also suffer from other disadvantages. For example, many require a through-wafer etch to access the backside of structure. These through-wafer etches create fragile final chips. Etch holes through the mirror surface are often required for the release etch. These etch holes increase signal loss due to scattering. In addition, the prior art processes are not easily integrated with foundry electronics and cannot provide a single chip solution, i.e. one where no assembly is required of separate mirror and electronics chips. The prior art forms micro-optic MEMS systems by constructing the mirror structure on one chip, the electronics on a second chip and then using wire bonding to interface the two components to form the micro-optic system. Integration of active electronics on the same wafer as a micro-optical structure would provide a number of advantages.
SUMMARY OF THE INVENTION
In one aspect of the present invention, a method of fabricating a microelectromechanical system is provided. First, a substrate is provided that comprised a handle layer of silicon, a device layer of silicon and a sacrificial layer of silicon disposed between the handle layer and the device layer. Next, a micromechanical structure is formed in the device layer. Then, at least a portion of the sacrificial layer of silicon underlying the micromechanical structure is removed to release the micromechanical structure for movement.
In another aspect of the present invention, a method of releasing a micromechanical structure for movement is provided. The micromechanical structure is etched in a silicon device layer and a silicon sacrificial layer disposed between said micromechanical structure and a silicon handle layer is etched.
Another aspect of the present invention provides a microfabricated device. The microfabricated device comprises a substrate having a device layer; a least one micro-optical device etched on the device layer and released for movement by removal of an underlying sacrificial layer of silicon; and active electronics formed on the device layer.
Provided in another aspect of the present invention is a microelectromechanical device. The device comprises a handle layer of silicon having actuation electrodes formed thereon, a device layer of silicon having a micromechanical structure formed thereon and a sacrificial layer of silicon disposed between the handle layer and the device layer of silicon. The sacrificial layer of silicon has a portion underlying the micromechanical structure removed to form an actuation cavity below the micromechanical structure.
In another aspect, a micromirror device is provided. The micromirror device comprises a substrate having a device layer, a handle layer and a sacrificial layer made of silicon disposed between the device layer and the handle layer and an isolation trench extending through the device layer and the sacrificial layer. The isolation trench defines a mirror region and electrically isolates the mirror region. The micromirror device also comprises a mirror formed from the device layer in the mirror region above actuation electrodes formed on said handle layer. In addition, a cavity is formed below the mirror by removing a portion of said sacrificial layer of silicon.
BRIEF DESCRIPTION OF THE DRAWINGS
FIGS. 1a1dillustrate a preferred micromirror structure constructed according to the principles of the present invention in which single crystal silicon is used as the device layer;
FIGS. 2a2jillustrate the fabrication steps of the micromirror structure ofFIGS. 1a1c;
FIG. 3 illustrates another embodiment of a micromirror structure constructed according to the principles of the present invention in which polycrystalline silicon is used as the device layer; and
FIGS. 4a–4millustrate the fabrication steps of the micromirror structure ofFIG. 3.
DETAILED DESCRIPTION OF THE INVENTION
While the various embodiments of the present invention are described with respect to, and some embodiments are particularly advantageous for, the production of micromirrors, the present invention is not limited thereto. As will be appreciated by one of skill in the art, the principles of the present invention are applicable to a number of other devices, such as inertial sensors, pressure sensors, and actuators.
FIGS. 1a,1band1cillustrate apreferred micromirror structure100 constructed according to the principles of the present invention.FIGS. 1aand1billustrate top planar views of different layers ofpreferred micromirror structure100.FIG. 1aillustrates a top planar view of the device layer ofmicromirror structure100.FIG. 1billustrates a top planar view of the handle layer ofmicromirror structure100.FIG. 1cillustrates a side view ofmicromirror structure100.
Micromirror structure100 is created from a substrate having ahandle layer120, asacrificial layer122 and adevice layer124, each separated by a dielectric, such as silicon dioxide. Single crystal silicon is used assacrificial layer122 in order to provide for greater distances betweenmirror110 and handlelayer120, and, in turn, a greater actuation range.Handle layer120 anddevice layer124 are also single crystal silicon. Significant advantages are obtained withdevice layer124 being single crystal silicon. The use of single crystal silicon asdevice layer124 provides for larger, flatter mirrors and provides a substrate that is compatible with traditional CMOS fabrication techniques. This allows for control andprocessing electronics132 to be formed directly on the substrate. Therefore, it is possible to integrate active electronics on the same wafer as a micro-optical structure.
As illustrated, amirror110, formed fromdevice layer124, is suspended over a cavity created by the removal ofsacrificial layer122underlying mirror110.Mirror110 has acoating130 thereon to increase the reflectivity.Mirror110 is suspended by flexure connections112. Preferably,mirror110 is connected to aconcentric suspension ring114 via a first set offlexures112aandconcentric suspension ring114 is connected to frame118 via a second set of orthogonally orientedflexures112b. Preferably, flexures112 are serpentine structures as illustrated inFIG. 1d,which shows a close-up of one of the set offlexures112b.
Anisolation trench104 extends down to handlelayer120 fromdevice layer124 and surrounds thearea containing mirror110 and associatedframe118.Isolation trench104 electrically isolatesmicromirror structure100 from the rest of the wafer. Further, as will be seen below,isolation trench104 also acts as a lateral etch stop for the sacrificial layer etch and provides a mechanical anchor formirror110.
Similar toisolation trench104, viaposts109, filled with a conductive material such as doped polysilicon, extend throughcontact holes108 down to handlelayer120 fromdevice layer124. Viaposts109 connect to interconnects106 formed onhandle layer120.Interconnects106 have pads at one end for connection to viaposts109 and are connected at the other end toactuation electrodes121 formed onhandle layer120. Anelectrical interconnection116 formed on top of the device layer is used to apply a first voltage to the device layer ofmicromirror structure100.Electrical interconnections134 connected to viaposts109 are then used to apply a second voltage to actuationelectrodes121 to movemirror110.
Referring toFIGS. 2aand2b, the fabrication process formicromirror structure100 begins with a singlecrystal silicon wafer222 bonded using wafer bonding to a singlecrystal silicon wafer220, which has interconnects andactuation electrodes206 formed thereon. Interconnects andactuation electrodes206 are preferably formed using patterned polysilicon. However, other manners of forming interconnects andactuation electrodes206, such as patterned diffusions intowafer220, are possible. Alternatively, interconnects andelectrodes206 may be formed on the bottom ofwafer222.Wafer222 is ground to the desired sacrificial layer thickness (e.g., 50 um) using, for example, a combination of mechanical and chemical-mechanical polishing (CMP). Asecond wafer224 is then bonded, also using wafer bonding, towafer222 and ground to the desired thickness (e.g., 10 um) of the mechanical structure and the circuits, also using, for example, a combination of mechanical and chemical-mechanical polishing (CMP).
This results in asubstrate200 comprised of ahandle layer220 of single crystal silicon, asacrificial layer222 of single crystal silicon and adevice layer224 of single crystal silicon. Afirst dielectric layer203 separatessacrificial layer222 and handlelayer220 and asecond dielectric layer205separates device layer224 fromsacrificial layer222.
While described as being formed from three bonded silicon wafers, alternative techniques of forming three-layer substrate200 are possible. One possible alternative entails wafer bonding a single silicon-on-insulator (SOI) wafer todielectric layer203 onwafer220. In this case, the silicon layer of the SOI wafer above the insulator is made to be the appropriate thickness before bonding and issacrificial layer222. The handle layer of the SOI wafer isdevice layer224 and is ground to the appropriate thickness after bonding.
Another possible alternative entails double bonding of two SOI wafers towafer220. For this technique, a SOI wafer is bonded towafer220 and the handle layer of the SOI wafer is removed. This leavessacrificial layer222 and dielectric205. A second SOI wafer is then wafer bonded on top ofdielectric205. The handle layer and insulator layer of the second SOI wafer is then removed to leavedevice layer224.
Referring next toFIGS. 2band2c, after the fabrication of three-layer substrate200,isolation trench204 andcontact holes208 are etched throughdevice layer224 andsacrificial layer222, stopping atelectrodes206. While shown as asingle isolation trench204 extending through both thesacrificial layer222 anddevice layer224, the present invention is not limited thereto. For instance, an isolation trench may be formed insacrificial layer222, but notdevice layer224 and, likewise, an isolation trench may be formed indevice layer224, but notsacrificial layer222. Or, two trenches that are not coincident may be formed in each ofdevice layer224 andsacrificial layer222.
Isolation trench204 andcontact holes208 are lined with a dielectric211, such as a thermal oxide, and back-filled with conductive material, such as doped polysilicon. The doped polysilicon incontact holes208 forms viaposts209. In addition to providing electrical conductivity, the use of doped polysilicon also provides mechanical stiffness tomicromirror structure100.
At thispoint substrate200 is compatible with traditional CMOS circuit fabrication processes. For a typical CMOS fabrication process, the only differences betweensubstrate200 and normal starting material is thatsubstrate200 has trench isolation and comprises bonded wafers. Trench isolation and bonded wafers, however, are well-established processes in IC manufacturing. Therefore, standard processing with alignment to the trench features is preferably performed to form theintegrated electronics232. Metal interconnects216 and234 are formed to connect to viaposts209 and the mirror region. At the completion of circuit formation, the substrate has apassivation layer213covering device layer224. As illustrated inFIGS. 2eand2f, this passivation layer is next removed from the mirror area and themirror210,concentric suspension ring214,frame218 and flexures are patterned and etched indevice layer224.Mirror210,concentric suspension ring214,frame218 and flexures are etched indevice layer224, for example, using a deep reactive ion etch stopping on seconddielectric layer205
Next, as shown inFIG. 2g, aphotoresist coating207 is applied tosubstrate200 and patterned. Release holes215 are etched throughphotoresist coating207 andsecond dielectric205 to expose the silicon ofsacrificial layer222.
As illustrated inFIG. 2h, the silicon ofsacrificial layer222 bound by firstdielectric layer203,second dielectric layer205 and the dielectriclining isolation trench204 is then isotropically etched through release holes215 using, for example, a Xenon Diflouride (XeF2) dry etch. Etchingsacrificial layer222 forms acavity217 underneathmirror210,concentric suspension ring214,frame218 and the flexures. Formation ofcavity217 releases mirror210,concentric suspension ring214,frame218 and the flexures for movement.
Referring toFIGS. 2iand2j, the dielectric incavity217 is next removed by, for example, an oxide etch using Hydroflouric Acid (HF). This is followed by an oxygen plasma resist strip to removephotoresist coating207, which results in the structure as shown inFIG. 2j. Finally, a layer of reflective material, preferably gold, is deposited and patterned onmirror210 to complete the structure as shown inFIG. 1c.
While it is preferable to place the coating onmirror210 as the last step in fabrication, the reflective material can be deposited and etched onmirror210 or mirror region during other times of the fabrication process. For instance, the reflective material can be placed on the mirror region ofdevice layer224 prior to the etching ofmirror210,concentric suspension ring214 andframe218 and flexures. In this case, after circuit fabrication, part ofpassivation layer213 is removed above the mirror region. A thin layer of reflective material, preferably gold, is deposited and patterned on the mirror region. Next,mirror210,concentric suspension ring214 andframe218 and flexures are patterned and etched indevice layer224. The rest of the fabrication continues as previously described to the formation ofcavity217 and the corresponding oxide etch and photoresist strip.
FIG. 3 illustrates another embodiment of amicromirror structure300 constructed according to the principles of the present invention. In the embodiment ofFIG. 3, polycrystalline silicon (“polysilicon”) is used as adevice layer324 instead of single crystal silicon. It should be noted that using polysilicon to form a micromirror will increase mirror roughness while reducing compatibility with standard CMOS fabrication. Polysilicon also increases mirror curvature because of stress gradients in the polysilicon. However, the use of polysilicon is advantageous at times because using polysilicon decreases the cost of fabricating the device.
As described,micromirror structure300 is similar tomicromirror structure100.Micromirror structure300 is formed from a substrate having ahandle layer320, asacrificial layer322 anddevice layer324. Handle layer is separated fromsacrificial layer322 by afirst dielectric303, such as silicon dioxide.Polysilicon device layer324 is separated fromsacrificial layer322 by asecond dielectric305, such as silicon dioxide.Handle layer320 andsacrificial layer322 comprise single crystal silicon, while, as described above,device layer324 comprises polysilicon.
As illustrated, amirror310 formed frompolysilicon device layer324 is suspended over a cavity created by the removal ofsacrificial layer322underlying mirror310.Mirror310 has acoating330 thereon to increase the reflectivity. As withmirror110,mirror310 is preferably connected to aconcentric suspension ring314 via a first set of flexures andconcentric suspension ring314 is connected to aframe318 via a second set of orthogonally oriented flexures. Anisolation trench304 extends down to handlelayer320 throughsacrificial layer322 and surrounds thearea containing mirror310 and associatedframe318.Isolation trench304 is partially formed from a conductive material, such as doped polysilicon.
Similar toisolation trench304, viaposts309, filled with a conductive material such as doped polysilicon, extend down throughsacrificial layer322. Viaposts309 connect to interconnects306 formed onhandle layer320.Electrical interconnections316 and334 are formed on top of the device layer to apply the appropriate actuation voltages.
Fabrication ofmicromirror structure300 is similar to the fabrication ofmicromirror structure100. Referring toFIGS. 4a,4b,4cand4d, the fabrication process formicromirror structure300 begins with interconnects andactuation electrodes406 formed on a singlecrystal silicon wafer420. Interconnects andactuation electrodes406 illustrated are formed using patterned deposits of polysilicon. However, as described above, other manners of forming interconnects andactuation electrodes406, such as patterned diffusions intosilicon wafer420, are possible. Asingle crystal wafer422 is bonded towafer420 using wafer bonding.Wafer422 is ground to the desired sacrificial layer thickness using, for example, a combination of mechanical and chemical-mechanical polishing (CMP). Alternative techniques, similar to those described above may also be used to form two-layer substrate400.
Next,isolation trench404 and viaholes408 are etched throughwafer422, stopping atinterconnects406. A dielectric, such as a thermal oxide, is grown on top ofwafer422 formingdielectric layer405 and on the walls ofisolation trench404 and viaholes408 forminglinings411. Anchor holes421, which will be used provide support to the mirror, are patterned and etched indielectric layer405.
As illustrated inFIG. 4e, adevice layer424 and viaposts409 are formed and isolation trenches are filled from polysilicon deposition on top of seconddielectric layer405. Polysilicon forming the device layer is deposited to the desired device thickness. As shown inFIG. 4f,device layer424 is then etched to form interconnect features419 and anchor features423.
A pre-metal dielectric deposition and contact etch is next performed, followed by a metal deposition and etch step and a passivation deposition step. As shown inFIG. 4g, these steps formmetal interconnects416 and434 covered by apassivation layer413.
As illustrated inFIGS. 4hand4i,this passivation layer is next removed from the mirror area and themirror410,concentric suspension ring414,frame418 and flexures are patterned and etched indevice layer424.Mirror410,concentric suspension ring414,frame418 and flexures are etched indevice layer424, for example, using a deep reactive ion etch stopping on seconddielectric layer405.
Next, as shown inFIG. 4j,aphotoresist coating407 is applied tosubstrate400 and patterned. Release holes415 are etched throughphotoresist coating407 andsecond dielectric405 to expose the silicon ofsacrificial layer422.
As illustrated inFIG. 4k, the silicon ofsacrificial layer422 bound by firstdielectric layer403,second dielectric layer405 and the dielectriclining isolation trench404 is then isotropically etched through release holes415 using, for example, a Xenon Diflouride (XeF2) dry etch. Etchingsacrificial layer422 forms acavity417 underneathmirror410,frame418 and the flexures. Formation ofcavity417 releases mirror410 and the flexures for movement.
As illustrated inFIG. 4l, the dielectric incavity417 is next removed by, for example, an oxide etch using hydrofluoric acid (HF). This is followed by an oxygen plasma resist strip to removephotoresist coating407 to complete the structure as shown inFIG. 4m.Finally, a layer of reflective material, preferably gold, is deposited and patterned onmirror410 to complete the structure shown inFIG. 3.
Although the present invention has been shown and described with respect to several preferred embodiments thereof, various changes, omissions and additions to the form and detail thereof, may be made therein, without departing from the spirit and scope of the invention.

Claims (20)

1. A method of fabricating a microelectromechanical system, said method comprising:
providing a substrate comprising a handle layer of silicon, a device layer of silicon and a sacrificial layer of silicon disposed between the handle layer and the device layer, the handle layer being separated from the sacrificial layer by a first dielectric layer, the sacrificial layer being separated from the device layer by a second dielectric layer;
forming an isolation trench that extends through at least the sacrificial layer, the isolation trench defining a release area in the sacrificial layer;
forming a micromechanical structure in the device layer by etching the silicon of the device layer; and
removing at least a portion of the sacrificial layer of silicon underlying the micromechanical structure to release the micromechanical structure for movement.
20. A method of fabricating a microelectromechanical system, comprising:
providing a substrate comprising a handle layer of silicon, a device layer of silicon and a sacrificial layer of silicon disposed between the handle layer and the device layer;
bonding a first silicon-on-insulator wafer to a handle wafer of silicon and removing a handle layer of the first silicon on insulator wafer to create the sacrificial layer;
bonding a second silicon on insulator wafer to the sacrificial layer and removing a handle layer of the second silicon on insulator wafer to create the device layer;
forming a micromechanical structure in the device layer; and
removing at least a portion of the sacrificial layer of silicon underlying the micromechanical structure to release the micromechanical structure for movement.
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