United States Patent 1191 Tomisawa et al.
[ ELECTRONIC MUSICAL INSTRUMENT WITH KEY CODING IN A KEY ADDRESS MEMORY [75] Inventors: Norio Tomisawa;Yas11iiUchiyama;
-Takatoshi Okumura; Thomas Arlo Stauffer, all of Hamamatsu, Japan [73] Assignee: Nippon Gakki Seizo Kabushiki Kaisha, Hamamatsu-shi, Shizuoka-ken, Japan 22 Filed: Dec. 27, 1972 21' Appl. No.: 318,962
[30] Foreign Application Priority Data [4 Oct. 29, 1974 Primary Examiner-Richard B. Wilkinson Assistant Examiner-Stanley J. Witkowski Attorney, Agent, or Firm-Ladas, Parry, Von Gehr, Goldsmith & Deschamps [57] ABSTRACT In an electronic musical instrument, an actuation of a key switch produces a key address code corresponding Dec. 30, 1972 Japan 47 1502 t0 the y Switch This key address Code is Stored in 8 DEC. 30, 1971 Ja an 46-1504 y ad ss mem ry. A tone clock pulse correspond- Feb. 26, 1972 Ja an 47-19911 g to the y address d is s l t d fr m among :1 Feb. 26, 1972 Japan.... 47-19912 plurality of tone clock pulses- A musical {one Wave Feb. 26, 1972 Ja n,, 47- 913 shape memory stores in analog a wave shape to be re- Feb. 22, 1972 Japan 47-18359 produced The musical tone a e shape s read from Feb. 22, 1972 Japan 47-18360 this Wave Shape m y at a ng r t orr pond- Dec. 30, 1971 Ja an 46-1503 g to the tone Clock thus selected- Attack and decay of the musical tone wave shape envelope are stored in [52] U.S. Cl 84/1.0l, 84/103, 84/ L13, analog in an e op me ory When he key address 84/126 code is stored by the actuation of the key switch, a [51] Int. Cl.G10h 1/02,GlOh 5/02 eloek pulse is Selected to read ut th atta k wave [58] Field of Search 84/l.0l, 1.03, 1.13, 1.24, shape portion at a r g te corresponding to this 84/126; 340/ 1725 clock pulse. When the key switch is cut off, another clock pulse is selected to read out the decay wave [56] References Cited shape portion at a reading rate corresponding thereto.
 UNITED STATES PATENTS The read out output of the envelope memory is ap- 3 515 792 6/1970 Deutsch 84/1 03 plied to the voltage control terminal of the musical 3,577:084 5/1971 Atcherson et al. 84/l.0l x tone wave sfiape memory therebcyi cauimg g muslcal 3,604,299 9/1971 Englund 84/].03 tone wave 5 i memory to Pm Output 3,610,799 10 1971 Watson 84 101 theieofa musical tone Wave Shape with the desired 3,6l0,805 10/1971 Watson et al 84/l.l3 p 3,610,806 10/1971 Deutsch 8411.26 3,639,913 2/1972 Watson 84/l.0l x 19 claim, 18 Drawing Figures 14 WAVE SHAPE JiEh OEV EMR 1 lilltllhiExna CHANNEL MULTIPLEXING 10 A E l3 GATE r 731*; i TIME SHARINGGATE 1 5 WAVE SHAPE I l KEYBOARD a fifi l CIRCUIT I x 2 KEYADRESS 6ENVELOPE 1 1" E I MEMORY COUNTER N l r' i -l T l E I KEYBOARD 7 1 1 I TRUNCATE lCOUNTER 1 l l I I a, i V H 4 4 CHANNEL ,JJL g I 1 LOGlC l CIRCUIT 61,??? 8 Illl 7; CO3M/MON :1
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 5 E. 25 2 E E E :3 E *2 ELECTRONIC MUSICAL INSTRUMENT WITH KEY CODING IN A KEY ADDRESS MEMORY This invention relates to an electronic musical instrument and, more particularly, to an electronic musical instrument capable of producing a musical tone signal corresponding to an address code which is produced by depression of a selected key.
 Electronic musical instruments of conventional types employ a plurality of oscillators or frequency dividers for providing sound source signals from their outputs. These sound source signals are supplied to a tone-color circuit through key switches by closing thereof, whereupon desired musical tone signals are obtained. The prior art electronic musical instruments therefore require a large number of oscillators or frequency dividers. Besides, the tone-color circuit has an extremely complicated construction. As a result, the musical instrument generally has a complicated and large system for producing required musical tone signals.
 Moreover, it was impossible in the prior art electronic musical instruments to obtain musical tone signals having the same wave shapes as those of natural musical instruments. The musical tones reproduced from the prior art electronic musical instruments therefore only had resemblance to natural musical tones to a degree which is far from being satisfactory.
 The prior art electronic musical instruments require a large amount of electrical wiring because each tone generator and key switch need to be connected to each other. Besides, the arrangement by which the sound source signals are obtained through the key switches is subject to the occurrence of switch chatterings and key clicks caused by making and breaking of the key switches.
 Again, in the prior art electronic musical instruments, an envelope of a musical tone signal which determines the rise of the musical tone when a selected key is depressed, sustain of the tone and attenuation of the tone after the key is released has been provided by a switching circuit utilizing charging and discharging characteristics of a capacitor.
 A musical tone signal having a predetermined envelope has thus been obtained from the output terminal of the switching circuit by applying thereto a signal having a predetermined amplitude and operating a switch provided in the charging and discharging circuit in response to the operation of a key switch.
 However, the above described device which utilizes charging and discharging characteristics of a capacitor for obtaining a musical tone signal is incapable of producing a complicated envelope of a natural musical tone which, for example, rises abruptly, then falls somewhat rapidly to a certain level and maintains this level for a certain length of time and falls gradually thereafter. The envelope characteristic of the musical tone signal obtained by the above described prior art system is at best a rough simulation of that of a natural musical tone. Further, the prior art system is incapable of changing at will the time length of the rise portion of the envelope which is formed immediately after depression of a key (hereinafter referred to as attack) and that of the fall portion which is formed after releasing of the key (hereinafter referred to as decay).
 According to the present invention, an electronic musical instrument for obtaining a musical tone which is equivalent to a musical tone of a natural musical instrument or a musical tone having any desired wave shape is disclosed. The invention utilizes a wave shape memory which stores in an analog form the wave shape of a desired musical tone to be reproduced as well as an envelope memory which stores in an analog form the attack and decay shapes of the musical tone to be reproduced.
 For generating a musical tone, a selected manual or pedal key is depressed. When the key is depressed, a key data signal is produced if a key address code provided from a key address code generator is one which corresponds to the depressed key. Controlled by this key data signal, the key address code corresponding to the depressed key is stored in a key address code memory. A tone clock pulse is thereby selected to operate a wave shape readout counter which reads out the wave shape from the wave shape memory at the clock rate of the tone clock pulse. Simultaneously, an envelope counter is operated by another selected clock pulse to read out a desired envelope from the envelope memory at the clock rate of the selected clock pulse. The output of the envelope memory is applied to a voltage control terminal of the wave shape memory whereby the desired musical tone wave shape accompanied by the desired envelope is read from the wave shape memory.
 If two or more keys are simultaneously depressed, key address codes each corresponding to the respective depressed keys are stored in separate key address code memories to operate the respective wave shape readout counters. The outputs of the respective counters are applied in a time-sharing manner to the wave shape memories to read out a plurality of wave shapes. Simultaneously, each of the envelope counters provided in correspondence to the respective key address memories is operated to supply its output in a time-sharing manner to each of the envelope memories for producing a plurality of envelope wave shapes. Thus, a plurality of musical tones are produced at one time.
In order to effect time control of attack and decay,
 the counting speed of the envelope counter is varied by selecting a clock pulse in accordance with the contents of a key address code stored in the key address memory.
 If a new key is depressed while the maximum number of musical tones to be reproduced at a time are being reproduced, the musical tone which has been attenuated to the greatest degree is cancelled and the musical tone corresponding to the new key is reproduced.
 It is therefore a general object of the invention to provide an electronic musical instrument which is capable of producing musical tones of various musical notes.
 It is another object of the invention to provide an electronic musical instrument which is capable of producing a musical tone of a desired tone-color and note with a desired envelope by storing the wave shape of the musical tone and that of the envelope in an analog manner, reading out the wave shape of the musical tone periodically and simultaneously reading out the wave shape of the envelope and multiplying it with the wave shape of the musical tone.
 It is another object of the invention to provide an electronic organ in which a key address code corresponding to a manual or pedal key is produced and the wave shape of a musical tone is read out from a memory at a clock speed corresponding to the key address code.
 It is another object of the invention to provide an electronic musical instrument capable of producing a musical tone which is free from switch chatterings and key clicks by selectively controlling a clock pulse for reading out the stored wave shape of the musical tone by means of a key address code.
 It is another object of the invention to provide an electronic musical instrument capable of simultaneously producing a plurality of musical tones which differ from each other.
 It is another object of the invention to provide an electronic musical instrument in which a key address code memory is provided in each of a plurality of channels and a new key address code which is different from codes .already stored is stored in a not-busy channel whereby the memory can operate effectively.
 It is another object of the invention to provide an electronic musical instrument wherein when a new key is depressed while the maximum number of musical tones to be reproduced at a time are being produced, one of the musical tones which has been attenuated to the greatest degree is cancelled and the new musical It is another object of the invention to provide an electronic musical instrument which is capable of reading out a wave shape of a complicated envelope from a memory by a single counter and controlling the time lengths of the attack and decay wave shape portions.
 It is another object of the invention to provide an electronic musical instrument which is capable of accomplishing, in a time-sharing manner, a multiplexed readout of a plurality of musical tone wave shapes having frequencies different from each other from a single wave-shape memory.
 It is still another object of the invention to provide an electronic musical instrument which is capable of effecting a time-sharing multiplexed readout from an envelope memory and a musical tone wave shape memory which are in synchronization with each other and thereby producing a plurality of musical tones with a desired envelope.
 These and other objects and features of the invention will become apparent from the description made hereinbelow with reference to the accompanying drawings in which:
 FIG. 1 is a simplified block diagram showing one embodiment of the electronic musical instrument according to the invention: FIGS. 2 (a) (b) and (c) are circuit diagrams showing in detail the construction of each part of the system. Only one channel among a plurality of channels of the same construction is illustrated in the figure. Lines designated by reference characters a through I in FIG. 2(b) continue to lines designated by the same reference characters in FIG. 2(0); FIGS. 3 (a) (b) and (c) are respectively block diagrams showing a principle of operation of a counter WSC and a switch SS; FIG. 4 is a circuit diagram of a modified example of the circuit for selecting one tone clock pulse from among a plurality of tone clock pulses in response to a key address code stored in the key address memory; FIG. 5 is a circuit diagram showing the construction of the envelope memory; FIGS. 6 (a) through (e) depict wave shapes of signals appearing in some parts of the circuit shown in FIG. 2 when a selected key is depressed; FIGS. 7 (a) through 7 (e) depict wave shapes of signals appearing in the same parts of the circuit as shown in FIGS. 6 (a) through (e) when the same key as the one corresponding to a decaying musical tone is depressed again; FIGS. 8 (a) through (0) depict wave shapes of signals appearing in some parts of the circuit shown in FIG. 2 when the eleventh key is depressed while the ten musical tones are being reproduced and the channel CN, is in a state of decay; FIG. 9 is a block diagram showing pertinent parts only in FIG. 2 for explaining that a musical tone wave shape with an envelope is obtained in a multiplexed form; FIG. 10 (a) is a diagram showing one example of a wave shape stored in the wave shape memory; FIG. 10 (b) is a graphical diagram showing a time relation between clock pulses AC AC and AC applied to counters WSC WSC- and WSC shown in FIG. 9 and output pulses from a multiplexing ring counter MC; FIG. 11 (a) is a graphical diagram showing one example of a wave shape read from a wave shape memory M FIG. 11 (b) is a diagram showing the output pulses from the multiplexing ring counter MC', and FIG. 12 is a diagram showing musical tone wave shapes W, and W each having an envelope.
 Referring first to FIG. 1,reference numeral 1 designates a keyboard circuit. An address code generator la is provided for generating key address codes representing the respective keys one after another in time sequence. Each key address code consists of a note code portion (four digits), an octave code portion (three digits) and an upper-lower keyboard code portion (one digit). The sequentially generated key address codes are supplied to akey address memory 2. The key address codes are also supplied to a keyboard 1b. If a selected key on the keyboard lb is depressed, a key data signal is applied from the keyboard 1b to acommon logic circuit 3 when the key address code coincides with the code corresponding to the depressed key. Thecommon logic circuit 3 which receives the key data signal transmits it to achannel logic circuit 4 of a channel CN when a logic condition to be described later is satisfied. The channel CN, which is indicated by the large dotted rectangle in FIG. 1, is necessarily duplicated for each numerical tone of a maximum number of musical tones to be reproduced at a time, e.g 10. Thechannel logic circuit 4 transmits the key data signal to thekey address memory 2 only when a logic condition to be described later is satisifed.
 Thekey address memory 2 stores the key address code from the address code generator la only when it receives the key data signal. Hence, if a key data signal is applied to thekey address memory 2, the key address code received by and stored in thememory 2 represents the depressed key. The key address code is applied from thekey address memory 2 to a waveshape readout counter 5. The waveshape readout counter 5 receives tone clock signals respectively corresponding to frequencies of twelve notes of a predetermined octave (e.g., the clock pulse frequency is sixteen times tone frequency in the highest octave), and selects one of the twelve tone clock signals corresponding to the note code portion in the key address code. The octave code of the key address code serves to switch a connection of the counter stages and thereby obtain a readout control signal for reading out a frequency which is one to four octaves lower than the above described tone clock signal. The readout control signal from the waveshape readout counter 5 is applied through atimesharing gate 9 and achannel multiplexing gate 10 to awave shape memory 11 or 12 from which a musical tone signal having a predetermined wave shape is read out. The time-sharing gate 9 and thechannel multiplexing gate 10 will be described more in detail later.
 Anenvelope counter 6 supplies a readout control signal to anenvelope memory 14 for producing an attack and decay envelope of a musical tone to be obtained. Theenvelope counter 6 receives an upper-lower keyboard code from thekey address memory 2 and a condition signal to be described later from thechannel logic circuit 4 and makes a counting operation during the attack time by means of clockpulses applied from an attackclock pulse generator 16. The readout control signal thus produced by theenvelope counter 6 is applied through achannel multiplexing gate 13 to theenvelope memory 14, whereupon an attack wave shape portion stored therein is read out. The read out wave shape is applied to theinput terminal 11a or 12a of thewave shape memory 11 or 12, and hence a musical tone signal with an attack envelope is produced from the output terminal of thememory 11 or 12. When the attack time elapses, thecounter 6 is caused to cease its counting operation by a signal applied from thechannel logic circuit 4. When the key is released, theenvelope counter 6 receives a key off signal from thechannel logic circuit 4 and resumes its counting operation by clock pulses supplied from a decayclock pulse generator 17. Thus, a decay wave shape portion is read from theenvelope memory 14 in the same manner as in the case of reading out the attack wave shape. When this reading out of the decay wave shape portion is completed, a finish signal is applied from thecounter 6 to thelogic circuit 4, whereupon each flip-flop in thekey address memory 2 is reset.
 While a key address code is being stored in thekey address memory 2, a signal representing this state (hereinafter called busy signal") is provided. In case no key address code is stored in thememory 2, this state is hereinafter called not-busy."
 Thecommon logic circuit 3 operates insuch a manner as to always detect whether each channel is busy or not busy and apply a new key address code to a notbusy channel.
 If all of the channels (ten channels) are occupiedby key address codes respectively corresponding to depressed keys and a new key (an eleventh key) is depressed, there is no channel available for the key address code corresponding to the new key. In order to cope with this situation, that one of the envelope counters 6 in the respective channels which has been most advanced in the decay operation is selected for stopping the operation of its channel and applying the new key address code to the now blank channel. More specifically, the contents of theenvelope counter 6 in this channel are previously applied to atruncate counter 7. When all of the channels are in operation, clock pulses are applied at a very high speed from aclock pulse generator 18 to thetruncate counter 7 of each channelfor causing it to make a counting operation at a high speed. Hence, the channel having thecounter 7 whichh'as first produced an overflow output is recognized to be the channel which has been most advanced in the decay operation. The overflow output of thecounter 7 is converted to a truncate signal when the key data signal is applied to thecommon logic circuit 3. This truncate signal is used for resetting thekey address memory 2 and theenvelope counter 6 and causing thekey address memory 2 to store the new key address code, thus causing the channel to operate in the foregoing manner.
 Amultiplexing counter 8 is provided for transmitting readout control signals from all of the channels in a time-sharing manner. Receiving pulses fromclock pulse generator 19, thecounter 8 makes a high speed counting operation and successively supplies pulses for opening the time-sharing gate 9 to each channel.
 FIG. 2 is a circuit diagram showing in detail one preferred embodiment of the electronic musical instrument according to the invention. In FIG. 2, a key address code generator la comprises a flip-flop circuit FFa having four stages, (four binary digits to distinguish twelve different notes), a flip-flop circuit FFb having three stages (three binary digits to distinguish five different octaves) and a flip-flop circuit FFc having one stage (one binary digit to distinguish two different keyboards) connected in series. Clock pulses having a predetermined frequency, e.g., 60 kHz, generated from an address clock pulse oscillator AC are successively applied to these flip-flop circuits. Each bit output of the flip-flop circuit FFa is applied to a decoder D, which converts the four-digit binary code into twelve individual outputs, each bit output of the flip-flop FFb to a decoder D converting the three-digit binary code into five individual output, and each bit output of the flipflop FFc to a decoder D converting the one-digit binary code into two individual output, respectively.
 The outputs of the flip-flop FFa make note codes each one of which represents either one of the twelve notes (C, C B) within an octave. The outputs of the flip-flop circuit FFb make octave codes each one of which represents either one of the octaves (l, 2 5) of the upper and lower keyboards. The outputs of the flip-flop FFc make upper-lower keyboard codes each one of which represents either the upper keyboard or the lower keyboard.
 The decoder D, receives the note codes from the flipflop FFa and'successively produces an output at one of twelve'output terminals thereof in accordance with the contents (binary notations) of the code. An output line K, is connected to one terminal of key switches U,K,, U K,, U K,, L,K,, L K, L K, which correspond to the highest note (e.g. B) of each octave. Similarly, an output line K is connected to one terminal of key switches U,K U K L,K L K which correspond to a next note A Other output lines are connected in a similar manner to key switches respectively corresponding to subsequent notes, and an output line K is connected to one terminal of key switches U,K, U K L,K, L,-,K, corresponding to the lowest note C of each octave.
 The other terminal of each key switch for each octave is connected in common to the input terminal of respective AND circuits A, through A,,,.
 The decoder D receives the octave code from the flip-flop FFb and successively produces an output at one of five output terminals thereof in accordance with the contents of the code. An output line J, is connected to the input terminals of AND circuits A, and A corresponding to the highest octave (5) of the upper and lower keyboards. Anoutput line 1, is connected to the input terminals of AND circuits A and A, corresponding to an octave (4) next to the highest one.Output lines 1,, J and 1 are connected in a similar manner to AND circuits A, and A,,, A, and A and A, and A,,,, respec'tively.
 The decoder D, receives the upper-lower keyboard code from the flip-flop FFc and produces an output at one of two output terminals thereof in accordance with the content (zero. or one) of the code. An output line L, is connected to the input terminals of AND circuits A, through A, corresponding to the upper keyboard and an output line L, to the input terminals of AND circuits A,, through A,,, respectively. The output terminals of these AND circuits A, through A,,, are respectively connected to the input terminals of an OR circuit OR,.
 The contents of the key address code generated in the flip-flop circuits FFa, FFb and FFc successively change as these flip-flops receive the address clock pulses. When a predetermined number (in this case: 256) of clock pulses are applied, the key address code generator returns to its initial state and the flip-flop circuits FFa through FFc successively and cyclically repeat production of the codes in the same manner.
 If a particular key is depressed, an output is produced from either one of the AND circuits A, through A,,, at the moment the key address code exhibits the code notation of the depressed key. Hence, the OR'circuit OR, now produces an output.
 The key address code coming out at the time when the output is produced from the OR circuit OR, therefore represents the depressed key by its note, octave and keyboard.
 Assume now that the key switch L K, (corresponding to B in the lower keyboard) is closed. When the flipflop circuit FFa exhibits 0001, an output is produced at the output line K, of the decoder D,. This output is applied to one of the input terminals of the AND circuit A,,, through the now closed key switch L,,K,. When the flip-flop circuit FFb exhibits 101, an output is produced at theoutput line 1,, of the decoder D which output is applied to another input terminal of the AND circuit A,,. Further, when the flip-flop circuit FFc isl, an output is produced at the output line L, of the'decoder D which output is applied to the remaining input terminal of the AND circuit A,,,. Thus, the output of the AND circuit A,,, is provided through an OR circuit OR, on a line I,- at the moment the above mentioned three conditions occur simultaneously. At thistime, the contents of the flip-flop circuits FFa, FFb and FFc are 00011011 (in this order from left to right). Accordingly, the key address code on lines I, through 1,, represent the depressed key. Since the contents of each flip-flop circuit successively and cyclically change and return to 0 after a predetermined number (256, in this case) of pulses have been counted, an output is provided on theline 1,, at a certain interval of time at the moment the key address code appearing on the lines I, through 1,, represents the depressed key, as long as the key remains depressed.
 In the following description, the output of the OR circuit OR, is referred to as a key data signal. The output lines I, through 1,, of the flip-flop FFa through FFc are respectively connected to the input terminals of AND circuits A,, through A,,, which in turn are respectively connected to the set input terminals of eight flip-flop circuits FF, through FF, constituting thekey address memory 2.
 The key data signal is applied to one of the input terminals of an AND circuit A,,. The other input terminal of the AND circuit A,,, is connected to the output terminal of a NOR circuit NOR,, and the AND circuit A,,,
can produce an output upon receipt of the key data signal only while an unblanking signal to bedescribed later from the NORcircuit NOR, is applied thereto. This output of the AND circuit A,,, is hereinafter referred to as a blanked key data signal. The output terminal of the AND circuit A,,, is connected to one of the input terminals of an AND circuit A,,. The other input terminal of the AND circuit A,, is connected to the output terminal of an AND circuit A,,. Hence the blanked key data signal can come out at the output terminal of the AND circuit A,, only while an output I is produced from the AND circuit A,,. This blanked key data signal is applied to the remaining input terminals of the AND circuits A,, through A,,. Accordingly, the key address code produced at the moment the key data signal exists is stored in the flip-flops FF, through FF,,.
 An OR circuit OR, is connected to each of the bit output terminals of thekey address memory 2 comprising the flip-flops FF, through FF,,. This OR circuit OR, is provided for discriminating whether or not a key address code is stored in thekey address memory 2. When the key address code is stored therein, the OR circuit 0R produces an output l (hereinafter referred to as busy signal.). When, on the contrary, no key address code is stored, it produces an output 0 (hereinafter referred to as not-busy signal).
 A terminal T,, of thekey address memory 2 is connected to one of the input terminals of an AND circuit A,,. The AND circuit A,, produces anoutput 1 only when all of the channels are busy, i.e., all the 0R,s in the respective channels are busy. This output is hereinafter referred to as an all busy signal."
 The output terminals of the flip-flops FF, through FF, are connected to the input terminals on one side of a coincidence circuit or identity logic E0. The input terminals on the other side of the coincidence circuit EQ receive the key address codes. The coincidence circuit EQ detects coincidence of the key address code already stored in the flip-flops FF, through FF, with the incoming key address code and produces a coincidence signal l'at its output when it has detected the coincidence. When there is no coincidence, the output of the coincidence circuit E0 is 0. This coincidence signal is applied to one of the input terminals of the NOR circuit NOR, via terminals T,., and T The same is the case with all the other channels.
 Accordingly, if, when the key is depressed and the key data signal is supplied from the OR circuit OR, to one of the input terminals of the AND circuit A,,,, the key address code applied from he key address code generator to the coincidence circuit EQ coincides with the key address code already stored in thememory 2 of one of the channels, the coincidence signal is'applied to the input terminal of the NOR circuit NOR, and the NOR circuit NOR, produces anoutput 0. Hence, the other input of the AND circuit A,,, is 0 so'that the key data signal does not pass through the AND circuit A,,,. Therefore, a key address code which is the same as that already stored in one channel is prevented from being stored in any other channel.
 Again, if any key address code is already stored in the particular channel, e.g., CN,, and, accordingly, the above described busy signal is being produced from the OR circuit 0R no new key address code is stored in the same channel. The construction for effecting this will be described hereinbelow.
 When a key address code which is different from that already stored in the channel CN, is applied to the coincidence circuit EQ simultaneously with a key data signal, the NOR circuit NOR, produces an output I and the blanked key data signal is applied to one of the input terminals of the AND circuit A through the AND circuit A,,,. In the meantime the busy signal'from the OR circuit OR, is inverted by an inverter I, and applied to one of the inputs of an AND circuit A as aninput 0. Accordingly, the output of the AND circuit A is and the above described blanked key data signal is not applied to the other input terminals of the AND circuits A,, through A Thus no key address code is applied to thekey address memory 2.
 According to the invention, a search is always made to find out whether each channel is busy or not busy so that a new key address code may be stored in a channel which is not busy.
 Assume that the channel CN, is busy and theoutput 1 of a search counter SC is provided on a line SL,. A busy signal is applied to one of the input terminals of an AND circuits A and theoutput 1 on the line SL, is applied to the other input terminal thereof. Accordingly, the AND circuit A produces an output I. This output is applied to one of the input terminals of an AND circuit A via an OR circuit 0R A search clock pulse generated in a search clock generator SCG passes through the AND circuit A and is applied to the search counter SC. Hence, the search counter SC counts one and produces anoutput 1 on an output line SL If a busy signal is applied from a-channel CN the search counter SC further counts one. If a not-busy signal is applied to one of the input terminals'of the AND circuit A in a channel CN the output of the OR circuit OR, is 0 and, accordingly, the search counter SC does not count further and remains in a state in which the output l is provided on an output line SL Thus, the AND circuit A receives theinput signal 1 from the search counter SC and the input signal I which is produced by inverting the not-busy signal in theinverter 1,
and produces an output I. The channel CN is now in a standby condition to receive a blanked key data signal to be transmitted from the AND circuit A,,,.
 As described in the foregoing, the search counter SC is always searching to determine whether each channel is busy or not busy and stops its counting operation when it has found a not-busy channel so that a new key address code may be stored in the not-busy channel.
 Accordingly, if a key address code corresponding to a key data signal produced by depression of a selected key is not already stored in any channel it will be stored in the not-busy channel when the key data signal passes through the AND circuit A,,, and is applied to the input terminals of the AND circuits A,, through A,,,, Le, when the blanked key data signal is applied to the inputs of the AND circuits A,, through A,,,.
 The outputs of the flip-flops FF, through FF are applied to the input terminals of a decoder D via terminals T through T The outputs of the flip-flops FF, through F F, are applied to the input terminals of a decoder D via terminals T through T The decoder D, has twelve output lines and produces anoutput 1 only on an output line which corresponds to the note code applied to the input terminal thereof. Each of the output lines of the decoder D is connected to one input terminal of each of AND circuits A,,, through A The AND gates A through A,,,, receive at the other input terminals respective tone clock pulses at frequencies corresponding to those of the twelve notes of the lowest octave of the upper and lower keyboards. Accordingly, when theoutput 1 is produced from the decoder D,, a
tone clock pulse is selected by the AND circuit to which the output from the decoder D,-is applied. This tone clock pulse is applied through an OR circuit OR, to the input terminal of a counter WSC consisting of eight cascade connected flip-flops, in this case. The decoder D, has five output lines and produces an output I only on an output line which corresponds to the octave code applied to the input terminal thereof. The five output lines are respectively connected to a select switchSS. The select switch SS is provided for switching the connection of the output from the OR logic OR, and the respective flip-flop stages of the counter WSC in accordance with the octave code selected. The detailed construction of a select switch for such switching has been described in a copending US. Pat. application Ser. No. 276,103, filed July 28, I972.
 The rate of reading out thewave shape memory 11 or 12 by a readout control signal obtained by decoding the output of the counter WSC by means of decoders D or D, can be changed by operation of the aforementioned select switch SS. The principle of the foregoing arrangement will be described with reference to FIG. 3 in which the counter WSC has three flip-flop stages.
 If three stages of flip-flops F, through F are connected in series as shown in FIG. 3(a), the output X, Y and Z of the respective flip-flops produced by application of the clock input thereto are as shown in Table 1(a). If these outputs are decoded by a binary input-toindividual output decoder, the outputs of the decoder If, as shown in FIG. 3(b), the flip-flop F, is separated from the rest of flip-flops and fixed at 0 and a clock input is applied to the flip-flop F the outputs X, Y and Z are as shown in Table 1(b). If these outputs are decoded by a decoder, the decoded outputs become 0, 2, 4, 6, 0 6. If the decoded outputs shown in Table 1(b) are used for reading out a wave shape stored in the wave shape memory, the readout rate or speed will be double that obtained when the decoded outputs shown in Table 1(a) are used. If the flip-flops F, and F, are separated from the flip-flop F, as shown in FIG. 3(0), the readout rate or speed will become four times that obtained when the outputs shown in Table 1(a) are used. It will be understood from the foregoing description that the select switch SS switches the connection of the flip-flop stages in the counter WSC in accordance with the octave code thereby changing the rate of reading out the wave shape stored in the wave shape memory.
 The output signals of the counter WSC pass through AND circuits A through A and OR circuits R through-OR In case the depressed key belongs to the upper keyboard, the output signals are applied through AND circuits A through A to the decoder D, where they are decoded and used to successively read out a wave shape stored in thewave shape memory 12. The read out wave shape is amplified in an amplifier AM and is taken out at a terminal 12b. Thewave shape memory 12 stores the wave shape in the form of resistance values. Thus a musical note signal corresponding to the decoding rate is obtained at the terminal 12b. In case the depressed key belongs to the lower keyboard, the output signals of the OR circuit 0R through OR are applied through AND circuits A, through A to the decoder D These output signals are decoded in the decoder D and used to read out a wave shape stored in thewave shape memory 11. The read out wave shape is amplified in an amplifier AM and a musical tone signal is taken out at a terminal llb.
 Since the output of the flip-flop FF of thekey address memory 2 is l when a key on the lower keyboard is depressed, theoutput 1 is applied to one input terminal of each of the AND circuits A through A via an AND circuit A and an OR circuit OR Therefore, the outputs of the counter WSC are applied to the decoder-D Whereas, the output of the flip-flop FF is 0 whenfakey on the upper keyboard is depressed, so that theoutput 1 is applied to one input terminal of each of the AND circuits A through A through the AND circuit A the OR circuit OR and an inverter l Therefore, the outputs of the counter WSC are applied to the decoder D The musical tone signals obtained at the terminal T and T should have an envelope which includes an attack characteristic lasting for a certain length of time after depression of the key and a decay characteristic lasting for a certain length of time after the key is re leased. In order to provide this envelope for the musical tone signals, the output of theenvelope memory 14 is applied toterminals 11a and 12a of thewave shape memories 11 and 12.
 In the foregoing example, a tone clock pulse corresponding to a selected note code is selected from among tone clock pulses at frequencies corresponding to the twelve notes of the lowest octave and is applied to a wave shape readout counter. The connection of each stage of the wave shape readout counter is switched for changing the rate of reading out the wave shape stored in thewave shape memory 11 or 12 in accordance with the depressed key.
 Referring to FIG. 4, a modified example will now be described. In this example, tone clock pulse corresponding in number to keys on each of the upper and lower keyboards are provided. A tone clock pulse is directly selected from among these tone clock pulses in accordance with the note code and the octave code, and the tone clock pulses is directed to operate, in response to the upper-lower keyboard code, one of the wave shape readout counters associated respectively with the to wave shape memories provided for the upper and lower keyboards.
 The outputs of flip-flops FF, through FF are applied to a decoder D The decoder D receives selected note and octave codes and produces an output at one of a plurality of outputs, e.g., 60, in response to the note and octave codes. Each output line of the decoder D is connected to one input terminal of each of AND circuits A through A The other input terminal of 'each of the AND circuits A through A receives each corresponding tone clock signal. The tone clock signals are signals at frequencies corresponding to notes C, through B When an output is produced on one of the output lines of the decoder D.,, the AND circuit to which this output line is connected conducts and passes a tone clock signal which is applied to this AND circuit. This tone clock signal is applied through an OR circuit OR to the inputs of AND circuits AD, and AD In the meanwhile, the flip-flop FF stores either the upper keyboard code or the lower keyboard code and its output is either 0 or 1. If, for example, theoutput 0 is produced inresponse to the upper keyboard code, thisoutput 0 is inverted by aninverter 1 and asignal 1 is applied to one of the input terminals of the AND circuit AD,. This causes the AND circuit AD to conduct and the tone clock signal is transmitted to a terminal Ta. Similarly, if the lower keyboard signal is applied to the flip-flop FF the AND circuit AD conducts and the tone clock signal is transmitted to a terminal Tb.
 Thus, when a selected key is depressed, a key address code corresponding to the depressed key is stored in the key address memory land a tone clock signal corresponding to the key address code is selected and transmitted to the output terminal by a tone clocksignal selection circuit 3.
 In the foregoing example, the number of keys of the upper and lower keyboards is each. This number may of course vary. Further, if a single keyboard is used instead of the upper and lower keyboards, the flip-flop FFc and the decoder D3 shown in FIG. 2 and the AND circuit A flip-flop FF inverter I and the AND circuits AD, and AD will be omitted.
 Referring again to FIG. 2, the reading out of the attack and decay envelope wave shape from thememory 14 will now be described.
 An envelope wave shape is sampled n times and an amplitude of the envelope wave shape at eachsample time is respectively stored in anenvelope memory 14. In thememory 14, the attack portion of the envelope wave shape is stored ataddresses 1 through a predetermined one, e.g. 16. The decay portion is stored at the subsequent addresses to the last one, e.g., 63.
 T,,,, through T,, designate readout control terminals of theenvelope memory 14. When readout control signals which are the outputs of a decoder D are applied to these terminals as will be described later, the wave shape amplitudes at the address corresponding to these terminals are read out. I
 When the key address code is stored in thekey address memory 2, theoutput 1 of the flip-flop FF,, is applied to one of the input terminals of an AND circuit A in case the depressed key belongs to the lower keyboard. Accordingly, clock pulses applied to the other input terminal of the AND circuit A from an attack clock generator ACU pass through the AND circuit A and are applied to one of the input terminals of an AND circuit A via an OR circuit OR Another input terminal of the AND circuit A receives the busy signal from the terminal T The remaining input terminal of the AND circuit A receives a signal I from an AND circuit A Hence, the attack clock pulses are provided at the output terminal of the AND circuit A and applied through an OR circuit OR to the input terminal A is and the attack clock of an envelope counter ADC which consists, for example, of six flip-flop stages. The envelope counter ADC starts counting upon receipt of these attack clock pulses. While the counter ADC counts 0 through 16, the outputs thereof are applied to the decoder D via terminals T through T AND circuits A,,, through A and OR circuits OR through OR The decoder D operates to decode the binary notations to individual outputs which successively come out one after another similar to outputs from a ring counter thereby producing readout control signals, on one of a plurality of output lines H, through H,, in response to counting of the counter ADC. When the counter ADC counts 1, a readout control signal is produced on the output line H,. As the counter ADC continues counting, readout control signals are successively produced on the output lines H toward H Accordingly, the decoder D decodes the output of the counter ADC and applies the readout control signals from 0 to 16 to theenyelope memory 14 thereby causing the attack wave shape to be provided at a terminal 14b through an amplifier AM Since the output of the flip-flop stage of the most significant digit and the flip-flop stage next thereto of the counter ADC are respectively 0 while the counter ADC counts from 1 through 16, the outputs of inverters l., and l, are respectively I and, accordingly, the AND circuit A produces an output I. This output of the AND circuit A,,,, continues to be applied to the AND circuit A,,,,. and hence the attack clock pulses continue to be applied to the counter ADC via the AND circuit A and the OR circuit OR When the counter ADC counts up to 16, either of the outputs of the flip-flop stage of the most significant digit and the flip-flop stage next thereto is 1. Hence, the output of the AND circuit pulses do not pass through the AND circuit A,,,,. The counter ADC therefore ceases counting. Theoutput 0 of the AND circuit A,,,, is inverted to l by aninverter 1,, and applied to the input terminal of the AND circuit A When the key is released and the key switch is off, the key data signal becomes 0. Thissignal 0 is inverted to l by an inverter l and thereafter is applied to one of the input terminalsof an AND circuit A,,,. The other input terminal of the AND circuit A receives the coincidence signal from the terminal T The key address code is successively supplied from the key address code generator la to the coincidence circuit EQ even after the key is released. Accordingly, the coincidence signal is produced at a predetermined time interval even after the key is released. When this coincidence signal is applied to the other input terminal of the AND circuit A the AND circuit A produces anoutput 1. This output I represents a key-switch-off state and is applied to the set input terminal of a flip-flop FF to set-the flipflop FF. The set output l of the flip-flop FF is applied as a key-off signal to the input terminal of the AND circuit A Decay clock pulses from a decay clock generator DCU are applied to one of the input terminals of the AND circuit A, via an AND circuit A and an OR circuit OR, Accordingly, when the key-off signal is applied to the AND circuit A the decay clock pulses are provided at the output terminal thereof and applied to the input terminal of the envelope counter ADC through the OR circuit OR,,,. The counter ADC resumes counting from 17 upon receipt of'the decay clock pulses. The decoder D, supplies readout control signals (No. 17 and thereafter) to thememory 14 thereby causing the decay envelope wave shape to be produced at the terminal T The envelope wave shapes read out in the above described manner are applied to theterminals 11a and 12a of thewave shape memories 11 and 12.
 When the envelope counter ADC has counted 63, the states of all the flip-flop stages become 1 and an AND circuit A,,,, produces anoutput 1. This output signal is applied to the reset input terminal of the flip-flop FF via a terminal T,,, and an OR circuit OR This causes the flip-flop FF to be reset and the key-off signal from the flip-flop FF becomes 0. Hence, the decay clock pulses cease to pass through the AND circuit A,,,.
 In the meantime, the signal from the terminal T,,, is applied to the reset input terminal of each of the flipflops FF, through FF,, via an OR circuit OR and resets all of these flip-flops.
 Thus, reading out of the envelope wave shape from theenvelope memory 14 has been completed.
 FIG. 5 shows an example of theenvelope memory 14. An envelope wave shape to be stored is sampled n time (e.g., 64). The amplitude of the wave shape at each sample time is stored by means of resistance in accordance with a voltage dividing ratio. A constant voltage V is applied between the terminal T and the ground. If a connecting point with the ground is designated as A,, a connecting point of resistances R and R, as A and a connecting point of resistances Rn and Rn as An, voltages at the connecting points A, through A,, are '0, R V/R +R R',,V/R,,+R,, respectively. These voltages respectively correspond to the amplitudes of the envelope wave shape to be stored. The drains of transistors TR, through TR,, are respectively connected to the connecting-points A, through An. The sources of the transistors TR, through. TR are successively connectedto eachother and connected through an amplifier AM,, to theoutput terminal 14b. The gates of these transistors are respectively connected to readout control terminals T through T,,,,,. The drain of'the transistor TR, is connected to the ground, its source to the source of the transistor TR, and its gate to the readout control terminal T,,,, respectively.
 Whenthe readout control signal is applied from the decoder D,, to one of the readout control terminals T through T,,,,,, the transistor connected to the terminal conducts and the corresponding voltage is supplied to the terminal 14b after being amplified in the amplifier AM Itwill be understood from the foregoing descrip' tion that a musical tone signal with the attack and decay envelope is provided at the terminal 12b.
 The time lengths of the read out attack and decay wave shape portions can be varied by employing attack and decay clock generators of a variable type and thereby varying the frequencies of the clock pulses generated by these clock generators.
 The reading outof the attack and decay envelope fromthe envelope memory has been described hereinafter with regard 'to the case wherein the key on the lower keyboard was depressed. In case a key on the upperkeyboard is depressed, theoutput 0 of the flipflop FF, is inverted to l by an inverter I, and applied to the AND circuits A and A Hence, attack clock pulses from the attack clock generator ACL pass through'the AND circuit A,, during the attack time and