US3662220A - Time delay device - Google Patents

Abstract

This invention relates to time delay devices and more particularly to electronic time delay devices that have particular but not exclusive application as a time delay means for repeating circuit interrupters or reclosers.

Description

I United States Patent [151 3,662,220 Riebs 1 May 9, 1972 54] TIME DELAY DEVICE 2,845,581 7/1958 Hodges et al. ..3l7/36 2,875,382 2/1959 Sandin et al. ..317/51 [72] Inventor. Richard E. Riebs, Hales Comers, WIS. 2,895,084 7/l959 siedband 1 7/22 [73] Assignee: McGraw-Edison Company, Milwaukee, 5, l 960 Title t i --3 17/60 Wi 2,942,155 6/1960 Loeffler... 1 7/22 2,961,582 11/1960 Ford ..3l7/22 I221 F1|ed= 1959 2,673,956 3/1954 Beard ..324/68 [21] APPL 00 5 7 2,934,701 4/1960 Weisberg..... ...3l7/14l 2,977,510 3/l96l Adamson ..3 17/36 U.S. TD, 3 17/22, 3 l R, Priniar Examiner-J, D, Tramme" /1 S Anorney-Charles A. Prudell [51] lnt.Cl. ..H0lh 47/18 [58] Field ofSearch ..317/148.S, 36, 51, 22, 33; [57] ABSTRACT This invention relates to time delay devices and more particu- [56] References Cited larly to electronic time delay devices that have particular but not exclusive application as a time delay means for repeating UNITED STATES PATENTS circuit interrupters or reclosers.

2,468,418 4/1949 Thumim ..3 17/36 28 Claims, 12 Drawing Figures PATENTEDHAY 9 1912 sum 2 [1F 5 IN V EN TOR.

Richard E. Riebs PATENTEDMAY 9 I972 SHEET 3 UP 5 RL'c/mrd 15. R4665 r/fttorney afttarng PATENTEDMY 9 1972 SHEET 5 [IF 5 TIME DELAY DEVICE Most protective devices utilized in electrical power and distribution circuits have inverse time-current characteristics, that is, they will operate rapidly upon the occurrence of a high fault current and will operate relatively slower upon smaller fault currents.

It is common practice to utilize a variety of protective devices having time-current characteristics of difi'erent shapes and slopes in a single electrical system. For example, a distribution system may be provided with a repeating circuit interrupter or recloser connected in serieswith the main line and located adjacent the source of power and fuses disposed in feeder lines radiating from the main 'line. Because the majority of faults in such systems are temporary in nature, and will clear in a relatively short time, it is common to arrange for the execution of a series of rapid opening and reclosing operations by the repeating'circuit interrupter, so that the period in which the system remains'energized is shorter than the time necessary for the fuse elements to melt. If the fault does not clear during this initial series of rapid operations, they are followed by a second series of operations in which the interrupter contacts remain closed for a period of sufficient length'to melt the fuse elements. This time delay, however, must not be of such duration that damage to the system itself will result. An

optimum timing relationship for a wide range of fault current values can best be achieved by utilizing a repeating circuit interrupter or recloser having time-current characteristics which closely parallel those of the other protective devices with which it is coordinated.

Prior art time delay devices generally utilized in reclosers and repeating circuit interrupters are either hydraulic, mechanical or electromagnetic. The hydraulic time delay devices, such as dash pots, are not entirely satisfactory because temperature changes tend to change the viscosity of the hydraulic fluid and, as a result, the time-delay characteristic of the device. Electromagnetic time delay devices, such as induction relays, are also unsatisfactory because the induction disc cannot be rapidly reset after the disappearance of a fault, because'the inertia of the induction disc tends to result in coasting, and because the pull-in current of such devices is substantially greater than their dropout current and as a result the device cannot reset after the disappearance of a fault unless there was a sufi'icient current drop. Another shortcoming of prior art time delay devices are their large number of moving parts which greatly increases maintenance costs and inherently subjects them to changes in their time-current characteristics due to wear. Also, because the speed of the mechanical components of these devices are, of course, dependent on the magnitude of the fault current, they are extremely inaccurate at very low values of fault current. A further disability of prior art time delay devices is that in any given device the time current characteristics are relatively inflexible. As a result of the latter, prior art devices designed for coordination with one type of secondary protective device cannot conveniently be adapted for use with another.

It is an object of the invention to provide a new and improved time delay device.

It is another object of the invention to provide an electronic timing device which is particularly, but not exclusively, adapted for use with repeating circuit interrupters.

It is a further object of the invention to provide an electronic time delay device wherein the slope and/or the height of its time current characteristic is easily and accurately adjustable.

It is another object of the invention to provide a time-delay device whose time-current characteristic is not affected by temperature or the wear or inertia of mechanical parts.

It is still another object of the invention to provide a timing device for use with an electric system which accurately and quickly initiates the timing cycle upon the occurrence of a predetermined circuit condition.

It is a still further object of the invention to provide a timing device for use with an electrical system that accurately determines when the proper timing period has elapsed.

It is yet another object of the invention to provide a timing device which is rapidly reset after the disappearance of a fault regardless of the magnitude of the no fault current.

It is another object of the invention toprovide a time-delay device which is relatively accurate at small .values of fault current.

These and other objects of the invention will become apparent from the detailed description of the invention taken in view of the drawings in which:

FIG. 1 is a block diagram showing the major components of the instant invention;

FIG. 2 is a circuit diagram of one embodiment of the invention;

FIGS. 3-6 and 11 are curves showing how the time currentcharacteristic of the device can be varied;

FIG. 7' is a circuit diagram of an alternate embodiment of the invention embracing various modifications of the embodiment shown in FIG. 2;

FIGS. 8 and 9 are alternate embodiments of certain portions of the instant invention; I

FIG. 10 shows a schematically illustrated repeating circuit interrupter having a time delay device according to the invention; and

FIG. 12 is a block diagram showing how the instant invention canbe modified for use with a three phase system.

FIG. 1 is a block diagram showing the major components of a time-current relay according to the invention and includes atiming portion 10, a minimum actuationcurrent sensing portion 12 and a condition sensing andactuation portion 14. If the device is to be used in a circuit interrupter or recloser, it is coupled to the system to be protected 20 by means of acurrent transformer 22, abridge type rectifier 24, and a currenttransformer shunting switch 26. Whencoupling switch 26 is opened the input of thetiming portion 10 receives a rectified current proportional to the alternating current flowing insystem 20. The closing of coupling switch 26 short circuits the secondary ofcurrent transfonner 22, and, in effect, uncouples the time delay device from thesystem 20.

In general terms the timing portion comprises means operable upon the occurrence of a predetermined circuit condition to begin timing the condition as a function of its magnitude. This is accomplished by integrating the condition so that the timing cycle comprises the period required for this integral to reach a predetermined value.

' More specifically this portion includes a first energy storage means coupled to rectifier 24 and adapted, under certain conditions of operation, to be charged by the rectified secondary current fromtransformer 22. The time required for this energy storage means to achieve a predetermined energy level for any given'current insystem 20 determines the time current characteristic of the device. This characteristic may be modified by utilizing impedances in circuit with the first energy storage means. A second energy storage means may also be coupled to therectifier 24 so that energy may be stored therein to provided operating power for the other portions of the device.

The minimum actuationcurrent sensing portion 12 includes means for sensing the occurrence of the predetermined circuit condition and thereupon initiating the integrating cycle of thetiming portion 10. This portion is connected to therectifier 24 and to thetiming portion 10 and is operative to prevent the storage of energy on the first energy storage means until the magnitude of the current in the secondary ofcurrent transformer 22 indicates the occurrence of said predetermined circuit condition. Upon this event the first energy storage means is allowed to charge up. The condition sensing andactuation portion 14 comprises means for determining when the condition integral reaches a predetermined value and includes condition sensitive means coupled to said first energy storage means and operable when the energy stored therein reaches a predetermined level.

In the embodiment of the invention shown in FIG. 2, the first and second energy storage means of thephase timing portion 10 comprise atiming capacitor 29 and a power supply capacitor 30 and each is associated with current dividing charging circuits so that they may be coupled to the secondary ofcurrent transformer 22. These charging circuits include afirst charging resistor 32 in series with positive input terminal 34 and asecond charging resistor 36 and the emitter-base circuit of acharging transistor 40 which are connected in series with each other and in parallel with thefirst charging resistor 32 so that a current split will result therebetween. The positive power supply terminal A of power supply capacitor 30 is connected to the junction of thefirst charging resistor 32 and the base ofcharging transistor 40 and the negative power supply terminal B thereof is connected to thenegative input terminal 42 so that the current flowing inresistor 32 will charge the power supply capacitor 30. One end oftiming capacitor 29, on the other hand, is connected to the collector ofcharging transistor 40 and the other end thereof is connected to thenegative input terminal 42 so that it will be charged by the current flowing incharging resistor 36, since the emitter and collector currents ofcharging transistor 40 are substantially equal. It will be appreciated, that by makingcharging resistor 36 relatively larger than chargingresistor 32, a larger portion of the input current will flow to the power supply capacitor 30 than will flow in the charging circuit oftiming capacitor 29, thereby allowing the latter to be smaller, and hence more sensitive, than would be the case if there was a substantially equal current split.

In order to limit the charge stored on power supply capacitor 30, a by-pass circuit consisting of transistor 44 and Zener diode 45 are provided. The emitter of transistor 44 is connected to the positive power supply terminal A, the collector thereof is directly connected to the negative power supply terminal B, and its base is connected to the latter through Zener diode 45. In operation, whencoupling switch 26 is opened, charge will be stored on capacitor 30 until its voltage, which is also the emitter-base voltage of transistor 44, exceeds the breakdown potential of Zener diode 45, whereupon the excess charge on capacitor 30 will begin to flow through the emitterbase circuit of transistor 44 and Z ner diode 45. In this manner, current not necessary to maintain power supply capacitor 30 at its desired voltage, is by-passed through transistor 44 and Zener diode 45. I

The charging circuit oftiming capacitor 29 includes a first variable timing resistor 47 in series with said timing capacitor and connected between its positive terminal C and the collector oftransistor 40, and a second variable resistor 48 in a parallel circuit with respect to said ti ing capacitor. While in the embodiment of FIG. 2 the second variable resistor is connected to the collector of transistor 0, as will become apparent from the discussion of other bodiments, it may be connected to any point between the p sitive terminal C oftiming capacitor 29 and the emitter oft nsistor 40. In order to prevent the discharge oftiming capacitor 29 through parallel connected timing resistor 48 a rec'tifier 50 is connected betweentiming capacitor 29 and its p int of connection with said resistor which in FIG. 2 is betwee resistor 47 and the collector oftransistor 40.

Series connected timing resistor 47 and parallel connected timing resistor 48 perform the function of modifying the slope of the time-current characteristic of the device. As will be more fully explained below, the time-delay device illustrated in FIG. 2 will be made operative when the voltage at junction point D, between the collector oftransistor 40, rectifier 50 and timing resistor 48, reaches a predetermined value. It can be seen that this voltage comprises the sum of the voltage drop across timing resistor 47 and the voltage across timingcapacitor 29.

In order to illustrate how the timing resistors 47 and 48 operate to modify the time-current characteristics of the device, reference is made to FIGS. 3, 4, and 6 in which curve 52 represents the time-current characteristic which the device illustrated in FIG. 2 would have if resistors 47 and 48 were eliminated, that is, if resistor 47 were short circuited or had a value of zero resistance so that there would be no voltage drop across it, and if resistor 48 were open circuited or had a value of infinite resistance so that it could not shunt current around timingcapacitor 29. In other words, curve 52 represents the time required for the current flowing inresistor 36 to charge timingcapacitor 29 to the predetermined energy level required for operation. It will be appreciated that timingcapacitor 29 has an inverse time-current characteristic, that is, it charges up in a relatively short time at high current values while at low current values a relatively longer charging time is required.

The addition of timing resistor 47 will have little effect on the time-current characteristic of the device at very low values of current such as I in FIG. 3, because the voltage drop across this resistor, resulting from such low current values will be negligible compared to the total voltage required for operation. As a result, the voltage across timingcapacitor 29, resulting from the accumulation of charge thereon, will comprise substantially all the voltage required for operation. At higher values of current, however, such as I, in FIG. 3, the voltage drop across timing resistor 47 will be substantially increased, and, accordingly, represent a significant portion of the total operating voltage. As a result, junction point D in FIG. 2 will reach the required operating voltage in a shorter time than that required to charge timingcapacitor 29 to this voltage value. The use of timing resistor 47 will have the effect, therefore, of shortening the operating time of the time current device for a current I, from a time T oncurve 52, which is the charging time oftiming capacitor 29, to a shorter time T oncurve 53. Similarly, an increase in the resistance of timing resistor 47 will increase the voltage drop across it, thereby further shortening the operating time for current I, from time T: oncurve 53 to time T oncurve 54. It can therefore be seen that by varying timing resistor 47 from zero through a range of finite values, a family of time current characteristics can be obtained similar tocurves 52, 53 and 54 shown in FIG. 3.

Referring now to FIGS. 2 and 4, it can be seen that if the resistance of timing resistor 48,were changed from infinity to some finite value, current would be shunted through it and around timingcapacitor 29. As a result, some of the current that would otherwise charge timingcapacitor 29 will be drained off, thereby lengthening the time required forcapacitor 29 to charge up to a predetermined voltage value. This effect will be negligible at a very high current value, such as I, in FIG. 4, because the current drained off by timing-resistor 48 will be negligible compared to the total current flowing in the collector oftransistor 40 so that the current available to charge timingcapacitor 29 will be substantially all of this collector current. At relatively lower values of fault current, however, such as I in FIG. 4, the current drained off through timing resistor 48 becomes a substantial portion of the current flowing in the collector oftransistor 40 so that the time required for timingcapacitor 29 to charge up will be significantly increased. As a result, by changing the resistance of timing resistor 48 from infinity to some finite value, the charging time oftiming capacitor 29 will increase from time F oncurve 52 to a longer time T oncurve 56. Similarly, a further decrease in the resistance of timing resistor 48 will increase the amount of shunted current thereby further lengthening the time required for the charging of timingcapacitor 29 by a current I from time T oncurve 56 to a longer time T oncurve 57.

It can therefore be seen from FIGS. 3 and 4, that the slope of the time-current characteristic of the device at high fault current values can be substantially modified by varying timing resistor 47 while at low fault current values the slope thereof can be substantially modified by varying timing resistor 48. As a result, by a suitable variation of both timing resistors 47 and 48 a family of time current characteristics, such as those represented bycurves 52, 58 and 59 shown in FIG. 5, may be obtained.

The time current characteristic of the device can be further varied by changing the capacitance of timingcapacitor 29 whereupon the time required for it to charge up will change accordingly. Such variations will have the effect of moving the time-current characteristics of the device vertically, giving a family of time-current characteristics such ascurves 52, 62 and 61 in FIG. 6. Hence, by suitably varyingtiming capacitor 29 and timing resistors 47 and 48 the time current characteristic of the relay can be widely varied both as to slope and height. As a result of this flexiblity, the time-current device according to the invention may be easily and accurately coordinated with a wide variety of secondary protective devices without modification or re-design.

In order to insure that the device will operate only upon the occurrence of a predetermined fault in thesystem 20, the minimum actuationcurrent sensing portion 12 is provided with means for sensing the occurrence of said fault and to then initiate thetiming portion 10. More specifically this portion is provided with means for shunting thetiming capacitor 29 during no fault conditions and means responsive to a predetermined current in said system to prevent the discharge of said timing capacitor through said shunting means upon the occurrence of a fault.

Referring again to FIG. 2,timing capacitor 29 is normally shunted byleakage resistor 63 through the path defined byconductor 65, rectifier 66,conductor 68 andnegative supply conductor 69. As a result of this leakage throughresistor 63,timing capacitor 29 is held to a negligible voltage with respect to that value necessary for operation of the device. In this manner the time-current relay is prevented from operating at currents below the desired minimum fault or actuation current value.

The minimum actuation current of the device is sensed by comparing an electrical signal which is proportional to the current in system with the actuation value of a signal responsive device. When this actuation value is exceeded, the minimum actuation current sensing portion is made operative to prevent the further discharge of timingcapacitor 29 throughleakage resistor 63. As a result,timing capacitor 29 commences charging up, and the timing cycle begins.

The signal responsive device of the minimum actuationcurrent sensing portion 12 comprises atransistor 70 whose base is connected to the input terminal 34 through a coupling circuit so that said base receives a voltage proportional to the current flowing in the secondary ofcurrent transformer 22. The emitter oftransistor 70 is held at a fixed potential by aZener diode 72 and aresistor 73. When the minimum actuation current of the device is equalled or exceeded the base potential oftransistor 70 will exceed its emitter potential so that it will conduct, whereupon, the minimum actuationcurrent sensing portion 12 becomes operative to prevent the further discharge ofcapacitor 29 throughleakage resistor 63.

The coupling circuit to the base oftransistor 70 includes a first coupling transistor 75 and a second coupling transistor 76. The base of the first coupling transistor 75 is connected to the positive power supply terminal A throughpositive supply conductor 77, while the emitter thereof is connected to input terminal 34 byconductor 78 andresistor 79. It can be seen thatresistor 32 on the one hand andresistor 79 and the emitter-base circuit of transistor 75 on the other are connected in parallel, and accordingly, the emitter of transistor 75 will be at a higher potential than its base. As a result, collector current will flow from transistor 75 to the voltage divided consisting of resistor 80 and adjustable resistor 82, which are serially connected between said collector and the negativepower supply conductor 69. This current will be proportional to the current insystem 20 and accordingly the potential of junction point B between resistors 80 and 82 will be proportional to this current. The base of the second coupling transistor 76 is connected to junction point E while its emitter is connected to thenegative supply conductor 69 through resistor 84 and its collector is connected to the positivepower supply conductor 77 throughresistor 86. The voltage on the base of coupling transistor 76, which is proportional to the current insystem 20, determines the magnitude of its emitter and collector currents. It can be seen, therefore, that the potential of junction point F, between the emitter of transistor 76 and resistor 84, will also be proportional to the system current since it is determined by the voltage drop across resistor 82 and hence, is proportional to the emitter current of transistor 76. The base of signalresponsive transistor 70 is connected to junction point F and its emitter is connected to junction point G betweenZener diode 72 andresistor 73. The other terminals ofZener diode 72 andresistor 73 are connected to thenegative supply conductor 69 and thepositive supply conductor 77, respectively. When the system is initially energized,resistor 73 will hold junction point G at the potential of positive power supply terminal A until this potential exceeds the breakdown potential ofZener diode 72 whereupon it will begin conducting and junction point G will thereafter be held at this potential.

Because signalresponsive transistor 70 is of the N.P.N. type, it will conduct when its base potential exceeds its emitter potential, and hence when the potential of junction point F exceeds the potential of junction point G. It will be recalled that the potential of junction point F is proportional to the potential of junction point E and that the voltage of the latter is the function of the voltage drop across variable resistor 82. Hence, by adjustment of variable resistor 82, the voltage of junction point F can be made to exceed the breakdown potential ofZener diode 72 and, as a result, the potential of junction point G, at any desired value of current insystem 20. By properly setting resistor 82, therefore,transistor 70 can be made operative at any predetermined value of system current which is then the minimum actuation current of the time delay device. Any current equal to or above this minimum actuation current is considered a fault current and will cause the device to operate.

The collector of signalresponsive transistor 70 is connected to the negativepower supply conductor 69 throughcapacitor 88 and to the positivepower supply conductor 77 through serially connectedresistors 90 and 92. The base of anoutput transistor 94 is connected to junction point H betweenresistors 90 and 92 while its emitter is connected to positivepower supply conductor 77 and its collector is connected to junction point J betweenconductor 68 andleakage resistor 63. Before'signalresponsive transistor 70 begins conducting,resistor 92 will hold junction point H at the same potential as the emitter ofoutput transistor 94 so that said transistor will not conduct. When signalresponsive transistor 70 begins conducting as a result of a fault, however, collector current will flow from the positivepower supply conductor 77 throughresistors 92 and 90. The resulting voltage drop acrossresistor 92 lowers the potential of junction point B, and hence the base ofoutput transistor 94 relativeto its emitter potential whereupon said transistor will begin conducting collector current to junction point J. The collector current fromoutput transistor 94 flows throughleakage resistor 63 raising the potential of junction point J to some positive value.Capacitor 88 performs the function of holding junction point K at a substantially constant value aftertransistor 70 begins conducting so thattransistor 70 will continue to conduct even though the power supply is a pulsating DC which periodically goes through zero.

It will be recalled that timingcapacitor 29 has been discharging throughresistor 63 during the period of no-fault operation, so that the potential at its positive terminal C will be less than the potential that junction point J assumes as a result of the current flowing through the collector ofcoupling transistor 94 upon the occurrence of a fault. This difference in potential between points C and J, prevents the further discharge of timingcapacitor 29 throughresistor 63, while rectifier 66 prevents reverse current flow from junction point J to terminal point C. Since timingcapacitor 29 can not longer discharge throughresistor 63 it begins charging and continues until its voltage, plus the voltage drop across resistor 47 is sufficient to cause operation of the energy sensing andactuation portion 14 of the device in the manner described in the ensuing paragraphs.

The condition sensing andactuation portion 14 is operative to compare a voltage proportional to the voltage at junction point D with a fixed reference voltage. When this proportional voltage exceeds the reference voltage avoltage comparison transistor 98 begins conducting whereupon the actuation portion becomes operative.

Thevoltage comparison transistor 98 is coupled to junction point D by couplingtransistors 100 and 101, which are cascaded as emitter followers to reduce to a very small value the current drawn from thetiming portion 10. Each of thecoupling transistors 100 and 101 is of the NPN type and the collector of each is connected to the positive power supply terminal A, while the base oftransistor 100 is connected to junction point D and its emitter is connected to the negative power supply terminal B through resistor 103. In a like manner, the base oftransistor 101 is connected to the emitter oftransistor 100 and the emitter thereof is connected to the negative power supply terminal B through a voltage divider consisting ofvariable resistors 105 and 106 which are joined at junction point M. Because the base ofcoupling transistor 100 is connected to junction point D and because the emitter thereof is connected to the negative power supply terminal B through resistor 103 its base potential will exceed its emitter potential and emitter current will flow through resistor 103. The emitter current from couplingtransistor 100 flowing through resistor 103 will, in turn, raise the potential of junction point L between resistor 103 and the emitter and base oftransistors 100 and 101 respectively, to some positive potential which is proportional to the potential at junction point D and which is higher than the emitter potential oftransistor 101. This results in atransistor 101 emitter current flowing throughresistors 105 and 106, and this current is also proportional to the voltage at junction point D. The resulting voltage drops inresistors 105 and 106 places a potential on junction point M which is proportional to the potential at junction point D.

The base ofvoltage comparing transistor 98 is connected to junction point M so that its base voltage is proportional to the voltage at junction point D.

The emitter ofvoltage comparing transistor 98 is connected to the junction point P betweenZener diode 110 andresistor 111 whose other terminals are connected to the negative power supply terminal B and to the positive power supply terminal A respectively. When couplingswitch 26 is initially opened,resistor 111 will hold junction point P at the potential of the positive power supply terminal A until this potential exceeds the breakdown potential ofZener diode 110. The potential of point P is, thereafter, held at the breakdown potential ofZener diode 110 and, as a result, the emitter ofvoltage comparing transistor 98 will be held at this fixed potential.

Becausevoltage comparing transistor 98 is of the NPN type it will conduct only when its base potential exceeds its emitter potential. Hence, when the potential at junction point M is less than the breakdown potential ofZener diode 110, thevoltage comparing transistor 98 will be non-conducting.Resistor 105 is made adjustable so that when junction point D reaches the potential at which it is desired to operate thecondition sensing portion 14, the voltage at point M can be made just sufficient to causevoltage comparing transistor 98 to begin conducting.

A relay winding 120 is connected between the collector ofvoltage comparing transistor 98 and the positive power supply terminal A so that when said transistor begins conducting as the result of a fault in the manner discussed above, current will be drawn through relay winding 120.

Capacitor 122 holds the collector oftransistor 98 at a sub stantially constant potential even though the power supply is a pulsating DC. This allowstransistor 98 to conduct steadily after its operation is initiated so thatrelay 120 will not chatter.

It is understood that the energization of relay winding 120 can be utilized to actuate any apparatus with which the time delay device according to the invention is to be utilized. For example, it can be made operative to close normallyopen contacts 124 thereby placing thetrip coil 126 of a circuit breaker across a suitable source of electrical energy, such asbattery 128, whereupon the circuit breakersmain contacts 130 are tripped open thereby interrupting the current insystem 20.

In summary of the operation of the time delay device shown in FIG. 2, the current flowing in the collector of chargingtransistor 40 will split between the parallel paths defined by charging resistor 48 and the series combination of timing resistor 47 andtiming capacitor 29. Under no-fault conditions,capacitor 29 is prevented from charging because it is shunted byleakage resistor 63 which under such conditions, shunts substantially all the current flowing to said timing capacitor.

The current flowing inconductor 78 to the emitter of coupling transistor 75 is proportional to the current insystem 20 and it causes a transistor 75 collector current to flow through resistors 80 and 82 thereby raising the potential of junction point E to a value which is also proportional to said system current. Similarly, a transistor 76 emitter current, which is controlled by the potential of junction point E, flows through resistor 84 and raises the potential of junction point F to a value proportional to thesystem 20 current. The base ofsignal comparing transistor 70 is connected to junction point F while its emitter is connected to junction point G which is held at a fixed potential byZener diode 72 andresistor 73. As a result, when the current flowing insystem 20 equals or exceeds the desired minimum actuating current of the device, the base voltage ofvoltage comparing transistor 70 will exceed its emitter voltage and collector current will begin flowing therein to the base ofoutput transistor 94. Upon the latter event, the base potential ofoutput transistor 94 will fall below its emitter potential whereupon collector current will begin flowing toleakage resistor 63. This, in turn, raises the potential of junction point J so that timingcapacitor 29 is thereafter prevented from discharging throughleakage resistor 63 and it therefore begins charging. As timingcapacitor 29 charges up, the voltage at junction point D will begin rising and the emitter currents flowing in coupling transistors and 101, and which are proportional to the voltage at junction point D will similarly rise. The potential of junction point M, resulting from thetransistor 101 collector current will therefore also follow the potential of junction point D. The base oftransistor 98 which is coupled to junction point M will, therefore, always be at a potential proportional to the potential at junction point D while its emitter will be held at a constant potential by Zener diode andresistor 111. After timingcapacitor 29 has charged for a predetermined time, which is the time delay of the device, the potential of junction point M will exceed the potential of junction point P andtransistor 98 will conduct current to relay winding which, in turn, closescontacts 124 and the device is thereby operated.

After the fault insystem 20 has been interrupted, the potential at junction point F will fall below that of junction point G andtransistor 70, and hence,transistor 94 will cease conducting. This allows the potential at junction point J to fall below that of terminal C so that timingcapacitor 29 can again discharge throughleakage resistor 63. This in turn lowers the voltage at junction point D and, consequently, at junction point M so thattransistor 98 will cease conducting and relay 120 is deactuated. The time necessary for timingcapacitor 29 to substantially discharge throughresistor 63 is the resetting time of the device, and this time is generally measured in terms of fractions of a second. If the fault disappears while timingcapacitor 29 is charging but prior to the attainment of the predetermined operating voltage at junction point D, and hence prior to the energization ofrelay 120, timingcapacitor 29 will similarly begin discharging throughleakage resistor 63 and the device will reset.

FIG. 7 illustrated a number of ways in which the embodiment shown in FIG. 2 may be modified to achieve greater sensitivity, it being understood that the invention contemplates the incorporation of these modifications into the circuit of FIG. 2 individually as well as collectively as is done in FIG. 7.

It was found that increased accuracy can be achieved by utilizing NPN type transistors for the chargingtransistor 40 and coupling transistor 75 in thetiming portion 12 and theenergy sensing portions 14 respectively, instead of the PNP type transistors shown in FIG. 2 because the former type have smaller leakage currents. Because of the changes in these two transistors it is also necessary to change the types of all other transistors and to reverse the polarity of the various rectifiers, and Zener diodes.

A second modification comprises the elimination of the power supply capacitor 30 and its by-pass circuit comprising transistor 44 and Zener diode 45. The operating power is supplied entirely bybattery 128 through power supply terminals A and B. This modification necessitates moving the return path of the current flowing through chargingresistor 32 from the negative terminal B of power supply capacitor 30 in FIG. 2 to the junction ofresistor 32 and the base of chargingtransistor 40. As a result, the input terminals 34' and 42' of the time delay device are now disposed on either side of chargingresistor 32. Timingcapacitor 29 is charged in the same manner as was previously discussed with respect to FIG. 2 except, of course, that the direction of positive current flow is reversed, and flows in FIG. 7 from timingcapacitor 29 through resistor 47, rectifier 50 and the collector-emitter circuit of chargingtransistor 40 and then through chargingresistor 36.

Referring again to FIG. 2, it can be seen that although the current flowing throughresistor 63, as a result of discharge of timingcapacitor 29 therethrough, is negligible, a very small voltage drop will nonetheless exist thereacross. It will be recalled that under nofault conditions, the voltage at terminal C will be equal to the potential at junction point J. As a result of the voltage drop acrossleakage resistor 63 therefore, the potential at terminal C will be some positive value so that the discharge of timingcapacitor 29 will not be entirely complete and a slight reduction in the charging time ofcapacitor 29 is thereby introduced. The percentage error introduced in the charging time is a function of the ratio of the initial potential on terminal C, as a result of the leakage current, to the final potential on said terminal when the device operates, i.e., the voltage acrosscapacitor 29 when the potential at junction point D is sufficient to causevoltage comparing transistor 98 to conduct. This error will be insignificant at very small values of fault current because under such circumstances the voltage across timingcapacitor 29 will be substantially the total potential at junction point D and hence the potential of terminal C will be quite large. However, at very high values of fault current, where the voltage drop across resistor 47 is a substantial portion of the final potential at junction point D, the final potential at terminal point C is substantially reduced and the initial potential at this point becomes significant. It is to be remembered, however, that this error will merely shorten the time required for timingcapacitor 29 to charge so that its only effect is to move the high current end of the time current characteristic downward somewhat. This effect is eliminated in the embodiment in FIG. 7, however, by placing a small voltage biasing means 140 betweenleakage resistor 63 and negativepower supply conductor 69 and also by shunting thetiming capacitor 29 by a rectifier 142. This modification serves to hold the potential of terminal C at the potential of power supply terminal B.

Assume for the sake of illustration, that the potential of power supply terminal A in FIG. 7 with respect to ground is some negative value and the potential of supply terminal B is zero or at ground potential, and assume further that biasing means 140 holds the terminal S ofleakage resistor 63 at some small positive value with respect to ground. Because of the negative current which flows around timingcapacitor 29 and throughconductor 65 under no-fault conditions, a voltage rise will occur acrossleakage resistor 63. The size of biasing means 140 is so chosen that it will hold terminal S ofleakage resistor 63 at a positive potential that is greater than the voltage rise acrossleakage resistor 63. In this manner the voltage rise acrossleakage resistor 63 is entirely cancelled and junction point .I is held at a very small value of positive potential that is the difference between the potential at junction point S and said voltage rise. This small positive potential on junction point J tends to drive positive current to terminal C, but this terminal is grounded with respect to positive current by rectifier 142 so that junction point C remains at zero potential. Rectifier 142 does not, however, pass the charging current in the collector of chargingtransistor 40 because, it will be recalled that in FIG. 7 this is a negative current. It can be seen, therefore, that voltage biasing means 140 and diode 142 hold junction point C at zero potential regardless of the magnitude of the leakage current throughleakage resistor 63.

It will be recalled from the discussion of FIG. 2, that at very high values of fault current, timing resistor 48 shunts only a small portion of the total charging current in the collector oftransistor 40 while at very low values of fault current, the current flowing through resistor 48 is a very large proportion of said charging current. As a result, at very low fault current values, only a very small quantity of current will be available to charge timingcapacitor 29. This current is further diminished by a small leakage current aroundcapacitor 29 itself and also through the input transistor of thevoltage sensing portion 14.'Also, in the circuit shown in FIG. 2 the current shunted through timing resistor 48 is proportional to the voltage across timingcapacitor 29. Hence, when timing capacitor begins charging as a result of a fault the voltage across it will be substantially zero and hence almost no current will flow through timing resistor 48. This, of course, will be true regardless of the size of this resistor. On the other hand, when the voltage across timing capacitor reaches a maximum, just prior to operation, the current shunted through timing resistor 48 will be at a maximum and its value will be governed by the size of this resistance. As a result, in the embodiment of FIG. 2, timing resistor 48 substantially reduces the charging current only during the latter portion of the timing cycle. It can be seen, therefore, that at very low values of fault current, where thetiming capacitor 29 charging current is quite small, the time delay of the device cannot be varied through a wide range of values by variation of timing resistor 48. This shortcoming can be alleviated by fixing the magnitude of the current which is shunted through timing resistor 48 to some arbitrary fixed value. By keeping this shunted current at a substantially constant value for the major portion of timing cycle, a wider range of charging times can be obtained than where the charging current varies all during the charging cycle. This is accomplished in the modification shown in FIG. 7 by connecting timing resistor 48' to terminal C throughrectifier 150 and the emitter-collector circuit oftransistor 152. The base oftransistor 152 is connected to junction point P, which, it will be recalled, is held at a fixed potential by Zener diode and resistor 11 1. Upon the occurrence of a fault, therefore, collector current will begin flowing intransistor 152 when the potential at terminal C reaches the potential of junction point P, whereupon, a portion of thetransistor 40 collector current will begin shunting through the emitter and collector circuit oftransistor 152 and through resistor 48'. This shunted current will be of such magnitude that the IR drop across resistor 48' is equal to the breakdown voltage ofZener diode 110. The current flowing through timing resistor 48' will, of course, vary as variations are made in the resistance thereof but for any given setting of said resistor, the current shunted therethrough will have a fixed value. The purpose of rectifier is to preventtiming capacitor 29 from being charged as a result of the potential at junction point P. The latter modification also illustrates that the connection for timing resistor 48' can be made either to terminal C or to junction point D as in FIG. 2, as long as this resistor is in a parallel circuit with respect to timingcapacitor 29.

FIG. 8 shows another embodiment of thetiming portion 10 wherein the current shunted through timing resistor 48' will have a fixed value for any given setting thereof. Here timing resistor 48" placed betweenemitter 40 andinput terminal 42 so that the current available to charge timingcapacitor 29 can be reduced by a fixed value depending upon the setting of said timing resistor.

In order to insure tripping power in the event thatbattery 128 should fail the energy sensing andactuation portion 14 of the device may be modified as shown in FIG. 9 to include a secondpower supply capacitor 160 connected in parallel to the first power supply capacitor 30 through afirst rectifier 163 and to thebattery 128 through asecond rectifier 162. Under normal conditions, the secondpower supply capacitor 160 is maintained in a fully charged condition bybattery 128 throughrectifier 162 which prevents the short circuiting ofcapacitor 160 should a fault occur within thebattery 128, whilerectifier 163 prevents the first power supply capacitor 30 and the other circuit components from drawing battery current. Should battery 138 fail, the secondpower supply capacitor 160 will be charged by the rectified secondary current ofcurrent transformer 22 in the same manner as the first power supply capacitor 30. In either event, the secondpower supply capacitor 160 furnishes tripping power to thetrip coil 126 and operation thereof would be the same as discussed previously with respect to FIG. 2. If the battery fails, however, and a fault current occurs while the secondpower supply capacitor 152 is without charge, the device will not operate until said capacitor becomes charged. This will only affect the time-current characteristics of the device at low values of fault current wherein a fast tripping time is desired because the charging time of secondpower supply capacitor 160 may, under such circumstances, be slower than that of thetime delay capacitor 29.

FIG. illustrates how the time delay device shown in FIG. 2 may be incorporated into a repeating circuit interrupter having reclosing means 170, operation counting means 172 and lockout means 174. These portions of a conventional repeating circuit interrupter are well known in the art and the specific details thereof form no part of the instant invention, and therefore, are merely schematically illustrated in FIG. 10 for the sake of simplicity. The minimum actuationcurrent sensing portion 12 has been omitted from FIG. 10, but it will be understood that it is identical with that shown in FIG. 2.

The reclosing means 170 is operable after a time delay to reclose themain contacts 130 after each opening operation thereof. The operation counting means 172 is operable to initiate time delayed opening operation ofcontacts 130 after they have executed a predetermined number of rapid opening operations. The operation counting means 172 is further operable to actuate lockout means 174 after a predetermined number of such time delayed operations so that themain contacts 130 will be prevented from reclosing until the device is manually reset.

Reclosing means 170 includes areclosing solenoid coil 176 operable upon being energized to pull the maincontacts operating bar 178 upwardly as viewed in FIG. 10 to close themain contacts 130. Upon the opening ofmain contacts 130 thereclosing solenoid coil 176 is connectable acrossbattery 128 byconductors 180, 181 and 182, normally closedcontacts 186 and normallyopen contacts 188 in a manner to be discussed in the ensuing paragraphs. It can be seen, however, that when the primary contacts are closed as shown in FIG. 10, normallyopen contacts 188hold solenoid coil 176 deenergized.

It will be recalled that upon the occurrence of a fault relay winding 120 is energized to closecontacts 124 thereby placingtrip coil 126 acrossbattery 128. Upon this event,trip plunger 190 is moved to the right in FIG. 10, rotating bell crank latch 191 in a counter-clockwise direction about itspivot point 192 and against the force of its biasingspring 193 thereby releasing the maincontacts operating bar 178 so that it may move downwardly toward open position under the influence of openingspring 194. When the maincontacts operating bar 178 reaches its fully open position, normallyopen contacts 188 will be closed by operatingarm 196 carried on said operating bar so that the circuit throughsolenoid coil 176 will be completed. This actuatesreclosing solenoid 176 to moveoperating bar 178 upwardly, thereby closingmain contacts 130. In order to allow fuses in the branch lines to cool properly, instantaneous reclosing ofmain contacts 130 may be prevented by dash pot means 199 connected to operatingbar 178.

It will be also recalled, that while themain contacts 130 are in their open position, relay winding was de-energized andcontacts 124 are opened, so thattrip coil 126 is also de-energized and bell crank latch 191 is free to rotate in a clockwise direction under the influence of biasingspring 193 to its latched position shown in FIG. 10. As a result, when operatingbar 178 reaches its fully closed position as shown in FIG. 10 it will be latched in this position by bell crank latch 191. If the fault disappears fromsystem 20 while contacts were in their open position, they will remain latched upon reclosing. However, should the fault persistmain contacts 130 will again be tripped open and reclosed in the manner previously described. This cycling will continue until the fault clears or until lockout means 174 is actuated to lock the main contacts open in the manner to be discussed herein below.

The operation counting means schematically illustrated in FIG. 10 is of the hydraulic type and utilizes as a hydraulic medium the dielectric fluid in which such repeating circuit interrupters are normally disposed. This operation counting means includes apump piston 198 disposed in apump cylinder 200 and acounting piston 202 disposed in counting cylinder 203. Thepump piston 198 is driven by movement of operatingbar 178 to which it is connected by means of alink 204 and a bell crank 206 which is pivoted at 207 and which is connected at one end to link 204 and at its other to operatingarm 208 mounted on theoperating bar 178. Each time themain contacts 130 are opened, bell crank 206 is rotated aboutpivot 207 in a clockwise direction so thatpump piston 198 is moved upwardly drawing hydraulic fluid intopump cylinder 200. Whencontacts 130 are reclosed, bell crank 206 is rotated in a counter-clockwise direction to force a fixed quantity of hydraulic fluid frompump cylinder 200 throughpassage 210, and past ball check 212 to the pressure side ofcounting piston 202. As the circuit interrupter operates repeatedly, thepiston 202 is forced hydraulically upward in a step by step manner causing a corresponding movement of timing bar 214 to the left, as viewed in FIG. 10, through the agency oflink 216 and bell crank 218. Upward movement ofcounting piston 202 rotates bell crank 218 in a counter clockwise direction aboutpivot 219, to force timing bar 214 to the left against the influence of resettingspring 220. After lockout, or after the fault was cleared prior to lockout, the leakage of hydraulic fluidpast counting piston 202 allows resettingspring 220 to return timing bar 214 andtiming piston 202 to their initial positions shown in FIG. 10.

Movement of timing bar 214 a predetermined distance to the left after a predetermined number of opening operations operates to modify the values of theprimary timing capacitor 29 and the primary timing resistors 47 and 48 by placing in circuit with these timing impedances a second set of auxiliary timing impedances comprising capacitor 229 andresistors 247 and 248. This alters the time delay characteristics of the time delay device in the manner discussed with respect to FIGS. 3-6, so that after a predetermined number of opening operations, the circuit interrupter is automatically switched from one time current characteristic to another. Modification of the values of the primary timing impedances is accomplished by switch means 222 which is actuable by timing bar 214 after a predetermined number of operations to couple or uncouple the auxiliary timing impedances to or from the primary timing impedances.

Movement of timing bar 214 is transmitted to switch means 222 by positioningpins 223, 223' and 223" which act as stop means to prevent the counter-clockwise rotation of switch carriers, 224, 224' and 224" around theirrespective pivots 225, 225 and 225" under the influence of their associated biasing springs 226, 226' and 226". Each of thecontact members 224, 224 and 224" carries aconductive brush member 227, 227 and 227" respectively which may be manually set in one of two angular positions against stops 228-230, 228'230 and 228230". For the sake of illustration,brush contact 227 and 227' are shown in a first angular position relative to fixedcontacts 232 and 232 and againststop members 228 and 228 respectively whilebrush contact 227" is shown in a second angular position againststop member 230", so that it will engage fixed contact 232' Assume, for the sake of illustration, that the repeating circuit interrupter schematically illustrated in FIG. is designed to execute two rapid opening operations and two time delayed operations prior to lockout. Upon the first reclosing operation, timing bar 214 will be moved a first predetermined distance to the left as viewed in FIG. 10 allowingcontact members 224, 224' and 224" to rotate through a small counter-clockwise angle. This movesconductive brush members 227 and 227' a short distance toward the left hand edge ofstationary contacts 232 and 232' respectively and also movesconductive brush 227" to the right band edge ofstationary contact 232". Upon the movement of timing bar 214 a second predetermined distance to the left when themain contacts 130 are reclosed for a second time, thebrush members 227 and 227' will be moved onto their associatedstationary contacts 232 and 232 whilebrush member 227" will be moved off of its associatedstationary contact 232". This completes the circuit throughconductors 250 and 251 to place auxiliary timing capacitor 229 in parallel withprimary capacitor 29 and also completes the circuit throughconductors 253 and 254 to place auxiliary timing resistor 248 in parallel with primary timing resistor 48. On the other hand, movement ofconductive brush 227" off ofstationary contact 232 interrupts the circuit throughconductors 256 and 257 to takeauxiliary timing resistor 247 out of parallelism with primary timing resistor 47.

It will be appreciated by those skilled in the art that the placing of auxiliary timing capacitor 229 in parallel withprimary timing capacitor 29 increases the total timing capacitance thereby moving the time delay characteristic of the device vertically as shown in FIG. 6 fromcurve 62 tocurve 61. The magnitude of this shift will, of course, depend on the relative sizes ofprimary timing capacitor 29 and auxiliary timing capacitor 229. For example, ifprimary timing capacitor 29 has a value of zero capacitance and auxiliary timing capacitor 229 has some finite value of capacitance, the initial opening operations will be substantially instantaneous while subsequent opening operations will be time delayed in accordance with the value of auxiliary timing capacitor 229.

In a similar manner, the placing of auxiliary timing resistor 248 in parallel with primary timing resistor 48 will have the effect of decreasing the total resistance shunting the timing capacitor and thereby increasing the slope of the time current characteristic at its high current end as discussed with respect to FIG. 3. On the other hand, the open circuiting ofauxiliary timing resistor 247 removes it from parallelism with timing resistor 47 thereby increasing the resistance in series with the timing capacitor so that the slope at the low current end of the time current characteristic is increased in the manner discussed with respect to FIG. 4.

It can be seen, therefore, that by increasing the capacitance of the timing capacitor and the resistance of the series timing resistor and by decreasing the resistance of the parallel timing resistor after a predetermined number of opening operations, the time current characteristic for subsequent operations may be given a steeper slope as well as moved vertically. This is illustrated in FIG. 11 wherein 260 represents the time current characteristic of the device during the initial or rapid opening operations and 262 represents its time current characteristic during time delayed operations. It will be understood that the slope of the time delayedcurve 262 may be decreased relative to therapid curve 260 by reversing the positions ofconductive brushes 227 and 227" from that shown in FIG. 10 so thatconductive brush 227 intially engagesstationary contact 232 andconductive brush 227 is initially out of engagement with its associatedstationary contact 232". Those skilled in the art will further appreciate that the degree of slope for the rapid and time delayed curves can be altered by suitable adjustment of primary andauxiliary timing resistors 47, 48, 247 and 248.

After a predetermined number of opening operations, usually four, the fault is considered permanent and it is then desirable to prevent the main contacts from subsequently reclosing. This is accomplished in the embodiment illustrated in FIG. 10 by operating lockout means 174 to open normally closedcontacts 186 so that the closing of normallyopen contacts 188 will not result in the energization ofreclosing solenoid coil 176. This is accomplished by providing anoperating arm 260 on timing bar 214 which is so located relative to lockout means 174 that after three reclosing operations it is moved sufficiently to the left in FIG. 10 to engage the upper end oflatch lever 262 and rotate it in a counter-clockwise direction against the force of biasing spring 263. Aslatch lever 262 rotates its lower end 264 moves past the upper end 265 ofswitch operating lever 266 so that the latter is then free to rotate in a counter-clockwise direction under the influence of its associatedbiasing spring 268 until it engages stop 270. This snaps normally closedcontacts 186 open and thereby prevents the re-energization ofreclosing solenoid 176 upon the subsequent opening ofmain contacts 130. After themain contacts 130 have been locked open in thismanner counting piston 202 will resettle in counting cylinder 203 under the influence of biasingspring 220.Contacts 186 may be reclosed by rotatingoperating lever 266 in a clockwise direction in any suitable manner such as by coupling it to a manual operating handle (not shown). Such rotation moves the upper end 265 of operatinglever 266 past the lower end 264 oflatch lever 262 so that it is again latched in the position shown in FIG. 10.

FIG. 12 illustrates how the time delay device according to the invention may be modified for use in a three phase system. Such modification includes the provision of aphase timing portion 10, 10' and 10" for each of the phases of the system, and each is coupled to its respective phase conductor, 20, 20' and 20" by means of an individualcurrent transformer 22, 22' and 22" and their associatedbridge type rectifiers 24, 24 and 24".Conductors 78, 78' and 78" connect each of the corresponding current transformers to a single minimum actuationcurrent sensing portion 12 through isolatingrectifiers 280, 280' and 280 which perform the function of preventing current flow between the various output circuits of thebridge type rectifiers 24, 24' and 24". As a result, terminal point T betweenconductors 78, 78' and 78" will be at a potential which is equal to the highest potential across any of the three input terminals of phase timing portions l0, l0 and 10". This insures that the minimum actuationcurrent sensing portion 12 will be actuated when a fault current occurs in any of the threephases 20, 20' and 20". Junction points D, D and D ofphase timing portions 10, 10 and 10", respectively, are coupled to the input of the energy sensing and actuationcurrent portion 14 through isolatingrectifiers 282, 282' and 282" which prevent the flow of current between said timing portions.

Assume for the sake of illustration, that a fault occurs in phase 20'. This will result in an increased current to appear inconductor 78 raising the potential at junction point T to a value which prevents the further leakage of the charging current around the timing capacitors associated with each of the phase timing portions l0, l0 and 10" and through theirrespective conductors 65, 65 and 65". As a result, each of said timing capacitors will begin charging. However, the timing capacitor associated withphase timing portion 10 will become charged to its operating potential first because the fault current in phase 20' results in a higher charging current thereto. As a result, its junction point D will reach the operating potential before junction points D and D", and it will cause the operation of energy sensing andactuation portion 14 in the manner heretofore discussed with respect to a single phase device.

it can be seen from the foregoing that the time delay device according to the invention allows the time current characteristic of the circuit interrupter or other device with which it is associated to be easily and accurately varied over a wide range of values and that the device can be adapted for use in both single and polyphase systems.

While only a few embodiments of the invention have been illustrated and described herein, it is understood that a number of other modifications will be apparent to those skilled in the art without departing from the true spirit of the invention, and accordingly, it is intended in the appended claims to cover all such modifications.

I claim as my invention: 7

1. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor coupled to said input and chargable by the current flowing therein, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof by the current flowing to said input, normally inactive electronic circuit means coupled to said input and to said timing capacitor and responsive to an abnormal circuit condition in said system for conducting current to said resistor means to modify the voltage drop thereacross and prevent the discharge of said capacitor through said leakage resistor means upon the occurrence of said abnormal circuit condition so that said timing capacitor may begin charging.

2. In an electronic timing device having an input adapted to be connected to an electrical system, energy storage means coupled to said input, leakage resistor means nonnally shunting said energy storage means for preventing the charging thereof by the current flowing to said input, overload sensing means coupled to said input and normally inactive electronic means coupled to said leakage resistor means, said overload sensing means being responsive to the current in said system to actuate said electronic circuit means for raising the voltage drop across said leakage resistor means to thereby prevent the discharge of said energy storage means therethrough when the current in said system reaches a predetermined value, whereby said energy storage means is allowed to charge up.

3. In an electronic timing device having an input adapted to be connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof by the current flowing to said input, circuit means including overload sensing means coupled to said input and normally inactive electronic means coupled to said leakage resistor means, said overload sensing means being responsive to the current in said system to actuate said electronic means to conduct current to said leakage resistor to raise the voltage drop thereacross to thereby prevent the discharge of said timing capacitor means therethrough when the current in said system 7 reaches a predetermined value, whereby said energy storage means is allowed to charge up, and means for preventing current from flowing from said leakage resistor means to said timing capacitor means.

4. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, voltage comparison means having sensing means and reference voltage means, said voltage comparison means also having output means connected to said leakage resistor means, said voltage comparison means being actuable when the voltage at said sensing means exceeds said reference voltage to conduct current to said leakage resistor means, circuit means connecting said sensing means to said input for placing a voltage on said sensing means that is proportional to the current at said input whereby output current will flow to said leakage resistor when the current at said input exceeds a predetermined value to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, unidirectional circuit means for preventing current flow from said leakage resistor means to said timing capacitor, and output means coupled to said timing capacitor and operable when the charge thereon exceeds a predetermined value.

5. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, a signal responsive transistor, reference voltage means, circuit means connecting the base of said signal responsive transistor to said input for placing a potential on said base that is proportional to the current at said input, the emitter of said transistor being connected to said reference voltage means whereby collector current will flow in said transistor when the current at said input exceeds a predetermined value, nonnally non-con ducting current responsive means connected to said leakage resistor and to the collector of said transistor so that when collector current flows therein as a result of said predetermined current at said input said current responsive circuit means will conduct current to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, and diode means for preventing current from flowing from said leakage resistor to said timing capacitor.

6. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, triode means having a source element, a load element and a control element, reference voltage means, circuit means connecting the control element of said triode meansto said input for placing a potential on said control element that is proportional to the current at said input, the source element of said triode means being connected to said reference voltage means whereby load current will flow in said load element when the current at said input exceeds a predetermined value, normally non-conducting current responsive means connected to said leakage resistor and to said load element so that when load current flows in said triode means as a result of said predetermined current at said input said current responsive means will conduct current to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, and output means coupled to said timing capacitor and operable when the charge thereon exceeds a predetermined value.

7. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor coupled to said input and chargeable by the current flowing therein, leakage resistor means connected in parallel with said timing capacitor for normally shunting said charging current therearound, voltage biasing means connected to said leakage resistor means in a sense opposite to the sense of said shunted current so that the efiect of the voltage drop across said leakage resistor on the potential of the junction between said leakage resistor and said timing capacitor is partially cancelled, rectifier means shunting said timing capacitor and operable to shunt around said timing capacitor any reverse current from said leakage resistor as a result of said biasing means whereby the voltage drop in said leakage resistor as a result of said leakage current does not produce a difference in potential across said timing capacitor, circuit means coupled to said input and responsive to the current in said system for preventing the discharge of said capacitor through said leakage resistor means when the current in said system reaches a predetermined value.

8. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor connected in parallel with said timing capacitor for shunting said charging current therearound; means coupled to said timing capacitor and to said leakage resistor means for cancelling the effect of the shunted current produced voltage drop across said leakage resistor on said timing capacitor means whereby the voltage drop in said leakage resistor does not produce a potential difference across said timing capacitor, voltage comparison means having sensing means and reference voltage means, said voltage comparison means also including output means connected to said leakage resistor means said voltage comparison means being actuable when the voltage at said sensing means exceeds said reference voltage to conduct current to said leakage resistor means, circuit means connecting said sensing means to said input for placing a voltage on said sensing means that is proportional to the current at said input whereby output current will flow to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented.

9. In an electronic timing device the combination of an input adapted to be connected to an electrical system, timing capacitor means connected to said input and chargeable by the current flowing therein, an impedance in a parallel circuit with respect to said timing capacitor means for shunting a portion of said current around said timing capacitor said parallel circuit including means for holding said shunted current to a predetermined value, leakage means connected to said capacitor and normally preventing the charging thereof, said energy leakage means including circuit means connected to said input and responsive to a predetermined current in said system for preventing the leakage of said current means through said leakage means so that said timing capacitor means beings charging upon the occurrence of said predetermined current.

10. in an electronic timing device the combination of a pair of input terminals, a first charging resistor having one end connected to one of said input terminals, a second charging resistor and a transistor, said second resistor and the emitterbase circuit of said transistor being connected in parallel with said first charging resistor, a first energy storage means between the other end of said first resistor and the other input terminal, a second energy storage means connected between the collector of said transistor and said other input terminal, whereby each of said energy storage means is chargeable by the current flowing in its associated resistor, energy responsive means coupled to said first energy storage means and responsive to the energy stored therein for actuation when the energy on said first energy storage means reaches a predetermined value, said second energy storage means being connected to said energy responsive means for supplying operating energy thereto.

11. In a device for protecting an electrical system, the combination of a pair of input terminals, a current transformer and a rectifier connecting said input terminals to said system, a first charging resistor having one end connected to one of said input terminals, a second charging resistor and a transistor, said second resistor and the emitter-base circuit of said transistor being connected in parallel with said first charging resistor, energy storage means connected between the collector of said transistor and the other input terminal, whereby said energy storage means is chargeable by a predetermined portion of the current flowing at said input terminals.

12. An electronic timing device comprising a pair of input terminals, a first current dividing resistor having one end connected to one of said input terminals, a second current divid ing resistor and a charging transistor, said second current dividing resistor and the emitter-base circuit of said charging transistor being connected in parallel with said first current dividing resistor, a timing capacitor connected between the collector of said coupling transistor and said other input terminal and adapted to be charged by the current flowing therein, a power capacitor connected to the other end of said first current dividing resistor, and voltage responsive means connected to said timing capacitor for actuation when the charge on said timing capacitor reaches a predetermined value, said power capacitor means being connected to said voltage responsive means for supplying operating energy thereto.

13. A circuit interrupting device for protecting an electrical system from overload currents, switch means for interrupting the current in said system,timing capacitor means coupled to said system, first impedance means coupled to said timing capacitor means for controlling the charging rate thereof as a function of the magnitude of the current in said system, second impedance means in circuit with said timing capacitor means for controlling the charging rate thereof independently of the magnitude of the current in said system, third impedance means coupled to said timing capacitor means for normally holding the same in a discharged condition, overload responsive means coupled to said system and operable when the current therein exceeds a predetermined value to conduct current to said third impedance means so as to raise the voltage drop thereacross and to prevent the further discharge of said capacitor means therethrough so that said charging capacitor may begin charging, and uni-directional current means for preventing current flow from said third impedance means to said timing capacitor means, and output means coupled to said capacitor means and operable to open said switch means when the charge thereon reaches a predetermined value.

14. A circuit interrupter for protecting an electrical system from overload currents, switch means in circuit with said system for interrupting the current flow therein, timing capacitor means coupled to said system, first resistance means in series circuit relation with said timing capacitor means for controlling the charging rate thereof as a function of the mag nitude of the current in said system, second resistance means in parallel circuit relation with said timing capacitor means for controlling the charging rate thereof independently of the magnitude of the current in said system, third resistance means connected in parallel circuit relation with said timing capacitor means for normally holding the same in a discharged condition, overload responsive means coupled to said system and responsive to a predetermined current therein for conducting current to said third resistance means to raise the voltage drop thereacross so that said timing capacitor is prevented from discharging therethrough, whereby said timing capacitor begins charging when the current in said system reaches a predetermined value, uni-directional current means for preventing current from flowing from said third resistance means to said timing capacitor means, and output means coupled to said timing capacitor means and operable when the charge thereon reaches a predetermined value for opening said switch means.

15. In an electronic timing device having an input con nected to an electric system, timing capacitor means, circuit means coupled to said input for charging said timing capacitor means by a current functionally related to the current in said input, leakage means normally shunting said timing capacitor means for preventing the charging thereof, an energy source, abnormal condition responsive means coupled to said input, switching means coupled to said leakage means and to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to actuate said switching means to couple said leakage means to said energy source for modifying the potential of said leakage means to thereby prevent the discharge of said timing capacitor means therethrough whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said timing capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage means to said timing capacitor means.

16. in a circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally re-' lated to the current therein, an energy source, energy storage means, electronic circuit means having a control element connected to said energy source, an output element connected to said energy storage means and an input element connected to said input, said electronic circuit means being characterized in that current will flow from said output element when the ratio of the output element potential to the control element potential is within a predetermined range of values, whereby the maximum energy potential applied to said energy storage means cannot exceed a predetermined value, and energy responsive means coupled to said energy storage means and responsive when the energy thereon reaches a predetermined value.

17. A circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally related to the current therein, an energy source, a transistor, energy storage means, the emitter and collector of said transistor being connected to said input for receiving said signal, the emitter and base of said transistor connecting said energy storage means to said energy source whereby the maximum energy potential applied to said energy storage means cannot exceed the potential energy of said source, and energy responsive means coupled to said energy storage means and responsive when the charge thereon reaches a predetermined value.

18. In an electronic timing device the combination of a pair of input terminals, a first resistance having one end connected to one of said input terminals, a second resistance and a transistor, said second resistance and the emitter base circuit of said transistor being connected in parallel with said first resistance, a voltage source connected to the other end of said first resistance, energy storage means connected to the collector of said transistor for charging by the current flowing in said second resistance, whereby the voltage applied to said energy storage means cannot exceed the voltage of said energy source, and energy responsive means coupled to said energy storage means and responsive when the energy stored therein reaches a predetermined value.

19. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, an energy source, circuit means coupled to said input and to said leakage resistor means and including abnormal condition responsive means and switching means having a control element connected to said abnormal condition responsive means and output means operative to connect said resistor means to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to provide an actuating signal to said control element so that said resistor means is connected to said energy source for modifying the potential thereof and prevent discharge of said timing capacitor therethrough, whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

20. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, abnormal condition responsive means coupled to said input, electronic circuit means coupled to said leakage resistor means, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to cause said electronic circuit means to conduct current to said leakage resistor for modifying the potential thereof and prevent discharge of said timing capacitor means therethrough, whereby said capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

21. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, abnormal condition responsive means coupled to said input, transistor means having a base connected to said abnormal condition responsive means and an emitter-collector circuit connected to said leakage resistor, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to cause said transistor to conduct current to said leakage resistor for modifying the voltage drop thereacross and prevent the discharge of said timing capacitor means therethrough, whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge in said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

22. In a circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally related to the current therein, an energy source, energy storage means, electronic circuit means having a control element connected to said energy source, an output element connected to said energy storage means and an input element connected to said input, said electronic circuit means being operative to conduct input current to said output when the ratio of the output element potential to the control element potential is less than a predetermined value, whereby said energy source is chargeable by a current functionally related to said signal until the potential thereof reaches a predetermined value, leakage impedance means normally shunting said energy storage means to prevent the charging thereof, abnormal condition responsive means coupled to said input and to said impedance means and operative to couple said impedance means to said energy source upon the occurrence of an abnormal circuit condition so that potential of said impedance means is modified to prevent the further discharge of said energy storage means therethrough, unidirectional current means for preventing the flow of current from said impedance means to said energy storage means, and energy responsive means coupled to said energy storage means and responsive when the energy thereon reaches a predetermined value.

23. A circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical system functionally related to the current therein, an energy source, a timing capacitor, a transistor, the emitter and base of said transistor being connected to said input for receiving said signal, the collector and base of said transister connecting said energy storage means to said energy source whereby the maximum energy potential applied to said energy storage means cannot exceed the potential of said energy source, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof, abnormal condition responsive means connected to said input, switching means coupled to said abnormal condition responsive means and to said leakage resistor means and to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to provide an actuating signal to said switching means so that said leakage resistor means is connected to said energy source, for modifying the potential thereof and prevent the discharge of said timing capacitor therethrough, whereby said timing capacitor is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said capacitor means.

24. In a protective relay assembly, a pair of terminals, means for deriving from current supplied to the pair of terminals a first direct voltage having a magnitude dependent on the magnitude of current flowing through the pair of terminals over a substantial range of variation of the magnitude of said current, means for deriving from current supplied to said pair of terminals a second direct voltage, having a magnitude which is substantially constant over said range of variation, a capacitor, circuit means connecting the capacitor for energization in accordance with the first direct voltage, said circuit means including substantial resistance whereby the circuit means and capacitor provide a time-delay circuit, controllable disabling means rendering said capacitor ineffective for receiving a charge through said circuit means, effectuating means responsive to a predetermined relation between the first and second direct voltages for controlling the disabling means to condition the capacitor to receive charge from said circuit means and translating means responsive to the voltage across said capacitor.

25. For use in protecting current distribution networks static overcurrent relay means responsive to overcurrent conditions for operating circuit protective devices after a predetermined time period and before the network is damaged comprising first means for generating a DC voltage representative of the current being monitored in said network; second means coupled to said first means for generating a predetermined voltage level after a predetermined time delay; third means coupled to said first means and normally inhibiting the operation of said second means until the output voltage level of said first means achieves a predetermined magnitude; constant voltage reference means coupled to the output of said first means for establishing a second predetermined threshold level; fourth voltage-sensitive switch means coupled to said second means and said constant voltage reference means for energizing a circuit protective device when the output voltage of said second means achieves said second predetermined threshold level.

26. The device of claim 25 wherein said first means is comprised of current transformer means; and full wave rectification means connected across the output of said current transformer means for generating said DC voltage.

27. The device of claim 25 wherein said constant voltage reference means is comprised of a series connected zener diode and resistor coupled between the output of said first means and ground potential; the common terminal between said zener diode and resistor being coupled to said fourth means.

28. The device of claim 27 wherein said fourth means is comprised of transistor means having first, second and third electrodes, respectively, coupled to said constant reference voltage means common terminal, the output of said second means, and said first means.

* l l t Po-wo UNITED STATES'PATENT OFFICE 569 CERTIFICATE OF CORRECTION Patent No. 3 3, a 220 I Dated May 9 1972 lnventofls) 7 Richard E. Riebs It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

r- I Column 18,line 57, cancel "overload" and substitute therefor -abnormal condition Column 19, line 46, cancel "overload" and substitute therefor abnormal condition--- line 64, cancel "overload" and substitute therefor -abnorma1 condition Column 20, line 9, cancel "overload" and substitute therefor -abn0rmal condition--;

line 48, cancel "system" (second occurrence) and substitute thereforsignal-.-;

line' 60, cancel "overload" and substitute therefor --abnormal condition Signed and sealed this 26th day of December 1972.

(SEAL) Attest:

iE Q W- E Q B RJR. RoBERT GOTTS CHALKR u seeing flcer Commissioner of Patents FORM PO-1050 (10-69) USCOMM-DC 60376-1 69 r us. GOVERNMENT PRINTING OFFICE: 19" o-ass-au,

37 UNITED STATES PATENT OFFICE QE TEHQATE F CGR Patent No. 3 a 662 220 Dated May 9, 1972 Inventor(s) Richard E. RiebS It is certified that error appears in the above-identified patent and that said Letters Patent are hereby corrected as shown below:

F- Column 18,line 57, cancel "overload" and substitute therefor abnorma1 condition;

Column 19, line 46, cancel "overload" and substitute therefor -abnorma1 condition--;

line 64, cancel "overload" and substitute thereforabnormal condition Column 20, line 9, cancel "overload" and substitute therefor abnormal c0ndition;

line 48, cancel "system" (second occurrence) and substitute therefor signal;

Signed and sealed this 26th day of December 1972.

(SEAL) Attest:

EDWARD I"I.FLETCHER,JR.

testing Officer ROBERT GOT'ISCHALK Commissioner of Patents ORM PO-105O (10-69) USCOMM-DC 60376-P69 r: us. GOVERNMENT PRINTING OFFICE: 1969 0-366-334.

Claims (28)

1. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor coupled to said input and chargable by the current flowing therein, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof by the current flowing to said input, normally inactive electronic circuit means coupled to said input and to said timing capacitor and responsive to an abnormal circuit condition in said system for conducting current to said resistor means to modify the voltage drop thereacross and prevent the discharge of said capacitor through said leakage resistor means upon the occurrence of said abnormal circuit condition so that said timing capacitor may begin charging.

2. In an electronic timing device having an input adapted to be connected to an electrical system, energy storage means coupled to said input, leakage resistor means normally shunting said energy storage means for preventing the charging thereoF by the current flowing to said input, overload sensing means coupled to said input and normally inactive electronic means coupled to said leakage resistor means, said overload sensing means being responsive to the current in said system to actuate said electronic circuit means for raising the voltage drop across said leakage resistor means to thereby prevent the discharge of said energy storage means therethrough when the current in said system reaches a predetermined value, whereby said energy storage means is allowed to charge up.

3. In an electronic timing device having an input adapted to be connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof by the current flowing to said input, circuit means including overload sensing means coupled to said input and normally inactive electronic means coupled to said leakage resistor means, said overload sensing means being responsive to the current in said system to actuate said electronic means to conduct current to said leakage resistor to raise the voltage drop thereacross to thereby prevent the discharge of said timing capacitor means therethrough when the current in said system reaches a predetermined value, whereby said energy storage means is allowed to charge up, and means for preventing current from flowing from said leakage resistor means to said timing capacitor means.

4. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, voltage comparison means having sensing means and reference voltage means, said voltage comparison means also having output means connected to said leakage resistor means, said voltage comparison means being actuable when the voltage at said sensing means exceeds said reference voltage to conduct current to said leakage resistor means, circuit means connecting said sensing means to said input for placing a voltage on said sensing means that is proportional to the current at said input whereby output current will flow to said leakage resistor when the current at said input exceeds a predetermined value to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, unidirectional circuit means for preventing current flow from said leakage resistor means to said timing capacitor, and output means coupled to said timing capacitor and operable when the charge thereon exceeds a predetermined value.

5. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, a signal responsive transistor, reference voltage means, circuit means connecting the base of said signal responsive transistor to said input for placing a potential on said base that is proportional to the current at said input, the emitter of said transistor being connected to said reference voltage means whereby collector current will flow in said transistor when the current at said input exceeds a predetermined value, normally non-conducting current responsive means connected to said leakage resistor and to the collector of said transistor so that when collector current flows therein as a result of said predetermined current at said input said current responsive circuit means will conduct current to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, and diode means for preventing current from flowing from said leakage resistor to said timing capacitor.

6. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing caPacitor connected to said input and chargeable by the current flowing therein, a leakage resistor shunting said timing capacitor, triode means having a source element, a load element and a control element, reference voltage means, circuit means connecting the control element of said triode means to said input for placing a potential on said control element that is proportional to the current at said input, the source element of said triode means being connected to said reference voltage means whereby load current will flow in said load element when the current at said input exceeds a predetermined value, normally non-conducting current responsive means connected to said leakage resistor and to said load element so that when load current flows in said triode means as a result of said predetermined current at said input said current responsive means will conduct current to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented, and output means coupled to said timing capacitor and operable when the charge thereon exceeds a predetermined value.

7. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor coupled to said input and chargeable by the current flowing therein, leakage resistor means connected in parallel with said timing capacitor for normally shunting said charging current therearound, voltage biasing means connected to said leakage resistor means in a sense opposite to the sense of said shunted current so that the effect of the voltage drop across said leakage resistor on the potential of the junction between said leakage resistor and said timing capacitor is partially cancelled, rectifier means shunting said timing capacitor and operable to shunt around said timing capacitor any reverse current from said leakage resistor as a result of said biasing means whereby the voltage drop in said leakage resistor as a result of said leakage current does not produce a difference in potential across said timing capacitor, circuit means coupled to said input and responsive to the current in said system for preventing the discharge of said capacitor through said leakage resistor means when the current in said system reaches a predetermined value.

8. An electronic timing device comprising an input adapted to be connected to an electrical system, a timing capacitor connected to said input and chargeable by the current flowing therein, a leakage resistor connected in parallel with said timing capacitor for shunting said charging current therearound; means coupled to said timing capacitor and to said leakage resistor means for cancelling the effect of the shunted current produced voltage drop across said leakage resistor on said timing capacitor means whereby the voltage drop in said leakage resistor does not produce a potential difference across said timing capacitor, voltage comparison means having sensing means and reference voltage means, said voltage comparison means also including output means connected to said leakage resistor means said voltage comparison means being actuable when the voltage at said sensing means exceeds said reference voltage to conduct current to said leakage resistor means, circuit means connecting said sensing means to said input for placing a voltage on said sensing means that is proportional to the current at said input whereby output current will flow to said leakage resistor to thereby raise its voltage to a value higher than the voltage across said timing capacitor so that the further discharge thereof is prevented.

9. In an electronic timing device the combination of an input adapted to be connected to an electrical system, timing capacitor means connected to said input and chargeable by the current flowing therein, an impedance in a parallel circuit with respect to said timing capacitor means for shunting a portion of said current around said timing capacitor said paralLel circuit including means for holding said shunted current to a predetermined value, leakage means connected to said capacitor and normally preventing the charging thereof, said energy leakage means including circuit means connected to said input and responsive to a predetermined current in said system for preventing the leakage of said current means through said leakage means so that said timing capacitor means beings charging upon the occurrence of said predetermined current.

10. In an electronic timing device the combination of a pair of input terminals, a first charging resistor having one end connected to one of said input terminals, a second charging resistor and a transistor, said second resistor and the emitter-base circuit of said transistor being connected in parallel with said first charging resistor, a first energy storage means between the other end of said first resistor and the other input terminal, a second energy storage means connected between the collector of said transistor and said other input terminal, whereby each of said energy storage means is chargeable by the current flowing in its associated resistor, energy responsive means coupled to said first energy storage means and responsive to the energy stored therein for actuation when the energy on said first energy storage means reaches a predetermined value, said second energy storage means being connected to said energy responsive means for supplying operating energy thereto.

11. In a device for protecting an electrical system, the combination of a pair of input terminals, a current transformer and a rectifier connecting said input terminals to said system, a first charging resistor having one end connected to one of said input terminals, a second charging resistor and a transistor, said second resistor and the emitter-base circuit of said transistor being connected in parallel with said first charging resistor, energy storage means connected between the collector of said transistor and the other input terminal, whereby said energy storage means is chargeable by a predetermined portion of the current flowing at said input terminals.

12. An electronic timing device comprising a pair of input terminals, a first current dividing resistor having one end connected to one of said input terminals, a second current dividing resistor and a charging transistor, said second current dividing resistor and the emitter-base circuit of said charging transistor being connected in parallel with said first current dividing resistor, a timing capacitor connected between the collector of said coupling transistor and said other input terminal and adapted to be charged by the current flowing therein, a power capacitor connected to the other end of said first current dividing resistor, and voltage responsive means connected to said timing capacitor for actuation when the charge on said timing capacitor reaches a predetermined value, said power capacitor means being connected to said voltage responsive means for supplying operating energy thereto.

13. A circuit interrupting device for protecting an electrical system from overload currents, switch means for interrupting the current in said system, timing capacitor means coupled to said system, first impedance means coupled to said timing capacitor means for controlling the charging rate thereof as a function of the magnitude of the current in said system, second impedance means in circuit with said timing capacitor means for controlling the charging rate thereof independently of the magnitude of the current in said system, third impedance means coupled to said timing capacitor means for normally holding the same in a discharged condition, overload responsive means coupled to said system and operable when the current therein exceeds a predetermined value to conduct current to said third impedance means so as to raise the voltage drop thereacross and to prevent the further discharge of said capacitor means therethrough so that said charging capacitor may beGin charging, and uni-directional current means for preventing current flow from said third impedance means to said timing capacitor means, and output means coupled to said capacitor means and operable to open said switch means when the charge thereon reaches a predetermined value.

14. A circuit interrupter for protecting an electrical system from overload currents, switch means in circuit with said system for interrupting the current flow therein, timing capacitor means coupled to said system, first resistance means in series circuit relation with said timing capacitor means for controlling the charging rate thereof as a function of the magnitude of the current in said system, second resistance means in parallel circuit relation with said timing capacitor means for controlling the charging rate thereof independently of the magnitude of the current in said system, third resistance means connected in parallel circuit relation with said timing capacitor means for normally holding the same in a discharged condition, overload responsive means coupled to said system and responsive to a predetermined current therein for conducting current to said third resistance means to raise the voltage drop thereacross so that said timing capacitor is prevented from discharging therethrough, whereby said timing capacitor begins charging when the current in said system reaches a predetermined value, uni-directional current means for preventing current from flowing from said third resistance means to said timing capacitor means, and output means coupled to said timing capacitor means and operable when the charge thereon reaches a predetermined value for opening said switch means.

15. In an electronic timing device having an input connected to an electric system, timing capacitor means, circuit means coupled to said input for charging said timing capacitor means by a current functionally related to the current in said input, leakage means normally shunting said timing capacitor means for preventing the charging thereof, an energy source, abnormal condition responsive means coupled to said input, switching means coupled to said leakage means and to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to actuate said switching means to couple said leakage means to said energy source for modifying the potential of said leakage means to thereby prevent the discharge of said timing capacitor means therethrough whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said timing capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage means to said timing capacitor means.

16. In a circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally related to the current therein, an energy source, energy storage means, electronic circuit means having a control element connected to said energy source, an output element connected to said energy storage means and an input element connected to said input, said electronic circuit means being characterized in that current will flow from said output element when the ratio of the output element potential to the control element potential is within a predetermined range of values, whereby the maximum energy potential applied to said energy storage means cannot exceed a predetermined value, and energy responsive means coupled to said energy storage means and responsive when the energy thereon reaches a predetermined value.

17. A circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally related to the current therein, an energy source, a transistor, energy storage means, the emitter and collector of said transistor being connected to said input for receiving said signal, the emitter and base of said transistor connecting said energy storage means to said energy source whereby the maximum energy potential applied to said energy storage means cannot exceed the potential energy of said source, and energy responsive means coupled to said energy storage means and responsive when the charge thereon reaches a predetermined value.

18. In an electronic timing device the combination of a pair of input terminals, a first resistance having one end connected to one of said input terminals, a second resistance and a transistor, said second resistance and the emitter base circuit of said transistor being connected in parallel with said first resistance, a voltage source connected to the other end of said first resistance, energy storage means connected to the collector of said transistor for charging by the current flowing in said second resistance, whereby the voltage applied to said energy storage means cannot exceed the voltage of said energy source, and energy responsive means coupled to said energy storage means and responsive when the energy stored therein reaches a predetermined value.

19. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, an energy source, circuit means coupled to said input and to said leakage resistor means and including abnormal condition responsive means and switching means having a control element connected to said abnormal condition responsive means and output means operative to connect said resistor means to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to provide an actuating signal to said control element so that said resistor means is connected to said energy source for modifying the potential thereof and prevent discharge of said timing capacitor therethrough, whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

20. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, abnormal condition responsive means coupled to said input, electronic circuit means coupled to said leakage resistor means, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to cause said electronic circuit means to conduct current to said leakage resistor for modifying the potential thereof and prevent discharge of said timing capacitor means therethrough, whereby said capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

21. In an electronic timing device having an input connected to an electrical system, timing capacitor means coupled to said input, leakage resistor means normally shunting said timing capacitor means for preventing the charging thereof by the current flowing to said input, abnormal condition responsive means coupled to said input, transistor means having a base connected to said abnormal condition responsive means and an emitter-collector circuit connected to said leakage resistor, said overload responsive means being operative upon the ocCurrence of an abnormal circuit condition to cause said transistor to conduct current to said leakage resistor for modifying the voltage drop thereacross and prevent the discharge of said timing capacitor means therethrough, whereby said timing capacitor means is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge in said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said timing capacitor means.

22. In a circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical signal functionally related to the current therein, an energy source, energy storage means, electronic circuit means having a control element connected to said energy source, an output element connected to said energy storage means and an input element connected to said input, said electronic circuit means being operative to conduct input current to said output when the ratio of the output element potential to the control element potential is less than a predetermined value, whereby said energy source is chargeable by a current functionally related to said signal until the potential thereof reaches a predetermined value, leakage impedance means normally shunting said energy storage means to prevent the charging thereof, abnormal condition responsive means coupled to said input and to said impedance means and operative to couple said impedance means to said energy source upon the occurrence of an abnormal circuit condition so that potential of said impedance means is modified to prevent the further discharge of said energy storage means therethrough, unidirectional current means for preventing the flow of current from said impedance means to said energy storage means, and energy responsive means coupled to said energy storage means and responsive when the energy thereon reaches a predetermined value.

23. A circuit interrupter for protecting an electrical system, an electronic timing device having an input coupled to said system for deriving an electrical system functionally related to the current therein, an energy source, a timing capacitor, a transistor, the emitter and base of said transistor being connected to said input for receiving said signal, the collector and base of said transister connecting said energy storage means to said energy source whereby the maximum energy potential applied to said energy storage means cannot exceed the potential of said energy source, leakage resistor means normally shunting said timing capacitor for preventing the charging thereof, abnormal condition responsive means connected to said input, switching means coupled to said abnormal condition responsive means and to said leakage resistor means and to said energy source, said overload responsive means being operative upon the occurrence of an abnormal circuit condition to provide an actuating signal to said switching means so that said leakage resistor means is connected to said energy source, for modifying the potential thereof and prevent the discharge of said timing capacitor therethrough, whereby said timing capacitor is allowed to charge up, output means coupled to said timing capacitor means and operative to interrupt said system when the charge on said capacitor means reaches a predetermined level, and unidirectional current means for preventing current flow from said leakage resistor means to said capacitor means.

24. In a protective relay assembly, a pair of terminals, means for deriving from current supplied to the pair of terminals a first direct voltage having a magnitude dependent on the magnitude of current flowing through the pair of terminals over a substantial range of variation of the magnitude of said current, means for deriving from current supplied to said pair of terminals a second direct voltage, having a magnitude which is substantially constant over said range of variation, a capacitor, circuit means connecting the capacitor for energization in accordance with the first direct voltage, said circuit means including substantial resistance whereby the circuit means and capacitor provide a time-delay circuit, controllable disabling means rendering said capacitor ineffective for receiving a charge through said circuit means, effectuating means responsive to a predetermined relation between the first and second direct voltages for controlling the disabling means to condition the capacitor to receive charge from said circuit means and translating means responsive to the voltage across said capacitor.

25. For use in protecting current distribution networks static overcurrent relay means responsive to overcurrent conditions for operating circuit protective devices after a predetermined time period and before the network is damaged comprising first means for generating a DC voltage representative of the current being monitored in said network; second means coupled to said first means for generating a predetermined voltage level after a predetermined time delay; third means coupled to said first means and normally inhibiting the operation of said second means until the output voltage level of said first means achieves a predetermined magnitude; constant voltage reference means coupled to the output of said first means for establishing a second predetermined threshold level; fourth voltage-sensitive switch means coupled to said second means and said constant voltage reference means for energizing a circuit protective device when the output voltage of said second means achieves said second predetermined threshold level.

26. The device of claim 25 wherein said first means is comprised of current transformer means; and full wave rectification means connected across the output of said current transformer means for generating said DC voltage.

27. The device of claim 25 wherein said constant voltage reference means is comprised of a series connected zener diode and resistor coupled between the output of said first means and ground potential; the common terminal between said zener diode and resistor being coupled to said fourth means.

28. The device of claim 27 wherein said fourth means is comprised of transistor means having first, second and third electrodes, respectively, coupled to said constant reference voltage means common terminal, the output of said second means, and said first means.

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