US3051791A - Multiplexing means - Google Patents

Description

Aug. 28, 1962 INPUT l F. M. YOUNG ETAL 3,051,791

MULTIPLEXING MEANS Filed Feb. 28. 1957 Z vv SAMPLIN MULTIPLEXING swncn swn'cH I FROM FROM PROGRAMMER PROGRAMMER l l l l I I l I I 45 OUTPUT I I I summma I AMPLIFIER I 1 I \/V\/ l v wi l? INVENTORS.

3,051,791 MULTIPLEXTNG MEANS Frink Mansfield Young, Boston, and Evan T. Colton,

Melrose, Mass, assignors to Epsco, Incorporated, Boston, Mass, a corporation of Massachusetts Filed Feb. 28, 1%7, Ser. No. 643,159 6 Claims. (Cl. 179-15) The invention relates to a multiplexing means and more particularly a multiplexing means utilizing switching means for sampling information signals and delivering multiplex output signals.

The multiplexing means utilizing switches which have heretofore been utilized have been unsatisfactory when high accuracy has been required. The inaccuracy of such means has mainly been due to varying characteristics of the switches and other elements utilized which have affected the output signals.

It is therefore a principal object of the invention to provide a new and improved multiplexing means delivering output signals accurately corresponding to the input sampled signals.

Another object of the invention is to provide a new and improved multiplexing means utilizing switches in which the effect of the characteristics of the switches is minimized in the output signal.

Another object of the invention is to provide a new and improved multiplexing means which allows simultaneous sampling of a plurality of respective information signals and subsequent time delivery of output signals corresponding with said sampled signals.

Another object of the invention is to provide a new and improved multiplexing means which is readily adapted for various modes of operation and programming.

Another object of the invention is to provide a new and improved multiplexing means which may be easily adapted for handling any number of information signals or channels by the addition of circuitry units.

Another object of the invention is to provide a neW and improved multiplexing means which is simple in operation.

The above objects are achieved by providing a multiplexing network comprising a plurality of circuits each having an input terminal adapted to receive an information signal and an output signal. A first amplifier unit has an input terminal for receiving signals from said input terminal and an output. A first switching means controllably delivers signals from the output of the first amplifier to a storage device such as a capacitor. A second amplifier unit has an input receiving signals from the first switching means and the storing device and has an output delivering signals to a second switching means. The second switching means controllably delivers signals from the output of said second amplifier unit to the output terminal of the circuit. A loop return means delivers inverse feedback signals from the second switching means to the input of the first amplifier unit.

In operation, each of said circuits samples the information signal on its respective input terminal when the first and second switching means are concurrently closed. After the sampling operation the first and second switching means are opened and multiplexed output signals are deliv red corresponding to the sampled signals when respective second switch means are sequentially closed.

The arrangement of the amplifier units, switch means, and loop return means minimizes the effect of changes in their characteristics upon the output signal of said circuit.

The above objects as well as many other objects of the invention will become apparent when the following description is read in connection with the drawings, in which:

3,fi5l,'l9l Patented Aug. 28, 1962 ice FIGURE 1 is a schematic diagram illustrating a multiplexing network embodying the invention and including a plurality of multiplexing circuits, and

FIGURE 2 is a modified form of multiplexing circuit.

Like reference numerals designate like parts throughout the several views.

Refer to FIGURE 1 which discloses amultiplexing network 10 comprising a plurality ofmultiplexing circuits 12.

Each of themultiplexing circuits 12 has aninput terminal 14 adapted to receive respective information signals which may be connected through aresistor 16 to theinput 18 of anamplifier 20. The output 22 of theamplifier 2% is controllably connected through a switch 24 to asignal storage capacitor 26 which is passed to ground potential and theinput 28 of asecond amplifier 30.

Theoutput 32 of theamplifier 30 is controllably delivered through a switch 34- to theline 36. Areturn loop 38 which may comprise aresistor 40 connects theline 36 with theinput 18 of theamplifier 2%) for delivering an inverse or negative feedback signal. Theline 36 is also connected through aresistor 42 to anoutput terminal 44 of the circuit '12.

When using a resistor as the inverse feedback path the gain in the forward path is K. In the system shown in FIG. 1 the product of the gains of theamplifiers 20 and 30 is the forward gain, and, therefore, is K. Numerous combinations of gains to provide this result are apparent to those skilled in the art. As an example, however,amplifier 26 could have a gain of K Whileamplifier 30 could have a gain of nearly plus one.

Theoutput terminals 44 are connected together and joined to theinput 46 of anoutput amplifier 48 which has a negative feedback loop 50. Theamplifier 48 delivers its output signals to theoutput multiplexing terminal 52.

Theswitches 24 and 34 may the of the well-known electronic type which may respectively be controlled by signals on theirrespective control terminals 54 and 56. The signals delivered to theterminals 54 and 56 for controlling the opening and closing of theswitches 24 and 34 may be derived from a programmer.

In operation, each of thecircuits 12 of the multiplexing network it) operates to sample the information signal on itsinput terminal 14 when control signals are simultaneously delivered to theterminals 54 and 56 closing theswitches 24 and 34. At such time the signal on theinput terminal 14 is delivered to theinput 18 of amplifier 29 together with a negative feedback signal from theloop 38. The output signal of theamplifier 20 is passed through the switch 24 and is stored in thecharging capacitor 26. This signal also is amplified by theunit 30 and passed through theswitch 34 to produce the negative feedback signal over theloop 38. The output signal from theswitch 34 is also delivered to theoutput terminal 44 of thecircuit 12.

At this time, amplifiers 20 and 30 withresistors 40 and 16 function as a single operational amplifier having a gain equal to the negative of the ratio of the ohmic value ofresistor 40 to the ohmic value ofresistor 16. The term operational amplifier is used herein to denote the type of amplifier described on pages 22 to 26 of Pulse and Digital Circuits, by Millman and Taub, published by McGraw-Hill.

Resistor 42 functions to isolatejunction 36 from the signals delivered by other channels toterminal 44 so that the servoing signal inversely fed back to the input of amplifier 24) in a particular channel is a function only of the output fromamplifier 30 in its own channel.

After a signal is stored in thecharging capacitor 26 which corresponds to the information signal on theinput terminal 14, the switch 24 is opened preventing any change in the signal stored by thecapacitor 26. Soon thereafter, the control signal on theterminal 56 opens theswitch 34 preventing the delivery of an output signal from theamplifier 30 to theoutput terminal 44.

An output signal from theamplifier 30 may now be delivered to theoutput terminal 44 corresponding to the information signal onterminal 14 which was sampled by thecircuit 12 upon the delivery of a signal to theswitch 34 closing it. This occurs because with switch 24 open, there is no closed loop andamplifier 30 functions to amplify the signal held oncapacitor 26. This signal is coupled toterminal 44 throughresistor 42.

It is noted that the manner in which theswitches 24 and 34 are positioned Within thecircuit 12 minimizes the effect of changes in their characteristic upon the output signal of the circuit. This will be evident from noting that the feedback signal delivered by theloop 38 minimizes such variations which may occur in the characteristics of the switches and other such elements. Theswitches 34 and 24 are also respectively positioned at the outputs of theamplifiers 30 and 20 further minimizing their effect in the accuracy of the output signals. It is also noted that a multiplexing operation usually is carried out so rapidly that the charge of thecapacitor 26 changes insignificantly between the time the input signal is sampled and an output multiplexing signal is delivered by thecircuit 12.

Thus, it is apparent that the network may simultaneously sample a plurality of information signals or channels respectively delivered to theinput terminals 14 of itscircuits 12 by receiving control signals causing theirswitches 24 and 34 to be closed. In this mode of operation, it is noted that theoutput amplifier 48 will also deliver a signal to theoutput terminal 52 corresponding to the sum affect of the simultaneous to output signals of all of thecircuits 12.

After the sampling operation theswitches 24 and 34 are opened and sequential output signals may be derived in any order or sequence desired by closingrespective switches 34 of thecircuits 12.

Refer now to FIGURE 2 which discloses amultiplexing circuit 58 which is a modified form of thecircuit 12 of the network 19. Themultiplexing circuit 58 is identical to thecircuit 12 shown in FIGURE 1, except that it is provided with a third switch 68 which is connected between the output 22 of the amplifier and itsinput 18 for delivering an inverse or negative'feedback signal. The switch 6% which may be similar to theswitches 24 and 34 is controlled by a signal delivered to itscontrol terminal 62.

The multiplexingcircuit 58 may be substituted for thecircuit 12 to form the multiplexing network 19 of FIG- URE 1. When thecircuit 58 is sampling the signal on itsinput terminal 14, theswitch 60 is opened while theswitches 24 and 34 are closed. This produces a circuit which is equivalent to thecircuit 12 when it is sampling its signal and operates in the identical manner for this sampling procedure.

The sampling switch 24 may now be opened to retain the sampled signal in thestorage capacitor 26 after which theswitch 34 may be opened and the switch 611 closed.

With theswitch 60 closed, a negative feedback signal is delivered to theamplifier 20 maintaining itsinput lead 18 at substantially zero input signal. In this manner, theoutput terminal 44 is connected by theresistors 42 and 40 to the zero input signal potential at theinput 18 of theamplifier 20.

Thecircuit 58 may now deliver an output signal corresponding to the sampled signal at a time after the sampling operation by the closing of themultiplexing switch 34. This is due to the fact that a signal corresponding to the sampled switch is retained at the input to theamplifier 30 by thestorage capacitor 26 allowing theamplifier 30 to deliver its signal to theoutput terminal 44.

When the multiplexingswitch 34 is again opened to 4 terminate the delivery of the multiplexing signal by thecircuit 58, the terminal 44 resumes its former signal level due to tis being connected to zero potential throughresistors 42 and 40 as previously explained.

It is therefore particularly noted that thecircuit 58 has a specific advantage in that itsoutput terminals 44 are connected to a reference zero potential signal level at the input ofamplifier 20 except when the information signals on the various channels are being sampled.

Although the multiplexingcircuits 12 and 58 have been described in connection with theparticular multiplexing network 10, it is noted that these circuits may be usefully employed alone and in combination with other such circuits retaining their advantage of minimizing the efiect of the switching characteristics and maintaining a high degree of accuracy in the multiplexed signals.

It will, of course, be understood that the description and drawings, herein contained, are illustrative merely, and that various modifications and changes may be made in the apparatus disclosed without departing from the spirit of the invention.

What is claimed is:

1. A multiplexing circuit comprising an input terminal adapted to receive an information signal, and an output terminal; a first amplifier unit having an input for receiving signals from said input terminal, and an output; a signal storing device; a first switching means controllably transmitting signals from the output of said first amplifier to said storing device; a second amplifier unit having an input receiving signals from said first switching means and said storing device, and an output; a second switching means controllably transmitting signals from the output of said second amplifier unit to said output terminal; and a loop return means for delivering inverse feedback signals from said second switching means to the input of said first amplifier unit to cause said first and second amplifier units and said loop return means to constitute an operational amplifier when said first and second switching means are conditioned to transmit signals.

2. A multiplexing circuit comprising an input terminal adapted to receive an information signal and an output terminal, a first amplifier unit having an input for receiving signals from said input terminal and an output; a signal storing device; a first switching means controllably transmitting signals from the output of said first amplifier to said storing device; a second amplifier unit having an input receiving signals from said first switching means and said storing device, and an output; a second switching means controllably transmitting signal from the output of said second amplifier unit to said output terminal; a loop return means for delivering inverse feedback signals from said second switching means to the input of the said first amplifier unit; said first and second amplifier units and said loop return means forming an operational amplifier when said first and second switching means are conditioned to transmit signals; and a third switching means controllably closed for delivering an inverse feedback signal from the output of said first amplifier unit to its input.

3. A multiplexing network comprising a plurality of circuits each including an input terminal adapted to receive a respective information signal; an output terminal; a first amplifier unit having an input for receiving signals from its said input terminal, and an output; a signal storing device; a first switching means controllably delivering signals from the output of said first amplifier to said storing device; a second amplifier unit having an input receiving signals from said first switching means and said storing device, and an output; a second switching means controllably delivering signals, from the output of said storing device to said output terminal; a loop return menas for delivering inverse feedback signals from said second switching means to the input of said first amplifier unit; and a third switching means controllably closed for delivering an inverse feedback signal from the output of said first amplifier unit to its input; each of said circuits sampling its respective information signal when only its first and second switching means concurrently deliver output signals while thereafter delivering a multiplexing output signal for said sampled signal when only said second and third switching means deliver output signals; said third switching means being closed except when said third switching means delivers an output signal.

4. In a multiplexing system, apparatus comprising, first and second amplifiers, a multiplexing channel input terminal for supplying input signals to the first amplifier, signal storage means, means providing a feedback path between the output of the second amplifier and the input of the first amplifier, the signal storage means being connected in the input of the second amplifier and obtaining its stored signal from the output of the first amplifier, first and second switches connected respectively in the outputs of the first and second amplifiers, a multiplexing channel output terminal, and means controlling the operation of the switches whereby a first mode of operation connects the first and second amplifiers to function as an operational amplifier and causes the signal storage means to obtain a storage signal and a second mode of operation uncouples the signal storage means from the output of the first amplifier and couples the output of the second amplifier to the multiplexing channel output terminal.

5. Apparatus in accordance with claim 4, further including means providing a feedback path between the output and input of the first amplifier, and a third switch in the last-named feedback path for rendering the first amplifier operative as an operational amplifier in the second mode of operation.

6. In a multiplexing system, a plurality of multiplexing signal channels, each multiplexing channel having a signal input and a signal output terminal and apparatus comprising first and second amplifiers, means providing a feedback path between the output of the second amplifier and the input of the first amplifier, a storage capacitor coupled to the input of the second amplifier, a first switch interposed between the output of the first amplifier and the storage capacitor, and a second switch interposed between the output of the second amplifier and the channel output terminal, and the multiplexing system including an operational amplifier having its input connected to the output terminal of each multiplexing channel.

References Cited in the file of this patent UNITED STATES PATENTS 2,438,908 Goodall Apr. 6, 1948 2,521,733 Lesti Sept. 12, 1950 2,539,623 Heising Jan. 30', 1951 2,580,421 Guanella Jan. 1, 1952 2,629,857 Deloraine Sept. 14, 1953 2,643,293 Aigrain June 23, 1953 2,658,997 Carbrey et al Nov. 10, 1953 2,724,740 Cutler Nov. 22, 1955 2,839,619 Johnstone June '17, 1958 2,870,259 Norris Jan. 20, 1959 2,902,542 Treadwel l Sept. 1, 1959

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