TECHNICAL FIELDThe present disclosure relates generally to structures and methods for transferring (e.g., micro-transfer printing) multiple arrays of micro-components onto a substrate.
BACKGROUNDSubstrates with electronically active components distributed over the extent of the substrate may be used in a variety of electronic systems, for example, in flat-panel display devices such as flat-panel liquid crystal or organic light emitting diode (OLED) displays, in imaging sensors, and in flat-panel solar cells. The electronically active components are typically either assembled on the substrate, for example using individually packaged surface-mount integrated-circuit devices and pick-and-place tools, or by sputtering or spin coating a layer of semiconductor material on the substrate and then photolithographically processing the semiconductor material to form thin-film circuits on the substrate. Individually packaged integrated-circuit devices typically have smaller transistors with higher performance than thin-film circuits but the packages are larger than can be desired for highly integrated systems.
Methods for transferring active components from one substrate to another are described in U.S. Pat. No. 7,943,491. In examples of these approaches, small integrated circuits are formed on a native semiconductor source wafer. The small unpackaged integrated circuits, or chiplets, are released from the native source wafer by etching a layer formed beneath the circuits. A PDMS stamp is pressed against the native source wafer and the process side of the chiplets is adhered to individual stamp posts. The chiplets are pressed against a destination substrate or backplane with the stamp and adhered to the destination substrate. In other examples, U.S. Pat. No. 8,722,458 entitledOptical Systems Fabricated by Printing-Based Assemblyteaches transferring light-emitting, light-sensing, or light-collecting semiconductor elements from a wafer substrate to a destination substrate or backplane.
In order to populate a large destination substrate with components from a native source wafer, the stamp repeatedly picks up components from different locations on the native source wafer with stamp posts and prints the components to different locations on the destination substrate. The arrangement of components on the destination substrate is at least partly defined by the arrangement of the components on the native source wafer and the arrangement of posts on the stamp. The location of the stamp with respect to the native source wafer and the destination substrate is controlled by an opto-electro-mechanical control system.
SUMMARYIt has been found that because of variation in materials and photolithographic processes on the native source wafer, the performance or other attributes of components formed on a native source wafer can also vary. This variation in source materials can cause operational non-uniformities in components transferred to the destination substrate. There is a need, therefore, for systems, structures, devices, materials, and methods that reduce variability in arrangements of multiple arrays of micro-transfer-printed micro-components on destination substrates. The present disclosure provides, inter alfa, structures, materials, and methods that provide reduced large-scale component variation on a substrate.
In accordance with certain embodiments of the present disclosure, a method of micro-transfer printing comprises providing a component source wafer and components disposed in, on, or over the component source wafer, providing a destination substrate, and providing a stamp for transferring the components from the component source wafer to the destination substrate, wherein the component source wafer has an attribute or structure that varies across the component source wafer such that different ones of the components in different locations have a different structure, operation, appearance, or performance of the components, transferring a first array of components from the component source wafer to the destination substrate with a first orientation, and transferring a second array of components from the component source wafer to the destination substrate with a second orientation, wherein the second orientation is different from the first orientation.
In some embodiments, methods of the present invention comprise transferring the first array and transferring the second array with micro-transfer printing (e.g., dry contact printing).
In some embodiments of the present invention, the second orientation is rotated relative to the first array to provide different first and second orientations. The second orientation can be rotated 90 degrees, 180 degrees, or 270 degrees with respect to the first orientation.
In some embodiments, methods of the present invention comprise transferring the second array of components adjacent to the first array of components on the destination substrate. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate with adjacent arrays on the destination substrate transferred at different orientations. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate N times in one dimension, where N/2 pairs of adjacent arrays on the destination substrate comprise array i and array (N−1−i) for each i from 0 to (N/2)−1. In some embodiments, methods of the present invention comprise repeatedly transferring arrays of components from the component source wafer to the destination substrate N×M times in two dimensions, where N/2×M/2 two-by-two adjacent component arrays on the destination substrate comprise array (i, j), array (N−1−i, j), array (i, M−1−j), and array (N−1−i, M−1−j) for each i from 0 to (N/2)−1 and each j from 0 to (M/2)−1.
In some embodiments, methods of the present invention comprise interlacing the second array with respect to the first array in at least one dimension to provide different first and second orientations. The interlacing can be in one dimension or in two dimensions. The first array and the second array can each be regular, arrangements of components in one dimension or regular arrangements of components in two dimensions.
In some embodiments, methods of the present invention comprise offsetting the second array with respect to the first array on the destination substrate by an amount that is different from an offset of the first array with respect to the second array on the component source wafer to provide different first and second orientations. The second array can be disposed with respect to the first array on the destination substrate in a different direction than the second array is disposed with respect to the first array on the component source wafer. The first array and second array can be adjacent on the component source wafer before transferring but not adjacent on the destination substrate after transferring.
In some embodiments, methods of the present invention comprise providing a plurality of component source wafers, wherein the plurality of component source wafers comprises the component source wafer, and transferring arrays of components from each of the component source wafers onto the destination substrate with two or more different orientations.
In some embodiments of the present invention, the plurality of component source wafers comprises a first component source wafer and a second component source wafer different from the first component source wafer, and some methods of the present invention comprise interlacing components from the first component source wafer between components from the second component source wafer.
In some embodiments of the present invention, the components are light-emitting components such as inorganic light-emitting diodes.
BRIEF DESCRIPTION OF THE DRAWINGSThe foregoing and other objects, aspects, features, and advantages of the present disclosure will become more apparent and better understood by referring to the following description taken in conjunction with the accompanying drawings, in which:
FIG. 1 is a schematic cross section of a native source wafer comprising an array of components useful in understanding embodiments of the present disclosure;
FIG. 2 is a schematic plan view of a native source wafer comprising an array of components having a common variable attribute that varies in one dimension across the array useful in understanding embodiments of the present disclosure;
FIG. 3 is a schematic plan view of a native source wafer comprising an array of components having a common variable attribute that varies in two dimensions across the array useful in understanding embodiments of the present disclosure;
FIG. 4A is a perspective andFIG. 4B is a schematic cross section taken along cross section line A ofFIG. 4A of a stamp and component source wafer according to illustrative embodiments of the present disclosure;
FIG. 5 is a schematic cross section of the stamp in contact with a first subset of components on the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 6A is a perspective andFIG. 6B is a schematic cross section taken along cross section line A ofFIG. 6A of the stamp with the first subset of components removed from the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 7A is a perspective andFIG. 7B is a schematic cross section taken along cross section line A ofFIG. 7A of the stamp before micro-transfer printing the first subset of components from the stamp to a destination substrate according to illustrative embodiments of the present disclosure;
FIG. 8 is a schematic cross section of the stamp micro-transfer printing the first subset of components to the destination substrate according to illustrative embodiments of the present disclosure;
FIG. 9A is a perspective andFIG. 9B is a schematic cross section taken along cross section line A ofFIG. 9A of the stamp and destination substrate after micro-transfer printing the first subset of components from the stamp to the destination substrate according to illustrative embodiments of the present disclosure;
FIG. 10A is a perspective andFIG. 10B is a schematic cross section taken along cross section line A ofFIG. 10A of the stamp and component source wafer before picking up a second subset of components with the stamp according to illustrative embodiments of the present disclosure;
FIG. 11 is a schematic cross section of the stamp in contact with the second subset of components on the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 12A is a perspective andFIG. 12B is a schematic cross section taken along cross section line A ofFIG. 12A of the stamp with the second subset of components removed from the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 13A is a perspective andFIG. 13B is a schematic cross section taken along cross section line A ofFIG. 13A of the stamp before micro-transfer printing the second subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 14 is a cross section of the stamp micro-transfer printing the second subset of components to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 15A is a perspective andFIG. 15B is a cross section taken along cross section line A ofFIG. 15A of the stamp and destination substrate after micro-transfer printing the second subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 16 is a perspective of the stamp and component source wafer before picking up a third subset of components with the stamp according to illustrative embodiments of the present disclosure;
FIG. 17 is a perspective of the stamp with the third subset of components removed from the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 18 is a perspective of the stamp before micro-transfer printing the third subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 19 is a perspective of the stamp after micro-transfer printing the third subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 20 is a perspective of the stamp and component source wafer in a rotated configuration before micro-transfer printing a fourth subset of components according to illustrative embodiments of the present disclosure;
FIG. 21 is a perspective of the stamp with the fourth subset of components removed from the component source wafer according to illustrative embodiments of the present disclosure;
FIG. 22 is a perspective of the stamp before micro-transfer printing the fourth subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 23 is a perspective of the stamp after micro-transfer printing the fourth subset of components from the stamp to the destination substrate in a rotated configuration according to illustrative embodiments of the present disclosure;
FIG. 24 is a flow diagram according to illustrative embodiments of the present disclosure;
FIG. 25 is a plan view of a native source substrate with components labeled according to a stamp pick-up method useful in understanding embodiments of the present disclosure;
FIG. 26 is a plan view of a destination substrate with components printed according to the native source substrate and stamp pick-up method ofFIG. 24 useful in understanding embodiments of the present disclosure;
FIG. 27 is a plan view of a destination substrate with printed components from a native source substrate corresponding toFIG. 2 useful in understanding embodiments of the present disclosure;
FIG. 28 is a plan view of a destination substrate with printed components from a native source substrate corresponding toFIG. 3 useful in understanding embodiments of the present disclosure;
FIG. 29 is a micrograph of a destination substrate with printed components from a native source substrate corresponding toFIG. 3 in operation useful in understanding embodiments of the present disclosure;
FIG. 30 is a plan view of a native source substrate with an 8×8 array of components labeled according to a stamp pick-up method useful in understanding embodiments of the present disclosure;
FIG. 31 is a plan view of a destination substrate with printed components from the native source substrate corresponding toFIG. 30 useful in understanding embodiments of the present disclosure;
FIG. 32 is a plan view of a native source substrate with an 8×8 array of components labeled according to a stamp pick-up method according to illustrative embodiments of the present disclosure;
FIG. 33 is a plan view of a native source substrate with an 8×8 array of components labeled according to a stamp pick-up method according to illustrative embodiments of the present disclosure;
FIG. 34 is a plan view of a native source substrate with an 8×8 array of components labeled according to a stamp pick-up method according to illustrative embodiments of the present disclosure;
FIG. 35 is a plan view of a destination substrate with printed components from the native source substrate corresponding toFIG. 32 according to illustrative embodiments of the present disclosure;
FIG. 36 is a plan view of a destination substrate with printed components from the native source substrate corresponding toFIG. 32 according to illustrative embodiments of the present disclosure;
FIG. 37 is a plan view of a destination substrate with printed components from the native source substrate corresponding toFIG. 32 according to illustrative embodiments of the present disclosure;
FIG. 38 is a plan view of a destination substrate with printed components from the native source substrate corresponding toFIG. 3 according to illustrative embodiments of the present disclosure; and
FIG. 39 is a flow diagram according to illustrative embodiments of the present disclosure.
The perspectives shown inFIGS. 4A, 6A, 7A, 9A, 10A, 12A, 13A, 15A, and 16-23 are exploded illustrations with exaggerated viewing angles and the two cross section lines A indicated in some of the perspective Figures are actually congruent.
Features and advantages of the present disclosure will become more apparent from the detailed description set forth below when taken in conjunction with the drawings, in which like reference characters identify corresponding elements throughout. In the drawings, like reference numbers generally indicate identical, functionally similar, and/or structurally similar elements. The figures are not necessarily drawn to scale.
DETAILED DESCRIPTION OF CERTAIN EMBODIMENTSCertain embodiments of the present disclosure are directed toward methods of micro-transfer printing arrays of components from a component source wafer to a destination substrate using a stamp, wherein an attribute or structure of the components varies systematically over the component source wafer so that different ones of the components in different locations on the component source wafer have a different structure, operation, appearance, or performance. The attribute variation can, in the absence of structures, devices, systems, and methods of the present disclosure, result in unwanted large-scale non-uniformity in component operation, structure, or appearance on the destination substrate. According to some embodiments of the present disclosure, the large-scale operation can be mitigated by providing components on a destination substrate at different orientations with respect to the attribute variation on a component source wafer. The components can be provided in arrays so that a first array is disposed with a first orientation and a second array is disposed with a second orientation, where the second orientation is different from the first orientation. Different orientations can, for example, comprise different spatial rotations, offsets, interlacings (e.g., interdigitations), or interlacing in one or two directions (dimensions) in which the attribute varies. Arrays ofcomponents20 can be for example regular one-dimensional arrays or regular two-dimensional arrays.
FIG. 1 is a cross section of acomponent source wafer10 comprising anarray22 of components20 (e.g.,20a-20j).Components20 can be native tocomponent source wafer10, that iscomponents20 can be constructed on, in, or overcomponent source wafer10 using, for example, photolithographic materials and methods useful for integrated circuit technology. Any manufacturing process experiences variation in materials and process control that can result in variation in nativecomponent source wafers10. According to some embodiments, a plurality of components20 (e.g.,components20a-20j) are disposed in, on, or overcomponent source wafer10. In some embodiments,component source wafer10 has an attribute orstructure12 that varies across component source wafer10 (e.g., across a surface of component source wafer10) that affects the structure, operation, appearance, or performance ofcomponents20. The variation can be, but is not necessarily, monotonic with respect to one or more directions (e.g., orthogonal directions) over a component source wafer. For simplicity in explanation and to aid understanding, an attribute orstructure12 is referred to herein as anattribute12. For example, attribute12 can be an epitaxial layer whose thickness (as shown inFIG. 1), material purity, doping, or crystallinity varies acrosscomponent source wafer10.Attribute12 can be particle contamination or any other variable attribute orstructure12 ofcomponent source wafer10 that affects the structure, operation, or performance ofcomponents20. The variation ofattribute12 can be linear (or non-linear) in one or two dimensions overcomponent source wafer10 or a surface ofcomponent source wafer10. The variation of anattribute12 can be spatially monotonic, so thatattribute12 is always increasing (or decreasing) in one or more directions either across the entirecomponent source wafer10 or portions ofcomponent source wafer10 much larger than an extent or size of acomponent20, for example the spatial extent of 10, 100, or 1000components20 overcomponent source wafer10 in one or two directions, or can be otherwise systematic, for example repetitive.Components20 can be provided in anarray22, for example a regular array, in one or two dimensions overcomponent source wafer10 or a surface ofcomponent source wafer10.
FIGS. 2 and 3 illustrate anarray22 ofcomponents20 distributed regularly in two dimensions over acomponent source wafer10, for example a rectangular portion ofcomponent source wafer10. A variation of anattribute12 is visually represented by the shading ofcomponent20. A darker shading implies a greater amount or quantity ofattribute12, for example a greater epitaxial layer thickness. The shading ofcomponent20 is merely illustrative of the variation ofattribute12 and does not imply thatcomponents20 vary in color or appearance. By shading the illustration ofcomponent source wafer10 in the figures, the variation in structure, operation, appearance, or performance ofcomponents20 is visually apparent in the figures and is more readily understood. As shown inFIG. 2, the quantity ofattribute12 increases in one direction (e.g., horizontally), as shown by the arrow. Referring toFIG. 3, the quantity ofattribute12 increases in two directions (e.g., both horizontally and vertically), as shown by the arrow.
Referring to the sequential cross sections and perspectives ofFIGS. 4A-23 and the flow diagram ofFIG. 24, according to embodiments of the present disclosure, a method of micro-transfer printing comprises providing acomponent source wafer10 comprisingcomponents20 instep100 and providing astamp30 in step110 (as shown in the explodedFIG. 4A perspective and corresponding cross sectionFIG. 4B taken along cross section line A ofFIG. 4A).Stamp30 can, but does not necessarily, comprisestamp posts32 each with a stamp post area on a distal end of stamp posts32. The stamp posts32 protrude fromstamp30 to contactcomponents20 whenstamp30 is pressed againstcomponents20. As shown inFIG. 4B,components20 are entirely disposed over, and can be formed on (e.g., in direct contact with),sacrificial portions14 spatially separated byanchors50 insacrificial layer11 ofcomponent source wafer10.Sacrificial layer11 can be a patternedsacrificial layer11.Components20 can be, but are not necessarily, arranged in arectangular array22, for example in a regular two-dimensional arrangement, as shown inFIG. 4A. Adielectric layer54 disposed overdestination substrate40 andsacrificial portions14 connects eachcomponent20 with acomponent tether52 to ananchor50. Component tethers52 are not necessarily made from a dielectric or in a dielectric layer. Component tethers52 can be laterally connected to anchors50 (as shown) or disposed in other locations, for example beneathcomponents20.
Referring toFIG. 5, sacrificial portions14 (shown inFIG. 4B) are sacrificed, for example by etchingsacrificial portions14 to formgaps16, so thatcomponents20 are suspended overgaps16 and attached toanchors50 ofcomponent source wafer10 bycomponent tethers52 that maintain the physical position ofcomponents20 with respect tocomponent source wafer10 aftersacrificial portions14 are etched. In some embodiments, each component is attached to each of one ormore anchors50 by one or more component tethers52.Stamp30 is moved into position with respect tocomponent source wafer10, for example by an opto-mechatronic motion platform, instep130 andcomponents20 are picked up fromcomponent source wafer10 by adheringcomponents20 to stamp30, for example by pressingstamp30 againstcomponents20 oncomponent source wafer10 with the motion platform and adheringcomponents20 to the distal ends of stamp posts32, for example with van der Waals or electrostatic forces.
As shown in theFIG. 6A perspective andFIG. 6B cross section taken along cross section line A ofFIG. 6A,stamp30 in contact withcomponents20 suspended overgaps16 is then removed fromcomponent source wafer10 by the motion platform, fracturing component tethers52 fromanchors50 to form separated or fractured component tethers53 and picking upcomponents20 fromcomponent source wafer10 withstamp30 instep140, providing picked-upstamp components20. Picked-up stamp components20 can comprise a separated or fracturedcomponent tether53.
Referring to the perspective ofFIG. 7A and cross section ofFIG. 7B taken along cross section line A ofFIG. 7A, adestination substrate40 is provided in step120. Instep150,stamp30 andstamp components20 with fractured component tethers53 are moved into position and aligned with respect todestination substrate40.
Referring toFIG. 8, instep160 picked-upstamp components20 with fractured component tethers53 are micro-transfer printed to a surface ofdestination substrate40 instep160 and, referring toFIGS. 9A and 9B,stamp30 is removed fromdestination substrate40.
If the process is not completed (done step170), the process of picking upcomponents20 fromcomponent source wafer10 is repeated (steps130 and140), possibly more than once. However, for at least one of the repetitions, micro-transfer printedcomponents20 are disposed with an orientation different from the orientation of the firstmicro-transfer print step160. The orientation for acomponent source wafer10 is taken with respect to the direction in which attribute12 varies, for example the direction of the arrow inFIGS. 2 and 3. In some embodiments, everyprint step160 is performed with a different orientation than thefirst print step160. In some embodiments, only one or only some of the repeated print steps160 is performed with a different orientation. In some embodiments, every other, every third, or every fourth repeatedprint step160 is performed with a different orientation. An orientation can be repeated for different print steps, for example two orientations can be alternately employed or multiple orientations (such as four orientations) can by cyclically employed.
As used herein, a different orientation can, but does not necessarily, includecomponents 20 micro-transfer printed (step160) with a different rotation, for example rotated in anarray22 adjacent to a micro-transfer printedarray22 ofcomponents20, for example as shown inFIG. 32 discussed below. In some embodiments, a different orientation can include micro-transfer printed (step160)components20 that overlap with a micro-transfer printedarray22 ofcomponents20. Overlappingarrays22 ofcomponents20 can be interlaced (e.g., interdigitated), for example as shown inFIG. 35 discussed below. In some embodiments, a different orientation can includearrays22 ofcomponents 20 micro-transfer printed (step160) to adjacent locations on adestination substrate40 that are micro-transfer printed from locations on acomponent source wafer10 that are not adjacent. In some embodiments, multiple different orientations are employed for micro-transfer printedarrays22 ofcomponents20, for example as shown inFIG. 33 discussed below. For example, anarray22 ofcomponents20 with a different orientation from anotherarray22 ofcomponents20 can be rotated and offset with respect to theother array22 ofcomponents20.Adjacent arrays22 ofcomponents20 arearrays22 ofcomponents20 that do not overlap and are not interlaced (e.g., interdigitated or intermingled) on adestination substrate40 but that includecomponents20 that are in neighboring rows or columns(for example as shown inFIGS. 23, 26, and 31 discussed below) so that there are nocomponents20 betweencomponents20 inadjacent arrays22 ondestination substrate40 that are not in theadjacent arrays22 ofcomponents20 oncomponent source wafer10. That is,components20 inadjacent arrays22 ondestination substrate40 are not separated by anycomponents20 that are not part of theadjacent arrays22 ofcomponents20 oncomponent source wafer10.
Different orientations for micro-transfer printing can be enabled by moving any one or any combination ofcomponent source wafer10,stamp30, ordestination substrate40. For example,stamp30 can be rotated aftercomponent20 pickup fromcomponent source wafer10 and beforecomponent20 printing todestination substrate40,destination substrate40 can be rotated in different directions or in different amounts before eachmicro-transfer print step160, orcomponent source wafer10 can be rotated in different directions or in different amounts before eachmicro-transfer pickup step140.
Referring next to the perspective ofFIG. 10A and cross section ofFIG. 10B taken along cross section line A ofFIG. 10A,stamp30 is aligned withcomponents20 suspended over gaps16 (step130), brought into contact withcomponents20 on component source wafer10 (shown inFIG. 11), and then removed fromcomponent source wafer10 by the motion platform, fracturing component tethers52 fromanchors50 to form separated or fractured component tethers53 and picking upcomponents20 fromcomponent source wafer10 withstamp30 instep140, as shown in the perspective ofFIG. 12A and the corresponding cross section ofFIG. 12B taken across cross section line A ofFIG. 12A.
As shown in the perspective ofFIG. 13A and cross section ofFIG. 13B taken along cross section line A ofFIG. 13A,stamp30 andstamp components20 with fractured component tethers53 are moved into position with respect to destination substrate40 (step150). However, beforemicro-transfer printing components20 todestination substrate40 withstamp30 instep160,stamp30 ordestination substrate40 is provided in a different orientation, for example by rotatingstamp30 ordestination substrate40, as indicated by the circular arrow inFIGS. 13A, 13B. Alternatively, as described below,stamp30 orcomponent source wafer10 is provided in a different orientation beforecomponent20 pickup instep140, for example by rotatingstamp30 orcomponent source wafer10. Referring toFIG. 14, instep160 picked-upstamp components20 with fractured component tethers53 are micro-transfer printed todestination substrate40 instep160 and, referring toFIGS. 15A and 15B,stamp30 is removed fromdestination substrate40.
Thus, according to some embodiments of the present disclosure, a method of micro-transfer printing comprises providing acomponent source wafer10 andcomponents20 disposed in, on, or over component source wafer10 (step100), providing a destination substrate40 (step120), and providing astamp30 for transferringcomponents20 fromcomponent source wafer10 to destination substrate40 (step110), wherecomponent source wafer10 has an attribute orstructure12 that varies (e.g., monotonically) acrosscomponent source wafer10 that affects the structure, operation, appearance, or performance of thecomponents20. Insteps130,140,150,160, afirst array22 ofcomponents20 is transferred fromcomponent source wafer10 todestination substrate40 with a first orientation and instep145,130,140,150,160 asecond array22 ofcomponents20 is transferred fromcomponent source wafer10 todestination substrate40 with a second orientation different from the first orientation.Component20 transfer can be performed using micro-transfer printing (e.g., dry contact printing), for example.
The process ofprinting components20 in different orientations is repeated again. Referring to the perspective ofFIG. 16,stamp30 is aligned withcomponents20 on component source wafer10 (step130), brought into contact withcomponents20 oncomponent source wafer10, and then removed fromcomponent source wafer10 by the motion platform, fracturing component tethers52 fromanchors50 to form separated or fractured component tethers53 and picking upcomponents20 fromcomponent source wafer10 withstamp30 instep140, as shown in the perspective ofFIG. 17. As shown in the perspective ofFIG. 18,stamp30 andstamp components20 with fractured component tethers53 are moved into position in a different orientation (illustrated by the circular arrow rotated in an opposite direction with respect toFIG. 13A, 13B) with respect to destination substrate40 (step150). Referring toFIG. 19, instep160 picked-upstamp components20 with fractured component tethers53 are micro-transfer printed todestination substrate40 instep160 andstamp30 is removed fromdestination substrate40.
The process ofprinting components20 in different orientations is repeated again for remainingcomponents20. Referring to the perspective ofFIG. 20,stamp30 is aligned withcomponents20 on component source wafer10 (step130). In this step,component source wafer10 is provided in a different orientation (illustrated by the circular arrow), rather than providing the stamp in a different orientation, as inFIGS. 13A-B andFIG. 18. Stamp posts32 ofstamp30 are brought into contact withcomponents20 oncomponent source wafer10, and then removed fromcomponent source wafer10 by the motion platform, fracturing component tethers52 fromanchors50 to form separated or fractured component tethers53 and picking upcomponents20 fromcomponent source wafer10 withstamp30 instep140, as shown in the perspective ofFIG. 21. As shown in the perspective ofFIG. 22,stamp30 andstamp components20 with fractured component tethers53 are moved into position with respect to destination substrate40 (step150). A dashed circular arrow is illustrated inFIG. 22 to illustrate thatdestination substrate40 can be rotated instead of rotatingcomponent source wafer10 inFIG. 20 orstamp30 inFIG. 16 to providecomponents20 in a different orientation ondestination substrate40. As shown inFIG. 23, instep160 picked-upstamp components20 with fractured component tethers53 are micro-transfer printed todestination substrate40 instep160 andstamp30 is removed fromdestination substrate40.
Components20 are all micro-transfer printed fromcomponent source wafer10 todestination substrate40 in various orientations (step170) and the process is completed (step180).
FIG. 25 is an illustration of acomponent source wafer10 having a four-by-fourarray22 ofcomponents20 whoseattributes12 vary monotonically (e.g., linearly) in each of two dimensions, indicated by the shading of thecomponents20 and corresponding toFIG. 3 (in a smaller component array22).Components20 oncomponent source wafer10 are labeled with a number corresponding to the stamp operation thatmicro-transfer prints components20 fromcomponent source wafer10 todestination substrate40 using astamp30 with a two-by-two array of stamp posts32, so that four stamp operations are required to complete the transfer, as described with respect toFIGS. 4A-23 above. Stamp operations that do notmicro-transfer print components20 in different orientations result in a distribution ofcomponents20 ondestination substrate40, for example without different rotations. as shown inFIG. 26. As shown inFIG. 26 by the shading ofcomponents20, theattribute12 variation ofcomponent source wafer10 is repeated multiple times, albeit at a different resolution ondestination substrate40 than oncomponent source wafer10.
FIG. 27 illustrates the result of micro-transfer printing sixteen four-by fourarrays22 ofcomponents20 from a component source wafer10 (e.g., corresponding toFIG. 2) onto adestination substrate40 in a common orientation, for example without different rotations. Similarly,FIG. 28 illustrates the result of micro-transfer printing sixteen four-by fourarrays22 ofcomponents20 from a component source wafer10 (e.g., corresponding toFIG. 3) onto adestination substrate40 in a common orientation, for example without different rotations. As shown by the shading ofcomponents20, in these cases (FIGS. 26-28) theattribute12 variation ofcomponent source wafer10 is repeated multiple times in either one dimension (horizontally, as shown inFIG. 27) or in two dimensions (horizontally and vertically, as shown inFIG. 28) albeit at a different resolution ondestination substrate40 than oncomponent source wafer10.
FIG. 29 is a micrograph of sixteenarrays22 ofcomponents 20 micro-transfer printed in a common orientation, for example without different rotations, from a component source wafer10 (e.g., corresponding toFIG. 3) to adestination substrate40. The regular variation in component attributes12 is readily visible. Such variation can be considered a form of pattern noise or fixed-pattern noise, often associated with image sensors. Such noise can be addressed by flat-field correction techniques that control the operation ofcomponents20 electronically. However, according to some embodiments of the present disclosure, the variation (non-uniformity) can also be addressed by transferringarrays22 ofcomponents20 from acomponent source wafer10 to adestination substrate40 using different orientations forcomponents20, for example using micro-transfer printing or contact printing.
FIG. 30 is an illustration of acomponent source wafer10 having an eight-by-eightarray22 ofcomponents20 whoseattributes12 vary in two dimensions, indicated by the shading of thecomponents20 and corresponding toFIG. 3 (in asmaller array22 of components20) andFIG. 25 (in alarger array22 of components20).Components20 oncomponent source wafer10 are labeled with a number corresponding to the operation (e.g., stamp operation) that transfers (e.g., micro-transfer prints)components20 fromcomponent source wafer10 todestination substrate40, for example using astamp30 with a four-by-four array ofstamp posts32 spaced apart by twocomponents20, so that four operations are required to complete the transfer of the shown array. Operations that do not transfer (e.g., micro-transfer print)components20 in different orientations result in a distribution ofcomponents20 ondestination substrate40 as shown inFIG. 31. As shown inFIG. 31 by the shading ofcomponents20, theattribute12 variation ofcomponent source wafer10 is repeated four times, albeit at a different resolution ondestination substrate40.
Referring toFIG. 32, in an illustration according to some embodiments of the present invention,arrays22 ofcomponents20 transferred (e.g., micro-transfer printed) inoperations2,3, and4 (e.g., stamp operations) each have different orientations ondestination substrate40 than thearray22 ofcomponents20 transferred (e.g., micro-transfer printed) in operation1 (e.g., a stamp operation). Eacharray22 ofcomponents20 transferred inoperations2,3, and4 is rotated with respect toarray22 ofcomponents20 and is adjacent toarray22 ofcomponents20 transferred inoperation1. Referring toFIG. 33, in an illustration according to some embodiments of the present invention, eacharray22 ofcomponents20 transferred (e.g., micro-transfer printed) inoperations2,3, and4 (e.g., stamp operations) is offset with respect toarray22 ofcomponents20 as distributed on component source wafer10 (shown inFIG. 30). Thus, theattribute12 ofcomponents20 varies less regularly with respect to spatial location ondestination substrate40.
Without wishing to be bound by any particular theory, such variation can be less objectionable to a human visual system for a particular application (e.g., ifcomponents20 are light-emitting diodes in a display). For example, thearray22 shown inFIG. 33, that has been formed using different orientations, has anattribute12 that varies with some frequency in one or more directions. For example,FIG. 33 shows some variation in the horizontal direction and a diagonal direction (e.g., from top left corner to bottom right corner). Thecomparative array22 shown inFIG. 31, that has been formed using only a single orientation, also has anattribute12 that varies with some frequency in one or more directions. Comparing thearrays22 ofFIG. 31 andFIG. 33, one of ordinary skill can appreciate that the frequency (or amplitude) of variation in at least one direction, for example in the aforementioned diagonal direction, is reduced in thearray22 ofFIG. 33. In some embodiments, transferring using different orientations may also increase the frequency (or amplitude) of variation in a different direction, such as the horizontal direction. In some embodiments, multiple different orientations, such as offset and rotation, are used to further reduce variations, for example in multiple directions.
FIG. 34 is an illustration of acomponent source wafer10 having an eight-by-eightarray22 ofcomponents20 whoseattributes12 vary in two dimensions, indicated by the shading of thecomponents20 and corresponding toFIG. 3 (in asmaller array22 of components20) andFIG. 25 (in alarger array22 of components20).Components20 oncomponent source wafer10 are labeled with a hexadecimal number (starting with ‘1’ and ending with ‘G’) corresponding to the operation (e.g., stamp operation) that transfers (e.g., micro-transfer prints)components20 fromcomponent source wafer10 todestination substrate40, for example using astamp30 with a two-by-two array of stamp posts32, so that sixteen operations are required to complete the transfer of the shown array. As shown inFIG. 35, in an illustration according to some embodiments of the present invention,arrays22 ofcomponents20 transferred (e.g., micro-transfer printed) in operations2-G (e.g., stamp operations) each have different orientations than the transferred (e.g., micro-transfer printed)array22 ofcomponents20 in operation1 (e.g., a stamp operation). Eacharray22 ofcomponents20 transferred in operations2-G is interlaced (e.g., interdigitated) with respect toarray22 ofcomponents20 transferred inoperation1. As shown inFIG. 36, in an illustration according to some embodiments, eacharray22 ofcomponents20 transferred (e.g., micro-transfer printed) in operations2-G (e.g., stamp operations) is offset and interlaced with respect toarray22 ofcomponents20 transferred (e.g., micro-transfer printed) in operation1 (e.g., a stamp operation) so thatadjacent arrays22 ofcomponents 20 micro-transfer printed ondestination substrate40 are not picked up fromadjacent arrays22 ofcomponents20 oncomponent source wafer10 and thearrays22 ofcomponents20 are interlaced.
As shown inFIG. 37, in an illustration according to some embodiments of the present invention, eacharray22 ofcomponents20 transferred (e.g., micro-transfer printed) in operations2-G (e.g., stamp operations) is offset, interlaced, and rotated with respect toarray22 ofcomponents20 transferred (e.g., micro-transfer printed) in operation1 (e.g., a stamp operation) so thatadjacent arrays22 ofcomponents20 transferred todestination substrate40 are not picked up fromadjacent arrays22 ofcomponents20 oncomponent source wafer10 and thearrays22 ofcomponents20 are interlaced and rotated. Thus, without wishing to be bound to any particular theory, theattribute12 ofcomponents20 varies less regularly or less significantly with respect to a local average with respect to position ondestination substrate40 and can thus be less objectionable to the human visual system (e.g., for example ifcomponents20 are light-emitting diodes in a display). For example, as shown inFIG. 37, two-by-two or four-by-fourarrays22 ofadjacent components20 ondestination substrate40 can haveaverage attribute12 values that have less variation than two-by-two or four-by-fourarrays22 ofadjacent components20 on thecomponent source wafer10.
FIG. 38 is an illustration according to some embodiments of the present disclosure wherein some of thearrays22 ofcomponents20 transferred (e.g., micro-transfer printed) inprint steps160 are rotated by different amounts with respect to others, for example some are not rotated, some are rotated 90 degrees, some are rotated 180 degrees, and some are rotated 270 degrees. The varying rotations reduce the systematic changes inattribute12 and at least apparently randomize the changes inattribute12 ofcomponents20 distributed overdestination substrate40.
In some embodiments, a method comprises repeatedly transferringarrays22 ofcomponents20 fromcomponent source wafer10 to destination substrate 40 N times in one dimension, where N/2 pairs ofadjacent arrays22 ofcomponents20 ondestination substrate40 comprise array22 i and array22 (N−1−i) for each i from 0 to (N/2)−1.
For example, referring toFIG. 2, a horizontal one-dimensional array of sixteen components20 (e.g., the top row ofFIG. 2) has a monotonically changingattribute12. Referring toFIG. 27, thecomponents20 are reordered in the same horizontal direction by transferring four groups (arrays22) of fourcomponents20 each (thus, in this example N=4 and i equals 0, 1, 2, and 3). (Note that the physical spacing ofcomponents20 inFIG. 27 is one quarter that ofFIG. 2.) If adjacent groups of four are sampled, as inFIG. 27, then components from group i=0 are transferred adjacent tocomponents20 from group i=1. Similarly,components20 from group i=1 are also adjacent tocomponents20 from group i=2 andcomponents20 from group i=2 are also adjacent tocomponents20 from group i=3, so that thecomponents20 haveattributes12 ordered as 1, 2, 3, 4 in four horizontally adjacent arrays, as shown inFIG. 27. In contrast, according to the equation above and for some embodiments of the present invention, for arrays from zero to (N/2)−1=1, if components from group i=0 are disposed adjacent to components from group i=3 (because N−1−I=4−1−0=3) and components from group i=1 are disposed adjacent to components from group i=2 (because N−1−I=4−1−1=2), so that thecomponents20 haveattributes12 ordered as 1, 4, 2, 3, the changes inattribute12 in the horizontal direction are no longer monotonic and the visibility or objectionability of the variation can be therefore reduced.
In some embodiments, a method of the present disclosure, comprises repeatedly transferringarrays22 ofcomponents20 fromcomponent source wafer10 to destination substrate40 N×M times in two dimensions, where N/2×M/2 two-by-twoadjacent component arrays22 ondestination substrate40 comprise array22 (i, j), array22 (N−1−i, j), array22 (i, M−1−j), and array22 (N−1−i, M−1−j) for each i from 0 to (N/2)−1 and each j from 0 to (M/2)−1. Thus,components20 indifferent arrays22 are interlaced in one or two dimensions. By transferringdifferent arrays22 ofcomponents20 in such a manner, a variation inattributes12 may be made less regular, less visible, or less objectionable;arrays22 ofcomponents20 on destination substrate40 (after transfer) are mixed up with respect to the correspondingarrays22 ofcomponents20 on component source wafer10 (before transfer). The two-dimensional case operates as described above with the one-dimensional case except in two orthogonal directions at the same time.
In some embodiments and as illustrated inFIG. 39, a method comprises transferring a plurality ofcomponent source wafers10 andarrays22 ofcomponents20 from eachcomponent source wafer10 ontodestination substrate40 with two or more different orientations. For example, the plurality ofcomponent source wafers10 can comprise a firstcomponent source wafer10 and a secondcomponent source wafer10 different from the firstcomponent source wafer10, provided insteps100 and101. The method can comprise interlacing (e.g., interdigitating)components20 from firstcomponent source wafer10 betweencomponents20 from secondcomponent source wafer10 for example by using the same ordifferent stamps30 to pick upcomponents20 from first and secondcomponent source wafers10 insteps130,131 and140,141 respectively, move thestamp30 todestination substrate40 instep150, andprint components20 todestination substrate40 instep160 with an orientation andprint components20 todestination substrate40 instep161 with a different orientation. In some embodiments, differentcomponent source wafers10 have different kinds or types ofcomponents20. For example,components20 can be LEDs and the differentcomponent source wafers10 can each include LEDs that emit a different color of light. For example, in some embodiments, each of threecomponent source wafers10 includes one of red, green, and blue LEDs that emit red, green, or blue light, respectively, and the different LEDs are transferred with different orientations. Sets of three different LEDS can comprise pixels in a display anddestination substrate40 can be a display substrate.
Displays having same anddifferent color arrays22 ofLED components20 of micro-transfer printed from one or morecomponent source wafers10 to adestination substrate40 using multiple orientations have been constructed and visually examined and shown to have less visible variation in color and brightness.
In some embodiments of the present disclosure, the order in whichcomponents20 are printed (e.g., frontright components20 on astamp30 versus back leftcomponents20 on a stamp30) is arbitrary.
According to some embodiments of the present disclosure, micro-transfer printing includes transferringcomponents20 from a source substrate (e.g., component source wafer10) to a destination substrate (e.g., destination substrate40) by contactingcomponents20 on the source substrate with astamp30 to removecomponents20 from the source substrate, transferringstamp30 and contactedcomponents20 to thedestination substrate40, and contactingcomponents20 to a surface of thedestination substrate40.Components20 can be adhered to stamp30 or thedestination substrate40 by, for example, one or more of van der Waals forces, electrostatic forces, magnetic forces, chemical forces, and adhesive forces (e.g., from an adhesive). In some embodiments of the present disclosure,components20 are adhered to stamp30 with separation-rate-dependent adhesion, for example kinetic control of viscoelastic stamp materials such as can be found in elastomeric devices such as aPDMS stamp30.Stamps30 can comprisestamp posts32 having a stamp post area on the distal end of stamp posts32. Stamp posts32 can have a length, a width, or both a length and a width, similar or substantially equal to a length, a width, or both a length and a width ofcomponent20. In some embodiments, as discussed further below, stamp posts32 of astamp30 can be smaller thancomponents20 in one or two orthogonal directions.
In exemplary methods, a stamp30 (e.g., a viscoelastic elastomer stamp, such as a stamp optionally comprising a plurality of stamp posts32) is designed and fabricated to retrieve and transferarrays22 ofcomponents20 from their nativecomponent source wafer10 ontonon-native destination substrates40. In some embodiments,stamp30 mounts onto motion-plus-optics machinery (e.g., an opto-mechatronic motion platform) that can precisely controlstamp30 alignment and kinetics with respect to bothcomponent source wafers10 anddestination substrates40. During micro-transfer printing, the motion platform bringsstamp30 into contact withcomponents20 oncomponent source wafer10, with optical alignment performed before contact. For example, in some embodiments, light can be transmitted and/or received through stamp30 (e.g., through one or more stamp posts32) in order to perform an optical alignment. Rapid upward movement of the print-head fractures component tether(s)52 forming fractured component tethers53, transferring component(s)20 to stamp30 or stamp posts32. Thepopulated stamp30 then travels todestination substrate40 and one ormore components20 are then aligned (e.g., in a manner similar to for pick-up) todestination substrate40 and printed.
Acomponent source wafer10 can be any source wafer or substrate with micro-transferprintable components20 that can be transferred with astamp30. For example, acomponent source wafer10 can be or include a semiconductor (e.g., silicon) in a crystalline or non-crystalline form, a compound semiconductor (e.g., comprising GaN or GaAs), or a glass, polymer, sapphire, or quartz wafer.Sacrificial portions14 can be formed of a patterned oxide (e.g., silicon dioxide) or nitride (e.g., silicon nitride) layer or can be an anisotropically etchable portion ofsacrificial layer11 ofcomponent source wafer10. Typically, but not necessarily,component source wafers10 are smaller thandestination substrates40.
Exemplary components20 include active, passive, and active andpassive components20.Exemplary components20 include, but are not limited to, any one or more of integrated devices, integrated circuits (such as CMOS circuits), light-emitting diodes, photodiodes, sensors, electrical or electronic devices, optical devices, opto-electronic devices, magnetic devices, magneto-optic devices, magneto-electronic devices, and piezo-electric device, materials or structures.Components20 can comprise electronic component circuits that operatecomponent20.Components20 can be responsive to electrical energy, to optical energy, to electromagnetic energy, to mechanical energy, or to a combination thereof. In some embodiments, acomponent20 is a light-emitting diode (LED).
Components20 formed or disposed in or oncomponent source wafers10 can be constructed using, for example, one or more of integrated circuit, micro-electro-mechanical, and photolithographic methods.Components20 can comprise one or more different component materials, for example, non-crystalline or crystalline semiconductor materials such as silicon or compound semiconductor materials or non-crystalline or crystalline piezo-electric materials.
In some embodiments of the present disclosure,components20 can be native to and formed onsacrificial portions14 ofcomponent source wafers10 and can include one or more seed layers used for constructing crystalline layers on or incomponent source wafers10. In some examples,components20,sacrificial portions14, anchors50, and component tethers52 can be constructed using photolithographic processes.Components20 can be micro-devices having at least one of a length and width no more than 200 microns(e.g., no more than 100 microns, no more than 50 microns, no more than 25 microns, no more than 15 microns, no more than 10 microns, or no more than five microns), and, optionally, a thickness of no more than 50 microns (e.g., no more than 25 microns, no more than 15 microns, no more than 10 microns, no more than five microns, no more than two microns, or no more than one micron). In some embodiments,components20 can be unpackaged dice (each an unpackaged die) transferred directly from nativecomponent source wafers10 on or in whichcomponents20 are constructed to destination substrate40 (without wafer dicing).
Anchors50 and component tethers52 can be or can comprise portions ofcomponent source wafer10 that are notsacrificial portions14 and can include layers formed oncomponent source wafers10, for example dielectric or metal layers and for example layers formed as a part of photolithographic processes used to construct or encapsulatecomponents20.
Destination substrate40 can be any destination substrate or target substrate to whichcomponents20 are transferred (e.g., micro-transfer printed), for example flat-panel display substrates, printed circuit boards, or similar substrates.Destination substrates40 can be, for example substrates comprising glass, polymer, quartz, ceramics, metal, or sapphire.Destination substrates40 can be semiconductor substrates (for example silicon) or compound semiconductor substrates and can have multiple layers.
In some embodiments of the present disclosure, a layer of adhesive, such as a layer of resin, polymer, or epoxy, either curable or non-curable, adherescomponents20 ontodestination substrate40 and can be disposed, for example by coating or lamination. In some embodiments, the layer of adhesive is disposed in a pattern, for example using inkjet, screening, or photolithographic techniques. In some embodiments, a layer of adhesive is coated, for example with a spray or slot coater, and then patterned, for example using photolithographic techniques.
Patterned electrical conductors (e.g., wires, traces, or electrical contact pads such as those found on printed circuit boards, flat-panel display substrates, and in thin-film circuits) can be formed on any one or combination of one ormore components20 anddestination substrate40. One or more electrical contact pads can be in or ondestination substrate40 and/or in or on one ormore components20 to electrically connectcomponents20. Such patterned electrical conductors and contact pads can comprise, for example metal, transparent conductive oxides, or cured conductive inks and can be constructed using photolithographic methods and materials, for example metals such as aluminum, gold, or silver deposited by evaporation and patterned using pattern-wise exposed, cured, and etched photoresists, or constructed using imprinting methods and materials or inkjet printers and materials, for example comprising cured conductive inks deposited on a surface or provided in micro-channels in or ondestination substrate40.
Micro-transfer printing processes suitable for disposingcomponents20 ontodestination substrates40 are described inInorganic light-emitting diode displays using micro-transfer printing(Journal of the Society for Information Display, 2017, DOI # 10.1002/jsid.610, 1071-0922/17/2510-0610, pages 589-609), U.S. Pat. 8,722,458 entitledOptical Systems Fabricated by Printing-Based Assembly, U.S. patent application Ser. No. 15/461,703 entitled Pressure Activated Electrical Interconnection by Micro-Transfer Printing, U.S. Pat. No. 8,889,485 entitledMethods for Surface Attachment of Flipped Active Components, U.S. patent application Ser. No. 14/822,864 entitledChiplets with Connection Posts, U.S. patent application Ser. No. 14/743,788 entitledMicro-Assembled LED Displays and Lighting Elements, and U.S. patent application Ser. No. 15/373,865, entitledMicro-Transfer Printable LED Component, the disclosure of each of which is incorporated herein by reference in its entirety.
For a discussion of micro-transfer printing techniques, see also U.S. Pat. Nos. 7,622,367 and 8,506,867, each of which is hereby incorporated by reference in its entirety. Micro-transfer printing using compound micro-assembly structures and methods can also be used with the present disclosure, for example, as described in U.S. patent application Ser. No. 14/822,868, filed Aug. 10, 2015, entitledCompound Micro-Assembly Strategies and Devices, which is hereby also incorporated by reference in its entirety. Accordingly, in some embodiments, printed structure99 is a compound micro-assembled structure.
According to various embodiments of the present disclosure,component source wafer10 can be provided withcomponents20, patternedsacrificial portions14, component tethers52, and anchors50 already formed, or they can be constructed as part of a method.Component source wafer10,components20,stamp30, anddestination substrate40 can be made separately and at different times or in different temporal orders or locations and provided in various process states.
The spatial distribution ofcomponents20 on acomponent source wafer10 or printed structures99 is a matter of design choice for the end product desired. In some embodiments of the present disclosure, allcomponents20 in anarray22 on acomponent source wafer10 are transferred to astamp30. In some embodiments, a subset ofcomponents20 in anarray22 on acomponent source wafer10 is transferred. By varying the number and arrangement of stamp posts32 ontransfer stamps30, the distribution ofcomponents20 onstamp posts32 of thetransfer stamp30 can be likewise varied, as can the distribution ofcomponents20 ondestination substrate40.
Becausecomponents20, in certain embodiments, can be made using integrated circuit photolithographic techniques having a relatively high resolution and cost anddestination substrate40, for example a printed circuit board, can be made using printed circuit board techniques having a relatively low resolution and cost, electrical conductors and substrate contact pads ondestination substrate40 can be much larger than electrical contacts or component electrodes oncomponent20, thereby reducing manufacturing costs. For example, in certain embodiments, micro-transferprintable component20 has at least one of a width, length, and height from 0.5 μm to 200 μm (e.g., 0.5 to 2 μm, 2 to 5 μm, 5 to 10 μm, 10 to 20 μm, 20 to 50 μm, 50 to 100 μm, or 100 to 200 μm).
In certain embodiments,destination substrate40 is or comprises a member selected from the group consisting of polymer, plastic, resin, polyimide, PEN, PET, metal, metal foil, glass, a semiconductor, and sapphire. In certain embodiments,destination substrate40 has a thickness from 5 microns to 20 mm (e.g., 5 to 10 microns, 10 to 50 microns, 50 to 100 microns, 100 to 200 microns, 200 to 500 microns, 500 microns to 0.5 mm, 0.5 to 1 mm, 1 mm to 5 mm, 5 mm to 10 mm, or 10 mm to 20 mm).
Components20, in certain embodiments, can be constructed using foundry fabrication processes used in the art. Layers of materials can be used, including materials such as metals, oxides, nitrides and other materials used in the integrated-circuit art. Eachcomponent20 can be or include a complete semiconductor integrated circuit and can include, for example, transistors, diodes, light-emitting diodes, or sensors.Components20 can have different sizes, for example, each having an area of100 square microns or larger, 1000 square microns or larger or 10,000 square microns or larger, 100,000 square microns or larger, or 1 square mm or larger.Components20 can have variable aspect ratios, for example between 1:1 and 10:1 (e.g., 1:1, 2:1, 5:1, or 10:1).Components20 can be rectangular or can have other shapes.
Various embodiments of structures and methods are described herein. Structures and methods were variously described as transferringcomponents20,printing components20, ormicro-transfer printing components20 as examples and the particular word used should be understood to be non-limiting as to the methods that may be used to implement the described embodiments. In some embodiments, micro-transfer-printing includes using a stamp30 (e.g., anelastomeric stamp30, such as a PDMS stamp30) to transfer acomponent20 using controlled adhesion. For example, anexemplary stamp30 can use kinetic or shear-assisted control of adhesion between thestamp30 and acomponent20. It is contemplated that, in certain embodiments, where a method is described as including printing (e.g., micro-transfer-printing) acomponent20, other analogous embodiments exist using a different transfer method. As used herein, transferring a component20 (e.g., from acomponent source wafer10 or wafer to a destination substrate40) can be accomplished using any one or more of a variety of known techniques. For example, in certain embodiments, a pick-and-place method can be used. As another example, in certain embodiments, a flip-chip method can be used (e.g., involving an intermediate, handle or carrier substrate). In methods according to certain embodiments, astamp30 is a vacuum tool or other transfer device used to transfercomponents20. In some embodiments, astamp30 uses one or more of electrostatic forces, magnetic forces, and vacuum forces to transfer components20 (e.g., applied toindividual components20 by individual stamp posts32).
As is understood by those skilled in the art, the terms “over” and “under” are relative terms and can be interchanged in reference to different orientations of the layers, elements, and substrates included in the present disclosure. Furthermore, a first layer “on” a second layer is a relative orientation of the first layer to the second layer that does not preclude additional layers being disposed therebetween. For example, a first layer on a second layer, in some implementations, means a first layer directly on and in contact with a second layer. In other implementations, a first layer on a second layer includes a first layer and a second layer with another layer therebetween (e.g., an in mutual contact).
Having described certain implementations of embodiments, it will now become apparent to one of skill in the art that other implementations incorporating the concepts of the disclosure may be used. Therefore, the disclosure should not be limited to certain implementations, but rather should be limited only by the spirit and scope of the following claims.
Throughout the description, where apparatus and systems are described as having, including, or comprising specific elements, or where processes and methods are described as having, including, or comprising specific steps, it is contemplated that, additionally, there are apparatus and systems of the disclosed technology that consist essentially of, or consist of, the recited elements, and that there are processes and methods according to the disclosed technology that consist essentially of, or consist of, the recited processing steps.
It should be understood that the order of steps or order for performing certain action is immaterial so long as the disclosed technology remains operable. Moreover, two or more steps or actions in some circumstances can be conducted simultaneously. The disclosure has been described in detail with particular reference to certain embodiments thereof, but it will be understood that variations and modifications can be effected within the spirit and scope of the disclosure.
PARTS LIST- A cross section line
- 10 component source wafer
- 11 sacrificial layer
- 12 attribute/structure/epitaxial (epi) layer
- 14 sacrificial portions
- 16 gap
- 20 component
- 20a-20jcomponent
- 22 array
- 30 stamp
- 32 stamp post
- 40 destination substrate
- 50 anchor
- 52 component tether
- 53 fractured component tether
- 54 dielectric layer
- 99 printed structure
- 100 provide component source wafer step
- 110 provide stamp step
- 120 provide destination substrate step
- 130 move stamp to component source wafer step
- 131 move stamp to second component source wafer step
- 140 pick up components from component source wafer with stamp step
- 141 pick up components from second component source wafer with stamp step
- 145 rotate source wafer
- 150 move stamp to destination substrate location step
- 160 print components to destination substrate with stamp step
- 161 print components with different orientation to destination substrate with stamp step
- 170 done step
- 180 complete step