US20200258003A1 - Housing Qubit Devices in an Electromagnetic Waveguide System - Google Patents

Abstract

In some aspects, a quantum computing system includes an electromagnetic waveguide system. The waveguide system has an interior surface that defines an interior volume of intersecting waveguides. Qubit devices are housed in the waveguide system. In some cases, the intersecting waveguides each define a cutoff frequency, and the qubit devices have qubit operating frequencies below the cutoff frequency. In some cases, coupler devices are housed in the waveguide system; each coupler device is configured to selectively couple a pair of neighboring qubit devices based on control signals received from a control source.

Description

CROSS REFERENCE TO RELATED APPLICATIONS
• This application is a continuation of U.S. patent application Ser. No. 15/035,574, filed May 10, 2016, entitled “Housing Qubit Devices in an Electromagnetic Waveguide System,” which is a national stage entry of International Application PCT/US2015/018126, filed Feb. 27, 2015, entitled “Housing Qubit Devices in an Electromagnetic Waveguide System,” which claims priority to U.S. Provisional Patent Application No. 61/946,390, filed Feb. 28, 2014, entitled “Waveguide Array for Quantum Processors;” U.S. Provisional Patent Application No. 61/946,545, filed on Feb. 28, 2014, entitled “Quantum Processor Cell Architectures;” U.S. Provisional Patent Application No. 62/032,864, filed on Aug. 4, 2014, entitled “Quantum Processor Control Architecture;” and U.S. Provisional Patent Application No. 62/033,022, filed on Aug. 4, 2014, entitled “Quantum Processor Substrate.” All above-referenced priority documents are incorporated herein by reference.
TECHNICAL FIELD
• The subject matter described here relates to quantum computing.
BACKGROUND
• Quantum computing generally involves storage or processing of information in quantum mechanical states of light or matter. Information stored in these systems can display the quantum properties of the storage medium. These properties are different from classical Newtonian laws of physics that govern classical computing hardware. Significant evidence shows that the quantum computing paradigm allows certain advantages; for example, some problems can be solved by a quantum computer using exponentially fewer resources (e.g., time, memory size, energy) than would be used by the best known classical algorithms and computing systems.
SUMMARY
• In a general aspect, a quantum computing system includes an electromagnetic waveguide system.
• In some aspects, information is encoded in a multi-dimensional array of qubit devices housed in a multi-dimensional electromagnetic waveguide lattice. The qubit devices have respective qubit operating frequencies. The electromagnetic waveguide lattice is configured to suppress signal propagation between the qubit devices over a frequency range that includes the qubit operating frequencies.
• In some aspects, a quantum computing system includes a quantum processor cell assembly. The quantum processor cell assembly includes an electromagnetic waveguide system. The electromagnetic waveguide system includes an interior surface that defines an interior volume of intersecting waveguides. The intersecting waveguides define cutoff frequencies and are configured to evanesce electromagnetic waves below the cutoff frequencies. The quantum computing system includes a multi-dimensional array of qubit devices housed in the electromagnetic waveguide system.
• The qubit devices have respective qubit operating frequencies below the cutoff frequencies.
• In some aspects, a quantum computing system includes a quantum processor cell assembly comprising a system of intersecting waveguides. Each of the waveguides defines a cross-section and a propagation axis perpendicular to the cross-section, and the cross-section of each waveguide defines a cutoff frequency of the waveguide. The quantum computing system includes a multi-dimensional array of qubit devices housed in the system of intersecting waveguides. The qubit devices have respective qubit operating frequencies below the cutoff frequencies of the intersecting waveguides.
• In some aspects, a quantum processor cell assembly includes an electromagnetic waveguide system. The electromagnetic waveguide system has an interior surface that defines an interior volume of intersecting waveguides. A first subset of the waveguides intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly.
• The waveguide intersections include portions of the interior volume that are shared between the first subset and the second subset. A multi-dimensional array of qubit devices housed in the electromagnetic waveguide system.
• In some aspects, a multi-dimensional lattice of intersecting waveguides is formed in a quantum processor cell assembly. A first subset of the waveguides intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly. The waveguide intersections include interior volumes that are shared between the first subset and the second subset. A multi-dimensional array of qubit devices is supported in the lattice of intersecting waveguides
• In some aspects, a quantum computing system includes qubit devices housed in a quantum processor cell assembly. The qubit devices have respective qubit operating frequencies. The quantum computing system includes an electromagnetic waveguide system in the quantum processor cell assembly. The electromagnetic waveguide system includes waveguide structures between neighboring pairs of the qubit devices. The waveguide structures are configured to suppress signal propagation in a frequency range that includes the qubit operating frequencies. The quantum computing system includes coupler devices housed in the quantum processor cell assembly between neighboring pairs of the qubit devices. The coupler devices are configured to selectively couple the respective neighboring pairs of qubit devices based on coupler control signals received from a control source external to the quantum processor cell assembly.
• In some aspects, a quantum computing system includes a quantum processor cell that includes qubit chips, coupler chips and a signal board. Each qubit chip includes a qubit device. Each coupler chip includes a coupler device. The signal board supports the qubit chips and the coupler chips within the quantum processor cell. The qubit chips are arranged in a multi-dimensional array of qubit locations. The coupler chips are arranged between neighboring pairs of the qubit chips in the multi-dimensional array.
• In some aspects, a quantum computing system includes a quantum processor cell that houses qubit devices and coupler devices in an electromagnetic waveguide system. The qubit devices and the coupler devices form a multi-dimensional device lattice comprising multiple adjoining unit cells. Each unit cell of the device lattice includes at least one of the qubit devices and at least one of the coupler devices. The quantum computing system includes a control system communicably coupled to the quantum processor cell. The control system is configured to control the qubit devices.
• The details of one or more example implementations are provided in the accompanying drawings and the description below. Other features, objects, and advantages of the subject matter will be apparent from the description and drawings, and from the claims.
BRIEF DESCRIPTION OF DRAWINGS
• FIG. 1 is a schematic diagram of an example quantum computing system.
• FIG. 2 is a schematic diagram of an example quantum computing system in which a quantum processor cell (QPC) includes an electromagnetic waveguide system.
• FIGS. 3A-3E show aspects of example devices that may be housed in a quantum processor cell;FIG. 3A shows an equivalent circuit of a portion of an example device array;FIG. 3B shows an example transmon device;FIG. 3C shows an example fluxonium device;FIG. 3D shows an equivalent circuit for the transmon device shown inFIG. 3B;FIG. 3E shows an equivalent circuit for the fluxonium device shown inFIG. 3C.
• FIGS. 4A-4E show example attributes and operations of devices that may be included in an example quantum processor cell;FIG. 4A shows an example energy level diagram for a qubit device;FIG. 4B shows an example frequency diagram for a readout device;FIG. 4C shows an example energy level diagram with a coupler device in its OFF state;FIG. 4D shows an example energy level diagram with a coupler device in its ON state;FIG. 4E shows an example coupler control signal.
• FIGS. 5A-5B are schematic diagrams of example device arrays arranged within an electromagnetic waveguide system that includes a 2D lattice of intersecting waveguides.
• FIGS. 6A-6B show aspects of an example electromagnetic waveguide system that includes a 2D lattice of intersecting waveguides;FIG. 6A shows a portion of an interior volume of an example electromagnetic waveguide system;FIG. 6B shows dimensions of an example waveguide interval.
• FIG. 7 shows electromagnetic properties at example waveguide intersections in a 2D lattice of intersecting waveguides.
• FIG. 8 shows a portion of an interior volume of another example electromagnetic waveguide system that includes a 3D lattice of intersecting waveguides.
• FIG. 9 shows aspects of an example quantum processor cell (QPC) that includes an electromagnetic waveguide system.
• FIGS. 10A-10B show aspects of the signal board in the example QPC ofFIG. 9;FIG. 10A is a side cross-sectional view;FIG. 10B is a perspective view.
• FIGS. 11A-11E show aspects of the example QPC ofFIG. 9;FIG. 11A shows an exploded view of a portion of the example QPC;FIG. 11B is a side cross-sectional view of the portion illustrated inFIG. 11A;FIG. 11C is a plan view of the portion illustrated inFIG. 11A;FIG. 11D is a perspective view of the electromagnetic waveguide system in the example QPC ofFIG. 9;FIG. 11E is a zoomed-in view of a portion ofFIG. 11D.
• FIGS. 12A-12B show aspects of example pass-through structures in a section of an example electromagnetic waveguide system.
• FIGS. 13A-13G show an example process for assembling the example QPC ofFIG. 9.
• FIG. 14A shows a portion of an interior volume of an example electromagnetic waveguide system that includes a 3D lattice of intersecting waveguides;FIG. 14B illustrates electromagnetic properties at an example waveguide intersection in a 3D lattice of intersecting waveguides.
• FIG. 15 shows an example electromagnetic waveguide system that includes a 3D lattice of intersecting waveguides.
• FIGS. 16A-16F show aspects of an example quantum computing system that includes an electromagnetic waveguide system.FIG. 16A is a top cross-sectional view of an example quantum processor cell (QPC) at Z=0;FIG. 16B is a side cross-sectional view of the example QPC at Y=0 and Y=±4;FIG. 16C is a top cross-sectional view of the example QPC at Z=+1;FIG. 16D is a top cross-sectional view of the example QPC at Z=−1;FIG. 16E is a side cross-sectional view of the example QPC at Y=±1 and Y=±3; andFIG. 16F is a side cross-sectional view of the example QPC at Y=±2.
• FIGS. 17A-17B show aspects of an example quantum computing system that includes a signal delivery subsystem and an electromagnetic waveguide system;FIG. 17A is a schematic diagram showing an example signal flow;FIG. 17B is a perspective view showing aspects of components represented inFIG. 17A.
• FIGS. 18A-18C show examples of input and output connector hardware for an example quantum processor cell;FIG. 18A is a perspective view of an example base portion of an electromagnetic waveguide system with vertical interconnects;FIG. 18B is a perspective view of an example electromagnetic waveguide system showing a lid portion with vertical interconnects;FIG. 18C shows a perspective view of internal components of the example electromagnetic waveguide system shown inFIG. 18B.
• FIG. 19 shows aspects of an example device array in an example quantum processor cell.
• FIGS. 20A-20E show examples components of an example signal delivery subsystem;FIG. 20A is a side view of an example system;FIG. 20B is a perspective view of an example input interconnect plate;FIG. 20C is a perspective view of an example output interconnect plate;FIG. 20D is a perspective view of an example input signal processing system;FIG. 20E is a perspective view of an example output signal processing system.
• FIGS. 21A-C are diagrams showing example operating frequencies for devices in a quantum processor cell;FIG. 21A is a frequency spectrum plot that indicates example operating frequencies of qubit devices and readout devices;FIG. 21B is a frequency difference plot that indicates differences between the operating frequencies shown inFIG. 21A;FIG. 21C shows an example device array based on the operating frequencies shown inFIG. 21A.
• FIGS. 22A-C are diagrams showing other example operating frequencies for devices in a quantum processor cell;FIG. 22A is a frequency spectrum plot that indicates example operating frequencies of qubit devices and readout devices;FIG. 22B is a frequency difference plot that indicates differences between the operating frequencies shown inFIG. 22A;FIG. 22C shows an example device array based on the operating frequencies shown inFIG. 22A.
• FIG. 23A is a block diagram of an examplequantum computing system2300 that includes multiple temperature stages and multiple operating domains.
• FIG. 23B is a flowchart showing an example process for operating a quantum computing system.
• FIG. 24 is a flowchart showing an example process for delivering control signals to a quantum processor cell.
• FIG. 25 is a block diagram showing an example process for delivering control signals to a quantum processor cell.
• FIG. 26 is a block diagram showing an example process for delivering qubit readout signals from a quantum processor cell.
• FIG. 27 is a block diagram showing an example process for delivering control signals to a quantum processor cell.
• FIG. 28 is a block diagram of an example quantum computing system.
DETAILED DESCRIPTION
• FIG. 1 is a schematic diagram of an examplequantum computing system100.
• The examplequantum computing system100 shown inFIG. 1 includes acontrol system110, asignal delivery system106, and aquantum processor cell102. A quantum computing system may include additional or different features, and the components of a quantum computing system may operate as described with respect toFIG. 1 or in another manner.
• The examplequantum computing system100 shown inFIG. 1 can perform quantum computational tasks and algorithms. In some implementations, thequantum computing system100 can perform quantum computation by storing and manipulating information within individual quantum states of a composite quantum system. For example, qubits (i.e., quantum bits) can be stored in and represented by an effective two-level sub-manifold of a quantum coherent physical system. The formation of composite systems for quantum computing can be achieved by couplings between the individual physical qubits, for example, to perform conditional quantum logic operations. In some instances, the couplings between physical qubits can be rendered in a manner that allows large-scale entanglement within the quantum computing device. Control signals can manipulate the quantum states of individual qubits and the couplings between qubits. In some instances, information can be read out from the composite quantum system by measuring the quantum states of the individual qubits.
• In some implementations, thequantum computing system100 can operate in a fault-tolerant regime. For example, fault-tolerance may be achieved through the use of carefully engineered dissipation and redundant encodings. In some example gate-based models for quantum computing, fault-tolerance can be achieved by applying a set of high-fidelity control and measurement operations to the qubits. For example, topological quantum error correction schemes can operate on a lattice of nearest-neighbor-coupled qubits. In some instances, these and other types of quantum error correcting schemes can be adapted for a two- or three-dimensional lattice of nearest-neighbor-coupled qubits, for example, to achieve fault-tolerant quantum computation. The lattice can allow each qubit to be independently controlled and measured without introducing crosstalk or errors on other qubits in the lattice. Adjacent pairs of qubits in the lattice can be addressed, for example, with two-qubit gate operations that are capable of generating entanglement, independent of other pairs in the lattice.
• In some implementations, thequantum computing system100 is constructed and operated according to a scalable quantum computing architecture. For example, in some cases, the architecture can be scaled to a large number of qubits to achieve large-scale general purpose coherent quantum computing. In some instances, the architecture is adaptable and can incorporate a variety of modes for each technical component. For example, the architecture can be adapted to incorporate different types of qubit devices, coupler devices, readout devices, signaling devices, etc. In some cases, the architecture of thequantum computing system100 provides a practicable and economical solution for large-scale quantum computation.
• The examplequantum processor cell102 shown inFIG. 1 includes qubits that are used to store and process quantum information. In some instances, all or part of thequantum processor cell102 functions as a quantum processor, a quantum memory, or another type of subsystem. Thequantum processor cell102 shown inFIG. 1 can be implemented, for example, as thequantum processor cell102A shown inFIG. 2, thequantum processor cell102B shown inFIG. 9, or in another manner.
• In the examplequantum processor cell102, the qubits each store a single bit of quantum information, and the qubits can collectively define the computational state of a quantum processor or quantum memory. Thequantum processor cell102 may also include readout devices that selectively interact with the qubits to detect their quantum states. For example, the readout devices may generate readout signals that indicate the computational state of the quantum processor or quantum memory. Thequantum processor cell102 may also include couplers that selectively operate on pairs of qubits and allow quantum interactions between the qubits. For example, the couplers may produce entanglement or other multi-qubit states over two or more qubits in thequantum processor cell102.
• In some implementations, the examplequantum processor cell102 can process the quantum information stored in the qubits by applying control signals to the qubits or to the couplers housed in the quantum processor cell. The control signals can be configured to encode information in the qubits, to process the information by performing logical gates or other types of operations, or to extract information from the qubits. In some examples, the operations can be expressed as single-qubit gates, two-qubit gates, or other types of logical gates that operate on one or more qubits. A sequence of operations can be applied to the qubits to perform a quantum algorithm. The quantum algorithm may correspond to a computational task, a quantum error correction procedure, a quantum state distillation procedure, or a combination of these and other types of operations. Thequantum processor cell102 may output information indicating the states of the qubits, for example, by applying control signals to the readout devices.
• In the example shown inFIG. 1, thesignal delivery system106 provides communication between thecontrol system110 and thequantum processor cell102. For example, thesignal delivery system106 can receive control signals (e.g., qubit control signals, readout control signals, coupler control signals, etc.) from thecontrol system110 and deliver the control signals to thequantum processor cell102. In some instances, thesignal delivery system106 performs preprocessing, signal conditioning, or other operations to the control signals before delivering them to thequantum processor cell102. In some instances, thesignal delivery system106 receives qubit readout signals from the quantum processor cell and delivers the qubit readout signals to thecontrol system110. In some instances, thesignal delivery system106 performs preprocessing, signal conditioning or other operations on the readout signals before delivering them to thecontrol system110.
• Thesignal delivery system106 shown inFIG. 1 can be implemented according to the examplesignal delivery system106A shown inFIG. 2, according to the examplesignal delivery system106B shown inFIG. 17A, or in another manner. In some implementations, thesignal delivery system106 includes one or more input signal processing systems, one or more output signal processing systems, or a combination of these and other types of components. Examples of features that may, in some implementations, be included in a signal delivery system are shown and described with respect toFIGS. 20A-20E, 23A-23B and others. Example operations that may, in some implementations, be performed by a signal delivery system are shown and described with respect toFIGS. 23A-23B and 24-28.
• In the examplequantum computing system100 shown inFIG. 1, thecontrol system110 controls operation of thequantum processor cell102. Theexample control system110 may include data processors, signal generators, interface components and other types of systems or subsystems. In some cases, thecontrol system110 includes one or more classical computers or classical computing components. Theexample control system110 shown inFIG. 1 can be implemented according to theexample control system110A shown inFIG. 2, or thecontrol system110 can be implemented in another manner. Examples of features that may, in some implementations, be included in a control system are shown inFIGS. 23A-23B and 24-28. Example operations that may, in some implementations, be performed by a control system are shown inFIGS. 23A-23B and 24-28.
• FIG. 2 is a schematic diagram of an examplequantum computing system100A, showing example components and interactions of anexample control system110A, an examplesignal delivery system106A and an example quantum processor cell (QPC)102A. As shown inFIG. 2, thecontrol system110A interfaces with thesignal delivery system106A through controlsystem connector hardware126; and thesignal delivery system106A interfaces with thequantum processor cell102A through QPCinput connector hardware136 and QPCoutput connector hardware138. The exampleconnector hardware elements136,138 shown inFIG. 2 can include signal lines, processing components, feedthrough devices, or a combination of these and other types of components.
• In the example shown inFIG. 2, thesignal delivery system106A and thequantum processor cell102A are maintained in aQPC environment101. TheQPC environment101 can be provided, for example, by shielding equipment, cryogenic equipment, and other types of environmental control systems. In some examples, the components in theQPC environment101 operate in a cryogenic temperature regime and are subject to very low electromagnetic and thermal noise. For example, magnetic shielding can be used to shield the system components from stray magnetic fields, optical shielding can be used to shield the system components from optical noise, thermal shielding and cryogenic equipment can be used to maintain the system components at controlled temperature, etc. The levels and types of noise that are tolerated or controlled in theQPC environment101 can vary, for example, based on the features and operational requirements of thequantum processor cell102A and thesignal delivery system106A.
• Theexample control system110A shown inFIG. 2 includes asignal generator system120, aprogram interface122 and asignal processor system124. A control system may include additional or different components, and the components can operate as described with respect toFIG. 2 or in another manner. In some examples, components of thecontrol system110A operate in a room temperature regime, an intermediate temperature regime, or both. For example, thecontrol system110A can be configured to operate at much higher temperatures and be subject to much higher levels of noise than are present in theQPC environment101. In the example shown, the controlsystem connector hardware126 can be configured to isolate the components in theQPC environment101 from noise in the environment of thecontrol system110A.
• The examplesignal generator system120 generates control signals from control information provided by theprogram interface122. For example, thesignal generator system120 may include a microwave signal generator, a DC control source, or other types of components that generate control signals. In the example shown, the control signals can be delivered to thequantum processor cell102A by thesignal delivery system106A.
• Theexample program interface122 provides control information to thesignal generator system120. For example, theprogram interface122 can include a classical computing cluster, servers, databases, networks, or other types of classical computing equipment. In some instances, theprogram interface122 includes one or more microprocessors running software, monitors or other display apparatus, interface devices, and other types of classical computing components. Theprogram interface122 can generate control information, for example, based on a quantum task or a quantum algorithm to be performed by thequantum computing system100A, based on qubit readout information, or based on a combination of these and other types of information.
• The examplesignal processor system124 can receive and process qubit readout signals from thequantum processor cell102A. For example, thesignal processor system124 can include a digitizer, a microwave source, and other types of signal processing components. In the example shown, the qubit readout signals can be delivered to thesignal processor system124 by thesignal delivery system106A. Thesignal processor system124 can process (e.g., digitize, or otherwise process) the qubit readout signals and provide the processed information to theprogram interface122. Theprogram interface122 can extract qubit readout data, for example, to identify the quantum states of qubits in thequantum processor cell102A.
• The examplesignal delivery system106A shown inFIG. 2 includes an inputsignal processing system128 and an outputsignal processing system130. A signal delivery system may include additional or different components, and the components of a signal delivery system may operate in the manner shown inFIG. 2 or in another manner. In the example shown inFIG. 2, thesignal generator system120 communicates signals to the inputsignal processing system128 through the controlsystem connector hardware126; and the outputsignal processing system130 communicates signals to thesignal processor system124 through the controlsystem connector hardware126.
• The controlsystem connector hardware126 can include signal lines, signal processing hardware, filters, feedthrough devices (e.g., light-tight feedthroughs, etc.), and other types of components. In some implementations, the controlsystem connector hardware126 can span multiple different temperature and noise regimes. For example, the control system connector hardware can include a series of temperature stages (60 K, 3 K, 800 mK, 150 mK) that decrease between the higher temperature regime of thecontrol system110A and the lower temperature regime of theQPC environment101.
• As shown inFIG. 2, the inputsignal processing system128 includesinput processing hardware132. An input signal processing system may include various types of processing hardware, such as, for example, filters, attenuators, directional couplers, multiplexers, diplexers, bias components, signal channels, and other types of components. An example of an input signal processing system is shown inFIG. 20D; other types of input signal processing systems may be used.
• In some examples, the inputsignal processing system128 includes multiple processing cards housed on a circuit board. The circuit board can include receptacle slots that form mechanical connections and signal path connections between the circuit board and the processing cards. The receptacle slots can support the processing cards and allow the processing cards to be removed or exchanged for other components. In some examples, the inputsignal processing system128 includes multiple processing sections, and each processing section receives and processes signals for an operating domain that includes a group of devices in thequantum processor cell102A. In some cases, each processing section of the inputsignal processing system128 includes an input channel that receives multiplexed control signals, a de-multiplexer configured to separate device control signals from the multiplexed control signal, and output channels configured to communicate the respective device control signals into thequantum processor cell102A.
• In some implementations, each multiplexed control signal received by the inputsignal processing system128 can include control signals for multiple devices in thequantum processor cell102A. For example, in some cases, a multiplexed control signal includes qubit control signals for a group of the qubit devices, coupler control signals for a group of the coupler devices, or readout control signals for a group of the readout devices. In some cases, the inputsignal processing system128 receives DC control signals, AC control signals, or combination of these and other types of signals.
• As shown inFIG. 2, the outputsignal processing system130 includesoutput processing hardware134. An output signal processing system may include various types of processing hardware, such as, for example, isolators, superconducting amplifiers, semiconducting amplifiers, diplexers, multiplexers, power dividers, filters, signal channels, and other types of components. An example of an output signal processing system is shown inFIG. 20E; other types of output signal processing systems may be used.
• In some examples, the outputsignal processing system130 includes multiple processing cards housed on a circuit board. The circuit board can include receptacle slots that form mechanical connections and signal path connections between the circuit board and the processing cards. The receptacle slots can support the processing cards and allow the processing cards to be removed or exchanged for other components. In some examples, the output signal processing system includes multiple processing sections, and each processing section receives and processes signals from a group of devices in thequantum processor cell102A. In some cases, each processing section of the outputsignal processing system130 includes input channels configured to receive the qubit readout signals from a group of the readout devices in an operating domain, a multiplexer configured to generate a multiplexed readout signal from the qubit readout signals, and an output channel configured to output the multiplexed readout signal.
• The examplequantum processor cell102A shown inFIG. 2 includes anelectromagnetic waveguide system104. In the example shown, theelectromagnetic waveguide system104 houses asignal board140,coupler devices142,qubit devices144, andreadout devices146. A quantum processor cell may include additional or different components, and the components of the quantum processor cell may operate as shown inFIG. 2 or in another manner.
• In the example shown inFIG. 2, the inputsignal processing system128 communicates signals to thesignal board140 through the QPCinput connector hardware136, and thesignal board140 communicates signals to the outputsignal processing system130 through the QPCoutput connector hardware138. The QPCinput connector hardware136 can be implemented, for example, as an input interconnect plate or another type of structure, and the QPCoutput connector hardware138 can be implemented, for example, as an output interconnect plate or another type of structure. Example input and output interconnect plates are shown inFIGS. 20B-20C; other types of interconnect plates may be used.
• In some examples, the QPCinput connector hardware136 includes one or more input interconnect signal lines for each coupler device, each qubit device, and each readout device, and the QPCoutput connector hardware138 includes one or more output interconnect signal lines for each readout device. The interconnect signal lines can extend from an exterior of theelectromagnetic waveguide system104 to the interior of theelectromagnetic waveguide system104. In some cases, the interconnect signal lines are supported by a plateau structure that extends (e.g., in a vertical direction) between thesignal board140 and either the inputsignal processing system128 or the outputsignal processing system130.
• The exampleelectromagnetic waveguide system104 provides a low-noise electromagnetic environment for thequbit devices144. Example attributes of electromagnetic waveguide systems are shown inFIGS. 6A-6B, 7-8, 11A-11E, 13A-13F and others. In some examples, theelectromagnetic waveguide system104 is formed by an assembly of quantum processor cell components. For example, theelectromagnetic waveguide system104 may be formed by assembling a lower member (a lid) to an upper member (a base) to form an enclosed (partially, substantially or fully enclosed) interior volume that corresponds to a lattice of intersecting waveguides.
• In some implementations, the exampleelectromagnetic waveguide system104 provides an environment for a lattice of devices (e.g., qubit, coupler and readout devices). The environment provided by theelectromagnetic waveguide system104 can meet or exceed the requisite operating conditions for each individual qubit, coupler and readout device, and for quantum error correction on a large-scale lattice of qubits. In some instances, theelectromagnetic waveguide system104 includes apertures or other features that allow the delivery of signals to the lattice of qubits and to the controllable coupling devices, and allow the extraction of readout signals from readout devices.
• In some implementations, the exampleelectromagnetic waveguide system104 suppresses signals (e.g., passively) to achieve low crosstalk between qubits, for example, such that signals applied to a target device can be contained (e.g., localized in space) without significant leakage to non-target devices. In some cases, the exampleelectromagnetic waveguide system104 provides shielding and isolation of each qubit from external noise and the external environment, and from the other qubits in the lattice. The electromagnetic environment provided by theelectromagnetic waveguide system104 can allow sustained coherence of individual qubits and entangled quantum states. Theelectromagnetic waveguide system104 may allow neighboring qubits to be coupled to perform two-qubit gates, for example, when a coupler device located between the neighboring qubits is selectively activated (e.g., by control signals addressed to the coupler device).
• In some implementations, theelectromagnetic waveguide system104 has an interior surface that defines intersecting waveguides. An example of an interior volume of intersecting waveguides formed by an electromagnetic waveguide system is shown inFIGS. 6A-6B, 7-8, 11B, 11E, 13F, 14A-14B and others. In some cases, intersecting waveguides include waveguide sections that meet at waveguide intersections. In the examples shown, the waveguide intersections include the portions of the interior volume that are shared between the two or more intersecting waveguides. In some implementations, the waveguide sections define cutoff frequencies, and each waveguide section suppresses the propagation of electromagnetic signals below the cutoff frequency. Thus, electromagnetic signals below the cutoff frequency are evanesced (and not propagated) by the waveguide sections.
• In some instances, the cutoff frequency for a waveguide section is defined by the waveguide's cross-section. An electromagnetic waveguide system can include waveguide sections having square cross-sections, rectangular cross-sections, circular cross-sections, elliptical cross-sections, irregular cross-sections, or cross-sections of other geometries. Moreover, the cross-section of each waveguide section, taken perpendicular to the main axis of the waveguide (i.e., perpendicular to the propagation axis), may vary along the main axis of the waveguide. Electromagnetic waves above the cutoff frequency are propagated in the direction of the propagation axis, while electromagnetic waves below the cutoff frequency are evanesced (e.g., attenuated exponentially) in the direction of the propagation axis. In some implementations, the largest dimension of the waveguide cross-sections is between 0.1 and 1.0 centimeters. The largest dimension of a waveguide cross-section can be, for example, the height or width of a rectangular waveguide cross-section, the diameter of a circular waveguide cross-section, the major axis of an elliptical waveguide cross-section, etc.
• In some examples, the intersecting waveguides form a lattice, and the waveguide intersections are arranged as a multi-dimensional array within the lattice. The lattice structure of the intersecting waveguides can be defined by a first subset of waveguides extending in a first dimension of the electromagnetic waveguide system (e.g., in the “x” direction of a Cartesian coordinate system) and a second subset of the waveguides extending in a second dimension of the electromagnetic waveguide system (e.g., in the “y” direction of a Cartesian coordinate system) to form a two-dimensional array of waveguide intersections. In some cases, a third subset of the waveguides extend in a third dimension of the electromagnetic waveguide system (e.g., in the “z” direction of a Cartesian coordinate system) to form a three-dimensional array of waveguide intersections. The intersecting waveguides may intersect at right angles, or they may intersect at non-right (acute or obtuse) angles. In some implementations, the distance between the waveguide intersections in a two-dimensional or three-dimensional array is in the range of 0.2 to 2.0 centimeters.
• The devices within theelectromagnetic waveguide system104 can be arranged within the waveguide lattice, with the devices forming one or more multi-dimensional device arrays within theelectromagnetic waveguide system104. For example, thequbit devices144, thecoupler devices142, thereadout devices146, or a subset or combination of them can form a two-dimensional array or a three-dimensional array within theelectromagnetic waveguide system104. A device array can be aligned with the array of waveguide intersections, between the waveguide intersections, or a combination of these and other locations. Two examples of how qubit devices and coupler devices may be arranged in a system of intersecting waveguides are shown inFIGS. 5A and 5B. The devices within thequantum processor cell102A may be arranged in another configuration.
• In some implementations, thecoupler devices142 are housed between neighboring pairs of thequbit devices144, and thereadout devices146 are housed near thequbit devices144. Thequbit devices144 can be controlled individually, for example, by delivering qubit control signals to theindividual qubit devices144. Thequbit devices144 can interact with each other, for example, through thecoupler devices142. The interactions between neighboringqubit devices144 can be controlled, for example, by delivering coupler control signals to theindividual coupler devices142. Thereadout devices146 can detect the states of thequbit devices144, for example, by interacting directly with therespective qubit devices144. The readout operations performed by thereadout devices146 can be controlled, for example, by delivering readout control signals to theindividual readout devices146.
• Theexample signal board140 can provide mechanical support for thecoupler devices142, thequbit devices144 and thereadout devices146. The interior surface of theelectromagnetic waveguide system104 may also provide direct or indirect mechanical support for thecoupler devices142, thequbit devices144 and thereadout devices146. Thesignal board140 also includes signal lines that route control signals and readout signals between the devices and the connector hardware. In the example shown inFIG. 2, thesignal board140 includes signal lines that communicate qubit control signals from the QPCinput connector hardware136 to theindividual qubit devices144, readout control signals from the QPCinput connector hardware136 to theindividual readout devices146, and coupler control signals from the QPCinput connector hardware136 to theindividual coupler devices142. Theexample signal board140 also includes signal lines that communicate qubit readout signals from theindividual readout devices146 to the QPCoutput connector hardware138.
• Theexample signal board140 can include receptacles that hold the respective devices within the device array, and thesignal board140 can include arms that mechanically connect the receptacles to each other or to other portions of the signal board. Examples of features that may, in some implementations, be included in a signal board are shown inFIGS. 10A-10B and others. Thesignal board140 can be implemented, for example, as a layered structure that includes multiple layers of insulating material and multiple layers of conducting or superconducting material (or both). For example, the signal lines of thesignal board140 can be formed by conductive strips between layers of insulating material in thesignal board140. Thesignal board140 can include vias between conducting layers separated by insulating layers. The insulating materials can include printed circuit boards materials or substrates (e.g., silicon, sapphire, fused quartz, diamond, beryllium oxide (BeO), aluminum nitride (AlN), or others).
• In the example shown inFIG. 2, thequbit devices144 can each be used to encode and store a single bit of quantum information. Each of thequbit devices144 has two eigenstates used as computational basis states (“0” and “1”), and eachqubit device144 can transition between its computational basis states or exist in an arbitrary superposition of its basis states. The quantum state of thequbit devices144 can be manipulated by qubit control signals provided by thesignal delivery system106A. An example of a qubit device is the transmon qubit shown inFIG. 3B. Other types of qubit devices may also be used.
• In some examples, each qubit device has a fixed qubit operating frequency that is defined by an electronic circuit of the qubit device. For instance, a qubit device (e.g., a transmon qubit) may be implemented without a superconducting SQUID loop. In some examples, the operating frequency of a qubit device is tunable, for example, by application of an offset field. For instance, a qubit device (e.g., a fluxonium qubit) may include a superconducting SQUID loop that is tunable by application of magnetic flux. A qubit device can be driven at its qubit operating frequency (or in some cases, at another frequency) to manipulate the quantum state of the qubit. For example, a single-qubit gate can be applied to a qubit by applying a pulse that is configured to perform the single-qubit gate.
• Thereadout devices146 can be used to probe the quantum states of thequbit devices144. Thereadout devices146 can be operatively coupled toindividual qubit devices144. In some examples, each readout device is capacitively coupled to exactly one qubit device. The readout device can be housed on a common chip or in a common structure with the associated qubit device, or the readout device can be formed on a separate chip or in a separate structure from the qubit device.
• In some examples, each readout device has a resonance that depends on the quantum state of its associated qubit device. For example, the resonance frequency of a particular readout device can indicate the quantum state of the associated qubit device. The readout device can be probed by a readout control signal, and the readout device can produce a qubit readout signal in response to the readout control signal. The properties of the qubit readout signal can indicate one of the two computational basis states of the associated qubit device. For instance, the readout device can produce a qubit readout signal by reflecting the readout control signal with additional information. The additional information can be, for example, a frequency shift, a phase shift, an amplitude shift, or a combination of these and other modifications, that indicates the state of the associated qubit device.
• In some implementations, solid state qubit devices can be realized from individual atoms or ions, individual electron or nuclear spins, charge- or spin-based quantum dots, superconducting quantum circuits based on Josephson junctions, impurities and defects in diamond or silicon carbide, or other types of systems. Superconducting qubits with Josephson junctions can be embedded within a resonator for shielding and isolation and to provide a linear resonant mode coupled to the qubit for purposes of qubit readout. The resonator may be formed from a two-dimensional transmission line segment, for example, a coplanar waveguide geometry, or a microstrip geometry. The resonator may be formed as a lumped or quasi-lumped element resonator, or the resonator may be realized as a rectangular waveguide cavity, formed of a shorted (closed on both ends) section of a waveguide transmission line.
• In some implementations, theexample coupler devices142 allow the qubits to be selectively coupled on-demand, to perform multi-qubit gates, to entangle neighboring pairs of qubits, or to perform other types of operations. Thecoupler devices142 can have a high “on/off” ratio, which refers to the ratio of the coupling rate provided by the coupler device when the coupler device is in its ON state versus its OFF state. In some examples, thecoupler devices142 are implemented by a flux-based qubit, such as, for example, the fluxonium coupler shown inFIG. 3C. Other types of coupler devices may be used.
• In some implementations, the coupling strength provided by eachcoupler device142 can be tuned by coupler control signals communicated into the quantum processor cell. For instance, the coupling strength of anindividual coupler device142 can decreased (e.g., to zero or substantially to zero) to place the coupler device in its OFF state, or the coupling strength of anindividual coupler device142 can be increased to place the coupler device in its ON state. Here, the coupling strength between the qubit devices determines the rate of coupling between the qubit devices.
• In some examples, the coupling strength of the electromagnetic interaction between qubit devices varies with an offset field experienced by the coupling device that produces the electromagnetic interaction. For example, the coupler device may have a coupler operating frequency that varies with the offset field experienced by the coupling device, and the coupling operating frequency may influence the coupling strength of the electromagnetic interaction between the neighboring pair of qubit devices. In such examples, the coupling strength can be modified by tuning the coupler operating frequency. In some examples, the coupler device may have another operating parameter (e.g., a capacitance or inductance) that varies with the offset field experienced by the coupling device, and the operating parameter may influence the coupling strength of the electromagnetic interaction between the neighboring pair of qubit devices. In such examples, the coupling strength can be modified by tuning one or more of the relevant operating parameter (e.g., the capacitance, inductance, etc.).
• In some examples, each coupler device has a tunable coupler operating frequency. For example, the coupler operating frequency can be tuned by applying an offset field to the coupler device. The offset field can be, for example, a magnetic bias field, a DC electrical voltage, or another type of constant field. To turn the coupler device “on,” the coupler device can be tuned to a particular coupler operating frequency and driven at a drive frequency to increase the coupling rate between the neighboring pair of qubits. To turn the coupler device “off,” the coupler device can be tuned to a different frequency that does not strongly interact with the neighboring qubit devices.
• As a particular example, a coupler device may include a superconducting quantum interference device (SQUID) loop whose resonance frequency determines the coupling strength of the electromagnetic interaction between the neighboring pair of qubit devices. For instance, the coupling strength may be increased by setting the resonance frequency of the SQUID loop in a frequency range near the resonance frequency of either qubit device. In such examples, the resonance frequency of the SQUID loop can be tuned by controlling the amount of magnetic flux experienced by the SQUID loop. Thus, manipulating the magnetic flux can increase or decrease the resonance frequency of the SQUID loop, which in turn influences the coupling strength provided by the coupler device. In this example, the magnetic flux through the SQUID loop is an offset field that can be modified in order to tune the coupler resonance frequency. For instance, the coupler device can include an inductor that is coupled to the SQUID loop by a mutual inductance. Thus, the magnetic flux through the SQUID loop can be controlled by the DC component of the current through the inductor. In some cases, the coupling strength is controlled by both AC and DC components of the coupler control signal.
• In some implementations, coupler devices that are tunable by application of an offset field are used with qubit devices that do not respond to offset fields. This may allow the coupler devices to be selectively activated by an offset field that does not disturb the information encoded in the qubit device. For instance, although the offset field may cause the coupler device to produce an electromagnetic interaction between neighboring qubit devices, the offset field does not directly interact with the qubit device or disturb the quantum state of the qubit device even if the qubit device experiences the offset field. Thus, the combination of tunable couplers with fixed-frequency qubit devices may allow selective, on-demand coupling of qubit devices while improving performance of the qubit devices. For example, the fixed-frequency qubit devices may have longer coherence times, may be more robust against environmental or applied offset fields, etc.
• In some instances, information is encoded in thequbit devices144, and the information can be processed by operation of the qubit devices and the coupler devices. For instance, input information can be encoded in the computational states or computational subspaces defined by some of all of thequbit devices144. The information can be processed, for example, by applying a quantum algorithm or other operations to the input information. The quantum algorithm may be decomposed as gates or instruction sets that are performed by the qubit devices and coupler devices over a series of clock cycles. For instance, a quantum algorithm may be executed by a combination of single-qubit gates and two-qubit gates. In some cases, information is processed in another manner. Processing the information encoded in the qubit devices produces output information that can be extracted from the qubit devices. The output information can be extracted, for example, by performing state tomography or individual readout operations. In some instances, the output information is extracted over multiple clock cycles or in parallel with the processing operations.
• In some instances, thequantum computing system100A operates based on a clock cycle or another type of synchronization scheme. For example, a quantum algorithm or quantum computing task may be expressed as a sequence of instructions corresponding to quantum gates, readouts, or other operations on thequbit devices144, and a subset of the instructions can be executed on each clock cycle. In some instances, on each clock cycle, thecontrol system110A generates control signals to implement a subset of instructions, control signals are delivered to thequantum processor cell102A, and qubit readout signals are delivered to thecontrol system110A. The control signals delivered on each clock cycle can be configured, for example, based on the sequence of instructions, based on readout signals from a previous cycle, quantum error correction operations, error matching calculations, other information, or a combination of these.
• Various implementations of thequantum computing system100A are described below, including various alternatives for its subsystems and their respective components along with various methods for operating thequantum computing system100A and its subsystems.
• FIGS. 3A-3E show aspects of example devices in adevice array148 that may be housed in a quantum processor cell and used to perform quantum operations. Here, thedevice array148 includes a subset of thequbit devices144, theircorresponding readout devices146 and a subset of thecoupler devices142 that may be housed in the examplequantum processor cell102A.FIG. 3A shows an equivalent circuit for a portion of thedevice array148 that includes qubit devices144-jand144-(j+1), corresponding readout devices146-jand146-(j+1), and a tunable coupler device142-(j,j+1) disposed between the qubit devices144-jand144-(j+1). In some cases, thequantum processor cell102A may be implemented using other types of qubit devices, readout devices and coupler devices. In the examples shown inFIGS. 3A-3E, both of the qubit devices144-jand144-(j+1) are capacitively coupled to the coupler device142-(j,j+1) by respective differential capacitances150-jand150-(j+1). Also, each of the qubit devices144-jand144-(j+1) is capacitively coupled to its respective readout device146-jand146-(j,j+1) by respective differential capacitances152-jand152-(j+1). The qubit devices and coupler devices may be implemented by other types of systems, and the features and components represented inFIG. 3A can be extended in a larger two-dimensional or three-dimensional array of devices.
• Write signals (e.g., coupler control signals, qubit control signals, readout control signals, etc.) can be transmitted from the inputsignal processing system128, through thesignal board140, to various input ports of thedevice array148. In some implementations, the same port can be used for both write signals (received by a device) and readout signals (reflected by a device). The example shown inFIG. 3A can be adapted to include input ports that are distinct from the output ports. For instance, the readout resonators can be connected in transmission instead of reflection (as shown inFIG. 3A), and the input ports (that receive readout control signals from the input signal processing system) can be distinct from the output ports (that send qubit readout signals to the output signal processing system).
• An example input port is shown inFIG. 3A as a coupler control input port154-(j,j+1). In this manner, the tunable coupler device142-(j,j+1) is inductively coupled, at the coupler control input port154-(j,j+1), to a source of coupler control signals. Other examples of input ports are shown inFIG. 3A as the qubit+readout control port156-jand the qubit+readout control port156-(j+1). In this manner, each of the readout devices146-jand146-j+1 is capacitively coupled, by the respective qubit+readout control ports156-jand156-(j+1), to a source of qubit control signals and a source of readout control signals. Additionally, readout signals (e.g., qubit readout signals) are received by the outputsignal processing system130, through thesignal board140, from various output ports in thedevice array148. In theexample device array148 shown inFIG. 3A, the qubit+readout control ports156-jand156-(j+1) may operate as output ports. Other types of input and output ports may be used.
• In the example shown inFIG. 3A, each of the qubit devices144-j,144-(j+1) includes a Josephson junction (represented by the symbol “X” inFIG. 3A) and a shunt capacitance.FIG. 3B shows an example implementation of aqubit device144 as atransmon qubit158.FIG. 3D shows anequivalent circuit302 for the example transmon device shown inFIG. 3B. Thetransmon qubit158 is an example of a charge qubit and includes a substrate162 (e.g., formed from sapphire, silicon, etc.) that supports a superconducting thin film164 (e.g., formed from aluminum, niobium, etc.). Theexample transmon qubit158 shown inFIG. 3B includes aJosephson junction160A and a shunt capacitance. In this example, the shunt capacitance is formed in a topologically closed manner to reduce far-field coupling and spurious qubit couplings to non-adjacent couplers and non-neighboring qubits. A differential capacitance of theinner electrode166 and theouter electrode168 of theexample transmon qubit158 to an electrode of an adjacent device (e.g., a coupler device, a readout device, or a qubit+readout control port) forms aneffective input capacitance150 or152 for capacitively coupling thetransmon qubit158 to the adjacent device or to an input port or to an output port. In other implementations of thedevice array148, the qubit devices144-j,144-(j+1) can be configured as flux qubits (e.g., as fluxonium qubits) or another type of qubit device. In some cases, thetransmon qubit158 can be fabricated, for example, by double-angle evaporation of thin-film aluminum onto a sapphire or silicon substrate, or by another fabrication process.
• As shown in theequivalent circuit302 inFIG. 3D, the transmon device includes aJosephson junction310 and ashunt capacitance314. Theshunt capacitance314 can be formed in a topologically closed manner, for instance, to reduce far-field coupling and spurious qubit couplings to non-adjacent couplers and non-neighboring qubits. Theeffective input capacitance312 can be formed by a differential capacitance of theinner electrode166 and theouter electrode168 of the transmon to a nearby electrode, which may be a control electrode or a coupling electrode.
• In the example shown inFIG. 3A, the coupler circuitry of the tunable coupler device142-(j,j+1) includes a Josephson junction (represented by the symbol “X” inFIG. 3A), a shunt inductance and a shunt capacitance. The tunable coupler device142-(j,j+1) also includes bias circuitry (connected to the coupler control input port154-(j,j+1)) that is configured to apply an offset field to the coupler circuitry. In particular, the bias circuitry includes an inductor that has a mutual inductance with the coupler circuitry. In the example shown, the magnetic flux generated by the bias circuitry controls a resonance frequency of the coupler circuitry of the tunable coupler device142-(j,j+1).
• In the example shown inFIG. 3A, the resonance frequency of the coupler circuitry in the coupler device142-(j,j+1) determines the coupling strength of the electromagnetic interaction between the neighboring pair of qubit devices144-jand144-(j+1). For instance, the coupling strength may be increased by setting the resonance frequency of the coupler circuitry in a frequency range near the resonance frequency of either qubit device144-j,144-(j+1). The resonance frequency of the coupler circuitry can be tuned by controlling the amount of magnetic flux experienced by the coupler circuitry. Thus, manipulating the magnetic flux can increase or decrease the resonance frequency of the coupler circuitry, which in turn influences the coupling strength provided by the coupler device142-(j,j+1). In this example, the magnetic flux through coupler circuitry is an offset field that can be modified in order to tune the coupler resonance frequency. Because the inductor in the bias circuitry has a mutual inductance with the coupler circuitry, the magnetic flux through the coupler circuitry can be controlled by the DC component of the current through the inductor. In some instances, the coupling strength is controlled by both the AC and DC components received through the coupler control input port154-(j,j+1).
• FIG. 3C shows an implementation of acoupler device142 as afluxonium coupler170.FIG. 3E shows anequivalent circuit304 for the example fluxonium device shown inFIG. 3C. Theexample fluxonium coupler170 shown inFIG. 3C includes a substrate172 (e.g., formed from silicon, sapphire, etc.) that supports a superconducting thin film174 (e.g., formed from aluminum, niobium, etc.). Theexample fluxonium coupler170 includes aJosephson junction160B, a shunt inductance and a shunt capacitance connected in parallel and forming aloop176. A magnetic flux signal178 can be applied to theloop176. Adifferential capacitance150 across theJosephson junction160B may be formed of a topologically closed capacitance where aninner island180 is encircled by anouter island182. Thedifferential capacitance150 can provide a charge-coupling control port to anadjacent qubit device144. In other implementations of thedevice array148, a coupler device can be configured as a charge qubit (e.g., as a transmon qubit), a parametric frequency converter controlled by one or more microwave pump signals, or another type of device. In some cases, thefluxonium coupler170 can be fabricated, for example, by double-angle evaporation of thin-film aluminum onto a sapphire substrate, or by another fabrication process.
• As shown in theequivalent circuit304 inFIG. 3E, the fluxonium device includes aJosephson junction320, ashunt inductance324 and ashunt capacitance328 connected in a loop to which amagnetic flux signal326 can be applied. Themagnetic flux signal326 can be applied to the loop, for example, by applying a DC signal to bias circuitry that has a mutual inductance with the loop. Theinput capacitance322 across theJosephson junction320 can provide a charge-coupling control port. The charge-coupling control port may be formed of a topologically closed capacitance, for instance, where theinner island180 is encircled by theouter island182. In some implementations, a control or coupling port can be realized by coupling the device with a differential capacitance with respect to these two islands to a nearby electrode.
• Various example techniques for operating devices of thedevice array148 to encode information in the qubit devices, to implement one-qubit gate operations or multi-qubit gate operations, or to perform other operations based on instructions received fromcontrol system110A, are described below.
• FIG. 4A is an example energy level diagram161 that shows aspects of operating a qubit device144-jusing an example qubit control signal163 (also referred to as a write signal). In some implementations, other types of qubit control signals (e.g., signals at other frequencies, etc.) can be used to operate the qubit device144-j. In some instances, thequbit control signal163 can be applied to the qubit+readout control port156-jof theexample device array148 shown inFIG. 3A, for example, to manipulate a quantum state of the qubit device144-j. The example qubit device144-jhas a fixed qubit operating frequency fq-j that is defined by an electronic circuit of the qubit device (e.g., electronic circuits of qubit devices shown inFIGS. 3A-3E). The qubit operating frequency fq-j is independent of an offset electromagnetic field (e.g., applied or environmental magnetic flux, or applied or environmental current or voltage) experienced by the qubit device144-j. The example qubit device144-jhas two computational basis states (“0” and “1”). The qubit device can exist in either of its computational basis states or any arbitrary superposition of its basis states. A frequency of the examplequbit control signal163 is set to the qubit operating frequency fq-j, such that thequbit control signal163 causes transitions between the computational basis states of the qubit device144-j. In some instances, thequbit control signal163 is configured to perform a particular single-qubit gate, to encode input information, or to execute another operation by manipulating an amplitude or phase (or both) of thequbit control signal163.
• FIG. 4B shows an example frequency diagram165 for the example readout device146-jassociated with a qubit device144-j. In some instances, a readout control signal167 (also referred to as a read signal) can be applied to the qubit+readout control port156-jof thedevice array148 shown inFIG. 3A. The readout device146-jhas a resonant circuit tuned to a resonant frequency fr that is different from the qubit operating frequency fq-j of the qubit device144-jto which it is associated. In some implementations, the qubit operating frequency can be less than the readout frequency (fq-j<fr). In some implementations, the qubit operating frequency can be greater than the readout frequency (fq-j>fr). When the frequency of thereadout control signal167 is set to the resonant frequency fr, which is different from qubit operating frequency fq-j, the readout control signal167 probes a state of the qubit device144-j, which can project the state of the qubit onto one of its two computational basis states.
• In some examples, thequbit readout signal169 produced by the readout device is a frequency-shifted instance of thereadout control signal167, and the frequency-shifted signal is reflected by the resonant circuit of the readout device146-j. For instance, the readout device146-jcan produce thequbit readout signal169 by reflecting thereadout control signal167 with a frequency shift of +δf. In the example shown, a frequency shift of +δf indicates that the qubit device is in the “0” computational basis state, and a frequency shift of −δf indicate that the qubit device is in the “1” computational basis state. In some examples, thequbit readout signal169 produced by the readout device is a phase-shifted instance of thereadout control signal167. For instance, the readout device146-jcan produce thequbit readout signal169 by reflecting thereadout control signal167 with a phase shift of +δϕ, where a phase shift of +δϕ indicates that the qubit device is in the “0” computational basis state, and a frequency shift of −δϕ indicate that the qubit device is in the “1” computational basis state.
• In some implementations, thequbit readout signal169 is reflected back out the same qubit+readout control port156-j. In other implementations, thequbit readout signal169 is redirected to a different, output port of the readout device146-j. In this manner, characteristics of thequbit readout signal169 measured at the qubit+readout control port156-jor at another output port can be used to determine the state of the qubit device144-j. For example, measurements of a magnitude and a phase shift of thequbit readout signal169 relative to thereadout control signal167 can indicate of a state of the qubit device144-j. In some instances, measurements of a change in amplitude or a change in phase of thequbit readout signal169 relative to thereadout control signal167 indicate the state of the qubit device144-j.
• FIGS. 4C-4D show aspects of operating an example tunable coupler device142-(j,j+1) to couple adjacent qubit devices144-jand144-(j+1). Here, the qubit operating frequencies fq-j, fq-(j+1) of the adjacent qubit devices144-jand144-(j+1) are different from each other. As described above, each of the qubit devices144-jand144-(j+1) has two computational basis states (“0” and “1”). The tunable coupler device142-(j,j+1) disposed between the qubit devices144-jand144-(j+1) is configured to generate an electromagnetic interaction between the qubit devices144-jand144-(j+1). In this manner, the tunable coupler device142-(j,j+1) allows the qubit devices144-jand144-(j+1) to be selectively coupled on-demand, to perform multi-qubit gates, to entangle the pair of qubit devices144-jand144-(j+1), or to perform other types of operations. Here, the tunable coupler device142-(j,j+1) has a high “on/off” ratio, which refers to the ratio of the coupling rate provided by the tunable coupler device142-(j,j+1) when the coupler device is in its ON state versus its OFF state.
• FIG. 4C shows an example energy level diagram184 for an example coupler device in its OFF state, andFIG. 4D shows an example energy level diagram for the example coupler device in its ON state.FIG. 4E shows an examplecoupler control signal188 that can control operation of the example coupler device. A coupler device may have other features or attributes, and may operate in another manner.
• The example energy level diagram184 shown inFIG. 4C represents a portion of thedevice array148 when the tunable coupler device142-(j,j+1) is tuned to its OFF state. In its OFF state, the tunable coupler device142-(j,j+1) is operated at a frequency (fc-off) that is higher than either of the qubit operating frequencies fq-j, fq-(j+1). With the coupler device142-(j,j+1) in its OFF state, the coupling strength (and therefore, the rate of coupling) between the adjacent qubit devices144-jand144-(j+1) is low because of the mismatch between fc-off and either of the qubit operating frequencies fq-j, fq-(j+1). For example, when the coupler device142-(j,j+1) is in the OFF state, the coupling between the adjacent qubit devices144-jand144-(j+1) can be a second- or third-order interaction. Thus, the example tunable coupler device142-(j,j+1) is said to be in its OFF state when operated at fc-off.
• The example energy level diagram186 shown inFIG. 4D represents the same portion of thedevice array148 when the tunable coupler device142-(j,j+1) is tuned to its ON state. In its ON state, the tunable coupler device142-(j,j+1) is operated at a frequency fc-on that is tuned near one of the qubit operating frequencies fq-j or fq-(j+1). With the coupler device142-(j,j+1) in its ON state, the coupling strength (and therefore, the rate of coupling) between the adjacent qubit devices144-jand144-(j+1) is high because fc-on matches or is tuned near one of the qubit operating frequencies fq-j or fq-(j+1). For example, when the coupler device142-(j,j+1) is in the ON state, the coupling between the adjacent qubit devices144-jand144-(j+1) can be a first-order interaction. Thus, the example tunable coupler device142-(j,j+1) is said to be in its ON state when operated at fc-on.
• FIG. 4E shows time dependence of an examplecoupler control signal188 that can be used to operate the tunable coupler device142-(j,j+1). In some instances, thecoupler control signal188 can be applied to the coupler control input port154-(j,j+1) of theexample device array148 shown inFIG. 3A. As shown inFIG. 4E, before a time T1, the tunable coupler device142-(j,j+1) is operated at the operational frequency fc-off and, hence, it is in its OFF state. When the tunable coupler device142-(j,j+1) is in its OFF state, the coupling rate of the adjacent qubit devices144-jand144-(j+1) is low due to the low coupling strength. For instance, in some examples, the coupling rate can be in the range of approximately 50 kHz or less. As shown inFIG. 4E, at time T1 a bias (or offset) component of thecoupler control signal188 is applied at the coupler control input port154-(j,j+1), which causes the tunable coupler device142-(j,j+1) to transition into its ON state. The bias component can be, for example, a bias current that creates a magnetic bias field (e.g., flux178 through theloop176 shown inFIG. 3C). From the time T1 to a later time T4, the tunable coupler device142-(j,j+1) is operated at operational frequency fc-on and, hence, it is in its ON state. When the tunable coupler device142-(j,j+1) is in its ON state, the coupling rate for the adjacent qubit devices144-jand144-(j+1) is higher due to the higher coupling strength. For instance, in some examples, the coupling rate can be in the range of approximately 200 kHz to 2 MHz or more. At an intermediate time T2 (where T1<T2<T4) an AC (alternating current) component of thecoupler control signal188 is superposed with the bias component, at the coupler control input port154-(j,j+1), to increase the rate of coupling between the adjacent qubit devices144-jand144-(j+1). Here, the AC component of thecoupler control signal188 is a radio frequency (RF) or microwave frequency current, and the AC component is maintained until an intermediate time T3 (where T2<T3<T4), forming a pulse of duration T3−T2. In some instances, the frequency of the pulse can be at or near either a sum of the neighboring qubit operating frequencies (i.e., (fq-j)+(fq-(j+1))) or a difference of the neighboring qubit operating frequencies (i.e., (fq-j)-(fq-(j+1)). In this manner, a high rate of coupling between the adjacent qubit devices144-jand144-(j+1) can be maintained over the duration (T3−T2) of the AC component. For instance, in some examples, the coupling rate can be in the range of approximately 5 MHz to 500 MHz. At time T3, the AC component of thecoupler control signal188 is removed, which reduces the coupling strength between the adjacent qubit devices144-jand144-(j+1). Between time T3 and time T4, thecoupler control signal188 continues to have the bias component, so the tunable coupler device142-(j,j+1) remains in its ON state. At T4, the bias component of thecoupler control signal188 is removed, which causes the tunable coupler device142-(j,j+1) to return to its OFF state. After T4, the tunable coupler device142-(j,j+1) is operated at operational frequency fc-off and, hence, remains in its OFF state.
• All or part of the portion of theexample device array148 illustrated inFIG. 3A can be copied multiple times, as a unit cell, to extend thedevice array148 along a path (e.g., along x-axis of a Cartesian coordinate system), on a surface (e.g., x-y plane of a Cartesian coordinate system) or in space (e.g., as layers parallel to x-y plane that are distributed along a z-axis of a Cartesian coordinate system). For example, fault-tolerant quantum computing can be achieved by implementing gate-based models in a two-dimensional (2D)device array148A that includes a large number of nearest-neighbor-coupledqubit devices144. In some cases, a2D device array148A can allow eachqubit device144 to be independently controlled and measured without introducing crosstalk or errors onother qubit devices144 in the2D device array148A. In some instances, nearest-neighbor pairs ofqubit devices144 in the2D device array148A can be addressable with two-qubit gate operations capable of generating entanglement, independent of all other such pairs in the2D device array148A. As another example, fault-tolerant quantum computing can likewise be performed, and possibly advantaged, in a three-dimensional (3D)device array148B (e.g., as shown inFIGS. 14A and 15) that includes a large number of nearest-neighbor-coupledqubit devices144.
• In some implementations, to carry out large-scale, fault tolerant quantum computing, at least some of the following technical features can be provided in the example device arrays described here. One such feature is the delivery of control signals to qubitdevices144 andtunable coupling devices142 of a2D device array148A or a3D device array148B, and another such feature is the extraction of measurement signals from thequbit devices144 being performed with low-crosstalk of the applied signals from target qubit devices to non-target qubit devices. Another such feature is the shielding and isolation of the qubit device144-jfrom external noise, from the external environment, and from each other qubit device144-(j+k) in the2D device array148A or the3D device array148B to which the qubit device144-jis not specifically coupled (k≠0 or ±1) for performing a two-qubit gate. Yet another such feature is the ability to sustain coherence of individual and entangled quantum states of thequbit devices144 of the2D device array148A or the3D device array148B.
• In some instances, to achieve one or more of the above-noted features or other advantages, the2D device array148A or the3D device array148B can be embedded in anelectromagnetic waveguide system104 that includes a lattice of intersecting waveguides. Here, the lattice of intersecting waveguides is geometrically commensurate with the2D device array148A or the3D device array148B. Moreover, the intersecting waveguides are configured such that electromagnetic modes of the waveguides are evanescent with respect to relevant operating frequencies fq-j of the qubit devices144-jand fc-on/fc-off of adjacent tunable coupler devices142-(j,j±1) that control their respective coupling with nearest-neighbor qubit devices144-(j±1). In this manner, the lattice of intersecting waveguides can provide high (e.g., exponential) electromagnetic isolation between nearest-neighbor array sites (j,j+1). Moreover,individual qubit devices144 in the2D device array148A or the3D device array148B can be shielded and isolated from all but their nearest-neighbors, and allqubit devices144 can be isolated from the external electromagnetic environment. Additionally, apertures formed in the walls of the lattice of intersecting waveguides can provide ports to inject or extract (or both) electromagnetic signals for control or measurement (or both).
• Multiple example arrangements of the2D device array148A or the3D device array148B within anelectromagnetic waveguide system104 that includes a lattice of intersecting waveguides are described below.
• FIGS. 5A and 5B are schematic diagrams ofexample systems200A and200A′, respectively, each of which includes anelectromagnetic waveguide system104A that defines a 2D lattice of intersecting waveguides. Here, a subset of the waveguides in the 2D lattice (e.g., the waveguides oriented along the x-axis of a Cartesian coordinate system) intersect another subset of the waveguides in the 2D lattice (e.g., the waveguides oriented along the y-axis of the Cartesian coordinate system) at intersections202 (also referred to as nodes). Moreover, the waveguides form intervals (also referred to as bonds)204 between theintersections202.
• In the example illustrated inFIG. 5A, thesystem200A includes adevice array148A arranged within the 2D lattice of intersecting waveguides defined by theelectromagnetic waveguide system104A. Thedevice array148A is an example of a 2D device array, wherequbit devices144A are placed at nodes of thedevice array148A andcoupler devices142A are placed along the bonds (between the nodes) of thedevice array148A. In this manner, thedevice array148A forms rows of devices (e.g., along the x-axis of a Cartesian coordinate system) and columns of devices (e.g., along the y-axis of a Cartesian coordinate system). Thedevice array148A also is referred to as the2D device array148A. Eachqubit device144A of the example2D device array148A has fouradjacent coupler devices142A and four nearest-neighbor qubit devices144A. Moreover, each of thecoupler devices142A of the example2D device array148A has twoadjacent qubit devices144A.
• In the example shown inFIG. 5A, the bonds of the2D device array148A have the same size and orientation as theintervals204 of the 2D lattice of intersecting waveguides; thus, the2D device array148A is commensurate to the 2D lattice of intersecting waveguides. Here, the example2D device array148A is aligned with the 2D lattice of intersecting waveguides such that the nodes of the2D device array148A coincide with theintersections202 of the 2D lattice of intersecting waveguides. In this manner,qubit devices144A of the2D device array148A are placed inside theelectromagnetic waveguide system104A atintersections202 of the 2D lattice of intersecting waveguides, andcoupler devices142A of the2D device array148A are placed inside theelectromagnetic waveguide system104A along intervals204 (between intersections202) of the 2D lattice of intersecting waveguides. In some implementations, the distance between each adjacent pair ofqubit devices144A in the2D device array148A is in the range of 0.2 to 2.0 centimeters. In theexample device array148A shown inFIG. 5A, eachcoupler device142A is operably coupled between a single pair ofneighboring qubit devices144A, and each neighboring pair ofqubit devices144A is operably coupled by asingle coupler device142A.
• In the example illustrated inFIG. 5B, thesystem200A′ includes adevice array148A′ arranged within the 2D lattice of intersecting waveguides of theelectromagnetic waveguide system104A. Theexample device array148A′ is an example of a 2D device array, wherecoupler devices142B are placed at nodes of thedevice array148A′ andqubit devices144B are placed along bonds (between the nodes) of thedevice array148A′. In this manner, thedevice array148A′ forms rows of devices (e.g., along the x-axis of a Cartesian coordinate system) and columns of devices (e.g., along the y-axis of a Cartesian coordinate system). Thedevice array148A′ is also referred to as the2D device array148A′. Eachcoupler device142B of the example2D device array148A′ has fouradjacent qubit devices144B. Moreover, eachqubit device144B of the example2D device array148A′ has twoadjacent coupler devices142B, and sixother qubit devices144B are also adjacent to the twoadjacent coupler devices142B.
• In the example shown inFIG. 5B, the bonds of the2D device array148A′ have the same size and orientation as theintervals204 of the 2D lattice of intersecting waveguides; thus, the2D device array148A′ is commensurate to the 2D lattice of intersecting waveguides. Here, the2D device array148A′ is aligned with the 2D lattice of intersecting waveguides such that the nodes of the2D device array148A′ coincide with theintersections202 of the 2D lattice of intersecting waveguides. In this manner,coupler devices142B of the2D device array148A′ are placed inside theelectromagnetic waveguide system104A atintersections202 of the 2D lattice of intersecting waveguides, andqubit devices144B of the2D device array148A′ are placed inside theelectromagnetic waveguide system104A along intervals204 (between intersections202) of the 2D lattice of intersecting waveguides. In some implementations, the distance between each adjacent pair ofcoupler devices142B in the2D device array148A′ is in the range of 0.2 to 2.0 centimeters. In theexample device array148A shown inFIG. 5A, eachcoupler device142A is operably coupled between a single pair ofneighboring qubit devices144A, and each neighboring pair ofqubit devices144A is operably coupled by asingle coupler device142A.
• In some implementations, the arrangement of the devices in the device array corresponds to a multi-dimensional device lattice, where the device lattice includes unit cells extending along each dimension. For instance, the devices shown inFIGS. 5A and 5B are arranged as a two-dimensional device lattice, where each unit cell of the device lattice includes one or more qubit devices and one or more coupler devices. In some cases, each unit cell of the device lattice can include one or more readout devices. Each unit cell in a two-dimensional device array can include one or more rows and one or more columns of devices.
• In some cases, two-dimensional lattices (e.g., either of those shown inFIG. 5A or 5B, or others) can be extended into three dimensions. For instance, the lattice that forms theexample device array148A can be extend to three dimensions by forming layers of theexample device array148A, with additional coupler devices between the nearest neighbor qubit devices of adjacent layers; or theexample device array148A′ can be extend to three dimensions by forming layers of theexample device array148A′ with additional qubit devices between the nearest neighbor coupler devices of adjacent layers. Each unit cell in a three-dimensional device array can include one or more rows, one or more columns, and one or more layers of devices.
• In some implementations, the device lattice can be aligned in a multi-dimensional waveguide lattice formed by intersecting waveguide sections. For instance, each unit cell of the device lattice can be housed in section of the electromagnetic waveguide system that corresponds to one or more unit cells of the waveguide lattice.
• FIG. 6A shows a portion of theinterior volume206 of an exampleelectromagnetic waveguide system104A. In particular,FIG. 6A shows a portion of theelectromagnetic waveguide system104A where two waveguides intersect at awaveguide intersection202. In the example shown, a first of the two waveguides includes two intervals204-xoriented along the x-axis, and a second of the two waveguides includes two intervals204-yoriented along the y-axis. In some instances, aqubit device144A of the2D device array148A or acoupler device142B of the2D device array148A′ can be placed at theexample waveguide intersection202.
• FIG. 6B shows a close-up view of anexample interval204 of a waveguide. In this example, thewaveguide interval204 is formed by abase208, two opposingside walls210 and alid212. As shown inFIG. 6B, thebase208 has an upper surface that is parallel to the x-y plane and defines a lower boundary of a portion of theinterior volume206. As shown inFIG. 6B, the twoside walls210 include vertical side surfaces that are orthogonal to thebase208 and parallel to each other, and theside walls210 define side boundaries of a portion of theinterior volume206. As shown inFIG. 6B, thelid212 has a lower surface that is parallel to and opposes the upper surface of thebase208; the lower surface of thelid212 defines an upper boundary of a portion of theinterior volume206. In this manner, thebase208, theside walls210 and thelid212 partially enclose theinterior volume206 and define a cross section of theexample interval204. In the example shown, the cross-section of eachwaveguide interval204 is at least partially defined by opposing pairs of right and left side walls (provided by the side walls210), and opposing pairs of upper and lower side walls (provided by the upper surface of thebase208 and the lower surface of the lid212). At eachwaveguide intersection202, the right and left sidewalls of the waveguide that extends along the x-axis meets the right and left sidewalls of the waveguide that extends along the y-axis. Thebase208, theside walls210 and thelid212 can be formed from a conductor material, a superconductor material or a combination thereof.
• Thebase208, theside walls210 and thelid212 can be formed in a number of different ways, for example, as an assembly of multiple components or as an integrated structure. In some implementations, thebase208, theside walls210 and thelid212 can be formed as a micro-machined silicon wafer device, for example, from one or more wafers etched and coated with thin film superconductor material such as aluminum or niobium. In some implementations, thebase208, theside walls210 and thelid212 can be formed from bulk superconducting metal machined to form the base, lid, and sidewalls of the electromagnetic waveguide system. In some implementations, thebase208 and theside walls210 can be formed as a single component that is then assembled to another component that includes thelid212; or thelid212 and theside walls210 can be formed as a single component that is then assembled to another component that includes thebase208; or thebase208, theside walls210, and thelid212 can be formed as a layered or laminated structure.
• One or more of thebase208, theside walls210 or thelid212 can include an aperture from theinterior volume206. In some cases, the apertures are openings through the interior surface that defines theinterior volume206. In some examples, apertures are located adjacent to the regions where qubit devices or coupler devices reside. In the example illustrated inFIG. 6B, anaperture214 is provided through thelid212 that defines theexample interval204. Apertures may additionally or alternatively be provided in the base208 orside walls210.
• In some instances, control signals can be transmitted, through theaperture214, from a signal source located outside theelectromagnetic waveguide system104A to aqubit device144A/144B or acoupler device142A/142B located inside theinterval204. Similarly, in some instances, readout signals can be transmitted, through theaperture214, from a readout device associated with thequbit device144A/144B located inside theinterval204 to a signal receiver located outside theelectromagnetic waveguide system104A. Apertures can also be provided at other locations. For example, apertures may additionally or alternatively be located adjacent to waveguideintersections202 or at other locations in the electromagnetic waveguide system.
• In the examples shown inFIGS. 6A and 6B, the waveguides defined by theelectromagnetic waveguide system104A have rectangular cross-sections. As shown inFIG. 6B, the example rectangular cross-section of theinterval204 has a width “a” along the y-axis and a height “b” along the z-axis. In the example shown, the largest transverse dimension determines a frequency fc of the lowest frequency mode that can propagate through theinterval204 of the waveguide. The frequency fc is referred to as the cutoff frequency fc of the waveguide. In this manner, signals having frequencies above the cutoff frequency (f>fc) can propagate through the waveguide, while signals having frequencies below the cutoff frequency (f<fc) evanesce in the waveguide. For this reason, signals having frequencies below the cutoff frequency (f<fc) that are injected into the waveguide through theaperture214 will be attenuated (e.g., exponentially) inside the waveguide from theaperture214. For example, for a waveguide with rectangular cross-section having dimensions a=0.5 cm and b=0.3 cm, the cutoff frequency is approximately 30 GHz (fc≈30 GHz). In some examples, the waveguides have other dimensions and cutoff frequencies in other ranges.
• In some implementations, a diagonal cross-section of thewaveguide intersection202 of two intersecting waveguides has a transverse dimension a√2 which determines a minimum frequency (denoted fmin) that is smaller than the cutoff frequency fc of the interval204 (i.e., fmin<fc). In the foregoing example, where dimensions of the waveguide with rectangular cross-section are a=0.5 cm and b=0.3 cm, the minimum frequency corresponding to thewaveguide intersection202's diagonal cross-section mode is approximately 24 GHz (fmin 24 GHz).
• FIG. 7 shows a portion of the interior volume of the exampleelectromagnetic waveguide system104A. In the example shown, the electromagnetic waveguide system includes a first subset of waveguides i=1, 2, . . . oriented along the x-axis of a Cartesian coordinate system that intersect a second subset of waveguides j=1, 2, . . . oriented along the y-axis of the Cartesian coordinate system. The waveguides intersect at a 2D array of intersections202-(i|j) shown inFIG. 7. In the example shown, signals having frequencies below the minimum frequency (f≤fmin) that are injected into theelectromagnetic waveguide system104A through apertures located at a group of nearest-neighbor intersections, e.g.,202-(i|j),202-(i|j+1) and202-(i+1|j), remain localized at the intersections where they are injected.
• In some implementations, signals can be strongly localized toindividual waveguide intersections202 if the signals' frequencies are between zero and the minimum frequencies defined by thewaveguide intersections202, i.e., in the range of f=0 to f=fmin<fc, where fmin is a frequency of the lowest-lying resonant mode of thewaveguide intersections202, and fc is the cutoff frequency of theintervals204. In some implementations, disorder in the coupling strength betweenwaveguide intersections202 of the 2D lattice can be added by slightly altering the lateral dimensions of the waveguide crossings or otherwise introducing small perturbations of the frequencies of the modes. In some instances, localization of spurious resonant modes at fmin can be further increased by dissipation in thewaveguide intervals204 connecting theintersections202.
• In the example shown inFIG. 7, the shading at the waveguide intersections202-(i|j),202-(i|j+1) and202-(i+1|j) represents the spatial distribution of the electromagnetic field strength for electromagnetic waves introduced into the interior volume of theexample waveguide system104A at the respective waveguide intersections202-(i|j),202-(i|j+1) and202-(i+1|j). In the example shown, the electromagnetic waves are introduced at the frequency (fmin) that corresponds to the lowest-lying resonant mode of the waveguide intersections. The shading inFIG. 7 shows that the resulting electromagnetic field strength drops to essentially zero within a short distance of the respective waveguide intersections202-(i|j),202-(i|j+1) and202-(i+1|j).
• As shown inFIG. 7, because the electromagnetic waves have a frequency (fmin) that is less than the cutoff frequency (fc) of thewaveguide intervals204, the electromagnetic waves do not propagate in thewaveguide intervals204. In particular, thewaveguide intervals204 evanesce electromagnetic waves below the cutoff frequency (fc). In the example shown, the field strength drops significantly in each direction from the respective waveguide intersections202-(i|j),202-(i|j+1) and202-(i+1|j). In some instances, when an electromagnetic wave is evanesced by a waveguide structure, the electromagnetic field strength drops exponentially along the main axis of the waveguide structure.
• In the example shown inFIG. 7, thewaveguide intervals204 have a width of 0.5 cm and a height of 0.3 cm; thewaveguide intervals204 define a cutoff frequency (fc) of 29.98 GHz; and thewaveguide intersections202 define a lowest-lying resonant mode frequency (fmin) of 24.42 GHz. Signals introduced at or below the cutoff frequency (fc) correspond to evanescent modes of thewaveguide intervals204, and therefore, thewaveguide intervals204 suppress all such signals. In the example shown, signals having the frequency fmin are introduced at the waveguide intersections202-(i|j),202-(i|j+1) and202-(i+1|j), and the signal strength becomes negligible within a short distance of each respective waveguide intersection. In the particular example shown, the electromagnetic field strength drops by approximately nine orders of magnitude (from 1.33(10)⁹to below)(10)⁰) before reaching the midpoint of theadjacent waveguide interval204.
• In some implementations, the devices housed in theelectromagnetic waveguide system104 have operating frequencies well below the cutoff frequencies of the waveguide intervals, and the electromagnetic signals that control the devices correspond to evanescent modes of the waveguide intervals. Thus, the control signals are evanesced by the waveguide intervals, and they do not spatially propagate within the interior volume of the waveguide system. For instance, the electromagnetic signals introduced at a waveguide intersection can control a device housed at the waveguide intersection without introducing noise at other intersections.
• FIG. 8 shows a portion of an interior volume of anelectromagnetic waveguide system104B′ that includes a 3D lattice of intersecting waveguides in which some of theintersections202 have a size (along at least one of two rectangular cross-section dimensions) that is different from a size of other theintersections202′. In the example shown, the interior volume is viewed along one of the Cartesian axes, and the small features at theintersections202 represent the waveguides extending in or out of the plane of the page. Here, a minimum frequency fmin corresponding to the diagonal cross-section of afirst waveguide intersection202 is different from a minimum frequency fmin corresponding to the diagonal cross-section of anotherwaveguide intersection202′ (i.e., fmin≠fmin). Further, in the example shown inFIG. 8, the 3D lattice of intersecting waveguides includes a subset ofintervals204 that have continuous cross-sections (do not include discontinuities) and another subset ofintervals204′ that havecross-section discontinuities216. At cross-section discontinuities, a size (along at least one of two rectangular cross-section dimensions) of the cross-section of aninterval204′ changes discontinuously (e.g., in a stepwise fashion). Here, a cutoff frequency fc corresponding to the cross-section of theinterval204′ on one side of thediscontinuity216 is different from a cutoff frequency fc corresponding to the cross-section of theinterval204′ on the opposing side of the discontinuity216 (i.e., fc≠fc).
• In some instances,apertures214 in aninterval204 of a waveguide or at awaveguide intersection202 may produce sufficient dissipation to provide strong localization of resonant modes. In some implementations, another source of dissipation is the finite loss tangent and resistivity of materials of various devices or components (e.g., a signal board) housed inside the 2D lattice of intersecting waveguides. Additional dissipation in theintervals204 of the 2D lattice of intersecting waveguides may be added through incorporation of metallic (as opposed to superconducting) segments in the 2D or 3D lattice of intersecting waveguides. Further, localization may be increased in some cases bydecoupling intersections202, for instance, by decreasing the ratio of the waveguide cross section (e.g., the longer dimension of the cross-section) to the length of theinterval204; decreasing the ratio may cause the intersections to be more decoupled.
• In view of the above, the exampleelectromagnetic waveguide system104A that includes a 2D lattice of intersecting waveguides can provide a high degree (e.g., exponential) isolation ofqubit devices144A/144B of the2D device array148A/148A′ arranged within the 2D lattice of intersecting waveguides. In some cases, the isolation of the qubit devices can be provided independent of the number ofintersections202 of the 2D lattice of intersecting waveguides and independent of the number and the length ofintervals204 of the 2D lattice of intersecting waveguides. Using the example 2D device array and the example 2D lattice of intersecting waveguides, theexample systems200A/200A′ can be used, in some instances, to fabricate large scalequantum processor cells102 for performing fault tolerant quantum computation with solidstate qubit devices144A/144B andtunable coupler devices142A/142B. Example implementations ofquantum processor cells102 are described below. Moreover, the concepts can be extended directly to three-dimensions, for example, to provide a high degree of (e.g., exponential) isolation of qubit devices of a 3D device array arranged within a 3D lattice of intersecting waveguides
• FIG. 9 shows a plan view of a portion of an example quantum processor cell (QPC)102B. Theexample QPC102B represented inFIG. 9 includes anelectromagnetic waveguide system104B that defines a 2D lattice of intersecting waveguides. Here, a subset of the waveguides in the 2D lattice (e.g., the ones oriented along the x-axis of a Cartesian coordinate system) intersect another subset of the waveguides (e.g., the ones oriented along the y-axis of the Cartesian coordinate system) atwaveguide intersections202A. Moreover, the waveguides formintervals204A between thewaveguide intersections202A. In this manner, signals communicated into the interior volume of the waveguide system are strongly localized toindividual waveguide intersections202A, for example, if the signals' frequencies are between zero and the lowest-lying resonant mode of the intersection, i.e., in the range of f=0 to f=fmin<fc, where fmin is a frequency of the lowest-lying resonant mode of theintersections202A and fc is the cutoff frequency of theintervals204A.
• Theexample QPC102B shown inFIG. 9 includes a2D device array148A housed inside theelectromagnetic waveguide system104B. The example2D device array148A includesqubit devices144 located at nodes of the2D device array148A andcoupler devices142 located along bonds (between the nodes) of the2D device array148A. Further, theexample QPC102B includes asignal board140A. Theexample signal board140A communicates signals to and from the devices of the2D device array148A. For instance, thesignal board140A can communicate control signals to the qubit devices and coupler devices, and communicate readout signals from the readout devices. Theexample signal board140A also mechanically supports the devices of the2D device array148A inside the interior volume of theelectromagnetic waveguide system104B. Further, theexample QPC102B also includes input connector hardware through which control signals can be delivered to thesignal board140A (e.g., from an input signal processing system128), andoutput connector hardware138B through which readout signals can be delivered from thesignal board140A (e.g., to an output signal processing system130).
• In some implementations, signals that are configured to control thequbit devices144A have frequencies fq, and signals that are configured to control thetunable coupler devices142A have frequencies ft. In various implementations, the coupler operating frequencies can be larger than the qubit operating frequencies (fq<ft), or the qubit operating frequencies can be larger than the coupler operating frequencies (ft<fq). In the example2D device array148A shown inFIG. 9, readout devices associated withrespective qubit devices144A are arranged such that each of the readout devices is collocated with its qubit device at a respective node of the example2D device array148A where its qubit device is located. In some examples, signals that are configured to control the readout devices associated withqubit devices144A have frequencies fr that are higher than both the qubit operating frequencies (fq) and the coupler operating frequencies (ft), such that fq<fr and ft<fr. For these reasons, the devices in the2D device array148A are configured such that their operating frequencies and the frequencies (fq, fr and ft) of the control signals that operate them are smaller (e.g., ten times smaller) than fmin. For example, the devices can be configured such that fq<ft<fr<fmin<fc, such that ft<fq<fr<fmin<fc, or in another manner. Thus, in some instances,individual qubit devices144A in the2D device arrays148A are shielded and isolated from all but their nearest-neighbors.
• FIG. 10A shows a side cross-sectional view of theexample signal board140A.
• Theexample signal board140A is formed from amultilayer substrate218. Themultilayer substrate218 of theexample signal board140A can include conducting layers separated by insulating layers. The insulating layers can include, for example, silicon, sapphire, fused quartz, diamond, beryllium oxide (BeO), aluminum nitride (AlN), or others insulative materials. In the example shown, ground planes220 are formed by metal layers on outer (e.g., top and bottom) surfaces of themultilayer substrate218 or inner surfaces (e.g., between two or more of the adjacent layers) of themultilayer substrate218. Theexample signal board140A also includes thermalization posts222 formed through the thickness of thesignal board140A. The example thermalization posts222 are thermally shorted to the outer and inner ground planes220 to maintain a bulk of themultilayer substrate218 at a cryogenic operating temperature. Further, theexample signal board140A includes thermalizationpost contact areas224 for application of pressure against additional bulk thermalization materials that may be in contact with thesignal board140A. Furthermore, theexample signal board140A includes signal lines225. The signal lines can be formed as patterned stripline or buried microstrip or other microwave transmission lines to carry control or readout signals on interior layers of themultilayer substrate218. Additionally, theexample signal board140A includes signal board vias226 that are configured to provide electrical contact and thermalization between various layers of themultilayer substrate218. A signal board may include additional or different features.
• FIG. 10B shows a perspective view of theexample signal board140A. As shown inFIG. 10B, theexample signal board140A includescontiguous areas228, referred to as plateaus, andarms230 that connect nearest-neighbor plateaus228 and next-to-nearest-neighbor plateaus228. Portions of theexample signal board140A between theplateaus228 and thearms230 are vacant, such that the arms render thesignal board140A a reticulated aspect. In this example, each plateau has four nearest-neighbor plateaus and four next-to-nearest-neighbor plateaus. In the example shown inFIG. 10B, next-to-nearest-neighbor plateaus are connected through arms that extend diagonally to aqubit receptacle232, and nearest-neighbor plateaus are directly connected through a pair of arms that define acoupler receptacle234. The qubit receptacles232 are each sized to support aqubit device144 of the2D device array148A, and the coupler receptacles are each sized to support acoupler device142 of the2D device array148A. In some implementations, in which readout devices are collocated withrespective qubit devices144, thequbit receptacles232 are each sized to support aqubit device144 and its readout device. As shown inFIG. 10B, each of thequbit receptacles232 includes a perimeter frame that has a stepped inner profile, and is supported by four arms that extend diagonally from a surrounding group ofplateaus228; and each of thecoupler receptacles234 includes a pair of sidewalls defined by a stepped profile of two parallel arms. A signal board can include additional or different features, and the arms, receptacles, and other features of a signal board can be configured in another manner.
• FIG. 11A is an exploded view of a portion of theexample QPC102B shown inFIG. 9. The exploded view inFIG. 11A shows that the 2D lattice of intersecting waveguides defined by the exampleelectromagnetic waveguide system104B is formed from abase portion236 and alid portion238. Thebase portion236 includes abase208A andbase wall structures210A extending vertically from thebase208A. Thebase wall structures210A include side surfaces that can be orthogonal to an upper surface of thebase208A. Thebase wall structures210A are arranged relative to one another such that their side surfaces form the lower half of the walls that define thewaveguide intersections202A andintervals204A shown inFIG. 9. Further, thebase wall structures210A include upper ledge surfaces that can be parallel to the upper surface of thebase208A. Thebase wall structures210A are further arranged relative to one another such that the plateau portions of thesignal board140A can rest on the upper ledge surfaces of thebase wall structures210A.
• Similarly, thelid portion238 includes alid212A andlid wall structures210B extending vertically from thelid212A. Thelid wall structures210B include side surfaces that are orthogonal to a lower surface of thelid212A. Thelid wall structures210B are arranged relative to one another such that their side surfaces form the upper half of the walls that define thewaveguide intersections202A andintervals204A shown inFIG. 9. Further, thelid wall structures210B include a lower ledge surface that is parallel to a lower surface of thelid212A. Thelid wall structures210B are further arranged relative to one another such that the plateau portions of thesignal board140A can be sandwiched between the upper ledge surfaces of thebase wall structures210A and the lower ledge surfaces of thelid wall structures210B, as shown inFIG. 11B, which is a side cross-sectional view of theexample QPC102B.FIG. 11B also shows that theexample base208A, thewall structures210A,210B and thelid212A of theelectromagnetic waveguide system104B together enclose aninterior volume206 of the 2D lattice of intersecting waveguides.
• FIGS. 9 and 11A show that qubitdevices144 andcoupler devices142 of the2D device array148A can be supported by thesignal board140A to form rows of devices (e.g., along the x-axis of a Cartesian coordinate system) and columns of devices (e.g., along the y-axis of a Cartesian coordinate system). In this manner, eachqubit device144 of the2D device array148A has four adjacent coupler devices and four nearest-neighbor qubit devices. Moreover, eachcoupler device142 of the2D device array148A has two adjacent qubit devices. Here, separation of thequbit receptacles232 andcoupler receptacles234 of thesignal board140A are configured such that bonds of the2D device array148A have the same size and orientation as theintervals204A of the 2D lattice of intersecting waveguides; thus, the2D device array148A is commensurate to the 2D lattice of intersecting waveguides. Moreover, thesignal board140A is arranged relative to theelectromagnetic waveguide system104B to align the2D device array148A to the 2D lattice of intersecting waveguides such that the nodes of the2D device array148A coincide with theintersections202A of the 2D lattice of intersecting waveguides. In this manner,qubit devices144 of the2D device array148A are placed inside theelectromagnetic waveguide system104B atintersections202A of the 2D lattice of intersecting waveguides, andcoupler devices142 of the2D device array148A are placed inside theelectromagnetic waveguide system104B alongintervals204A (betweenintersections202A) of the 2D lattice of intersecting waveguides.
• In the example shown inFIGS. 11A-11E, thesignal board140A includes signal board vias226 (shown inFIG. 10A) that form a connection between thebase portion236 and thelid portion238 of the electromagnetic waveguide system. Theholes242 in thebase portion236 or the lid portion238 (or both) can provide access to thesignal board140A for sending input signals into thesignal board140A and receiving output signals from thesignal board140A.
• FIG. 11C is plan view of the portion of theexample QPC102B shown inFIG. 11A.FIG. 11C shows that at least a portion of theplateaus228 of thesignal board140A in theexample QPC102B reside outside theinterior volume206 of theelectromagnetic waveguide system104B. In the example shown, thearms230 that extend between next-to-nearest-neighbor plateaus (and which support qubit receptacles232) and thearms230 that extend between nearest-neighbor plateaus (and which define the coupler receptacles234) pass through thewall structures210A (which partially define the 2D lattice of intersecting waveguides) through theapertures240.
• In some implementations, control lines extend through all or part of one or more of thearms230. The control lines can extend in theapertures240, and in some cases, through the full thickness of the wall. In this manner, a control signal can be communicated into theinterior volume206 of theelectromagnetic waveguide system104B from aplateau228 through anaperture240 of theelectromagnetic waveguide system104B. For instance, a control signal can be communicated on a signal line housed in anarm230 that connects the plateau to a receptacle that supports a device (e.g., aqubit device144 or a coupler device142) to which the control signal is addressed. Similarly, a readout signal can be extracted from aqubit device144 located inside theinterior volume206 of theelectromagnetic waveguide system104B to aplateau228 through anaperture240 of theelectromagnetic waveguide system104B. For instance, a readout signal can be communicated on a signal line housed in anarm230 that connects thequbit device144 to theplateau228. In the example shown inFIGS. 11A-11E, the apertures are formed in theside walls210A,210B. In this or other examples, apertures may additionally or alternatively be formed in the upper walls (through the lower surface of thelid212A), in the lower walls (through the upper surface of thebase208A), or both.
• FIG. 11D is a perspective view of the exampleelectromagnetic waveguide system104B, andFIG. 11E is a zoom-in view of a portion of the same. As shown inFIG. 11D, the exampleelectromagnetic waveguide system104B is formed by an assembly of two components. In particular, the exampleelectromagnetic waveguide system104B is formed by mating, connecting, bonding or otherwise assembling thelid portion238 with thebase portion236. The assembly of thewall structures210A,210B, thebase208A and thelid212A define aninterior volume206 of a 2D lattice of intersecting waveguides. Additionally, thewall structures210A,210B defineholes242 through thelid portion238 and through thebase portion236. Theholes242 provide access toplateaus228 of thesignal board140A which are located outside the partially enclosedinner volume206 of theelectromagnetic waveguide system104B. Theapertures240 of thewall structures210A,210B described above in connection withFIG. 11C are also shown inFIGS. 11D and 11E. When theelectromagnetic waveguide system104B is used in theQPC102B, arms of thesignal board140A that connect nearest-neighbor plateaus penetrate theapertures240A to deliver control signals from aplateau228 to acoupling device142; and arms of thesignal board140A that connect next-to-nearest-neighbor plateaus penetrate theapertures240B to deliver control signals from aplateau228 to aqubit device144 or to retrieve readout signals from the qubit device to theplateau228.
• Each ofFIGS. 12A and 12B shows an example of aninterval204 of a waveguide of an example electromagnetic waveguide system. Theexample intervals204 shown inFIGS. 12A and 12B include pass-through structures.FIG. 12A shows a first example pass-throughstructure246, andFIG. 12B shows a second example pass-throughstructure246A. In the example shown, theside walls210 are made from a conducting or superconducting material and partially define the boundary of the exampleinterior volume206. The example pass-throughstructures246,246A extend between twoapertures240A located on opposingside walls210. An outer surface of the pass-throughstructure246,246A can be made from the same conducting or superconducting material as theside walls210. In some cases, the outer surface of the pass throughstructures246,246A can be a thin film metal, a bulk metal, from a row or array of via structures, or another structure. In the example illustrated inFIG. 12A, amultilayer board243 includes astrip line244 and crosses theinterior volume206 of the waveguide through the pass-throughstructure246. In this manner, a signal carried through thestrip line244 is electromagnetically insulated from anyqubit device144 orcoupler device142 that may be housed inside theinterval204 adjacent to the pass-throughstructure246. In the example illustrated inFIG. 12B, the pass-throughstructure246A has anadditional aperture248 on one of its side surfaces, such that the additional aperture opens to theinterior volume206 of theinterval204. Here, amultilayer board243A crosses theinterior volume206 of the waveguide through the pass-throughstructure246, and astrip line244A of themultilayer board243A ends at a location adjacent to theadditional aperture248 of the pass-throughstructure246A. In this manner, a signal carried through thestrip line244 can be delivered through theadditional aperture248 to aqubit device144 orcoupler device142 that may be housed inside theinterval204 adjacent to the pass-throughstructure246A. In some cases, other types of pass-through structures can be used. For instance, a pass-through structure can include multiple apertures, other types of boards, etc.
• Example components and structures of theexample QPC102B have been described above. Examples of methods for assembling theexample QPC102B are described below.
• FIGS. 13A-13G show aspects of anexample process250 for assembling theexample QPC102B shown inFIG. 9. Some of the operations250-1 through250-6 of theexample process250 can be performed in a different order than as illustrated here, can be performed concurrently or can be replaced by other operations. Further, theexample process250 may include additional operations performed prior to, after or interspersed between the operations illustrated here. In some instances, one or more of the operations250-1 through250-6 of theexample process250 can be used in the assembly of other quantum processor cells.
• At250-1, abase portion236 of anelectromagnetic waveguide system104B is provided.FIG. 13A is a partial perspective view of thebase portion236 of the exampleelectromagnetic waveguide system104B. In this example, thebase portion236 includes abase208A andbase wall structures210A. In some implementations, thebase208A andbase wall structures210A are formed from a metallic conductor material, a superconductor material, or a combination of these and other materials. In some implementations, thebase208A andbase wall structures210A can be formed by deposition of thin film metallic or superconducting materials on a micro-machined silicon substrate, a pattered dielectric or insulating substrate, or other material system. In some cases, some portions of surfaces of the foregoingbase208A andbase wall structures210A are coated with a layer of superconductor material. In other implementations, thebase208A andbase wall structures210A are formed from a superconductor material.
• The examplebase wall structures210A are distributed on thebase208A to form intersections and intervals of a 2D lattice of intersecting waveguides. Moreover, the examplebase wall structures210A encloseholes242A (or openings) of thebase208A. Thebase wall structures210A have an upper ledge surface that is parallel to an upper surface of thebase208A. The upper ledge surface of eachbase wall structure210A defines first channels oriented in directions toward nearest-neighbor base wall structures. The first channels represent a lower half of a first type ofapertures240A described above in connection withFIGS. 11D and 11E. Additionally, the upper ledge surface of eachbase wall structure210A defines second channels oriented in directions toward next-to-nearest-neighbor base wall structures. The second channels represent a lower half of a second type ofapertures240B described above in connection withFIGS. 11D and 11E.
• At250-2, a first sub-assembly (236+140A) is formed from thebase portion236 and asignal board140A.FIG. 13B is a perspective view of a portion of the first sub-assembly (236+140A). Theexample signal board140A was described above in connection withFIGS. 10A-10B. Here, theplateaus228 of thesignal board140A are mated with the ledge surfaces of thebase wall structures210A over theholes242A of thebase208A enclosed by the base wall structures.Arms230 of thesignal board140A that define acoupler receptacle234 located between nearest-neighbor plateaus rest in the lower half of theapertures240A.Other arms230 that extend to aqubit receptacle232 located between next-to-nearest-neighbor plateaus rest in the lower half of theapertures240B. In this manner, the first sub-assembly (236+140A) has coupler receptacles located in intervals (between intersections) of the 2D lattice of intersecting waveguides and qubit receptacles located at intersections of the 2D lattice of intersecting waveguides. In the example shown, the top half of the waveguide system (thelid212A) can make good electromagnetic contact with the lower half of the waveguide system (thebase208A). In this example, the contact points where thebase208A can make electromagnetic contact with thelid212A are provided on the ledges of thewall structures210A, in particular, at raised portions on either side of theapertures240A and240B. Electrical contact between thebase208A andlid212A may be provided in another manner.
• At250-3, a second sub-assembly (236+140A+148A) is formed from the first sub-assembly (236+140A) and a2D device array148A.FIG. 13C is a perspective view of the second sub-assembly (236+140A+148A). Here,qubit devices144 of the example2D device array148A are placed in thequbit receptacles232 located at intersections of the 2D lattice of intersecting waveguides. In some implementations, in which readout devices are collocated withrespective qubit devices144, a qubit device and its readout device are placed in each of thequbit receptacles232. For example, the collocatedqubit device144 and readout device can be formed on the same chip. As another example, the collocatedqubit device144 and readout device can be formed on separate chips. Separate chips can be located vertically above and below one another at the qubit sites/lattice intersections. Also,coupler devices142 of the example2D device array148A are placed in thecoupler receptacles234 located in the intervals (between the intersection) of the 2D lattice of intersecting waveguides.
• At250-4, thequbit devices144 and thecoupler devices142 of the example2D device array148A are connected with signal lines of thesignal board140A.FIG. 13D is another perspective view of the second sub-assembly (236+140A+148A), where some top layers of theexample signal board140A have been hidden from view. Here, signal lines originate at aconnection junction251 associated with eachplateau228 and extend torespective qubit devices144 or thecoupler devices142 in the following manner. For example, acoupler signal line225B is embedded between layers of thesignal board140A and extends from theconnection junction251 of aplateau228 to acoupler device142 along anarm230 that enters the interior volume of an interval of the 2D lattice of intersecting waveguides through anaperture240A. Thecoupler signal line225B carries a coupler control signal from theplateau228 located outside theelectromagnetic waveguide system104B to a coupler control input port (as shown inFIG. 3A) of thecoupler device142 located inside the electromagnetic waveguide system.Coupler signal lines225B can be DC-coupled (e.g., by mutual inductive coupling or direct current coupling) tocorresponding coupler devices142. As another example, aqubit signal line225A is embedded between layers of thesignal board140A and extends from theconnection junction251 of theplateau228 to aqubit device144 along anotherarm230 that enters the interior volume of an interval of the 2D lattice of intersecting waveguides throughapertures240B. Thequbit signal line225A carries a qubit control signal from theplateau228 located outside theelectromagnetic waveguide system104B to a qubit+readout control port (as shown inFIG. 3A) of thequbit device144 located inside the electromagnetic waveguide system.Qubit signal lines225A can be AC-coupled tocorresponding qubit devices144. In some implementations of theprocess250, the operation250-4 can be performed between operations250-2 and250-3.
• At250-5,connection junctions251 located atplateaus228 of asignal board140A are connected to respectivemultiple signal connectors138A (also referred to as vertical interconnects).FIG. 13E is a perspective view of a portion of the second sub-assembly (236+140A+148A) that showsmultiple signal connectors138A connected adjacentrespective plateaus228 of theexample signal board140A. Each of themultiple signal connectors138A is arranged and configured to create multiple electrical connections betweenqubit signal lines225A andcoupler signal lines225B that are routed horizontally through thesignal board140A and corresponding vertical transmission lines or interposer structures that either deliver qubit control signals, qubit readout signals and coupler control signals frominput processing hardware132 located outside theQPC102B or return readout signals from qubit devices tooutput processing hardware134 located outside theQPC102B. Examples ofmultiple signal connectors138A are described below in connection withFIGS. 18A-18C. In some implementations, the vertical transmission lines—which can be coaxial or ribbon type transmission lines, for instance—connect themultiple signal connectors138A with input oroutput processing hardware132,134 located outside theexample QPC102B. In some implementations of theexample process250, the operation250-5 can be performed between operations250-2 and250-3 or between operations250-3 and250-4.
• At250-6, anelectromagnetic waveguide system104B of theQPC102B is formed.FIG. 13F is a lateral cross-section of theQPC102B. Here, alid portion238 of theelectromagnetic waveguide system104B is mated with thebase portion236 thereof to form aninterior volume206 of the 2D lattice of intersecting waveguides. Portions of theexample signal board140A that support the2D device array148A are enclosed within theinterior volume206 while theplateaus228 of the signal board are sandwiched between thebase portion236 and thelid portion238.FIG. 13G is a perspective view of a portion theexample QPC102B. Here,lid wall structures210B of thelid portion238 encloseholes242B (or openings) of thelid212B. Theholes242B allow access to respectivemultiple signal connectors138A. In some implementations, thermalization blocks can be introduced in theholes242B to extract heat generated during operation of theQPC102B. In some implementations, thesignal board140A may extend outside the waveguide system, where additional interconnect plateaus may be formed.
• Examples of QPCs fabricated by enclosing2D device arrays148A inelectromagnetic waveguide systems104A that includes a 2D lattice of intersecting waveguides have been described above. In some cases, such QPCs can be operated to solve a multitude of problems, for instance, by performing fault tolerant quantum computation based on algorithms that are optimized or otherwise adapted to operate on two-dimensional qubit arrays. Some algorithms are optimized or otherwise adapted to operate on three-dimensional qubit arrays, and in some cases, QPCs that enclose three-dimensional qubit arrays can be used for quantum computation. For instance, three-dimensional qubit arrays may be useful for performing fault tolerant quantum computation, in some instances, with higher effectiveness than other types of quantum computing systems.
• In some implementations, all or part of the portion of thedevice array148 shown inFIG. 3A can be copied multiple times, as a unit cell, to extend thedevice array148 in space (e.g., in layers parallel to the x-y plane that are distributed along a z-axis of a Cartesian coordinate system or as layers parallel to the x-y plane that intersect layers parallel to the y-z plane). In some cases, such a three-dimensional (3D) device array may allow each qubit device to be independently controlled and measured without introducing crosstalk or errors on other qubit devices in the 3D device array. In some cases, nearest-neighbor pairs of qubit devices in the 3D device array can be addressable with two-qubit gate operations capable of generating entanglement, independent of all other such pairs in the 3D device array. In some instances, the device array may also be extended within the x-y plane to form systems of arbitrarily large number of qubits and couplers within a single modular electromagnetic waveguide system.
• To shield the devices of a 3D device array from each other and from an electromagnetic environment, the 3D device array can be arranged inside an electromagnetic waveguide system104C that includes a 3D lattice of intersecting waveguides.FIG. 14A shows a portion of the interior volume of an example electromagnetic waveguide system104C. In particular,FIG. 14A is a perspective view of a portion of an example electromagnetic waveguide system104C that includes a first set of waveguides i=1, 2, . . . oriented along the x-axis of a Cartesian coordinate system, a second set of waveguides j=1, 2, . . . oriented along the y-axis of the Cartesian coordinate system, and a third set of waveguides k=1, 2, . . . oriented along the z-axis of the Cartesian coordinate system, where the waveguides intersect each other at a 3D array of waveguide intersections202-(i|j|k). As shown inFIG. 14A, the waveguide intersections202-(i|j|k) are separated bywaveguide intervals204.
• In some implementations, by forming such 3D device arrays, large-scale systems of arbitrarily large numbers of qubits and couplers can be produced within a single modular electromagnetic waveguide system for performing large scale fault-tolerant quantum computing and quantum information storage.
• The example3D device array148B may include devices housed at thewaveguide intersections202, in theintervals204 between thewaveguide intersections202, or a combination of these and other locations. For instance, either a qubit device or a coupler device can be placed at thewaveguide intersections202 shown inFIG. 14A. Here, the 3D lattice of intersecting waveguides is geometrically commensurate with the3D device array148B. In the example shown, the3D device array148B is aligned with the 3D lattice of intersecting waveguides such that the nodes of the3D device array148B coincide with the waveguide intersections of the 3D waveguide lattice. In some implementations, qubit devices of the 3D device array are placed inside the electromagnetic waveguide system104C at the waveguide intersections202-(i|j|k) of the 3D lattice of intersecting waveguides, and the coupler devices of the 3D device array are placed inside the electromagnetic waveguide system104C alongintervals204, between intersections202-(i|j|k), of the 3D lattice of intersecting waveguides. In other implementations, the coupler devices of the 3D device array are placed inside the electromagnetic waveguide system104C at intersections202-(i|j|k) of the 3D lattice of intersecting waveguides and the qubit devices of the 3D device array are placed inside the electromagnetic waveguide system104C alongintervals204, between intersections202-(i|j|k), of the 3D lattice of intersecting waveguides.
• FIG. 14B shows a portion of theinterior volume206 of the electromagnetic waveguide system104C near an example waveguide intersection202-(i|j|k). In the portion shown inFIG. 14B, theinterior volume206 of the electromagnetic waveguide system104C is enclosed by three waveguides that intersect at the waveguide intersection202-(i|j|k), such that a first of the three waveguides has two intervals204-xalong the x-axis, a second of the three waveguides has two intervals204-yalong the y-axis, and a third of the three waveguides has two intervals204-zalong the z-axis.
• In the example shown inFIG. 14B, theintervals204 of the 3D lattice of intersecting waveguides have rectangular cross-sections. In the example shown, the largest dimension of the two-dimensional rectangular cross-section (in this example the width) determines a cutoff frequency fc. In this manner, signals having frequencies above the cutoff frequency (f>fc) can propagate through the waveguide, while signals having frequencies below the cutoff frequency (f<fc) evanesce in the waveguide. For this reason, signals having frequencies below the cutoff frequency (f<fc) that are injected into the waveguide (e.g., through an aperture located at or near a waveguide intersection202-(i|j|k)) will be attenuated (e.g., exponentially) inside the waveguide from the aperture.
• In the example shown inFIG. 14, the shading around the waveguide intersection202-(i|j|k) represents the spatial distribution of the electromagnetic field strength for electromagnetic waves introduced into the interior volume of theexample waveguide system104B at the intersection202-(i|j|k). In the example shown, the electromagnetic waves are introduced below the cutoff frequency (fc). The shading inFIG. 14 shows that the electromagnetic waves are evanesced, and the electromagnetic field strength drops to essentially zero within a short distance of the waveguide intersection202-(i|j|k).
• In the example shown inFIG. 14, for aninterval204 of the waveguide with rectangular cross-section having a width of 0.5 cm and a height of 0.3 cm, the cutoff frequency is approximately 30 GHz (fc≈30 GHz). Additionally, in the example shown, a largest diagonal cross-section of the waveguide intersection202-(i|j|k) of three intersecting waveguides has a transverse dimension that defines a minimum frequency fmin, which is less than the cutoff frequency fc of the interval204 (i.e., fmin<fc). In the example shown inFIG. 14B, where the rectangular cross-section has a width of 0.5 cm and a height of 0.3 cm, the minimum frequency fmin corresponding to the diagonal cross-section of the waveguide intersection202-(i|j|k) is fmin 25.7 GHz.
• In some instances, signals having frequencies below the minimum frequency (f<fmin) that are injected into theelectromagnetic waveguide system104A through apertures located at waveguide intersections, e.g.,202-(i|j|k),202-(i|j−1|k) and202-(i-1|j|k), remain localized at the intersections where they are injected. In this manner, the 3D lattice of intersecting waveguides can provide high (e.g., exponential) electromagnetic isolation between an array site (i|j|k) and its six nearest-neighbor array sites (i−1|j|k), (i|j−1|k), (i|j|k−1), etc. Moreover, individual qubit devices in the 3D device array can be shielded and isolated, such that they only interact with other qubit devices when selectively coupled to nearest-neighbors by the coupler devices; and all qubit devices can be isolated from the external electromagnetic environment. In some cases, the isolation of the qubit devices can be provided independent of the number of intersections202-(i|j|k) of the 3D lattice of intersecting waveguides and independent of the number and the length ofintervals204 of the 3D lattice of intersecting waveguides. Additionally, apertures formed in the walls of the lattice of intersecting waveguides can provide ports to inject or extract (or both) electromagnetic signals for control or measurement (or both).
• FIG. 15 is a perspective view of an example electromagnetic waveguide system104C that defines a 3D lattice of intersecting waveguides, which can be used in aQPC102C. In this example, the three-dimensional device array and other components in theQPC102C can be formed by or adapted from an interpenetrated arrangement of multiple two-dimensional QPCs102B. In the example illustrated inFIG. 15, theQPC102C includes a first set of two-dimensional systems202B-(x-y) that are oriented parallel to a plane (x-y) of a Cartesian coordinate system, and a second set of two-dimensional systems202B-(y-z) that are oriented parallel to a plane (y-z) of the Cartesian coordinate system. Here, the two-dimensional systems202B-(y-z) intersect the two-dimensional systems202B-(x-y) along rows in the (x-y) plane, and the two-dimensional systems202B-(x-y) intersect the two-dimensional systems202B-(y-z) along layers in the (y-z) plane. In this manner, the example arrangement illustrated inFIG. 15 forms the 3D array of intersections202-(i|j|k) shown inFIG. 14A. The electromagnetic waveguide system104C formed in this manner can house a 3D device array that includesqubit devices144 andcoupler devices142 as part of anexample QPC102C. For example, in some instances, theexample QPC102C can be used to perform fault tolerant quantum computation or quantum information storage based on algorithms and protocols optimized to work on three-dimensional qubit arrays.
• Examples ofQPCs102B and102C fabricated by enclosing multidimensional device arrays in anelectromagnetic waveguide system104 that includes a commensurate lattice of intersecting waveguides have been described above. Techniques for delivering control signals to a QPC, for example, by an inputsignal processing system128, and for retrieving readout signals from a QPC, for example, by an outputsignal processing system130, are described below.
• FIGS. 16A-16F show aspects of anexample system252 that includes a QPC assembly with an electromagnetic waveguide system. The components of theexample system252 shown in the figures also includes a portion of an example output signal processing subsystem.FIG. 16A is a top cross-sectional view of the example QPC assembly at Z=0.FIG. 16B is a side cross-sectional view of the example QPC assembly at Y=0 and Y=±4.FIG. 16C is a top cross-sectional view of the example QPC assembly at Z=+1.FIG. 16D is a top cross-sectional view of the example QPC assembly at Z=−1;FIG. 16E is a side cross-sectional view of the example QPC assembly at Y=±1 and Y=±3.FIG. 16E is a side cross-sectional view of the example QPC assembly at Y=±2. In some instances, the examples structures shown inFIGS. 16A-16F can be adapted to create three-dimensional electromagnetic waveguide systems and three-dimensional device arrays.
• The example waveguide system shown inFIGS. 16A-16F includes a 2D lattice of intersecting waveguides, with a portion of an output signal processing subsystem. Thesystem252 includes a 2D device array ofqubit devices144C andcoupler devices142C arranged inside the 2D lattice of intersecting waveguides. In this example, the 2D device array is located in the (x-y) plane of a Cartesian coordinate system. As shown inFIG. 16A, each of thequbit devices144C of the 2D device array has adedicated readout device146C. As shown inFIGS. 16A and 16E, thereadout devices146C are arranged in a 2D readout array located in a plane that is parallel to and spaced apart along the z-axis from the plane of the 2D device array.
• As shown inFIGS. 16E and 16F, the output signal processing subsystem that is part of theexample system252 can includeamplifier circuits256 configured to amplify qubit readout signals produced by thereadout devices146C. In some implementations, theamplifier circuits256 are implemented as parametric amplifiers. A parametric amplifier can be configured to amplify an input signal when the amplifier is supplied with an electromagnetic pump signal. When theamplifier circuits256 may be implemented as parametric amplifiers, the output signal processing subsystem may also includepump circuits258 coupled to respective amplifier circuits. In theexample system252, theamplifier circuits256 can be implemented as parametric amplifier devices. Further, thepump circuits258 used to drive theparametric amplifier devices256 can be implemented as pump devices.
• In theexample system252, thequbit devices144C andcoupler devices142C of the 2D device array are mechanically supported by areceptacle board254. Thereceptacle board254 can be a silicon wafer, a sapphire wafer or can be formed from other non-conductive materials. Thereceptacle board254 includes qubit receptacles232A and coupler receptacles234A. Each of the qubit receptacles232A can be formed as a slot in thereceptacle board254 that is sized to receive aqubit device144C. In this example, the qubit receptacles232A are arranged on thereceptacle board254 at nodes of a 2D array, such that when held in the qubit receptacles, thequbit devices144C form the nodes of the 2D device array. Moreover, each of the coupler receptacles234A can be formed as a slot in thereceptacle board254 that is sized to receive acoupler device142C. In this example, the coupler receptacles234A are arranged on thereceptacle board254 between the nodes of a 2D array, such that when held in the coupler receptacles, thecoupler devices142C form the bonds of the 2D device array. Areas of thereceptacle board254 located between the coupler receptacles234A are referred to asplateaus228A of the receptacle board. Theplateaus228A may include conductive or superconductive vias, e.g., oriented orthogonal to the (x-y) plane, to create conductive paths between opposing outer surfaces of thereceptacle board254 at the locations of theplateaus228A.
• As shown inFIG. 16B, thebase208B supports thereceptacle board254, which in turn supports the 2D device array. Thereceptacle board254 is sandwiched between the base208B and aflange255. Theflange255 includesflange wall structures210C. Theflange wall structures210C have mating surfaces that can mate and form an electrical, mechanical or thermal contact with theplateaus228A of thereceptacle board254 and side surfaces orthogonal to the mating surfaces.FIG. 16C is a cross-section parallel to the (x-y) plane of theflange255. The combination ofFIGS. 16B-16C shows that the side surfaces of theflange wall structures210C form walls that enclose aninterior volume206 of the electromagnetic waveguide system. Moreover, the combination ofFIGS. 16A-16C shows that the 2D lattice of intersecting waveguides defined by the side surfaces of theflange wall structures210C is commensurate with the 2D device array supported by thereceptacle board254. In theexample system252, thequbit devices144C are arranged at intersections of the 2D lattice of intersecting waveguides and thecoupler devices142C are arranged on intervals (between the intersections) of the 2D lattice of intersecting waveguides.
• The cross-section of theexample system252 in the (x-z) plane, as shown inFIG. 16B, represents a slice of theexample system252 that crosses through intervals of the 2D lattice of intersecting waveguides andcoupler devices142C housed therein. In the example shown, coupler signal lines configured to deliver coupler control signals tocoupler devices142C are DC-coupled (e.g., by mutual inductive coupling or by direct current coupling) to couplercontrol input ports154A.FIG. 16D is a cross-section parallel to the (x-y) plane of thebase208B.FIG. 16D shows that thebase208B has coupler apertures arranged to allow for the coupler signal lines to reach the couplercontrol input ports154A from an input signal processing system.
• The cross-sectional view shown inFIG. 16E crosses through a waveguide oriented in the y-direction and shows a row of waveguide intersections and intervals. In this manner, this slice also crosses through thequbit devices144C hosted at the waveguide intersections and thecoupler devices142C hosted inside the waveguide intervals. Along the view of theexample system252 shown inFIG. 16E, theinterior volume206 is enclosed between theflange255 and thebase208B. In the example shown, qubit signal lines configured to deliver qubit control signals to qubitdevices144C are AC-coupled through a coupling capacitance to qubitcontrol ports156A. As shown inFIG. 16D, thebase208B has qubit apertures arranged to allow for the qubit signal lines to reach thequbit control ports156A from the input signal processing system.
• FIGS. 16B and 16E show that theexample system252 also includes alid portion212B positioned such that theflange255 is sandwiched between thereceptacle board254 and thelid portion212B. Thelid portion212B includes readout receptacles to holdreadout devices146C adjacent to an interface between the lid portion and the flange. Readout control signal lines configured to deliver readout control signals toreadout devices146C can be AC-coupled toreadout control ports156B. Thelid portion212B has readout control apertures arranged to allow for the readout control signal lines to reach thereadout control ports156B from the input signal processing system.
• In the example shown, the readout receptacles form a 2D array that aligns with the 2D array of qubit receptacles232A on thereceptacle board254. Moreover, theflange255 has a 2D array of readout apertures aligned to both the 2D array of readout receptacles on thelid portion212B and the 2D array of qubit receptacles on thereceptacle board254. In this manner, each of thereadout devices146C can be capacitively coupled, through a respective readout aperture, with arespective qubit device144C to enable the state of the respective qubit device to be probed. A qubit readout signal that carries information about aqubit device144C can be output by its associatedreadout device146C at a readout output port. The readout output port is coupled with one of theamplifier circuits256 of theexample system252. As shown inFIG. 16A, theexample amplifier circuit256 is laterally displaced in the x-y plane from a location of thereadout device146C, and theamplifier circuit256 is represented with a dashed line inFIG. 16E.
• The example cross-section shown inFIG. 16F crosses through intervals of the 2D lattice of intersecting waveguides andcoupler devices142C housed therein. The example cross-section shown inFIG. 16F also crosses throughparametric amplifier devices256 andpump devices258 stacked aboveplateaus228A of thereceptacle board254.
• As shown inFIG. 16F, theexample flange255 includes amplifier receptacles to hold theparametric amplifier devices256. In this manner, when thelid portion212B is mated with theflange255, theparametric amplifier devices256 are held adjacent to an interface between theflange255 and thelid portion212B. The amplifier receptacles form a 2D array with nodes located above theplateaus228A of thereceptacle board254. In this manner, each of theparametric amplifier devices256, when held in an amplifier receptacle, is operably coupled to four nearest-neighbor readout devices146C. Further, thelid portion212B includes pump receptacles to hold thepump devices258 in a plane of thelid portion212B parallel to the (x-y) plane between the 2D array of readout receptacles and the lid portion's outer surface. Moreover, the pump receptacles form a 2D array on thelid portion212B that aligns with a 2D array of amplifier receptacles on theflange255.
• Readout signals received by each of theparametric amplifier devices256 from respective readout output ports of its four nearest-neighbor readout devices146C can be amplified concurrently or sequentially by integrating a multiplexing function as part of each of theparametric amplifier devices256. In some implementations, theparametric amplifier device256 can use frequency multiplexing to concurrently amplify the received readout signals, because frequencies of readout signals from the four nearest-neighbors of aparametric amplifier device256 are different from each other (e.g., as described below in connection withFIGS. 23A, 26 and others). In other implementations, theparametric amplifier device256 can use time multiplexing to sequentially amplify the received readout signals. In some implementations, an amplifier with operational bandwidth including the frequency of all associated readout signals can be used.
• In some implementations, components of a QPC (e.g., a lid portion, a base portion, a flange, etc.) are configured to accommodate devices that can process (e.g., amplify) readout signals immediately outside the interior volume of the electromagnetic waveguide system. Such configurations may, in some cases, result in significant reduction of the overall noise temperature of the amplification process due to elimination of noise that would be caused by transporting “raw” (unprocessed) readout signals for processing by an output signal processing subsystem located remotely from the QPC. Other example techniques described below combine the beneficial aspect of processing readout signals in close proximity to a QPC having another structure (e.g., the structures shown inFIG. 9, 11A, 13F, or other QPC structures).
• FIGS. 17A-17B show aspects of an example quantum computing system that includes a signal delivery subsystem and an electromagnetic waveguide system.FIG. 17A is a schematic diagram showing an example signal flow in thesystem260, andFIG. 17B is a perspective view showing aspects of components represented schematically inFIG. 17A. As shown inFIGS. 17A and 17B, the signal flow can be performed by asignal delivery system106B in connection with theexample QPC102B, which includes anelectromagnetic waveguide system104B that defines a 2D lattice of intersecting waveguides. The signal flow shown inFIG. 17A may be adapted for use with other types of systems.
• Theexample system260 operates in a cryogenic temperature regime, for example, at low operational temperatures T_op (e.g., T_op being less than 60K, 3K, 800 mK, 150 mK, 10 mK) and under conditions that are subject to very low electromagnetic and thermal noise. Such operational conditions can be achieved in aQPC environment101, as described above in connection withFIG. 2. In some instances, theexample system260 can receive control signals (e.g., write and read signals) through input controlsystem connector hardware126A from asignal generator system120 that is operated under an ambient environment (e.g., at higher operational temperatures, e.g., T_op>240K). In some instances, theexample system260 can transmit pre-processed or processed readout signals through output controlsystem connector hardware126B to asignal processor system124.
• In the example shown, thesignal delivery system106B includes an inputsignal processing system128A and an outputsignal processing system130A. The inputsignal processing system128A is configured to receive and either pre-process or process control signals delivered by thesignal generator system120 through the input controlsystem connector hardware126A. The control signals can be delivered by the inputsignal processing system128A to theQPC102B through QPCinput connector hardware136B. In some implementations, some of the incoming signals may be routed horizontally within thesignal board140A (e.g., in both the left and right directions, or other directions within the plane of thesignal board140A).
• In some instances, incoming signals (e.g., readout control signals) cause thequantum processor cell102B to produce output signals that are routed to the outputsignal processing system130A; some incoming signals (e.g., coupler control signals, qubit control signals) do not cause thequantum processor cell102B to produce output signals that are routed to the outputsignal processing system130A. In some instances, readout signals from readout devices inside theQPC102B are delivered by theQPC102B to the outputsignal processing system130A through QPCoutput connector hardware138B. The outputsignal processing system130A is configured to either pre-process or process the readout signals and to deliver the readout signals to thesignal processor system124.
• In theexample system260, theexample QPC102B includes a2D device array148A supported inside aninterior volume206 of theelectromagnetic waveguide system104B by asignal board140A, as shown, for example, inFIGS. 9, 11A, and 13C-13E. The exampleelectromagnetic waveguide system104B includes holes (e.g.,242A) in a base portion (e.g.,236) adjacent to input plateaus (e.g., some of plateaus228) of thesignal board140A, and at least a portion of the plateaus are located outside theinterior volume206 of theelectromagnetic waveguide system104B. The holes of the base portion can house, outside theinterior volume206 of theelectromagnetic waveguide system104B, QPCinput connector hardware136B. In the example illustrated inFIG. 17B, the QPCinput connector hardware136B includes an array of inputvertical interconnects136B, where each of the input vertical interconnects has an input end and an opposing, output end, and is formed from multiple wires directed from the input end to the output end. In theexample system260, a respective inputvertical interconnect136B is disposed in each hole of the base portion of theelectromagnetic waveguide system104B, such that the input end of the inputvertical interconnect136B is coupled with the inputsignal processing system128A and the output end of the inputvertical interconnect136B is coupled with an input connection junction (e.g., some of connection junction251) at a respective input plateau of thesignal board140A.
• Similarly, the exampleelectromagnetic waveguide system104B includes holes (e.g.,242B) in a lid portion (e.g.,238) distributed adjacent to output plateaus (e.g., other plateaus228) of thesignal board140A, and at least a portion of the plateaus are located outside of theinterior volume206 of theelectromagnetic waveguide system104B. The holes of the lid portion can house, outside theinterior volume206 of theelectromagnetic waveguide system104B, QPCoutput connector hardware138B. In the example illustrated inFIG. 17B, the QPCoutput connector hardware138B includes another array of outputvertical interconnects138B, where each of the output vertical interconnects has an input end and an opposing, output end, and is formed from multiple wires or conductive paths directed from the input end to the output end. In theexample system260, a respective outputvertical interconnect138B is inserted in each hole of the lid portion of theelectromagnetic waveguide system104B, such that the input end of the outputvertical interconnect138B is coupled with an output connection junction (e.g., other connection junctions251) at a respective output plateau of thesignal board140A and the output end of the outputvertical interconnect138B is coupled with the outputsignal processing system130A. A number of wires of an inputvertical interconnect136B can be the same as or different from a number of wires of an outputvertical interconnect138B. Also, a type of the wires (material, thickness, etc.) of the inputvertical interconnect136B can be the same as or different from a type of the wires of the outputvertical interconnect138B. Wires or conductive paths may be formed, for example, by vias, by interconnect pins, an interposer board, or other structures.
• FIGS. 18A-18C show examples of input and output connector hardware for theexample QPC102B.FIG. 18A is a perspective view of theexample base portion236A that includesvertical interconnects136B, andFIG. 18B is a perspective view showing thelid portion238A that includesvertical interconnects138B.FIG. 18C shows a perspective view of internal components of the example electromagnetic waveguide system shown inFIG. 18B.
• In the example shown inFIG. 18A, the inputvertical interconnects136B reside in the holes (e.g.,242A) formed bybase wall structures210A of thebase portion236A of theelectromagnetic waveguide system104B. In some instances, the inputvertical interconnects136B may be installed in thebase portion236A, for example, between operations250-1 and250-2 of theexample process250 shown inFIGS. 13A-13G. The inputvertical interconnects136B may be installed in another manner or at other points in an assembly process. The inputvertical interconnects136B can mate with (e.g., contact) input plateaus228B of theexample signal board140A. In some cases, holes of the remainingbase wall structures210A′ of thebase portion236A that will be mated withoutput plateaus228C of theexample signal board140A may be plugged or covered with base plugs266.
• As shown in the example shown inFIG. 18B, the outputvertical interconnects138B are installed in thelid portion238A. For instance, outputvertical interconnects138B may be installed in a manner that is analogous to the installation of the input vertical interconnects described above. In some cases, the outputvertical interconnects138B may be installed in thelid portion238A, for example, between or during a combination of operations250-5 and250-6 of theexample process250 shown inFIGS. 13A-13G. The outputvertical interconnects138B may be installed in another manner or at other points in an assembly process.
• In the perspective view shown inFIG. 18C, portions of theQPC102B fromFIG. 18B are hidden from view; in particular, portions located above a slice that crosses thelid portion238A and the inputvertical interconnects136B are hidden from view. As demonstrated byFIGS. 18B and 18C, the example2D device array148A is supported by theexample signal board140A, and thesignal board140A is sandwiched between thebase portion236A and thelid portion238A of theelectromagnetic waveguide system104B. The outputvertical interconnects138B reside in holes (e.g.,242B) formed by lid wall structures (e.g.,210B) of thelid portion238A. The outputvertical interconnects138B can mate with (e.g., contact) output plateaus228C of theexample signal board140A. In some cases, holes of the remaining lid wall structures of thelid portion238A that are mated with input plateaus228B of theexample signal board140A can be plugged or covered with lid plugs268.
• In some instances, aspects of the signal flow illustrated inFIG. 17A can be performed by components shown inFIGS. 18A-18C. For example, control signals can be delivered from the inputsignal processing system128 through the inputvertical interconnects136B to connection input junctions on the input plateaus228B of theexample signal board140A. From the input junctions, the control signals can be communicated into theelectromagnetic waveguide system104B and routed (e.g., horizontally) through signal lines225 (e.g.,qubit signal lines225A orcoupler signal lines225B) of thesignal board140A to target qubit devices or coupler devices of the2D device array148A. In some instances, the readout devices (which may be respectively collocated with the qubit devices of the2D device array148A) produce qubit readout signals by reflecting or otherwise modulating a readout control signal received from the input signal processing system. The qubit readout signals can be routed (e.g., horizontally) from the readout devices through signal lines225 (e.g., readout signal lines) of theexample signal board104A to the exterior of theelectromagnetic waveguide system104B. In particular, the qubit readout signals can be routed to connection output junctions on the output plateaus228C of thesignal board140A. From the connection output junctions, the qubit readout signals can be delivered to the outputsignal processing system130A through the outputvertical interconnects138B.
• FIG. 19 shows an examplesignal routing arrangement262 for the example2D device array148A shown inFIGS. 18A-18C. Theexample routing arrangement262 can be repeated in space to accommodate larger device arrays. For example, the attributes of theexample routing arrangement262 can be adapted for arrays that include tens or hundreds of qubit devices organized in N rows and M columns (e.g., where N and M can be equal or unequal), and coupler devices at the bonds between the qubit device. For instance, theexample routing arrangement262 can be used in a two-dimensional device array where N=M=4, 16, 32, 64, etc. In this manner, the example shown inFIG. 19 can be extended to implement QPCs of arbitrarily large size, for example, for general purpose quantum computing and quantum information storage.
• In theexample routing arrangement262 shown inFIG. 19, eachqubit input plateau228B-q includes fourqubit control ports156A. Each of thequbit control ports156A on aqubit input plateau228B-q is connected (e.g., by a signal line) to a respective one of the fouradjacent qubit devices144. The fourqubit control ports156A on aqubit input plateau228B-q can contact a qubit inputvertical interconnect136B-q associated with thequbit input plateau228B-q.
• In theexample routing arrangement262 shown inFIG. 19, eachoutput plateau228C includes fourreadout control ports156B. Each of thereadout control ports156B on anoutput plateau228C is connected (e.g., by a signal line) to a respective one of the fouradjacent qubit devices144. The readoutqubit control ports156B on anoutput plateau228C can contact an outputvertical interconnect138B associated with theoutput plateau228C. In some examples, the signal board includes equal numbers of input plateaus228B-q and output plateaus228C.
• In theexample routing arrangement262 shown inFIG. 19, eachcoupler input plateau228B-c includes fourcoupler control ports154A. Each of thecoupler control ports154A on acoupler input plateau228B-c is connected (e.g., by a signal line) to a respective one of the fouradjacent coupler devices142. The fourcoupler control ports154A on acoupler input plateau228B-c can contact a coupler inputvertical interconnect136B-c associated with thecoupler input plateau228B-c. In some examples, the signal board includes a number of coupler input plateaus228B-c that is greater than (e.g., twice) the number of input plateaus228B-q or output plateaus228C.
• In the example shown inFIG. 19, rows of alternating qubit input plateaus228B-q and coupler input plateaus228B-c alternate with rows of alternatingoutput plateaus228C and coupler input plateaus228B-c. Similarly, columns of alternating qubit input plateaus228B-q and coupler input plateaus228B-c alternate with columns of alternatingoutput plateaus228C and coupler input plateaus228B-c. Thus, there are a greater number of inputvertical interconnects136B than outputvertical interconnects138B. And, among the inputvertical interconnects136B, there are a larger number of coupler inputvertical interconnects136B-c than qubit inputvertical interconnects136B-q.
• In some implementations, groups of inputprocessing hardware components132 of the inputsignal processing system128A can be spatially distributed (e.g., relative to theQPC102B) in a manner that shortens (reduces the physical length of) or minimizes the signal paths that communicate between the input processing hardware components and the devices in theQPC102B (e.g.,qubit devices144A andcoupler devices142A). Similarly, groups of outputprocessing hardware components134 of the outputsignal processing system130A can be spatially distributed (e.g., relative to theQPC102B) in a manner that shortens (reduces the physical length of) or minimizes the signal paths that communicate between the output processing hardware components and the devices in theQPC102B (e.g., readout devices). Examples of input and output signal processing systems that include such groups of input or output processing hardware are described below.
• FIG. 20A is a side view of anexample system260A that includes theexample QPC102B, a modular inputsignal processing system128B and a modular outputsignal processing system130B. In the example shown, the modular inputsignal processing system128B is communicably coupled (e.g., by signal lines) with asignal generator system120 through inputcontrol system connectors126C, and is communicably coupled with theQPC102B through QPCinput connector hardware136. Also, the modular outputsignal processing system130B is communicably coupled with theQPC102B through QPCoutput connector hardware138, and is communicably coupled with a signal processor system124 (e.g., by signal lines) through outputcontrol system connectors126D.
• As described above in connection withFIGS. 17A-17B, 18A-18C and 19, the example QPCinput connector hardware136 includes an array of inputvertical interconnects136B configured to connect with input plateaus of anexample signal board140A of theQPC102B. In the example shown inFIG. 20A, the QPCinput connector hardware136 includes, in addition to the array of inputvertical interconnects136B, aninput interconnect plate135.FIG. 20B shows an exampleinput interconnect plate135 having connectors patterned to match the array of inputvertical interconnects136B. Referring again toFIG. 20A, the exampleinput interconnect plate135 is sandwiched between theQPC102B and the modular inputsignal processing system128B. In this manner, the exampleinput interconnect plate135 can couple horizontal control signal lines of the modular inputsignal processing system128B to vertical wires of the inputvertical interconnects136B.
• Also as described above, the QPCoutput connector hardware138 includes an array of outputvertical interconnects138B configured to connect with output plateaus of theexample signal board140A. In the example shown inFIG. 20A, the QPC output connector hardware includes, in addition to the array of outputvertical interconnects138B, anoutput interconnect plate139.FIG. 20C shows an exampleoutput interconnect plate139 having connectors patterned to match the array of outputvertical interconnects138B. Referring again toFIG. 20A, the exampleoutput interconnect plate139 is sandwiched between theQPC102B and the modular outputsignal processing system130B. In this manner, the exampleoutput interconnect plate139 can couple vertical wires of the outputvertical interconnects138B to horizontal signal lines of the modular outputsignal processing system130B.
• FIG. 20D is a perspective view of the example modular inputsignal processing system128B. The modular inputsignal processing system128B can include M input modules, where each input module268-k(k=1 M) includes a respective subset of inputcontrol system connectors126C andinput processing hardware132A. Each input module268-kis configured to deliver control signals to qubit devices and coupler devices arranged in a k^thsection of the2D device array148A of theQPC102B. In some implementations, the sections are defined based on a number of rows in each section. For example, each section may include N/M rows, where N is the total number of rows of the2D device array148A. In other implementations, the sections are defined based on a number of columns in each section. For example, each section may include N/M columns, where N is the total number of columns of the2D device array148A. In some other implementations, the sections are defined based on other schemes. In the example illustrated inFIG. 20D, each quadrant of the 2D device array can be a section that is controlled by a respective input module268-k. The sections of a device array may be arranged in another manner.
• In some implementations, the input modules268-kof the example modular inputsignal processing system128B each include input processing cards housed on aninput processing board270A. The exampleinput processing board270A can include receptacle slots that support the input processing cards, and allow the input processing cards to be removed or exchanged for other components. Here, each of the receptacle slots that supports a respective input processing card is located on theinput processing board270A adjacent to the corresponding section of theQPC102B. In the exampleinput processing board270A shown inFIG. 20D, the input processing cards in the input module268-kare located on theinput processing board270A adjacent to the k^thquadrant of theQPC102B. Signal lines that carry control signals for respective qubit devices or coupler devices arranged in the k^thsection of theQPC102B are routed from the receptacle slot that supports the input processing cards in the input module268-kto an adjacent k^thportion of theinput interconnect plate135. The signal lines and processing cards can be arranged in an efficient manner, for example, in a manner that reduces or minimizes a length of the signal lines in theinput processing board270A.
• In some implementations, the input modules268-kof the example modular inputsignal processing system128B are formed on respective input processing board sections of theinput processing board270A. In such cases, each of the input processing board sections is located on theinput processing board270A adjacent to the k^thsection of theQPC102B. In the exampleinput processing board270A shown inFIG. 20D, the input processing board section for the input module268-kis located on theinput processing board270A adjacent to the k^thquadrant of theQPC102B.
• In the example modular inputsignal processing system128B, theinput processing hardware132A of each input module268-kcan include one or more de-multiplexer circuits. In some implementations, the received control signals targeted for a subgroup of qubit devices or coupler devices of the k^thquadrant are multiplexed together. In some implementations, the received control signals targeted for a subgroup of qubit devices and coupler devices arranged in the k^thquadrant are multiplexed on a single input channel. In some implementations, write signals and read signals targeted for a qubit device arranged in the k^thquadrant are multiplexed on a single input channel. The de-multiplexer circuits of the input module268-kcan be configured to separate the multiplexed control signals, for example, device-by-device.
• The exampleinput processing hardware132A of each input module268-kcan include bias processing circuits. The bias processing circuits of the input module268-kare configured to combine AC control signals with DC bias control signals targeted for a coupler device of the k^thquadrant. These and otherinput processing hardware132A of each input module268-kof the example modular inputsignal processing system128B are described in more detail below in connection withFIG. 23A and others.
• Furthermore, the subset of inputcontrol system connectors126C of each input module268-kis configured to receive, from thesignal generator system120, the above-noted multiplexed control signals for qubit devices and coupler devices of the k^thquadrant of the2D device array148A. The multiplexed signals can be delivered from the subset of inputcontrol system connectors126C of input module268-kto theinput processing hardware132A thereof through signal lines routed on or through theinput processing board270A.
• FIG. 20E is a perspective view of the example modular outputsignal processing system130B. The modular outputsignal processing system130B can include M output modules, where each output module272-k(k=1 M) includes a respective subset of outputcontrol system connectors126D andoutput processing hardware134A. Each output module272-kis configured to receive readout signals from readout devices collocated with qubit devices arranged in a k^thsection of the2D device array148A of theQPC102B. The sections of the2D device array148A can be allocated in the same manner as the sections are allocated for control signal management, or in a different manner. In the example illustrated inFIG. 20E, each quadrant of the 2D device array can be a section that sends readout signals to a respective output module272-k.
• In some implementations, the output modules272-kof the example modular outputsignal processing system130B each include output processing cards housed on anoutput processing board270B. The exampleoutput processing board270B can include receptacle slots that support the output processing cards, and allow the output processing cards to be removed or exchanged for other components. Here, each of the receptacle slots that supports a respective output processing card is located on theoutput processing board270B adjacent to the corresponding section of theQPC102B. In the exampleoutput processing board270B shown inFIG. 20E, the output processing cards in the output module272-kare located on theoutput processing board270B adjacent to the k^thquadrant of theQPC102B. Signal lines that carry readout signals from readout devices in the k^thsection are routed from the receptacle slot that supports the output processing card272-kto adjacent k^thportion of theoutput interconnect plate139. The signal lines and processing cards can be arranged in an efficient manner, for example, in a manner that reduces or minimizes a length of the signal lines in theoutput processing board270B.
• In some implementations, the output modules of the example modular outputsignal processing system130B are formed on respective output processing board sections of anoutput processing board270B. In such cases, each of the output processing board sections can be located on theoutput processing board270B adjacent to the k^thsection of theQPC102B. In the exampleoutput processing board270B shown inFIG. 20E, the output processing board section for the output module272-kis located on theoutput processing board270B adjacent to the k^thquadrant of theQPC102B.
• In the example modular outputsignal processing system130B, theoutput processing hardware134A of each output module272-kcan include isolator circuits. When p is the number of qubit devices arranged in the k^thsection of theQPC102B associated with the output module272-k, the isolator circuits of the output module272-kcan be configured to isolate respective p readout signals received from readout devices arranged in the k^thsection.
• The exampleoutput processing hardware134A of each output module272-kcan include parametric amplifier circuits and their respective pump or driver circuits. The parametric amplifier circuits can be configured to amplify, in conjunction with the pump circuits, the isolated p readout signals. In this manner, the readout signals received from readout devices arranged in the k^thsection can be amplified at a location adjacent to the k^thsection of theQPC102B where the readout signals were generated. Amplifying or otherwise processing readout signals near theQPC102B can reduce noise, e.g., transmission line noise or other environmental noise sources.
• The exampleoutput processing hardware134A of each output module272-kcan include one or more multiplexer circuits. The multiplexer circuits of the output module272-kcan be configured to combine the p amplified readout signals corresponding to the p qubit devices of the k^thsection into a k^thmodulated readout signal associated with the k^thsection. These and otheroutput processing hardware134A of each output module272-kof the example modular outputsignal processing system130B are described in more detail below in connection withFIG. 23A and others. Other configurations of the processing cards can be used in an output signal processing system or an input signal processing system.
• Additionally, the subset of outputcontrol system connectors126D of each output module272-kcan be configured to receive, from the multiplexer circuits of output module272-k, the k^thmultiplexed readout signal. The k^thmultiplexed readout signal can be delivered from the multiplexer circuits of output module272-kto its subset of outputcontrol system connectors126D through a signal line routed on or through theoutput processing board270B. The k^thmultiplexed readout signal can be extracted from the example modular outputsignal processing system130B at the subset of outputcontrol system connectors126D for the output module272-k. The extracted multiplexed readout signal can be delivered to asignal processing system124.
• FIGS. 21A-21C are diagrams showing example operating frequencies for devices in a quantum processor cell. In some instances, the operating frequencies and other attributes shown and described with respect toFIGS. 21A-21C can implemented by the examplequantum processor cells102A,102B,102C described above, or another type of quantum processor cell.FIG. 21A shows afrequency spectrum plot2100 that indicates example operating frequencies of qubit devices and readout devices. As shown inFIG. 21A, thefrequency spectrum plot2100 includes frequencies ranging from 3.2 GHz to 4.1 GHz. The example operating frequencies and other attributes shown inFIG. 21A can be adapted to other frequency bands or scaled to other frequency units, for example, for use with devices or systems operating in other frequency ranges.
• The examplefrequency spectrum plot2100 inFIG. 21A indicates five distinct qubit operating frequencies and five distinct readout frequencies. In some cases, another number of qubit operating frequencies and readout frequencies can be used. For example,FIGS. 22A-C show an example where six qubit operating frequencies and six readout frequencies are used.
• In the example shown inFIG. 21A, a firstqubit operating frequency2101A and afirst readout frequency2102A are within a first frequency band at 3.2 GHz, and the firstqubit operating frequency2101A is less than thefirst readout frequency2102A; a secondqubit operating frequency2101B and asecond readout frequency2102B are within a second frequency band at 3.6 GHz, and the secondqubit operating frequency2101B is less than thesecond readout frequency2102B; a thirdqubit operating frequency2101C and athird readout frequency2102C are within a third frequency band at 3.8 GHz, and the thirdqubit operating frequency2101C is less than thethird readout frequency2102C; a fourthqubit operating frequency2101D and afourth readout frequency2102D are within a fourth frequency band at 3.9 GHz, and the fourthqubit operating frequency2101D is less than thefourth readout frequency2102D; a fifthqubit operating frequency2101E and a fifth readout frequency2102E are within a fifth frequency band at 4.1 GHz, and the fifthqubit operating frequency2101E is less than the fifth readout frequency2102E. Each of the respective frequency bands is separate and distinct from the other frequency bands, so that there is no overlap between any two frequency bands indicated in thefrequency spectrum plot2100.
• In the example shown, the respective readout frequencies are interleaved with the qubit operating frequencies in thefrequency spectrum plot2100. For example, progressing from the low end to the high end of the frequency spectrum, the qubit operating frequencies alternate with the readout frequencies. In some instances, the qubit operating frequency and the readout frequency within each frequency band can be interchanged or otherwise modified (increased or decreased), such that the qubit operating frequency may be higher than the readout frequency within one or more of the frequency bands. In some implementations, the qubit operating frequencies are not interleaved with the readout frequencies; for example, the qubit operating frequencies can be grouped in one frequency band, and the readout frequencies can be grouped in a separate, distinct frequency band.
• As shown inFIG. 21A, the frequency bands are spaced apart from each other by intervals in thefrequency spectrum2100. The intervals between the neighboring pairs of frequency bands vary. For example, the interval between the first frequency band and the second frequency band is 0.4 GHz, and the interval between the second frequency band and the third frequency band is 0.2 GHz. Thus, the second frequency band is spaced apart from one of its nearest-neighbor frequency bands by a first interval (0.4 GHz), and the second frequency band is spaced apart from its other nearest-neighbor frequency band by a second, distinct interval (0.2 GHz). Some of the intervals between nearest-neighbor frequency bands are equal. For example, the spacing between the second frequency band and the third frequency band is 0.2 GHz, and the spacing between the fourth frequency band at the fifth frequency band is also 0.2 GHz. Thus, the intervals shown in thefrequency spectrum plot2100 can be sorted into subsets of equal intervals (where the intervals that form each subset are equal to each other, and intervals that are in distinct subsets are unequal).
• FIG. 21B shows a frequency difference plot that indicates differences between the operating frequencies shown inFIG. 21A, and frequency differences for nearest neighbor qubits in thedevice array2120 inFIG. 21C. In particular, each horizontal line indicates the frequency difference between two of the frequency bands inFIG. 21A. For example, thefrequency difference2105A indicates the difference between the first frequency band inFIG. 21A (which includes the firstqubit operating frequency2101A and thefirst readout frequency2102A) and the second frequency band (which includes the secondqubit operating frequency2101B and the secondreadout operating frequency2102B). Similarly, thefrequency difference2105B indicates the frequency difference between the first frequency band and the third frequency band (which includes the thirdqubit operating frequency2101C and thethird readout frequency2102C).
• In some instances, the frequency differences shown inFIG. 21B can be used to operate coupler devices in a quantum processor cell. For instance, the frequency differences indicated in thefrequency difference plot2110 can be used as drive frequencies for coupler devices that interact with qubit devices having the qubit operating frequencies indicated inFIG. 21A. In some implementations, coupler devices can be operated using the sum frequencies of the qubit frequencies, rather than difference frequencies.
• FIG. 21C shows an example arrangement of devices in anexample device array2120. The circles in thedevice array2120 indicate the locations of qubit devices, and the lines between the circles indicate the locations of coupler devices.FIG. 21C also indicates the locations of plateaus in thedevice array2120 where signals are communicated between an external control system and the devices in thedevice array2120. As shown inFIG. 21C, the frequency difference between any given qubit and each of its nearest-neighbor qubits is distinct. A device array may include additional or different features, and the devices and other attributes may be arranged in another manner.
• In theexample device array2120, the qubit devices have respective qubit operating frequencies that are indicated by the shading of the qubit devices in the figure. For example, thefirst qubit device2121A has an operating frequency that corresponds to the firstqubit operating frequency2101A shown inFIG. 21A, thequbit device2121B has an operating frequency that corresponds to the secondqubit operating frequency2101B shown inFIG. 21A, etc.
• Thedevice array2120 shown inFIG. 21C is an example of a multi-dimensional array that includes groups of qubit devices. In the example shown inFIG. 21C, each group of qubit devices includes five qubit devices, and the qubit devices in each group have distinct operating frequencies (corresponding to the five distinctqubit operating frequencies2101A,2101B,2101C,2101D,2101E indicated inFIG. 21A). Thus, in the example shown, no two qubit devices in a group have the same qubit operating frequency, and the qubit control signals for the qubit devices in each group can be communicated on a single physical channel using, for example, the multiplexing and de-multiplexing systems and techniques described in this document. For example, each qubit device in the group of fivequbit devices2121A,2121B,2121C,2121D,2121E has a distinct qubit operating frequency, and qubit control signals addressed to the group of five qubit devices can be multiplexed onto a common signal line.
• InFIG. 21C, the operating frequency of each individual coupler device can be selected based on the operating frequencies of the two qubit devices that are coupled by the individual coupler device. For example, the coupler device residing at the interval between thefirst qubit device2121A and thethird qubit device2121C can be driven at a drive frequency that corresponds to thefrequency difference2105B shown inFIG. 21B, which is the difference between the firstqubit operating frequency2101A and the thirdqubit operating frequency2101C; and the coupler device residing at the interval between thefirst qubit device2121A and thefourth qubit device2121D can be driven at a drive frequency that corresponds to the difference between the firstqubit operating frequency2101A and the fourthqubit operating frequency2101D.
• Theexample device array2120 includes readout devices associated with the qubit devices. Each readout device can be operably coupled to a single, respective qubit device and configured to produce a qubit readout signal that indicates the quantum state of the single, respective qubit device. In the example shown, the readout device that is configured to readqubit device2121A operates at thefirst readout frequency2102A shown inFIG. 21A, the readout device that is configured toreadout qubit device2121B operates at thesecond readout frequency2102B shown inFIG. 21A, etc.
• In some implementations, theexample device array2120 includes groups of readout devices that correspond to the groups of qubit devices. For example, a group of five readout devices can be associated with the group of fivequbit devices2121A,2121B,2121C,2121D,2121E, and each readout device in the group can be operatively coupled to a respective one of the qubit devices. Like the groups of qubit devices, the readout devices within each group have distinct operating frequencies that correspond to the readout frequencies shown inFIG. 21A. In particular, each group of readout devices includes five readout devices, and the readout devices in each group have distinct readout frequencies (corresponding to the fivedistinct readout frequencies2102A,2102B,2102C,2102D,2102E indicated inFIG. 21A). In some cases, each group can include another number of devices (e.g., a group may include two, three, four, five, six, seven, eight, nine, ten, or more devices).
• Theexample device array2120 includes three types of plateaus. A first subset of the plateaus include signal lines that deliver qubit control signals to the qubit devices, a second subset of the plateaus include signal lines that deliver coupler control signals to the control devices, and a third subset of the plateaus include signal lines that receive qubit readout signals from the readout devices. In the example shown inFIG. 21C, thequbit control plateau2123 communicates qubit control signals to the four surrounding qubit devices (2121A,2121C,2121D,2121E). Similarly, thecoupler control plateau2124 communicates coupler control signals to the four surrounding coupler devices (the coupler device between thequbits2121D and2121E, the coupler device between thequbits2121D and2121B, and the two other adjacent coupler devices). Thequbit readout plateau2125 communicates qubit readout signals from the four surrounding readout devices (including the readout device associated with thequbit device2121E, and the three other adjacent readout devices). Additional or different types of plateaus may be used, and the plateaus may be arranged as shown or in another manner.
• In some instances, the qubit devices in thedevice array2120 receive qubit control signals that are configured to manipulate the quantum state of the qubit devices. For example, the qubit control signal can correspond to an encoding operation or a single-qubit gate in a quantum algorithm, a quantum error correction procedure, a quantum state distillation procedure, etc. In the example shown, the qubit control signals are microwave pulses, at the qubit operating frequencies indicated inFIG. 21A. In some cases, other types of qubit control signals may be used.
• In some instances, qubit control signals for a group of qubits can be communicated (e.g., from a signal generator system) on a single physical channel to an input signal processing system associated with thedevice array2120. The input signal processing system can separate the qubit control signals for each individual qubit device in the group based on the frequencies of the respective qubit control signals. For example, the qubit control signals that are addressed to thequbit device2121A can have a signal frequency that corresponds to thequbit operating frequency2101A, which can be separated (e.g., by operation of a de-multiplexer) from qubit control signals in other frequency ranges. Once the qubit control signals are divided onto separate physical channels, the qubit control signals can be routed to the appropriate qubit device and delivered through the appropriate qubit control plateau.
• In some instances, the readout devices in thedevice array2120 produce qubit readout signals based on the quantum states of the qubit devices. In some instances, the readout devices produce qubit readout signals in response to readout control signals received by the respective readout devices, for example, by reflecting the readout control signals with additional information (e.g., a phase shift, a frequency shift, an amplitude shift, etc.) that indicates the state of a qubit device. The qubit readout signals can be produced by the readout devices in response to the readout control signals, for example, based on electromagnetic interactions between the individual readout device and its respective qubit device. The qubit readout signals produced by a group of readout devices can be combined (e.g., multiplexed) onto a single physical channel. For example, the qubit readout signals can be communicated from the respective readout devices through the appropriate qubit readout plateaus to an output signal processing system. The output signal processing system can receive the respective qubit readout signals on multiple distinct physical channels and multiplex them onto a single physical channel.
• Theexample device array2120 is an example of a multi-dimensional array of qubit devices that includes sub-arrays, where each sub-array is associated with a separate one of the frequency bands shown inFIG. 21A. Each group of qubit devices includes one qubit device in each of the sub-arrays. In particular, theexample device array2120 includes five distinct sub-arrays, one sub-array for each frequency band shown inFIG. 21A. For example, all of the qubit devices in theexample device array2120 that are shaded as thefirst qubit device2121A form a first sub-array, such that all qubit devices in the first sub-array have the firstqubit operating frequency2101A shown inFIG. 21A. Similarly, all of the qubit devices in theexample device array2120 that are shaded as thesecond qubit device212B form a second sub-array, such that all qubit devices in the second sub-array have the secondqubit operating frequency2101B shown inFIG. 21A. In the example shown, the sub-arrays are mutually exclusive, such that no qubit device is included in more than one sub-array. Also in the example shown, the sub-arrays fully cover thedevice array2120, such that every qubit device is included in one of the sub-arrays.
• As shown inFIG. 21C, the qubit devices collectively define a tiling over themulti-dimensional device array2120. In the example shown, each tile in the tiling is five-by-five in size; anindividual tile2140 is indicated by the dashed outline inFIG. 21C. Thedevice array2120 can include multiple tiles each arranged as theexample tile2140. The tiles in a multi-dimensional array can be repeated in any direction to scale thedevice array2120 to include more qubit devices.
• The example two-dimensional device array2120 shown inFIG. 21C is an example of a rectilinear array, in which the qubit devices are arranged in rows and columns, with the columns perpendicular to the rows. The example two-dimensional array shown inFIG. 21C is also an example of a square array, in which the spacing is equal between all rectilinear rows and columns, and therefore, the physical length spacing is equal between each pair of nearest-neighbor qubit devices. In some examples, the physical length spacing between each pair of nearest-neighbor qubit devices is in the range of 0.2 to 2.0 centimeters. Another type of multi-dimensional array can be used, and the device spacing can be in a different range. For example, the array can be non-rectilinear, such that the rows are not perpendicular to the columns, or the array can be rectangular, such that the rows are spaced differently than the columns. Other types of two-dimensional arrays may be formed. In some instances, the example two-dimensional device array2120 can be extended to three dimensions.
• As shown inFIG. 21C, each of the qubit devices has two or more nearest-neighbor qubit devices. Thus, each qubit device is a member of at least two pairs of nearest-neighbor qubits. The qubit devices in each pair of nearest-neighbor qubit devices are connected to each other by a line (which represents the location of a coupler device) in the diagram shown inFIG. 21C. The four qubit devices at the corners of thedevice array2120 each have two nearest-neighbors, the five qubit devices along each edge (between the corners) of thedevice array2120 each have three nearest-neighbors, and the internal qubit devices that are not along the edges or corners each have four nearest-neighbors. In an example three-dimensional rectilinear array, the qubit devices at the corners would each have three nearest-neighbors, the qubit devices along each edge between the corners would each have four nearest-neighbors, and the internal qubit devices that are not along the edges or corners would each have six nearest-neighbors. Other types of three-dimensional arrays and lattices may be used. For instance, the devices can be arranged to form a Bravais lattice.
• As shown inFIG. 21C, the qubit operating frequency of each qubit device is distinct from the qubit operating frequency of each of its nearest-neighbor qubit devices. For example, thequbit device2121E has the fifthqubit operating frequency2101E shown inFIG. 21A, and none of its nearest-neighbor qubit devices has the fifthqubit operating frequency2101E. In particular, the nearest-neighbors of thequbit device2121E have the firstqubit operating frequency2101A, the secondqubit operating frequency2101B, the thirdqubit operating frequency2101C, and the fourthqubit operating frequency2101D.
• In the example shown inFIG. 21C, the readout frequencies of the readout devices in thedevice array2120 can be arranged according to the same pattern as the qubit operating frequencies. Thus, the readout frequency of each readout device in thedevice array2120 can be distinct from the readout frequency of each of its nearest-neighbor readout devices. For example, the readout device associated with thequbit device2121E has the fifth readout frequency2102E shown inFIG. 21A, and none of its nearest-neighbor readout devices has the readout frequency2102E. In particular, the nearest-neighbors of the readout device associated with thequbit device2121E have thefirst readout frequency2102A, thesecond readout frequency2102B, thethird readout frequency2102C, and thefourth readout frequency2102D. Other arrangements of readout frequencies may be used.
• For the example gate scheme shown inFIGS. 4C-4E or other gate schemes, the coupler devices in theexample device array2120 can be arranged such that no two coupler devices that have the same drive frequency are coupled to the same qubit device. For example, the coupler device between thequbit devices2121D and2121E can be driven at or near a drive frequency that is the difference between the operating frequencies of thequbit devices2121D and2121E. In particular, the coupler device between thequbit devices2121D and2121E can operate at 0.2 GHz, which is the difference between the fourthqubit operating frequency2101D and the fifthqubit operating frequency2101E. The other three coupler devices that are adjacent to thequbit device2121E operate at different drive frequencies (i.e., different from 0.2 GHz). Specifically, the three other coupler devices that are adjacent to thequbit device2121E are driven at 0.3 GHz (the difference between the thirdqubit operating frequency2101C and the fifthqubit operating frequency2101E), 0.9 GHz (the difference between the firstqubit operating frequency2101A and the fifthqubit operating frequency2101E), and 0.5 GHz (the difference between the secondqubit operating frequency2101B and the fifthqubit operating frequency2101E).
• FIGS. 22A-22C are diagrams showing example operating frequencies for devices in a quantum processor cell. The example operating frequencies shown inFIGS. 22A-22C represent an alternative to the example shown inFIGS. 21A-21C. In some instances, the example operating frequencies shown inFIGS. 22A-22C can be implemented by a quantum processor cell in a manner that is analogous to the manner described with respect toFIGS. 21A-C. For instance, the operating frequencies and other attributes shown and described with respect toFIGS. 22A-C can be implemented by the examplequantum processor cells102A,102B,102C described above or another type of quantum processor cell.
• FIG. 22A shows afrequency spectrum plot2200 that indicates example operating frequencies of qubit devices and readout devices. As shown inFIG. 22A, the frequency spectrum includes frequencies ranging from 3.2 GHz to 3.9 GHz. The example operating frequencies shown inFIG. 22A can be adapted to other frequency bands or scaled to other frequency units, for example, for use with devices operating in other frequency ranges.
• The examplefrequency spectrum plot2200 inFIG. 22A indicates six distinctoperating frequency bands2201A,2201B,2201C,2201D,2201E and2201F. Qubit operating frequencies and readout frequencies can be selected in each of the respective frequency bands. For example, each frequency band can include a qubit operating frequency and a readout frequency, such that there are six distinct qubit operating frequencies and six distinct readout frequencies. As shown inFIG. 22A, the frequency bands are spaced apart from each other at intervals along thefrequency spectrum plot2200, and the intervals between the neighboring pairs of frequency bands vary. Moreover, thefrequency spectrum plot2200 indicates two subsets of intervals, where the intervals within each subset are equal to each other (either 0.1 GHz or 0.2 GHz), and different from the intervals in the other subsets.
• FIG. 22B shows a frequency difference plot that indicates differences between the frequency bands shown inFIG. 22B. In particular, each horizontal line indicates the frequency difference between two of the frequency bands andFIG. 22B. For example, thefrequency difference2205A indicates the difference between thesecond frequency band2201B and thethird frequency band2201C. Similarly, thefrequency difference2205B indicates the difference between thesecond frequency band2201B and thefourth frequency band2201D, and thefrequency difference2205C indicates the difference between thethird frequency band2201C and thesixth frequency band2201F. In the example shown, the frequency differences shown inFIG. 22B can be used to operate coupler devices in a quantum processor cell. As described with respect toFIG. 22C, the frequency differences indicated in thefrequency difference plot2210 can be used as drive frequencies for coupler devices that interact with qubit devices having the qubit operating frequencies indicated inFIG. 22A.
• FIG. 22C shows an example arrangement of device frequencies in adevice array2220. Similar toFIG. 21C, the circles in the two-dimensional device array2220 shown inFIG. 22C indicate the locations of qubit devices. The shading of each circle indicates the qubit operating frequency of the respective qubit device. For instance, thequbit device2221A has a qubit operating frequency in thefirst frequency band2201A shown inFIG. 22A, thequbit device2221B has a qubit operating frequency in thesecond frequency band2201B shown inFIG. 22A, etc.
• Similar toFIG. 21C, the lines between the circles in the two-dimensional device array2220 shown inFIG. 22C indicate the locations of coupler devices. The integer beside each line indicates the drive frequency that is used to operate the respective coupler device. For instance, thecoupler device2230B (which resides at the interval between thequbit device2221B and thequbit device2221D) is labeled “3” and is driven at a frequency of 0.3 GHz to produce an interaction between the two neighboring qubit devices (2221B,2221D); thecoupler device2230A (which resides at the interval between thequbit device2221B and the qubit device2221C) is labeled “2” and is driven at a frequency of 0.2 GHz to produce an interaction between the two neighboring qubit devices (2221B,2221C); and thecoupler device2230C (which resides at the interval between the qubit device2221C and thequbit device2221F) is labeled “4” and is driven at a frequency of 0.4 GHz to produce an interaction between the two neighboring qubit devices (2221C,2221F).
• Theexample device array2220 includes groups of qubit devices and groups of readout devices. The groups of devices in thedevice array2220 inFIG. 22C are similar to the groups in theexample device array2120 inFIG. 21C. For instance, no two qubit devices in a group have the same qubit operating frequency, and the control signals for the qubit devices in each group can be communicated on a single physical channel. However, the groups in thedevice array2220 each include six devices (according to the six frequency bands shown in the frequency spectrum plot2200) whereas the groups in thedevice array2120 each include five devices (according to the five frequency bands shown in the frequency spectrum plot2100). As an example, thequbit devices2221A,2221B,2221C,2221D,2221E and2221F all have distinct qubit operating frequencies and form a group in theexample device array2220. Accordingly, the multi-dimensional device array shown inFIG. 22C includes six distinct sub-arrays, one sub-array for each of the frequency bands.
• In the example shown inFIG. 22C, the qubit devices collectively define a tiling over themulti-dimensional device array2220. In the example shown inFIG. 22C, each tile in the tiling is six-by-six in size; anindividual tile2240 is indicated by the dashed outline inFIG. 22C. Thedevice array2220 can include multiple tiles each arranged as theexample tile2240. The tiles in the multi-dimensional array can be repeated in any direction to scale thedevice array2220 to include more qubit devices.
• Thedevice array2220 inFIG. 22C is another example of a two-dimensional square array, where each of the qubit devices has two or more nearest-neighbor qubit devices. Each pair of nearest-neighbor qubit devices is connected by a line (which represents the location of a coupler device) in the diagram shown inFIG. 22C. As shown inFIG. 22C, the qubit operating frequency of each qubit device is distinct from the qubit operating frequency of each of its nearest-neighbor qubit devices. Moreover, the readout frequencies of the readout devices in thedevice array2220 can be arranged according to the same pattern as the qubit operating frequencies. As shown, the coupler devices in thedevice array2220 are arranged such that no two coupler devices that have the same drive frequency are coupled to the same qubit device. Readout devices in thedevice array2220 can each be coupled to a single, respective qubit device and configured to produce a qubit readout signal that indicates a quantum state of the respective qubit device.
• In the example shown inFIG. 22C, the multi-dimensional array defines intervals between the qubit devices, and the coupler devices reside at the intervals between the neighboring pairs of the qubit devices in the multi-dimensional array. A first subset of the intervals are defined along the rows of the array, and a second subset of the intervals are defined along the columns of the array. Each coupler device is configured to generate an electromagnetic interaction between the respective neighboring pair of qubit devices that the coupler device resides between.
• In some implementations, each of the coupler devices receives coupler control signals that are configured to produce an electromagnetic interaction between its neighboring pair of qubit devices (the pair of qubit devices that the coupler device resides between). For instance, the coupler control signals can be configured to produce a first-order interaction between the neighboring pair of qubit devices, and the interaction can modulate the degree of quantum entanglement of the qubit devices. In some cases, the coupler control signal corresponds to a two-qubit gate used in the execution of a quantum algorithm. In the example shown, the coupler control signals are radio frequency or microwave frequency pulses, at the drive frequencies indicated inFIG. 22B. In some cases, other types of coupler control signals may be used.
• In some instances, each of the coupler devices is operated by applying both an offset field (e.g., a DC component) and a drive field (e.g., an AC component), while each qubit device is operated by applying only a drive field without an offset field. For example, the coupler devices can be implemented as flux qubit devices, and the qubit devices can be implemented as charge qubit devices. In some instances, each of the coupler devices has a respective coupler operating frequency that varies with an offset electromagnetic field experienced by the coupler device, and each qubit device has a respective qubit operating frequency that is independent of the electromagnetic field experienced by the qubit device. For example, the coupler devices can be implemented as fluxonium devices, and the qubit devices can be implemented as transmon devices.
• In some implementations, each coupler device includes an offset field generator (e.g., an inductor) that is configured to generate an offset field that tunes the coupler operating frequency of the coupler device. The coupler device may also include a resonant circuit that is configured to generate an electromagnetic interaction between the neighboring pair of qubit devices. The coupler control signals received by the coupler device can include a DC component that causes the offset field generator of the coupler device to produce an offset electromagnetic field. The offset electromagnetic field can tune the coupler device to a particular frequency that increases a rate of interaction between the neighboring pair of qubit devices. The coupler control signals can also include an AC component that drives the resonant circuit at a drive frequency that corresponds to the difference between or sum of the qubit operating frequencies of the neighboring qubit devices. For instance, the AC component of the coupler control signals can have a frequency that is configured according to the integer beside the respective coupler device inFIG. 22C. In the example shown, the AC component of each coupler control signal is a radio frequency or microwave pulse.
• In some implementations, the example arrangements of qubit operating frequencies and coupler drive frequencies shown inFIGS. 21C and 22C can provide advantages for building and operating a quantum computing system. For instance, the frequency allocation may allow the full spectrum of operating frequencies to be generated on a single channel and communicated in an efficient manner. This may reduce the number of wires and electronic components, the cost of materials, construction and maintenance, and provide other efficiencies. As another example, the arrangement of operating frequencies can enable scaling to larger numbers of qubits, by providing a repeatable pattern of operating frequencies. For example, each tile can use the same frequency spectrum as theexample tiles2140,2240, or another tiling may be used.
• Theexample device arrays2120 and2220 can form part of the examplequantum processor cell102A shown inFIG. 2, or thedevice arrays2120,2220 can be implemented in another type of quantum computing system. In some instances, theexample device arrays2120,2220 can be operated based on the operating techniques and hardware shown inFIG. 23A, or the device array can be operated using other types of techniques or other types of hardware. In some cases, the qubit devices, readout devices, and coupler devices in theexample device arrays2120,2220 are housed in theelectromagnetic waveguide system104 shown inFIG. 2 (e.g., in the type of arrangement shown inFIG. 5A), or the devices can be housed in another type of environment. Moreover, the qubit devices, readout devices and coupler devices in theexample arrays2120,2220 can be implemented according to the examples shown inFIGS. 3A-3E, and they may operate as described, for example, with respect toFIGS. 4A, 4B, 4C, 4D and 4E. Alternatively, the devices can be implemented according to other designs or they may operate in another manner.
• FIG. 23A is a block diagram of an examplequantum computing system2300. The examplequantum computing system2300 can include the features of the examplequantum computing system100A shown inFIG. 2, or the examplequantum computing system2300 can be implemented in another manner. As shown inFIG. 23A, the examplequantum computing system2300 includes control system components that operate in aroom temperature stage2301. Theroom temperature stage2301 can include operating conditions and an operational environment that is consistent with standard temperature and pressure, or another type of room temperature environment. For example, the components that operate in theroom temperature stage2301 can operate around 300 Kelvin or another typical room temperature.
• The examplequantum computing system2300 also includes signal delivery and quantum processor cell components that operate in acryogenic temperature stage2331. Thecryogenic temperature stage2331 can include operating conditions and an operational environment that is consistent with cryogenic conditions. For example, the components that operate in thecryogenic temperature stage2331 can operate at 5-10 mK or another cryogenic temperature. In some cases, thecryogenic temperature stage2331 can provide appropriate operating conditions for low-temperature superconducting materials. In some cases, thecryogenic temperature stage2331 includes an ultra-low noise environment that is shielded against an external environment. For example, the example quantum computing system can include a shielding system or shielding materials that prevent unwanted radio waves, microwaves or optical signals, or unwanted magnetic fields or mechanical vibrations, from entering the operating the environment of thecryogenic temperature stage2331. For instance the shielding materials may include metallic, superconducting or lossy materials.
• The examplequantum computing system2300 also includes components that operate in one or more intermediate temperature stages2321. Theintermediate temperature stages2321 can include operating conditions and an operational environment that provide a buffer between theroom temperature stage2301 and thecryogenic temperature stage2331. Theintermediate temperature stages2321 may be shielded from each other or from theroom temperature stage2301, for example, to maintain a temperature or noise level in the operating environment of the intermediate temperature stages2321.
• Signals can be communicated between the components operating in the different temperature stages of thequantum computing system2300. In some cases, analog control signals are communicated in the room temperature environment on coaxial cables, waveguides, high-density microwave wires, or other types of transmission lines, and the analog control signals can be transferred between the room temperature environment and the intermediate temperature environments using feedthrough devices that allow signals to pass through but provide isolation for spurious electromagnetic noise outside of the signal band (e.g., light-tight feedthrough devices). In some cases, analog control signals are communicated in the cryogenic temperature environment on superconducting high-density microwave wires, co-axial or co-planar waveguide structures, or other types of transmission lines, and analog control signals can be transferred between the cryogenic temperature environment and the intermediate temperature environments using feedthrough devices (e.g., light-tight feedthrough devices).
• The examplequantum computing system2300 includes multiple operating domains. Each of the operating domains can include dedicated hardware at one or more stages of thequantum computing system2300. The operating domains can be controlled collectively and may share hardware at one of more stages of thequantum computing system2300. In the example shown inFIG. 23A, the quantum processor includes an array of qubit devices, and each operating domain includes a particular group of the qubit devices and the associated devices and other hardware that operate in connection with the particular group of qubit devices. The devices in each group have distinct operating frequencies, such as, for example, the groups of devices described with respect toFIGS. 21A-C and22A-C. A device in one group can have the same operating frequency as a device and another group, since the groups operate within different operating domains.
• In some implementations, the qubit operating frequencies for an operating domain are interleaved with the readout frequencies for the same operating domain. For example,FIGS. 21A-C show an example of interleaved qubit operating frequencies and readout frequencies, where the qubit operating frequencies and readout frequencies alternate along the frequency spectrum plot. In some example interleaved schemes, each qubit device and its corresponding readout device operate within a frequency band, and the frequency band for each qubit and readout device pair is separate and distinct (non-overlapping) with the frequency band for the other qubit and readout device pairs within the same operating domain. Each operating domain in a quantum computing system can have the same allocation of frequency bands for the qubit and readout device pairs, or the various operating domains can have distinct frequency band allocations.
• In some implementations, the qubit operating frequencies for an operating domain are not interleaved with the readout frequencies for the same operating domain. For example, the qubit devices within an operating domain can have respective qubit operating frequencies in a first frequency band, and the readout devices in the operating domain can have respective readout frequencies in a second, separate frequency band. In such cases, the qubit operating frequencies fall within one sub-band of the frequency spectrum, and the readout frequencies fall within a different sub-band of the frequency spectrum. In some example non-interleaved schemes, the qubit frequency band (the frequency band that contains the qubit operating frequencies) for a group of qubit devices within an operating domain is separate and distinct (non-overlapping) from the readout frequency band (the frequency band that contains the readout frequencies) for the group of readout devices in the same operating domain. The readout frequency band can be higher or lower than the qubit frequency band. Each operating domain can have the same allocation of operating frequencies, qubit frequency bands and readout frequency bands, or the various operating domains can have distinct frequency bands and operating frequency allocations.
• The examplequantum computing system2300 illustrates four distinct operating domains, and each operating domain includes four of the qubit devices. Thus, there are sixteen qubit devices, sixteen readout devices, and twenty-four coupler devices that are controlled by four operating domains in thequantum computing system2300. Aquantum computing system2300 can include another number of operating domains, and each domain may generally include another number of devices.
• In the example shown inFIG. 23A, the control system components that operate in theroom temperature stage2301 include asignal generator system2302, asignal processor system2310, and acontrol interface2305. Additional or different components may operate in theroom temperature stage2301. The examplesignal generator system2302 includes amicrowave signal generator2304, and may include additional or different components.
• In some cases, thesignal generator system2302 also includes a DC control system. For example, the DC control system can provide DC control signals to the coupler devices. In some cases, thesignal generator system2302 includes a dedicated DC control system for each operating domain. In the example shown inFIG. 23A, thesignal generator system2302 can include four DC control systems, where each DC control system controls six of the twenty-four coupler devices. For instance, each of the DC control systems can be a six-channel DC control system that is capable of providing a distinct DC control signal to each coupler device in the operating domain.
• In some instances, thesignal generator system2302 includes amicrowave signal generator2304 for each of the operating domains. The microwavesignal generator system2304 can include an arbitrary waveform generator (AWG) that generates multiplexed control signals for an operating domain on a single physical channel. For example, thesignal generator system2302 may have an output channel for each operating domain, and the control signals generated on each output channel can include multiplexed control signals for multiple devices in the operating domain. In the example shown inFIG. 23A, signals from themicrowave signal generator2304 are communicated on four distinct channels, as indicated at2306.
• Themicrowave signal generator2304 can generate analog control signals based on digital control information received from thecontrol interface2305. For example, thecontrol interface2305 may provide a digital multiplexed control signal for a group of devices in the quantum processor cell, and the microwave signal generator can generate an analog multiplexed control signal that corresponds to the digital multiplexed control signal. Each analog multiplexed control signal can be communicated into the cryogenic environment on a single physical channel in some instances.
• The examplesignal processor system2310 includes adigitizer2312, a mixer and amicrowave source2314 for each operating domain. Thesignal processor system2310 can receive qubit readout signals and convert the qubit readout signals to qubit readout information that can be used to determine the quantum states of the qubit devices. For example, the qubit readout signals can be analog qubit readout signals from the signal delivery system, and thesignal processor system2310 can convert the analog qubit readout signals to digital qubit readout information. The qubit readout information can be delivered to thecontrol interface2305 where the information can be processed, for example, by a classical processor running software or dedicated classical processing hardware.
• In some cases, the qubit readout signals received by thesignal processor system2310 are multiplexed signals that include readout signals from multiple readout devices. For instance, each multiplexed readout signal can include readout signals from multiple devices in an operating domain. Thecontrol interface2305 can digitally de-multiplex the readout signals after they have been digitized by thesignal processor system2310, or thesignal processor system2310 may extract qubit readout information directly from the digitized readout output pulses and send digital data to thecontrol interface2305, for instance.
• The examplequantum computing system2300 includes amultichannel signal amplifier2320 and amultichannel isolator2322 in the intermediate temperature stages2321. Thequantum computing system2300 may include additional or different features and components operating in one or more intermediate temperature stages. In the example shown, themultichannel signal amplifier2320 can amplify or otherwise modulate signals that are communicated between the room temperature environment and the cryogenic environment. Themultichannel isolator2322 can isolate the signal lines between the cryogenic environment and themultichannel signal amplifier2320. In the example shown, themultichannel isolator2322 can be a four-channel isolator that isolates a signal line for each operating domain.
• In thecryogenic temperature stage2331, the examplequantum computing system2300 includes aninput board2330, aninput interconnect system2342, a quantum processor cell (QPC)assembly2346, anoutput interconnect system2344 and anoutput board2350. The examplequantum computing system2300 can include additional or different features and components in the cryogenic temperature stage, and the components can be arranged or configured in the manner shown or in another manner.
• The components operating in thecryogenic temperature stage2331 receive input signals through theinput board2330, and send out signals through theoutput board2350. Input control signals can be communicated to theinput board2330 on a distinct channel for each operating domain. In the example shown inFIG. 23A, four distinct input channels are indicated at2335, where each of the channels receives AC control signals for one of the operating domains. Similarly, output control signals can be communicated from theoutput board2350 on a distinct channel for each operating domain. In the example shown inFIG. 23A, four distinct output channels are shown, where each of the channels carries AC readout signals for one of the operating domains. In some examples, theinput board2330 includes additional input channels to receive DC control signals (e.g., from the signal generator system2302). For example, theinput board2330 may receive one or more DC control signals for each coupler device.
• In some cases, theexample input board2330 can be implemented as one or more structures that support signal processing components. For example, theinput board2330 can be or can include the exampleinput processing board270A shown inFIG. 20D or another system. In some implementations, theinput board2330 can be or can include a multilayered microwave printed circuit board, or another type of circuit board structure. Theexample input board2330 includes output channels that contact input channels of theinput interconnect system2342. Thus, theinput board2330 can communicate control signals into theQPC assembly2346 through theinput interconnect system2342. Theinput interconnect system2342 can be or can include the exampleinput interconnect plate135 shown inFIG. 20B or another system.
• Theexample input board2330 can be formed as a multilayered structure that includes multiple layers of insulative material, for instance, with conducting or superconducting materials between some of the layers to form transmission lines. For instance, the insulative material can include multiple layers of silicon, sapphire, diamond, or other materials that form a multilayer structure by wafer bonding. In some implementations, the insulative material can include Rogers 3000-series laminate (available from Rogers Corporation), which may have, for example, a low coefficient of thermal expansion in the “z” direction and dielectric constants ranging from 3 to 10.2. In some examples, Rogers 3010 (dielectric constant=10.2), Rogers 6010 (dielectric constant=10.2), Rogers 4350 (dielectric constant=3.48), or another laminate material can be used. In some cases, a laminate material can include a transition between dielectric constants. In some cases, a laminate material is capable of high layer count constructions. A laminate material can include, for example, ceramic-filled PTFE composites or other materials.
• Theexample input board2330 includes aninput processing subsystem2332.
• The exampleinput processing subsystem2332 can include multiple input processing domains; for example, a dedicated input processing domain can process input signals for each operating domain of thequantum computing system2300. In the example shown, theinput processing subsystem2332 includes four input processing domains, and each input processing domain receives and processes control signals for the devices (qubit devices, coupler devices, readout devices) within one of the operating domains.
• Each input processing domain can be similar or identical to the other input processing domains. For example, the hardware for each input processing domain can be the same as the hardware for one or more of the other input processing domains. In some implementations, each input processing domain can include multiple processing cards that are supported on theinput board2330. The processing cards for one input processing domain may be interchangeable with one or more of the processing cards in another input processing domain.
• In some implementations, processing cards are supported in receptacle slots defined in theinput board2330. The processing cards included in theexample input board2330 can be implemented as discrete devices that are mechanically secured and communicably coupled to theinput board2330. Each of the processing cards can include signal processing hardware configured to process (e.g., diplex, multiplex, de-multiplex, filter, bias, etc.) control signals, and theinput board2330 can include signal lines that transfer signals between the distinct processing cards. The processing cards can include transmission lines that carry signals within the processing card. For example, the transmission lines may include coplanar waveguide (CPW) structures. In some instances, coplanar waveguide (CPW) structures can be implemented as layered structures, with superconducting planes on the top and bottom of an insulating material, and a signal-carrying trace in the middle of the insulative material. In some instances, dielectric or insulative material in the processing cards can include silicon, sapphire, fused quartz, diamond, beryllium oxide (BeO), aluminum nitride (AlN), or others.
• In the example shown, each input processing domain of theinput processing subsystem2332 includes adiplexer2334, a de-multiplexer2336, aDC bias component2338 and a de-multiplexer2340. Each of the components may be implemented, for example, in one or more processing cards on theinput board2330. Theinput processing subsystem2332 may include additional or different components, and the components may be configured as shown or in another manner.
• Theexample diplexer2334 can separate input signals onto two distinct output channels based on the frequencies of the input signals. For example, thediplexer2334 can separate low-frequency control signals from high-frequency control signals. In some examples, the drive signals for the coupler devices are all within a lower frequency band than the control signals for the qubit and readout devices. For example, in the example shown inFIGS. 22A-C, the qubit operating frequencies are in the range of 3.2 to 3.9 GHz, and the drive frequencies for the coupler devices are in the range of 0.1 GHz to 0.7 GHz. Thus, thediplexer2334 can receive input signals ranging from a few MHz to high microwave frequencies, and send lower frequency signals to a first device and send higher frequency signals to a second device. In an example implementation, thediplexer2334 sends low-frequency signals (e.g., 225 MHz through 1.375 GHz, or another frequency range) to the first de-multiplexer2336, and thediplexer2334 sends high-frequency signals (e.g., above 2.5 GHz, or another threshold frequency) to thesecond de-multiplexer2340.
• Each of the de-multiplexers2336,2340 separates input signals onto multiple distinct output channels based on the frequencies of the input signals. For example, each de-multiplexer can receive an input signal that includes multiple frequency components, and separate the distinct frequency components onto distinct output channels.
• Theexample de-multiplexer2340 receives the qubit control signals and the readout control signals, which are microwave-frequency signals addressed to the respective qubit devices and readout devices. The qubit control signals and the readout control signals for a group of qubit devices and readout devices are delivered on a single input channel to the de-multiplexer2340, and the de-multiplexer separates the control signal for each individual qubit device onto the distinct physical output channels. In the example shown, the de-multiplexer2340 is a 1:4 de-multiplexer that receives the high-frequency band output from the diplexer2334 (e.g., 3 GHz to 4 GHz, or another frequency range).
• Theexample de-multiplexer2336 receives the AC components of the coupler control signals, which are radio-frequency or microwave-frequency drive signals addressed to the respective coupler devices. In some instances, the drive signals for a group coupler devices are delivered on a single input channel to the de-multiplexer2336, and the de-multiplexer2336 separates the drive signal for each individual coupler device onto a distinct physical output channel. In the example shown, the de-multiplexer2336 is a 1:6 de-multiplexer that receives the low-frequency band output from the diplexer2334 (e.g., 225 MHz through 1.375 GHz, or another frequency range).
• The exampleDC bias component2338 receives the drive signals from the de-multiplexer2336 and adds a bias signal to each drive signal. The bias can be a low frequency or DC component of the coupler control signal. For example, the bias signal can be configured to tune the coupler device to a particular coupler operating frequency or bias point. In some cases, the DC component causes the coupler device to produce and offset electrical or magnetic field that tunes the coupler device and produces a higher rate of coupling between neighboring qubit devices. The bias signal in each coupler control signal can be configured for a particular control device. Thus, theDC bias component2338 can apply distinct bias levels to distinct drive signals received from the de-multiplexer2336. In some cases, the bias signals are received through a separate input of theinput board2330.
• Theinput board2330 can include an output channel for each qubit device and each coupler device in theQPC assembly2346. In the particular example shown inFIG. 23A, there are forty output channels from theinput board2330, which includes ten output channels for each operating domain. Within each operating domain, there are six coupler control signal output channels from theinput board2330, and there are four qubit control signal output channels from theinput board2330. Thus, in the example shown, there are twenty-four output channels from theDC bias components2338 to theinput interconnect system2342, and there are sixteen output channels from the second de-multiplexer2340 to theinput interconnect system2342.
• The example configuration shown inFIG. 23A can be used with an interleaved frequency scheme, where the qubit operating frequencies are interleaved with the readout frequencies. In some cases, the configuration shown inFIG. 23A can be used or adapted for use with a non-interleaved frequency scheme, for example, where the qubit operating frequencies are in a distinct band from the readout frequencies. For an example non-interleaved scheme, theinput processing subsystem2332 may include an additional diplexer and an additional de-multiplexer for each operating domain. The additional diplexer can operate between thediplexer2334 and the second de-multiplexer2340, and can separate qubit control signals (in a qubit frequency band) from readout control signals (in a readout frequency band). The qubit control signals can be delivered to the second de-multiplexer2340, and the readout control signals can be delivered to the additional (third) de-multiplexer. The third de-multiplexer can be a 1:4 de-multiplexer that separates four readout control signals from a multiplexed control signal. In such examples, theinput board2330 includes sixteen additional output channels from the third de-multiplexer to theinput interconnect system2342.
• Theexample QPC assembly2346 houses the qubit devices, the coupler devices and the readout devices of thequantum computing system2300. The qubit devices, the coupler devices and the readout devices may be housed, for example, in an electromagnetic waveguide system or another structure. TheQPC assembly2346 can be constructed according to the example quantum processor cells shown and described with respect toFIGS. 1-22, or theQPC assembly2346 can be constructed and may operate in another manner. Theexample QPC assembly2346 includes a two-dimensional array of sixteen qubit devices, with twenty-four coupler devices residing at intervals between the sixteen qubit devices in the array, and with sixteen readout devices each associated with an individual qubit device. Thequantum computing system2300 can be adapted to include other types of multi-dimensional qubit arrays and arrays of other sizes. For example, thequantum computing system2300 may include a two- or three-dimensional array of tens or hundreds of qubit devices and appropriate coupler devices and readout devices associated therewith. These arrays may be tiled and repeated adjacent to one another or in an interpenetrated manner to construct arrays of arbitrary size for large-scale quantum computing.
• Theexample output board2350 can be implemented as one or more structures that support signal processing components. For example, theoutput board2350 can be or can include the exampleoutput processing board270B shown inFIG. 20E or another type of system. In some implementations, theoutput board2350 can be a multilayered microwave printed circuit board, or another type of circuit board structure. Theexample output board2350 includes input channels that contact output channels of theoutput interconnect system2344. Thus, theoutput board2350 can receive qubit readout signals from theQPC assembly2346 through theoutput interconnect system2344. Theoutput interconnect system2344 can be or can include the exampleoutput interconnect plate139 shown inFIG. 20C. In some examples, theoutput board2350 includes additional input channels, for example, to receive pump signals for parametric amplifiers, etc.
• In some implementations, theoutput board2350 can be formed as a multilayered structure that includes multiple layers of insulative material, for instance, with conducting or superconducting materials between some of the layers to form transmission lines. For instance, the insulative material can include the materials described above with respect to the input board2330 (e.g., silicon, sapphire, diamond, laminate materials available from Rogers Corporation, etc.).
• Theexample output board2350 includes anoutput processing subsystem2352. The exampleoutput processing subsystem2352 can include multiple output processing domains; for example, a dedicated output processing domain can process output signals for each operating domain of thequantum computing system2300. In the example shown, theoutput processing subsystem2352 includes four output processing domains, and each output processing domain receives qubit readout signals from the readout devices within one of the operating domains.
• Each output processing domain can be similar or identical to the other output processing domains. For example, the hardware for each output processing domain can be the same as the hardware for one or more of the other output processing domains. For instance, each output processing domain can include multiple processing cards that are supported on theoutput board2350. The processing cards for one output processing domain may be interchangeable with one or more of the processing cards in another output processing domain.
• In some implementations, processing cards are supported in receptacle slots defined in theoutput board2350. The processing cards included in theexample output board2350 can be implemented using hardware and techniques that are similar to the processing cards in theexample input board2330. For example, the processing cards can be mechanically secured and communicably coupled to theoutput board2350. Each of the processing cards can include signal processing hardware configured to process (e.g., filter, multiplex, amplify, de-multiplex, isolate, etc.) readout signals. The processing cards can include transmission lines (e.g., coplanar waveguide (CPW) structures or others) that carry signals within the processing card, and theoutput board2350 can include signal lines the transfer signals between the distinct processing cards.
• In the example shown, each output processing domain of theoutput processing subsystem2352 includes a multichannel isolator2354, and amplifier2356 and a multiplexer2358. The components may be implemented, for example, by one or more processing cards. Theoutput processing subsystem2352 may include additional or different components, and the components may be configured as shown or in another manner.
• The example multichannel isolator2354 can isolate the input channels between theoutput interconnect system2344 and the amplifier2356. In the example shown, the multichannel isolator2354 and each operating domain can be a four-channel isolator that isolates a signal line for each qubit device in the operating domain. The isolator can include magnetic or electromagnetic shielding in some instances.
• The example amplifier2356 can amplify the qubit readout signals received from the multichannel isolator2354. For example, the amplifier2356 can receive power from an external power source and increase the voltage of the qubit readout signals. In some examples, the output processing subsystem includes a power divider for each operating domain, and the power divider receives power from the external system and delivers appropriate power levels to input ports of the amplifier2356.
• The example multiplexer2358 receives the qubit readout signals, which are microwave-frequency signals from the respective readout devices. Each of the qubit readout signals is delivered to the multiplexer2358 on a distinct input channel, and the multiplexer combines the qubit readout signals onto a single physical output channel. The qubit readout signals within an operating domain are in distinct frequency ranges, and the multiplexed signal produced by the multiplexer2358 includes multiple frequency components corresponding to the multiple readout frequencies. In the example shown, the multiplexer2358 is a 4:1 multiplexer that receives qubit readout signals in an operating frequency band (e.g., 3 GHz to 4 GHz, or another frequency range). For instance, the multiplexer2358 can be similar or identical to the de-multiplexer2340, but with the input and output ports interchanged.
• Theoutput board2350 can include an input channel for each qubit device in theQPC assembly2346. In the particular example shown inFIG. 23A, there are sixteen input channels from theoutput interconnect system2344, which includes four input channels for each operating domain. Theoutput board2350 can include an output channel for each group of qubit devices in the QPC assembly2346 (where each group of qubit devices corresponds to an individual operating domain of the quantum computing system2300). In the particular example shown inFIG. 23A, there are four output channels from theoutput board2350, which includes one output channel for each operating domain.
• In some instances, thequantum computing system2300 can perform quantum computational tasks, execute quantum computing algorithms, perform quantum error correction, quantum state distillation, or perform other types of processes. For instance, thecontrol interface2305 can include a quantum compiler and a master clock, and can operate the quantum computing system on clock cycles, where a set of instructions are executed by thequantum computing system2300 on each clock cycle. For example, thecontrol interface2305 can generate control information for each clock cycle according to a set of instructions from a quantum compiler; thesignal generator system2302 can receive the control information from thecontrol interface2305 and generate control signals that are delivered to theinput board2330. Thecontrol interface2305 may also receive qubit readout data on each clock cycle. For example, thesignal processor system2310 can receive readout signals from theoutput board2350 and generate digital readout data that is delivered to thecontrol interface2305. In some implementations, thequantum computing system2300 can operate in another manner.
• In some instances, thecontrol interface2305 generates quantum processor control information that includes digital control information for multiple devices in theQPC assembly2346. For example, thecontrol interface2305 may generate a digital control sequence for a group of qubit devices, a group of readout devices, a group of coupler devices, a group of amplifier devices, a group of other devices, or a combination of them. In some instances, the digital control information corresponds to pulses or other types of control signals to be delivered to individual devices. Thecontrol interface2305 can digitally multiplex the digital control information for groups of devices in theQPC assembly2346. For example, the control interface may digitally multiplex the digital control information for the group of qubit devices within each operating domain of thequantum computing system2300. The operations performed by thecontrol interface2305 can be implemented, for example, by one or more data processors or other types of classical computing equipment.
• In some instances, the digital control information generated by thecontrol interface2305 includes qubit control information for a group of qubit devices that operate in a common operating domain and each have distinct qubit operating frequencies. For instance, the qubit control information can include qubit control sequences for respective qubit devices in the group, and the qubit control sequence for each qubit device can be configured to execute a single-qubit operation on the qubit device.
• In some instances, the digital control information generated by thecontrol interface2305 includes coupler control information for a group of coupler devices that operate in a common operating domain and each have distinct operating frequencies. For instance, the coupler control information can include coupler control sequences for each respective coupler device in the group, and the coupler control sequence for each coupler device can be configured to execute a two-qubit operation on a pair of qubit devices that neighbor the coupler device.
• In some instances, the digital control information generated by thecontrol interface2305 includes readout control information for a group of readout devices that operate in a common operating domain and each have distinct readout frequencies. For instance, the readout control information can include readout control sequences for each respective readout device in the group, and the readout control sequence for each readout device can be configured to execute a readout operation on a qubit device associated with the readout device.
• In some instances, the digital control information generated by thecontrol interface2305 includes a combination of qubit control information and coupler control information or another combination of control sequences that are configured to perform all or part of a quantum algorithm, a quantum error correction protocol, a state distillation protocol, one or more quantum logic gates, a quantum measurement, or other types of quantum computational tasks. In some instances, the digital control information generated by thecontrol interface2305 includes a combination of readout control information and other control information (e.g., qubit or coupler or both).
• In some instances, thesignal generator system2302 receives the quantum processor control information from thecontrol interface2305 and generates a multiplexed control signal based on the quantum processor control information. For example, the quantum processor control information can include the digitally multiplexed control information for a group of devices (e.g., qubit devices, readout devices, coupler devices, or a combination), and thesignal generator system2302 can generate an analog control signal that is communicated from thesignal generator system2302 on a single physical channel. Thesignal generator system2302 can communicate multiplexed control signals on each of the four output channels indicated at2306, and each of the output channels carries multiplexed control signals for an individual operating domain.
• Because, in the examplequantum computing system2300, thesignal generator system2302 operates in theroom temperature stage2301, the multiplexed control signals are generated in a room temperature environment. The multiplexed control signals are communicated into thecryogenic temperature stage2331 through theintermediate temperature stage2321. In some cases, the multiplexed control signals are microwave control signals that are communicated by a microwave waveguide or another type of transmission line. In the example shown, the multiplexed control signals are amplified by themultichannel signal amplifier2320 in theintermediate temperature stage2321 before they are communicated into thecryogenic temperature stage2331.
• In some instances, thesignal generator system2302 orsignal processor system2310 orcontrol interface2305 may be operated on hardware in a cryogenic environment. In some instances, the cryogenic environment may be at a temperature below room temperature but above the temperature of the QPC operating environment.
• In some instances, each input processing domain of theinput processing subsystem2332 on theinput board2330 receives a multiplexed control signal for a group of devices in theQPC assembly2346. For instance, each input processing domain can include an input channel configured to receive the respective multiplexed control signal. The de-multiplexer devices in each input processing domain of theinput processing subsystem2332 can separate device control signals from the multiplexed control signal by de-multiplexing the multiplexed control signal. For example, the de-multiplexer2336 can separate six distinct drive signals from a multiplexed control signal, and the de-multiplexer2340 can separate four distinct control signals from a multiplexed control signal. Because theinput processing subsystem2332 operates in thecryogenic temperature stage2331, the multiplexed control signals are de-multiplexed in a low-noise, cryogenic environment.
• The device control signals for each respective device are delivered into theQPC assembly2346 on respective channels through theinput interconnect system2342. For instance, the inputsignal processing subsystem2332 can include output channels configured to communicate the respective device control signals into theQPC assembly2346 through theinput interconnect system2342. In some instances, theinput interconnect system2342 includes input interconnect signal lines that extend from an exterior of theQPC assembly2346 to the interior of theQPC assembly2346. The input interconnect signal lines can include a first end that contacts an output channel of theinput board2330, and a second end that contacts a lead that is inside the QPC assembly2346 (e.g., on a plateau of the signal board). The input interconnect signal lines can be supported within theQPC assembly2346, for example, by plateau structures that extend vertically with respect to the plane of the two-dimensional device array in theQPC assembly2346.
• TheQPC assembly2346 may include a signal board or another type of structure that supports the qubit devices, coupler devices, and readout devices within theQPC assembly2346. For example, theQPC assembly2346 may include theexample signal board140A shown inFIGS. 10A-10B and 11A-11B, or another type of signal board. The signal board can include input signal lines that route the device control signals within the quantum processor cell to the respective devices. For example, each input signal line in the signal board can have a first end that contacts a lead on theinput interconnect system2342 and a second end that couples (e.g., conductively, capacitively, inductively, etc.) to a device supported by the signal board. In some instances the signal board can deliver signals from the exterior volume of an electromagnetic waveguide system to an enclosed or partially enclosed interior volume of an electromagnetic waveguide system.
• In some instances, the readout devices in theQPC assembly2346 produce qubit readout signals based on readout control signals received from the control system. For instance, the qubit readout signals can be produced by the respective readout device based on an electromagnetic interaction between the readout device and the associated qubit device in response to the readout control signal. In some cases, each readout device is operatively coupled (e.g., capacitively, conductively, inductively, or otherwise coupled) to an individual qubit device. In some cases, the readout device is coupled to the qubit device through an aperture in the electromagnetic waveguide system. The readout device can, in some cases, be located in a partially interior and partially exterior volume of the waveguide system.
• In some instances, the qubit readout signals produced by each respective readout device are communicated from the readout devices by signal lines included in the signal board that supports the devices within theQPC assembly2346. For example, the signal board can include output signal lines that route the qubit readout signals within theQPC assembly2346 to theoutput interconnect system2344. Each output signal line in the signal board can have a first end that couples (e.g., conductively, inductively, capacitively, etc.) to a readout device supported by the signal board, and a second end that contacts a lead on theoutput interconnect system2344. Readout signal lines can in some instances include planar or three-dimensional filter structures used to modify the impedance of the signal line at the operating frequencies of the associated readout device, qubit device or coupler devices connected to the associated qubit device.
• In some instances, the qubit readout signals for each respective readout device are delivered to theoutput board2350 on respective channels through theoutput interconnect system2344. The exampleoutput interconnect system2344 includes output interconnect signal lines that extend from an interior of theQPC assembly2346 to an exterior of theQPC assembly2346. The output interconnect signal lines can each include a first end that contacts a lead inside the QPC assembly2346 (e.g., on a plateau of the signal board), and a second end that contacts and input channel of theoutput board2350. The output interconnect signal lines can be supported within theQPC assembly2346, for example, by plateau structures that extend vertically with respect to the plane of the two-dimensional device array in theQPC assembly2346. The outputsignal processing system2352 can include input channels configured to receive the respective qubit readout control signals from theoutput interconnect system2344.
• Each output processing domain in the outputsignal processing system2352 on theoutput board2350 receives qubit readout signals from a respective group of the readout devices (which correspond to a respective operating domain of the quantum computing system2300). In some instances, each readout device in the group has a distinct readout frequency. The multiplexer2358 in each output processing domain can receive the qubit readout signals from an individual group of the readout devices and generate a multiplexed readout signal by multiplexing the qubit readout signals. For example, the multiplexer2358 can receive four distinct qubit readout signals and generate a single multiplexed readout signal. Because the multiplexer2358 operates in thecryogenic temperature stage2331, the qubit readout signals are multiplexed in a low-noise, cryogenic environment.
• In some instances, the multiplexed readout signals are communicated from theoutput board2350 on a respective physical channel for each operating domain. For instance, a multiplexed readout signal that contains qubit readout signals from four readout devices can be communicated from theoutput board2350 on a single channel. The multiplexed readout signals are communicated from thecryogenic temperature stage2331 through theintermediate temperature stage2321. In some cases, the multiplexed readout signals are microwave signals that are communicated by a microwave waveguide or another type of transmission line. In the example shown, the multiplexed readout signals are amplified by themultichannel signal amplifier2320 in theintermediate temperature stage2321 before they are communicated into theroom temperature stage2301. Other arrangements of the signal path for readout signals are possible.
• In some instances, thesignal processor system2310 receives the multiplexed readout signals, performs analog filtering and processing and digitizes each multiplexed readout signal by operation of thedigitizer2312, and performs digital signal processing of the digitized signal. For example, the qubit readout signals received by theoutput board2350 and the multiplexed readout signals produced by theoutput board2350 can be analog signals, and thesignal processor system2310 can convert the multiplexed readout signals to digital information. Thesignal processor system2310 can provide the digital readout information to thecontrol interface2305, and the control system can process the digital readout information. For example, digital readout information for an operating domain can be generated from the multiplexed readout signal for the operating domain, and thecontrol interface2305 can receive the digital readout information for all operating domains.
• In some instances, the control system identifies qubit readout data for each readout device based on the digital readout information. For example, the control system can digitally de-multiplex the digital readout information from thesignal processor system2310 based on the distinct operating frequencies of the respective readout devices in each group. In some cases, the readout data for a readout device includes a digital data sequence representing the qubit readout signal produced by the readout device. Thus, each qubit readout signal received by theoutput board2350 can be converted to digital readout data by the control system, for example, by de-multiplexing the digitized version of the multiplexed readout signal generated by theoutput board2350.
• In some instances, the control system prepares multiplexed quantum processor control information for theQPC assembly2346 based on the qubit readout data. For instance, the multiplexed quantum processor control information can be a digital control sequence for the next clock cycle of thequantum computing system2300. In some cases, the multiplexed quantum processor control information is based on additional or different information. For example, the multiplexed quantum processor control information may be based on a quantum computing task or quantum algorithm, or other information. In some cases, the multiplexed quantum processor control information is communicated from thecontrol interface2305 to thesignal generator system2302, where it is processed and delivered to theQPC assembly2346 as described above. For instance, the multiplexed quantum processor control information may include qubit control information for a group of qubit devices, coupler control information for a group of coupler devices, readout control information for a group of readout devices, or a combination of them.
• FIG. 23B is a flowchart showing anexample process2360 for operating a quantum computing system. For instance, theexample process2360 can be used to control an individual operating domain of the examplequantum computing system2300 shown inFIG. 23A. Some aspects of theexample process2360 may be implemented by one or more of the example components shown inFIG. 23A or by additional or different components. In some cases, theexample process2360 can be used to operate a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array. Theprocess2360 may include additional or different operations, and the operations can be performed in the order shown inFIG. 23B or in another manner.
• FIG. 23B shows a read/write channel controller2361 that includes a field-programmable gate array (FPGA)2362, an analog-to-digital converter (ADC)2363 and a digital-to-analog converter (DAC)2364. In some implementations, thechannel controller2361 can be a wideband frequency-agile signal generator such as an arbitrary waveform generator. TheFPGA2362 can control theDAC2364 to produce a pulse or other signal having one or more frequency components targeted to one or more qubit devices or readout devices. For example, the signal can be addressed to an individual qubit device by generating the signal at a frequency that corresponds to the qubit operating frequency of the qubit device. As another example, the signal can be addressed to an individual readout device by generating a signal at a frequency that corresponds to the readout frequency of the readout device.
• The signals generated by thechannel controller2361 can be multiplexed in time or in frequency, and they may be separated onto physically disparate signal paths. For example, the signals may be separated onto distinct channels through power division followed by passive frequency selective filtering, or by the use of a fast solid state microwave switch, switched in synchronicity with the time-multiplexing of the signal, to dynamically separate the outgoing signals.
• As shown inFIG. 23B, theexample process2360 includes an example technique for processing the signals between thechannel controller2361 and thequantum processor cell2371. At2365, signals from thechannel controller2361 are filtered. At2366, the filtered signals are processed by dissipative attenuation. At2367, the signals are processed by a cryogenic low-noise amplifier. At2368, the amplified signals pass through a directional coupler. At2369, the signals are divided by a diplexer. The diplexer separates write signals from read signals, for example, based on a multiplexing scheme (e.g., time multiplexing or frequency multiplexing).
• In the example shown inFIG. 23B, the write signals from the diplexer are processed by a frequency multiplexer at2370. The frequency multiplexer divides a multiplexed write signal onto multiple output channels. For example, the write signals can be delivered to the write ports of thequantum processor cell2371 through a frequency channelized write signal array.
• In the example shown inFIG. 23B, the read signals from the diplexer are processed by a frequency multiplexer at2372. The frequency multiplexer divides a multiplexed read signal onto multiple output channels. For example, the read signals can be delivered to an m-channel circulator bank through a frequency channelized read signal array. At2373, the read signals are circulated through a circulator bank to read ports of thequantum processor cell2371. In some cases, signal circulation can be performed, for example, by a many-channel shielded ferrite core circulator or isolator bank on printed circuit board substrates for low-loss high-density circulation of RF signals. Other types of circulators may be used.
• Readout devices in thequantum processor cell2371 can produce qubit readout signals in response to the read signals. As shown inFIG. 23B, theexample process2360 includes an example technique for processing the readout signals between thequantum processor cell2371 and thechannel controller2361. The qubit readout signals are communicated from the read ports to the m-channel circulator bank. At2373, the qubit readout signals are circulated through the circulator bank to a cryogenic low noise amplifier bank. At2374, the qubit readout signals are amplified by the cryogenic low noise amplifier bank. At2375, the amplified qubit readout signals are multiplexed to produce a multiplexed readout signal. At2376, the multiplexed readout signal is down-converted. At2377, the down-converted signal is filtered and delivered to thechannel controller2361. TheADC2363 can digitize the multiplexed readout signals and deliver them to theFPGA2362.
• FIG. 24 is a flowchart showing anexample process2400 for delivering control signals to a quantum processor cell. For instance, theexample process2400 can be used to deliver control signals for an individual operating domain of the examplequantum computing system2300 shown inFIG. 23A. Some aspects of theexample process2400 may be implemented by one or more of the example components shown inFIG. 23A or by additional or different components. In some cases, theexample process2400 can be used to operate a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array. In some implementations of theprocess2400 shown inFIG. 24, multiplexed composite pulses are composed and synthesized at a higher temperature (e.g., in a room temperature stage or an intermediate temperature stage), and the pulses are de-multiplexed and delivered at a lower temperature (e.g., in a cryogenic temperature stage). Theprocess2400 may include additional or different operations, and the operations can be performed in the order shown inFIG. 24 or in another manner.
• At2410, control information is generated for individual devices in a quantum processor cell. For example, the control information can include a control sequence for each individual device (a qubit device, coupler device, a readout device). Each control sequence can include digital information and can be generated by a classical computing system running a software program. For example, the digital information can be generated by code running in Python or MATLAB® software (available from The MathWorks, Inc.) or another type of software program.
• In the example shown inFIG. 24, the control information includes pulse information for each of n subsystems. Each subsystem can include, for example, a qubit device, a coupler device, or readout device. Theexample pulse information2411A represents a parameterized pulse forsubsystem1, theexample pulse information2411B represents a parameterized pulse forsubsystem2, and theexample pulse information2411C represents a parameterized pulse for subsystem n. Each pulse may be parameterized, for example, based on an operation to be performed by the subsystem. Moreover, the frequency of each pulse can be determined according to an operating frequency of the subsystem to which the pulse is addressed. In the example shown, each subsystem has a distinct operating frequency, and therefore, each pulse is centered on a distinct frequency.
• At2420, a multiplexed, composite pulse is composed from the control information. For example, the pulse information (2411A,2411B,2411C) for each subsystem can be combined to compose the multiplexed, composite pulse. The composite pulse composed at2420 can include digital information and can be generated by a classical computing system running a software program. For example, the composite pulse can be generated by MATLAB® (available from The MathWorks, Inc.) or another type of software program. As such, the composite pulse can be generated by digital multiplexing or other techniques.
• At2430, the multiplexed, composite pulse is synthesized. The composite pulse synthesized at2430 can be an analog signal generated by a waveform generator system. For example, the composite pulse can be generated by an arbitrary waveform generator (AWG) based on the digital version of the composite pulse composed at2420. Thus, the composite pulse synthesized at2430 can be, for example, a radio frequency or microwave frequency pulse produced on a physical transmission line. At2440, the analog composite pulse generated at2430 is delivered, for example, on a single physical transmission line or a single series of physical transmission lines. In some cases, the analog composite pulse is delivered to an input processing system associated with a quantum processor cell.
• At2450, the analog composite pulse generated at2430 is de-multiplexed (or channelized) into component pulses. In the example shown, an individual analog composite pulse is separated into n analog pulses, an individual pulse for each of the n subsystems. At2460, the analog pulses are delivered to the respective subsystems. For example, the pulses may be control signals that are communicated in parallel to the distinct subsystems (e.g., qubit devices, coupler devices, readout devices), for example, on distinct parallel transmission lines.
• In the example shown inFIG. 24, afirst control signal2461A is delivered tosubsystem1, asecond control signal2461B is delivered tosubsystem2, and athird control signal2461C is delivered to subsystem n. Thefirst control signal2461A is an analog control signal that corresponds to the control sequence included in thedigital pulse information2411A; thesecond control signal2461B is an analog control signal that corresponds to the control sequence included in thedigital pulse information2411B; and thethird control signal2461C is an analog control signal that corresponds to the control sequence included in thedigital pulse information2411C. Thus, the component pulses generated at2450 and delivered at2460 correspond to the control information generated at2410.
• FIG. 25 is a block diagram showing anexample process2500 for delivering control signals to a quantum processor cell. For instance, theexample process2500 can be used to deliver control signals for an individual operating domain of the examplequantum computing system2300 shown inFIG. 23A. In some cases, theexample process2500 can be used to operate a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array. Theexample process2500 can be used, for example, to synthesize and deliver a frequency-multiplexed, time-superposed control sequence that is channelized by a multiplexer for delivery to individual devices (qubit devices, readout devices, coupler devices, etc.) in a quantum processor cell.
• The block diagram shown inFIG. 25 includes aquantum logic controller2510, achannel controller2520, a wideband digital-to-analog (DAC)converter2530, and achannelizer2550. Some aspects of theexample process2500 may be implemented by the example components shown inFIG. 25, by one or more of the example components shown inFIG. 23A, or by additional or different components In some implementations of theprocess2500 shown inFIG. 25, frequency multiplexing of write/read signals is performed at a higher temperature (e.g., in a room temperature stage or an intermediate temperature stage), and de-multiplexing of the write/read signals is performed at a lower temperature (e.g., in a cryogenic temperature stage). Theprocess2500 may include additional or different operations, and the operations can be performed in the order shown inFIG. 25 or in another manner.
• The examplequantum logic controller2510 receives data from thechannel controller2520 and sends instructions to thechannel controller2520. For example, thequantum logic controller2510 may receive readout data indicating the states of one or more qubit devices; and thequantum logic controller2510 may send instructions corresponding to a quantum logic operation to be performed by the quantum processor cell.
• Theexample channel controller2520 and thewideband DAC2530 may operate, for example, similar to theFPGA2362 andADC2363 shown inFIG. 23B, or they may operate in another manner. As shown inFIG. 25, thechannel controller2520 composes a digital composite control sequence based on instructions received from thequantum logic controller2510, and thewideband DAC2530 generates an analog composite control sequence based on the digital composite control sequence received from thechannel controller2520.
• In the example shown, thewideband DAC2530 generates frequency-multiplexed control signals2540. The frequency-multiplexedcontrol signal2540 include a frequency-multiplexedcomposite write signal2542 and a frequency-multiplexedcomposite read signal2544. The frequency-multiplexedcomposite write signal2542 contains pulses at multiple distinct write pulse frequencies (A₁to A_n) that correspond to the distinct qubit operating frequencies of multiple qubit devices. The frequency-multiplexedcomposite read signal2544 contains pulses at multiple distinct read pulse frequencies (B₁to B_n) that correspond to the distinct readout frequencies of multiple readout devices.
• In the example shown, the frequency-multiplexedcontrol signal2540 is de-multiplexed (or channelized) by thechannelizer2550. On one output channel, thechannelizer2550 generates a first series of de-multiplexed control signals2560A; and on another output channel, thechannelizer2550 generates a second, distinct series of de-multiplexed control signals2560B. Thede-multiplexed control signals2560A include ade-multiplexed write signal2562A and ade-multiplexed read signal2564A. Thede-multiplexed control signals2560B include ade-multiplexed write signal2562B and ade-multiplexed read signal2564B.
• In the example shown, thede-multiplexed write signal2562A has a first write pulse frequency A₁that is addressed to a first qubit device, which has a first qubit operating frequency; and thede-multiplexed write signal2562B has a second, distinct write pulse frequency A₁that is addressed to a second qubit device, which has a distinct, second qubit operating frequency. Thede-multiplexed read signal2564A has a first read pulse frequency B₁that is addressed to a first readout device, which has a first readout frequency; and thede-multiplexed read signal2564B has a second, distinct read pulse frequency B_nthat is addressed to a second readout device, which has a distinct, second readout frequency.
• In theexample process2500 shown inFIG. 25, thechannelizer2550 includes an input port that receives a summation of electronic signals that each have a unique frequency content. Thechannelizer2550 rejects frequency content outside of the pass bands of its respective output ports. Each output port contains a specific passband and bandwidth that is matched with the bandwidth of an individual qubit device, readout device, or coupler device.
• The example architecture shown inFIG. 25 may provide advantages, in some instances, for controlling the quantum processor cell. For example, the architecture may enable control signals to be delivered by a significantly smaller number of electronic components and signal channels. Reducing the number of electronic components can significantly reduce the cost and complexity of the quantum computing system. Moreover, reducing the number of signal lines can significantly reduce the interface between cryogenic temperature stages and higher temperature stages, which may improve shielding and isolation of the quantum processor cell.
• FIG. 26 is a block diagram showing anexample process2600 for delivering qubit readout signals from a quantum processor cell. For instance, theexample process2600 can be used to deliver qubit readout signals for an individual operating domain of the examplequantum computing system2300 shown inFIG. 23A. In some cases, theexample process2600 can be used to operate a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array.
• The block diagram shown inFIG. 26 includes amultiplexer2620 and awideband ADC2640. Some aspects of theexample process2600 may be implemented by the example components shown inFIG. 26, by one or more of the example components shown inFIG. 23A, or by additional or different components. In some implementations of theprocess2600 shown inFIG. 26, multiplexing of qubit readout signals is performed at a lower temperature (e.g., in a cryogenic temperature stage), and de-multiplexing of the qubit readout signals is performed at a higher temperature (e.g., in a room temperature stage or an intermediate temperature stage). Theprocess2600 may include additional or different operations, and the operations can be performed in the order shown inFIG. 26 or in another manner.
• Theexample multiplexer2620 shown inFIG. 26 receives qubit readout signals produced by n readout devices interacting with n qubit devices in a quantum processor cell. Thus, each of the qubit readout signals is received from a distinct qubit device.
• The frequency distributions of three example qubit readout signals are plotted schematically inFIG. 26. The horizontal axis in each of the three plots represents frequency, and the vertical axis in each of the three plots represents the amplitude of the qubit readout signal at each frequency. The firstqubit readout signal2610A is centered on a first readout frequency f1, the secondqubit readout signal2610B is centered on a second readout frequency f2, and the third qubit readout signal2610C is centered on a third readout frequency fn. The three readout frequencies (f1, f2, fn) are distinct because each qubit readout signal is generated (e.g., by a control system) for a readout device that operates at a distinct readout frequency.
• Theexample multiplexer2620 combines the n qubit readout signals to generate a multiplexedreadout signal2630 for all n of the qubit devices. Thus, the qubit readout signals from the n qubit devices can be communicated on a single physical channel. The frequency distribution of the multiplexedreadout signal2630 is plotted schematically inFIG. 26. The horizontal axis in the plot represents frequency, and the vertical axis of the plot represents the amplitude of the multiplexedreadout signal2630 at each frequency. As shown in the plot, the multiplexedreadout signal2630 corresponds to a summation of the firstqubit readout signal2610A, the secondqubit readout signal2610B, and the third qubit readout frequency signal2610C. In particular, the example multiplexedreadout signal2630 includes a first component centered on the first readout frequency f1, a second component centered on the secondreadout frequency f2, and a third component centered on the third readout frequency fn. This signal processing scheme can be repeated for each operating domain of the quantum computing system.
• In the example shown, the qubit readout signals from the readout devices and the multiplexedreadout signal2630 from themultiplexer2620 are analog signals. As shown inFIG. 26, the multiplexedreadout signal2630 is delivered to thewideband ADC2640. Thewideband ADC2640 digitizes the multiplexedreadout signal2630, thus producing a digitized version of the multiplexedreadout signal2630.
• The digital multiplexed readout signal produced by thewideband ADC2640 can be processed, for example, by a classical computer system. Because each qubit readout signal has a distinct readout frequency, the qubit readout data for each qubit device can be separated out of the digital multiplexed readout signal, for example, by digitally de-multiplexing the signal produced by thewideband ADC2640. Thus, in the example shown, the digital qubit readout data for each qubit device corresponds to the analog qubit readout signal from the qubit device. The qubit readout data can be used, for example, to identify the quantum states of the qubit devices, to generate quantum processor control information, or for a combination of these and other purposes.
• In some implementations, theprocess2600 can provide advantages for operating a quantum computing system. For example, electrical isolation between devices in the quantum processor cell can be maintained by distinct output signal lines for each device in the quantum processor cell. As another example, frequency multiplexing may reduce the frequency bandwidth allowed through each signal path from the quantum processor cell, which may reduce noise. In addition, the frequency filtering characteristics may reject out-of-band frequency content, which may provide isolation between devices operating in distinct frequency bands. Moreover, signal multiplexing can reduce the number of signal lines needed to carry signals across temperature stages, which may reduce cooling power requirements while also facilitating electrical isolation and noise reduction. In some cases, theprocess2600 can be used to obtain a dramatic reduction in cost and complexity of a quantum computing system. In some cases, theprocess2600 can be used to allow a unit cell of a multi-dimensional device lattice to be reliably repeated over the lattice, for instance, to build arbitrarily large systems of interacting quantum devices.
• FIG. 27 is a block diagram showing anexample process2700 for delivering control signals to a quantum processor cell. For instance, theexample process2700 can be used to deliver control signals for an individual operating domain of the examplequantum computing system2300 shown inFIG. 23A. In some cases, theexample process2700 can be used to operate a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array. Theexample process2700 can be used, for example, to synthesize and deliver a time-multiplexed composite control sequence that is channelized by a switch channelizer for delivery to individual devices (qubit devices, readout devices, coupler devices, etc.) in a quantum processor cell.
• The block diagram shown inFIG. 27 includes aquantum logic controller2710, achannel controller2720, awideband signal synthesizer2730 with real-time frequency agility, and aswitch2750. Some aspects of theexample process2700 may be implemented by the example components shown inFIG. 27, by one or more of the example components shown inFIG. 23A, or by additional or different components. In some implementations of theprocess2700 shown inFIG. 27, time multiplexing of write/read signals is performed at a higher temperature (e.g., in a room temperature stage or an intermediate temperature stage), and de-multiplexing of the write/read signals is performed at a lower temperature (e.g., in a cryogenic temperature stage). Theprocess2700 may include additional or different operations, and the operations can be performed in the order shown inFIG. 27 or in another manner.
• The examplequantum logic controller2710 receives data from thechannel controller2520 and sends instructions to thechannel controller2720. For example, thequantum logic controller2710 may receive readout data indicating the states of one or more qubit devices; and thequantum logic controller2710 may send instructions corresponding to a quantum logic operation to be performed by the quantum processor cell. As shown inFIG. 27, thechannel controller2720 composes a digital composite control sequence based on instructions received from thequantum logic controller2710, and thewideband signal synthesizer2730 generates an analog composite control sequence based on the digital composite control sequence received from thechannel controller2720.
• In the example shown, thewideband signal synthesizer2730 generates time-multiplexed control signals2740. The time-multiplexedcontrol signals2740 include awrite signal2742A for a first qubit device, awrite signal2742B for a second qubit device, aread signal2744A for a first readout device, and aread signal2744B for a second readout device. As shown inFIG. 27, each of the respective signals is separated in the time domain by a switch interval.
• In the example shown, the time-multiplexedcontrol signal2740 is switched (or channelized) by theswitch2750. On one output channel, theswitch2750 generates a first series of de-multiplexed control signals2760A; and on another output channel, theswitch2750 generates a second, distinct series of de-multiplexed control signals2760B. Thede-multiplexed control signals2760A include thewrite signal2742A for the first qubit device and theread signal2744A for the first readout device. Thede-multiplexed control signals2760B include thewrite signal2742B for the second qubit device and theread signal2744B for the second readout device.
• In the example shown, thewrite signal2742A has a first frequency that is addressed to the first qubit device, which has a first qubit operating frequency, and thewrite signal2742B has a second, distinct frequency that is addressed to the second qubit device, which has a distinct, second qubit operating frequency. Similarly, theread signal2744A has a first frequency that is addressed to the first readout device, which has a first readout frequency, and theread signal2744B has a second, distinct frequency that is addressed to the second readout device, which has a distinct, second readout frequency.
• Aspects of the example technique shown inFIG. 27 can be implemented, for example, by a solid state switch or switched filter bank that is used to implement time-division multiplexing. As shown, the signal for each device is communicated in a time interval, and the switch is electronically controlled to provide a continuous signal path to the appropriate output while other signal paths are isolated. In each time interval, respective signals (which may have the same or different content) are routed to either the same destination or a different destination by modifying the switch state to propagate the signal along an alternate output signal path.
• The example architecture shown inFIG. 27 may provide advantages, in some instances, for controlling a quantum processor cell. For example, the architecture may enable control signals to be delivered by a significantly smaller number of electronic components and signal channels. Reducing the number of electronic components can significantly reduce the cost and complexity of the quantum computing system. Moreover, reducing the number of signal lines can significantly reduce the interface between cryogenic temperature stages and higher temperature stages, which may improve shielding and isolation of the quantum processor cell.
• FIG. 28 is a block diagram of an examplequantum computing system2800.
• The examplequantum computing system2800 can include the features of the examplequantum computing system100A shown inFIG. 2, the examplequantum computing system2300 shown inFIG. 23A, or the examplequantum computing system2800 can be implemented in another manner. In some implementations, the examplequantum computing system2800 can encode and process information in a device array that includes a frequency tiling or multiple frequency sub-arrays, such as, for example, thedevice array2120 shown inFIG. 21C, thedevice array2220 shown inFIG. 22C, or another device array. In some instances, one or more components of thequantum computing system2800 may operate according to the example techniques shown and described with respect to one or more ofFIGS. 23A, 23B, 24, 25, 26 and 27, or thequantum computing system2800 may operate in another manner.
• The examplequantum computing system2800 shown inFIG. 28 includes multiple operating domains and multiple operating levels. The operating domains each include a subset of the qubits in a quantum processor cell, and each operating domain may include dedicated hardware at one or more of the operating levels of thequantum computing system2800. In some cases, multiple operating domains share resources at one or more of operating levels.
• In the example shown, thequantum computing system2800 includes asystem control level2801, which is the highest operating level in the system. Thequantum computing system2800 also includes adomain control level2802, which is the second-highest operating level in the system. Below thedomain control level2802, thequantum computing system2800 includes achannel control level2803. Thequantum computing system2800 also includes a quantum processor cell level, which is the lowest level in the system. The quantum processor cell level includes quantumprocessor cell domains2804 for the operating domains of thequantum computing system2800.
• The examplesystem control level2801 shown inFIG. 28 includes aquantum compiler2810, a quantum logic controller (QLC)2812, aclient interface2814, amaster RF reference2816 and a domain bus2805. As shown inFIG. 28, thequantum compiler2810, theQLC2812 and theclient interface2814 communicate with each other by exchanging signals on the domain bus2805. In some instances, thequantum compiler2810, theQLC2812 and theclient interface2814 operate together, for example, to perform one or more operations of theexample control interface2305 shown inFIG. 23A, one or more operations of theprogram interface122 inFIG. 2, or other operations. Thesystem control level2801 may include additional or different components, and the components of a system control level may operate in the manner described with respect toFIG. 28 or in another manner.
• The exampledomain control level2802 includes a domain logic controller (DLC)2820, a non-volatile memory (NVM)/storage2821, a video random access memory (vRAM)2822 (e.g., a flash memory), a graphics processing unit accelerator/optimizer (GPU-AO)2823, adomain data clock2824 and adomain RF reference2825. In some cases, thedomain control level2802 includes a set of such components, and possibly other components, for each operating domain of thequantum computing system2800. In some instances, components in thedomain control level2802 perform one or more operations of theexample control interface2305 shown inFIG. 23A, one or more operations of theprogram interface122 shown inFIG. 2, or other operations. Thedomain control level2802 may include additional or different components, and the components of a domain control level may operate in the manner described with respect toFIG. 28 or in another manner.
• As shown inFIG. 28, thedomain RF reference2825 in thedomain control level2802 communicates with themaster RF reference2816. Also as shown inFIG. 28, theNVM2821, the vRAM2822, and the GPU-AO2823 communicate with each other by exchanging signals on the channel bus2806. The example buses shown inFIG. 28 (e.g., the domain bus2805, the channel bus2806) can be implemented, for example, as high-speed serial computer expansion buses (e.g., a PCIe (Peripheral Component Interconnect Express)), or other types of bus devices.
• The examplechannel control level2803 includes multiple domain controller blocks2830. Eachdomain controller block2830 includes one or more channel controllers. The channel controllers in thedomain controller block2830 may operate, for example, as theexample channel controller2361 shown inFIG. 23B, or the channel controllers may operate in another manner. In the example shown inFIG. 28, thedomain controller block2830 includes one or more read/write channel controllers2834 and one or morecoupler channel controllers2832. In some instances, components in thechannel control level2803 perform one or more operations of thesignal generator system2302 shown inFIG. 23A, one or more operations of thesignal generator system120 shown inFIG. 2, or other operations.
• The example read/write channel controller2834 can control the read and write operations for a group of qubit devices in the quantumprocessor cell domain2804. This domain may include in some instances a group of devices, where each device in the group belongs to a different sub-array, for instance, as described inFIGS. 21A-21C and 22A-22C, or it may be operated in another way. Similarly, the examplecoupler channel controller2832 can control the coupler operations for a group of coupler devices in the quantumprocessor cell domain2804. The read/write channel controller2834 and thecoupler channel controller2832 can communicate with each other by exchanging signals on the channel bus2806. In some instances, the read/write channel controller2834 and thecoupler channel controller2832 can communicate with components in thedomain control level2802 by exchanging signals on the channel bus2806. As shown inFIG. 28, thedomain controller block2830 can also communicate with (e.g., receive clock signals from) thedomain data clock2824 and thedomain RF reference2825.
• The quantumprocessor cell domain2804 includes qubit devices, readout devices and coupler devices that are controlled by control signals from thedomain controller block2830. The readout devices may also send qubit readout signals to thedomain controller block2830. The qubit devices, readout devices and coupler devices can be housed, for example, in an electromagnetic waveguide system or another structure.
• The examplequantum computing system2800 can be assembled and deployed in an appropriate operating environment. For superconducting systems, the operating environment can include a cryogenic, low-noise environment where the ambient level of background noise is reduced or minimized at frequencies relevant to operation of the quantum processor cell. For example, a quantum processor cell with qubit devices and readout devices operating in the range of 3 GHz to 8 GHz maybe be deployed in an environment between 5 mK and 10 mK. In some cases, a quantum processor cell can be deployed at other temperatures (higher or lower). The temperature range can be guided, for example, by the formula f=k_BT/h, where f indicates the frequency of background noise, k_Brepresents the Boltzmann constant, T represents temperature in units of Kelvin, and h represents Planck's constant. In some cases, the temperature range for one or more components of the quantum processor cell can be guided by other considerations or formulas. Moreover, in some cases, one or more levels or components of thequantum computing system2800 operate in higher temperature stages.
• In some cases, signals are transferred between components of thequantum computing system2800 on transmission lines or other types of signal lines. For example, liquid crystal polymer substrates or other types of materials can be used to fabricate high-density, high-isolation, many-channel microwave signal cables. The examplequantum computing system2800 shown inFIG. 28 includes signal lines that transfer signals between high and low temperature stages. In some instances, the signal lines extending from high to low temperature stages in a cryogenic apparatus can introduce a thermal shunt. Moreover, the cooling power at10 mK may be less than 5 and the signal delivery can be performed in architecture with hundreds, thousands or more qubit devices. To reduce the thermal bridging effects of transmission lines carrying DC, radio frequency, or microwave signals, a single transmission line may be used in some instances to deliver signals to multiple devices. In some cases, the signal line connects with a solid state switch, a switched filter bank, a power divider, a frequency multiplexer, or another device in the low temperature stage, and each input signal line bridging the temperature stage may divide into multiple signal distribution branches in the lower temperature stage, for example, to communicate with multiple devices. For instance, the systems and techniques shown and described with respect toFIGS. 23A, 23B, 24, 25, 26 and 27 may be used, or the signal delivery components can be configured in another manner.
• In some instances, after thequantum computing system2800 has been deployed, the system is characterized. For example, operating frequencies of the devices (qubit devices, coupler devices, readout devices) in the quantum processor cell, anharmonicities, power levels, and other parameters of the system can be determined. The system device parameters can be determined, for example, by a characterization process that operates over frequency, power, and time ranges that are broader than the operational ranges used for quantum computation. Thus, thequantum computing system2800 may have broad operating capabilities. In some instances, s-parameters, input impedances, directional coupler outputs, and phase characteristics can be used in connection with identifying system parameters during the characterization process.
• In some instances, after the system parameters have been determined by the characterization process, real-time control over the quantum processor cell components can be established. In some cases, this includes generating, delivering, applying, extracting and processing signals in connection with the devices in the quantum processor cell. The processed signals can be interpreted and used to condition subsequent input pulses, and this process can occur, for example, within a clock cycle of the quantum processor. For instance, a clock cycle can be the time between application of successive quantum logic gates during a quantum computation task. During real-time control, the device parameters and operating frequencies can be identified (e.g., periodically or continuously checked), for example, to account for sources of signal drift (e.g., aging, changes in thermal equilibrium, others).
• In some instances, after establishing real-time control of the quantum processor cell, a quantum computing algorithm may be executed. The logical gates and readout operations that realize the quantum computing algorithm may be interwoven with additional overhead operations that are used to maintain the integrity of the stored quantum information. For example, quantum error correction procedures may be implemented to maintain computational integrity. The quantum computing algorithm and the quantum error correction procedures can be managed by theQLC2812. For example, theQLC2812 can provide instructions for individual channels and orchestrate real-time control on each individual channel across the full quantum processor cell. TheQLC2812 can receive, process and send information to the subsystems of thequantum computing system2800, for example, to execute real-time control of the system.
• In some instances, the real-time control of the quantum processor cell can be used as a computational resource. For example, thequantum computing system2800 can communicate with an external device that is used to orchestrate recompiling and partitioning of the calculations to be performed across multiple processing nodes based on disparate underlying hardware or computing paradigms.
• In the example shown inFIG. 28, theclient interface2814 communicates with theQLC2812 and thequantum compiler2810. In some instances, an application that communicates with theclient interface2814 can be a local application or a remote application that communicates, for example, over a data network (e.g., the Internet, cellular telecommunication infrastructure, a virtual private network, etc.) or another type of communication channel. In some cases, theclient interface2814 specifically targets the application to be run on thequantum computing system2800. In some cases, an external system targets the application to be run on thequantum computing system2800, and theclient interface2814 does not target applications. For example, thequantum computing system2800 may act as a node or an obfuscated accelerator for a particular task to be performed in a larger system.
• Theexample quantum compiler2810 can interpret data and instructions from theclient interface2814 and compile them into a series of quantum logic gates to realize a computational task. In the example shown, theQLC2812 can control the execution of the quantum computation on the quantum processor cell. For instance, theQLC2812 can communicate withmultiple DLCs2820, and eachDLC2820 can orchestrate the operation of an individual operating domain. For example, eachDLC2820 can be mapped to and responsible for a physical region of the quantum processor cell (e.g., a subset of a full lattice of qubit devices and coupler devices, or another type of physical region).
• Theexample QLC2812 may receive measurement data and error-matching calculations performed at thedomain control level2802. Theexample QLC2812 can send eachDLC2820 instructions for the application of time-sequenced or frequency-multiplexed quantum logic or other operations (e.g., single-qubit gates, multi-qubit gates, subroutines, a characterization process, an optimization protocol, measurements, etc.). TheQLC2812 may receive calculation results from error-correction calculations across all operating domains; in some implementations, such calculations at thedomain control level2802 are restricted to errors within a respective operating domain.
• The examplemaster RF reference2816 in thesystem control level2801 can function as a master clock that generates a master clock signal. In some cases, the master clock signal can be distributed for timing and synchronization to each domain in the control system.
• In thedomain control level2802, theDLC2820 communicates with thesystem control level2801, for example, receiving system-level control instructions in the form of time-sequenced quantum logic operations. Theexample DLC2820 can be responsible for both execution of quantum logic operations and other types of operations (e.g., characterization, testing, optimization, etc.) in a given operating domain. Theexample DLC2820 may instruct one or more channels under its operating domain to operate in either a real-time computing mode or an off-line characterization and testing mode. In some cases, the operating mode of each channel is independent of the other channels in thequantum computing system2800.
• In some implementations, theDLC2820 can be implemented as a single- or multi-core processor; as an FPGA or ASIC; or a combination of these and other systems, which may be locally or remotely located. In some cases, for example, when the processing, memory or storage demands on theDLC2820 are significant, theDLC2820 may be supplemented on thedomain control level2802 with a memory resource such as the vRAM2822, the GPU-AO2823, or another resource. For example, the vRAM2822 or the GPU-AO2823 can be used to support error correcting calculations, optimization of individual qubit or coupler channels, or other operations. Thedomain control level2802 may include a solid state or other storage resource. The master clock signal from thesystem control level2801 can be distributed to each domain in thedomain control level2802, and thedomain data clock2824 within each domain can produce a domain clock signal for synchronizing individual channel controllers in thechannel control level2803.
• In some instances, the GPU-AO2823 can provide additional computational resources beyond what is required by the quantum processor cell domain to which it is deployed. Additional processing power (e.g., to form a high-performance hybrid computing system) may be provided within the quantum computing control system described herein. For example, additional processing nodes may be implemented based on a field-programmable gate array (FPGA), a graphics processing unit (GPU), an application-specific integrated circuit (ASIC), a system-on-a-chip (SOC), a single- or multi-core central processing unit (CPU)-based processor, or another type of data processing apparatus.
• In the examplechannel control level2803, individual channel controllers are deployed. The read/write channel controller2834 can be used for read/write control (e.g., measurement and operation) of qubit devices in the quantum processor cell. Thecoupler channel controller2832 can be used for operation of coupler devices in the quantum processor cell. In some cases, the architecture of both types of channel controllers can be the same. In some cases, the read/write channel controller2834 can have physical attributes or performance specifications that are distinct from the attributes or specifications of thecoupler channel controller2832. For example, the read/write channel controller2834 may receive source signals having components in the range of 3 GHz to 5 GHz for control of qubit devices, and the range of 5 GHz to 7 GHz for control of readout devices, and thecoupler control channel2832 may receive source signals in the range of DC (zero frequency) to 1 GHz for control of coupler devices. Other frequency ranges may be used in various implementations.
• In some instances, the FPGA of each channel controller is in real-time communication with theDLC2820. At each clock cycle, the FPGA in some or all of the channel controllers in thedomain controller block2830 can communicate to the DLC2820 a status or measurement outcome, and can receive from theDLC2820 instruction for subsequent execution. The FPGA may receive the instructions from theDLC2820 and induce the DAC and ADC within the channel controller to produce or process signals that allow the system to perform quantum computation operations realizing those instructions. In some cases, the FPGA can implement Kalman filter digital signal processing techniques or other types of processes to optimize or otherwise improve the interpretation of qubit readout signals. In some cases, the FPGA, the DAC and the ADC within each channel controller operate as described with respect toFIG. 23B, or they may operate in another manner.
• In some implementations, the transition frequencies of the qubit devices and the quantum processor cell are staged in frequency. For instance, the qubit frequencies can be chosen such that each qubit in the quantum processor cell has a qubit operating frequency that is distinct from the operating frequencies of all nearest-neighbor qubits, and each nearest-neighbor for any given qubit has a different qubit operating frequency difference than the other nearest-neighbors for the given qubit. Thus, each qubit can have a different difference in frequency between itself and each neighboring qubit, such that no two coupler devices that have the same drive frequency are coupled to the same qubit device.
• In some instances, each individual channel of the quantum computing system (e.g., each channel controller) controls a row, column, sub-array or other domain of one or more subsystems of thequantum computing system2800. Subsystems may include any structure or component that receives control signals. For example, subsystems may include qubit devices, where control signals are used for one-qubit gates or encoding an initial state; readout devices, where control signals are used for extracting information or projective quantum measurement; or other types of devices. In some instances, staging subsystems at different frequencies and controlling those subsystems with pulses reduces the total number of control channels required in the quantum computing system, and may provide other efficiencies or advantages.
• In a general aspect of what is described above, a quantum computing method includes encoding information in a multi-dimensional array of qubit devices housed in a multi-dimensional electromagnetic waveguide lattice. The qubit devices have respective qubit operating frequencies. The electromagnetic waveguide lattice is configured to suppress signal propagation between the qubit devices over a frequency range that includes the qubit operating frequencies.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The method can include processing the information encoded in the qubit devices by operation of coupler devices housed in the electromagnetic waveguide lattice between respective pairs of the qubit devices. The method can include processing the information encoded in the qubit devices by operation of qubit devices. The method can include extracting output information from the qubit devices by operation of readout devices housed in the quantum processor cell assembly.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell assembly. The quantum processor cell assembly includes an electromagnetic waveguide system. The electromagnetic waveguide system includes an interior surface that defines an interior volume of intersecting waveguides. The intersecting waveguides define cutoff frequencies and are configured to evanesce electromagnetic waves below the cutoff frequencies. The quantum computing system includes a multi-dimensional array of qubit devices housed in the electromagnetic waveguide system. The qubit devices have respective qubit operating frequencies below the cutoff frequencies.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The electromagnetic waveguide system can define a two-dimensional waveguide lattice in which a first subset of the waveguides intersect a second subset of the waveguides at a two-dimensional array of waveguide intersections, and the cutoff frequencies are independent of the size of the two-dimensional array. The two-dimensional array can include rows and columns, and the cutoff frequencies can be independent of the number of rows and the number of columns. The electromagnetic waveguide system can define a three-dimensional waveguide lattice in which three distinct subsets of the waveguides intersect each other at a three-dimensional array of waveguide intersections, and the cutoff frequencies can be independent of the size of the three-dimensional array. The three-dimensional array includes rows, columns and layers, and the cutoff frequencies are independent of the number of rows, the number of columns, and the number of layers. The interior surface can define waveguide cross-sections, and the cutoff frequencies can be defined by the waveguide cross-sections. The largest dimension of at least one of the waveguide cross-sections can be between 0.1 and 1.0 centimeters. The interior surface can define waveguide propagation axes that are perpendicular to the respective waveguide cross-sections. The intersecting waveguides can each be configured to propagate electromagnetic waves above the cutoff frequency. Each of the intersecting waveguides can define substantially the same cutoff frequency. Each qubit device can include an electronic circuit that defines the qubit operating frequency of the qubit device. A first subset of the waveguides can intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly. The quantum computing system can include the qubit devices housed at the waveguide intersections and coupler devices housed between neighboring pairs of the qubit devices within the quantum processor cell assembly. The quantum computing system can include coupler devices housed at the waveguide intersections and the qubit devices housed within the quantum processor cell assembly between neighboring pairs of the coupler devices. The multi-dimensional array of waveguide intersections can be aligned with the multi-dimensional array of qubit devices. The quantum computing system can include readout devices housed in the quantum processor cell assembly, the readout devices operably coupled to the qubit devices and configured to produce qubit readout signals based on electromagnetic interactions with the qubit devices. At least a portion of the interior surface can include a superconducting material. At least a portion of the interior surface can include a metallic conductor material. The quantum processor cell assembly can include a lid component and a base component. The lid component and based component can form a partial enclosure that includes the interior volume of the intersecting waveguides.
• In a general aspect of what is described above, a quantum computing method includes receiving qubit control signals at a multi-dimensional array of qubit devices in an electromagnetic waveguide system of a quantum processor cell assembly. The qubit devices having respective qubit operating frequencies. The electromagnetic waveguide system has an interior surface that defines an interior volume of intersecting waveguides. Each intersecting waveguide defining a cutoff frequency above the qubit operating frequency and is configured to evanesce electromagnetic waves below the cutoff frequency.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The electromagnetic waveguide system can define apertures through a portion of the interior surface, and the qubit control signals can be received over control lines that extend in the apertures and couple the qubit devices with an external control system. The quantum computing method can include supporting the qubit devices in the electromagnetic waveguide system on a signal board disposed in the quantum processor cell assembly. The signal board can include qubit signal lines that deliver the qubit control signals to the respective qubit devices. The signal board can include a layered structure that includes the signal lines between layers of insulator material. The electromagnetic waveguide system can include an interior surface that defines waveguide propagation axes and waveguide cross-sections perpendicular to the waveguide propagation axes. The cutoff frequencies can be defined by the waveguide cross-sections. Each qubit device can include an electronic circuit that defines the qubit operating frequency. The electromagnetic waveguide system can defines a two-dimensional waveguide lattice in which a first subset of the waveguides are parallel to each other, a second subset of the waveguides are parallel to each other, and the first subset intersect the second subset at a two-dimensional array of waveguide intersections. The electromagnetic waveguide system can defines a three-dimensional waveguide lattice in which a first subset of the waveguides are parallel to each other, a second subset of the waveguides are parallel to each other, a third subset of the waveguides are parallel to each other, and the first, second and third subsets intersect each other at a three-dimensional array of waveguide intersections. The multi-dimensional array of waveguide intersections can be aligned with the multi-dimensional array of qubit devices. Receiving the qubit control signals can cause the qubit devices to process information encoded in the qubit devices. The quantum computing method can include receiving coupler control signals at coupler device housed between neighboring pairs of the qubit devices in the electromagnetic waveguide system. The quantum computing method can include producing qubit readout signal at readout devices that are housed in the electromagnetic waveguide system and coupled to the qubit devices, the qubit readout signals produced in response to readout control signals delivered to the readout devices.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell assembly comprising a system of intersecting waveguides. Each of the waveguides defines a cross-section and a propagation axis perpendicular to the cross-section, and the cross-section of each waveguide defines a cutoff frequency of the waveguide. The quantum computing system includes a multi-dimensional array of qubit devices housed in the system of intersecting waveguides. The qubit devices have respective qubit operating frequencies below the cutoff frequencies of the intersecting waveguides.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The waveguides can each define substantially the same cutoff frequency, and each waveguide can be configured to propagate electromagnetic waves above the cutoff frequency and to evanesce waves below the cutoff frequency. Each qubit device can include an electronic circuit that defines the qubit operating frequency of the qubit device. The qubit devices housed in the system of intersecting waveguides can have respective qubit operating frequencies below the cutoff frequencies of the intersecting waveguides. Coupler devices can be housed in the system of intersecting waveguides between respective pairs of the qubit devices. The coupler devices can have coupler operating frequencies below the cutoff frequencies of the intersecting waveguides.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell assembly that includes an electromagnetic waveguide system. The electromagnetic waveguide system has an interior surface that defines an interior volume of intersecting waveguides. A first subset of the waveguides intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly. The waveguide intersections include portions of the interior volume that are shared between the first subset and the second subset. The quantum computing system includes a multi-dimensional array of qubit devices housed in the electromagnetic waveguide system.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The multi-dimensional array of waveguide intersections defines distances between neighboring pairs of the waveguide intersections, and the distances can be between 0.2 and 2.0 centimeters. The quantum processor cell assembly can include a lid component and a base component. The lid component and based component can form a partial enclosure that includes the interior volume of the intersecting waveguides. The lid component can include a first portion of the interior surface, and the base component can include a second portion of the interior surface. At least a portion of the interior surface can be a superconducting material. At least a portion of the interior surface can be a metallic conductor material. The electromagnetic waveguide system can define apertures through a portion of the interior surface about the waveguide intersections. The quantum computing system can include control lines that couple the qubit devices with an external control system, and the control lines can extend in the apertures. The electromagnetic waveguide system can include a two-dimensional waveguide lattice in which the first subset of waveguides are parallel to each other and the second subset of waveguides are parallel to each other. The first subset of waveguides can be perpendicular to the second subset of waveguides, and the first subset can intersect the second subset at right angles in the quantum processor cell assembly. Each of the waveguides can include at least one subsection that has a substantially rectangular cross-section. The cross-section can be defined by opposing right and left sidewalls of the electromagnetic waveguide system. The rectangular cross-section can be partially defined by opposing upper and lower sidewalls of the electromagnetic waveguide system. At each waveguide intersection, the right and left sidewalls of a waveguide in the first subset can meet the right and left sidewalls of a waveguide in the second subset. The interior surface can include sidewalls made of at least one of metallic conducting material or superconducting material. The quantum computing system can include qubit devices housed at the waveguide intersections and coupler devices housed in the electromagnetic waveguide system between respective pairs of the qubit devices. The quantum computing system can include coupler devices housed at the waveguide intersections and qubit devices housed in the electromagnetic waveguide system between respective pairs of the coupler devices. The quantum computing system can include a signal board disposed in the quantum processor cell assembly. The signal board can support the qubit devices in the electromagnetic waveguide system. The signal board can include qubit signal lines configured to deliver qubit control signals to the respective qubit devices. The signal board can be a layered structure that includes the signal lines between layers of insulator material. The signal board can support coupler devices in the electromagnetic waveguide system. The coupler devices can reside between respective pairs of qubit devices. The signal board can include receptacles that support the qubit devices and the coupler devices and arms that support the receptacles. One or more of the arms can extend through a wall of the electromagnetic waveguide system between an interior and an exterior of the electromagnetic waveguide system. The signal board can include coupler signal lines configured to deliver coupler control signals to the coupler devices. The signal board can support each qubit device at a respective waveguide intersection, and the multi-dimensional array of qubit devices can be aligned with the multi-dimensional array of waveguide intersections. The quantum computing system can include an input interconnect system that includes plateau structures. The plateau structures can include input interconnect signal lines that deliver device control signals to the signal board. The quantum computing system can include an output interconnect system that includes plateau structures. The plateau structures can include output interconnect signal lines that transfer qubit readout signals from the signal board. The intersecting waveguides can define cutoff frequencies. Each waveguide can be configured to evanesce electromagnetic waves below the cutoff frequency of the waveguide. The cutoff frequencies can be defined by respective cross-sections of the waveguides and they can be independent of the size of the multi-dimensional array.
• In a general aspect of what is described above, a quantum computing method includes receiving qubit control signals at qubit devices housed in an electromagnetic waveguide system of a quantum processor cell assembly. The electromagnetic waveguide system includes an interior surface that defines an interior volume of intersecting waveguides. A first subset of the waveguides intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly. The waveguide intersections include portions of the interior volume that are shared between the first subset and the second subset.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum computing method includes receiving coupler control signals at coupler devices housed between neighboring pairs of the qubit devices in the electromagnetic waveguide system. Receiving the coupler control signals at the coupler devices can cause the coupler devices to produce electromagnetic interactions between the neighboring pairs of qubit devices. The quantum computing method includes producing qubit readout signals at readout devices that are housed in the electromagnetic waveguide system. The qubit readout signals can be produced in response to readout control signals delivered to the readout devices.
• In a general aspect of what is described above, a method includes forming a multi-dimensional lattice of intersecting waveguides in a quantum processor cell assembly. A first subset of the waveguides intersect a second subset of the waveguides at a multi-dimensional array of waveguide intersections in the quantum processor cell assembly. The waveguide intersections include interior volumes that are shared between the first subset and the second subset. The method includes supporting a multi-dimensional array of qubit devices in the lattice of intersecting waveguides.
• Implementations of any of the general aspects described in this document may include one or more of the following features. Forming the intersecting waveguides can include assembling an upper cell member to a lower cell member. The upper and lower cell members can include interior surface structures that define an interior volume of the intersecting waveguides. The qubit devices can be supported between the assembled upper and lower cell assembly members. The qubit devices can be supported by a signal board disposed between the upper and lower cell members. The signal board can include receptacles for the respective qubit devices and arms that support the receptacles. At least a portion of the arms can extend through a wall that separates an interior and an exterior of the intersecting waveguides. The interior surface structures can include sidewalls that define cross-sections of the intersecting waveguides. The qubit devices can be supported at the waveguide intersections. The method can include supporting coupler devices between neighboring pairs of the qubit devices within the intersecting waveguides. The method can include supporting coupler devices in the intersecting waveguides at the waveguide intersections. The qubit devices can be supported between respective pairs of the coupler devices. The method can include supporting readout devices in the quantum processor cell assembly. The method includes aligning the multi-dimensional array of qubit devices with the multi-dimensional array of waveguide intersections.
• In a general aspect of what is described above, a quantum computing system includes qubit devices housed in a quantum processor cell assembly. The qubit devices have respective qubit operating frequencies. The quantum computing system includes an electromagnetic waveguide system in the quantum processor cell assembly. The electromagnetic waveguide system includes waveguide structures between neighboring pairs of the qubit devices. The waveguide structures are configured to suppress signal propagation in a frequency range that includes the qubit operating frequencies. The quantum computing system includes coupler devices housed in the quantum processor cell assembly between neighboring pairs of the qubit devices. The coupler devices are configured to selectively couple the respective neighboring pairs of qubit devices based on coupler control signals received from a control source external to the quantum processor cell assembly.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum computing system can include readout devices housed in the quantum processor cell assembly. The readout devices can be operably coupled to the qubit devices and configured to produce qubit readout signals based on electromagnetic interactions with the qubit devices. The quantum computing system can include a signal board that supports the qubit devices and the coupler devices in the quantum processor cell assembly. The signal board can include receptacles that support the qubit devices and the coupler devices and arms that support the receptacles. One or more of the arms can include qubit signal lines that are configured to communicate qubit control signals to the qubit devices from an input signal processing system. One or more of the arms can include coupler signal lines that are configured to communicate coupler control signals to the qubit devices from an input signal processing system. One or more of the arms can extend through a wall of the electromagnetic waveguide system between an interior and an exterior of the electromagnetic waveguide system. The quantum computing system includes an input interconnect system that includes plateau structures. The plateau structures include input interconnect signal lines that deliver device control signals to the signal board. The quantum computing system includes an output interconnect system that includes plateau structures. The plateau structures include output interconnect signal lines that transfer qubit readout signals from the signal board. The waveguide structures can be made of superconducting material, metallic conductor material, or a combination. The coupler control signals can be received over a control line that extends through an aperture in the electromagnetic waveguide system. The electromagnetic waveguide system can include an interior surface that defines an interior volume of intersecting waveguides, and each waveguide structure can be a subsection of one of the intersecting waveguides. The electromagnetic waveguide system can include a two-dimensional waveguide lattice that includes a first subset of waveguides intersecting a second subset of the waveguides at a two-dimensional array of waveguide intersections in the quantum processor cell assembly. The two-dimensional waveguide lattice can include waveguide subsections between the waveguide intersections, and each subsection can be configured to suppress signal propagation at one or more qubit operating frequencies. The qubit devices can be housed at the waveguide intersections, and the coupler devices can be housed between the qubit devices. The coupler devices can be housed at the waveguide intersections, and the qubit devices can be housed between the coupler devices. The electromagnetic waveguide system can include a three-dimensional waveguide lattice that includes three distinct subsets of the waveguides intersecting each other at a three-dimensional array of waveguide intersections in the quantum processor cell assembly. The three-dimensional waveguide lattice can include waveguide subsections between the waveguide intersections, and each subsection can be configured to suppress signal propagation at one or more qubit operating frequencies. The waveguide structures can define cutoff frequencies, and they can be configured to evanesce electromagnetic waves below the cutoff frequencies. The qubit operating frequencies can be below the cutoff frequencies, and the coupler devices can have coupler operating frequencies below the cutoff frequencies. The qubit devices can be transmon devices, and the coupler devices can be fluxonium devices.
• In a general aspect of what is described above, a quantum computing method includes receiving, at a coupler device in a quantum processor cell assembly, a coupler control signal from a control source external to the quantum processor cell assembly. The coupler device is housed between qubit devices that have respective qubit operating frequencies. The coupler control signal causes the coupler device to produce an electromagnetic interaction between the qubit devices. The quantum computing method includes suppressing, by a waveguide structure between the qubit devices, signal propagation in a frequency range that includes the qubit operating frequencies.
• Implementations of any of the general aspects described in this document may include one or more of the following features. Each qubit device can include an electronic circuit that defines the qubit operating frequency of the qubit device. The quantum computing method can include receiving a qubit control signal at one of the qubit devices. The qubit control signal can cause the qubit device to process information encoded in the qubit device. The quantum computing method can include producing qubit readout signals by operation of readout devices housed in the processor cell assembly. The qubit readout signals can be produced in response to readout control signals delivered to the readout devices based on interactions between the readout devices and the qubit devices. An electromagnetic waveguide system can include an interior surface that defines an interior volume of intersecting waveguides. The waveguide structure that suppresses propagation of signals can be a subsection of electromagnetic waveguide system. The quantum computing method can include receiving qubit control signals at qubit devices housed in an electromagnetic waveguide system in the quantum processor cell assembly. The quantum computing method can include receiving coupler control signals at coupler devices housed between respective pairs of the qubit devices in the electromagnetic waveguide system. The electromagnetic waveguide system can include a two-dimensional waveguide lattice that includes a first subset of waveguides intersecting a second subset of waveguides at waveguide intersections in the quantum processor cell assembly. The qubit devices and coupler devices can be arranged in alignment with the two-dimensional waveguide lattice. The quantum computing method can include suppressing signal propagation at one or more qubit operating frequencies by operation of the electromagnetic waveguide system.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell that includes qubit chips, coupler chips and a signal board. Each qubit chip includes a qubit device. Each coupler chip includes a coupler device. The signal board supports the qubit chips and the coupler chips within the quantum processor cell. The qubit chips are arranged in a multi-dimensional array of qubit locations. The coupler chips are arranged between neighboring pairs of the qubit chips in the multi-dimensional array.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum processor cell can include an electromagnetic waveguide system, and the signal board supports the qubit chips and the coupler chips within the electromagnetic waveguide system. The signal board can include receptacles that support the qubit devices and the coupler devices and arms that support the receptacles. One or more of the arms can extend through a wall of the electromagnetic waveguide system between an interior and an exterior of the electromagnetic waveguide system. The signal board can include qubit signal lines that deliver the qubit control signals to the respective qubit devices. The signal board can include coupler signal lines that deliver the coupler control signals to the respective coupler devices. The signal board can be a layered structure that includes signal lines between layers of insulator material.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell that houses qubit devices and coupler devices in an electromagnetic waveguide system. The qubit devices and the coupler devices form a multi-dimensional device lattice comprising multiple adjoining unit cells. Each unit cell of the device lattice includes at least one of the qubit devices and at least one of the coupler devices. The quantum computing system includes a control system communicably coupled to the quantum processor cell. The control system is configured to control the qubit devices.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum processor cell can house readout devices, and each unit cell of the lattice can include at least one of the readout devices. The electromagnetic waveguide system can include a multi-dimensional waveguide lattice formed by intersecting waveguide sections, and the device lattice can be aligned in the waveguide lattice. The multi-dimensional device lattice can be a two-dimensional device lattice, and each unit cell can include two or more coupler devices. The multi-dimensional device lattice can be a three-dimensional device lattice, and each unit cell can include three or more coupler devices. The quantum computing system can include a signal delivery system that communicates signals between the control system and the quantum processor cell.
• In a general aspect of what is described above, a quantum computing system includes a multi-dimensional array of qubit devices. Each qubit device has a respective qubit operating frequency that is independent of an offset electromagnetic field experienced by the qubit device. The quantum computing system includes coupler devices residing at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. Each coupler device is configured to produce an electromagnetic interaction between the respective neighboring pair of qubit devices. Each coupler device configured to vary a coupling strength of the electromagnetic interaction according to an offset electromagnetic field experienced by the coupler device.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum computing system includes readout devices associated with the multi-dimensional array of qubit devices. Each readout device can be operably coupled to a single, respective qubit device and configured to produce a qubit readout signal that indicates a state of the respective qubit device. The qubit readout signal can be produced in response to a readout control signal delivered to the readout device. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array. The qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each nearest-neighbor qubit device. Each of the neighboring pairs of qubit devices can include a first qubit device having a first qubit operating frequency and a second qubit device having a second, distinct qubit operating frequency. Each coupler device can have a respective coupler operating frequency that varies with the offset electromagnetic field experienced by the coupler device, and the coupling strength can vary according to the coupler operating frequency. The coupler device between each neighboring pair of qubit devices can include bias circuitry and coupler circuitry. The bias circuitry can be configured to produce an offset electromagnetic field that tunes the coupler operating frequency of the coupler device. The coupler circuitry can be configured to experience the offset electromagnetic field and produce the electromagnetic interaction between the neighboring pair of qubit devices. In the coupler device between each neighboring pair of qubit devices the bias circuitry can be configured to tune the coupler operating frequency to a frequency range associated with at least one of the first qubit operating frequency or the second qubit operating frequency. The coupler circuitry can be configured to produce the electromagnetic interaction between the neighboring pair of qubit devices by resonating at a drive frequency that corresponds to a sum or difference of the first qubit operating frequency and the second qubit operating frequency. Each of the qubit devices can be a member of at least two of the neighboring pairs of the qubit devices in the multi-dimensional array. The multi-dimensional array can defines a first set of intervals along a first dimension of the array and a second set of intervals along a second dimension of the array. A first subset of the coupler devices can reside at the first set of intervals, and a second subset of the coupler devices can reside at the second set of intervals. The multi-dimensional array can be a two-dimensional array, and the qubit devices can define rows and columns of the two-dimensional array. The coupler devices can reside at intervals between the qubit devices along the rows and columns of the two-dimensional array. The rows of the two-dimensional array can be oriented perpendicular to the columns of the two-dimensional array. The two-dimensional array can be a square array, a rectangular array, or another type of rectilinear array. The multi-dimensional array can be a three-dimensional array. The qubit devices can define rows, columns and layers of the three-dimensional array. The three-dimensional array can be a rectilinear array. Each of the qubit devices can be a charge qubit. Each of the qubit devices can be a transmon qubit. Each of the qubit devices can be a flux qubit. Each of the qubit devices can be a fluxonium qubit. Each fluxonium qubit can include a topologically closed capacitance. The quantum computing system can include an electromagnetic waveguide system. The electromagnetic waveguide system can have an interior surface that defines an interior volume of intersecting waveguides. The qubit devices can be housed in the electromagnetic waveguide system. The intersecting waveguides can define cutoff frequencies and can be configured to evanesce electromagnetic waves below the cutoff frequencies. The qubit operating frequency of each qubit device can be below the cutoff frequencies. The interior surface of the electromagnetic waveguide system can define waveguide cross-sections. The cutoff frequencies can be defined by the waveguide cross-sections. A first subset of the waveguides can intersect a second subset of the waveguides at an array of waveguide intersections in the electromagnetic waveguide system. The waveguide intersections can include portions of the interior volume that are shared between the first subset and the second subset. The qubit devices can be housed at the waveguide intersections. The coupler devices can be housed in the electromagnetic waveguide system between the intersections. The multi-dimensional array of qubit devices defines distances between neighboring pairs of the qubit devices, and the distances can be between 0.2 and 2.0 centimeters. Each coupler device can be operatively coupled to a single respective neighboring pair of the qubit devices. Each neighboring pair of the qubit devices can be operatively coupled by a single respective coupler device. Each coupler device can be configured to produce the electromagnetic interaction based on coupler control signals that include AC and DC components.
• In a general aspect of what is described above, a quantum computing method includes receiving qubit control signals in a multi-dimensional array of qubit devices. Each qubit device has a respective qubit operating frequency that is independent of an offset electromagnetic field experienced by the qubit device. The qubit control signal received by each qubit device is configured to manipulate a quantum state of the qubit device. The quantum computing method includes receiving coupler control signals at coupler devices. The coupler devices reside at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. The coupler control signal received by each coupler device is configured to produce an electromagnetic interaction between the neighboring pair of qubit devices that the coupler device resides between. A coupling strength of the electromagnetic interaction produced by each coupler device is influenced by an offset electromagnetic field experienced by the coupler device.
• Implementations of any of the general aspects described in this document may include one or more of the following features. Each qubit control signal can include a microwave pulse. Each qubit control signal can be configured to execute a single-qubit gate on qubit device that receives the qubit control signal. A component of the coupler control signals can be a DC signal that causes the coupler devices to experience offset electromagnetic fields. Each of the coupler devices can has a respective coupler operating frequency that varies with the offset electromagnetic field experienced by the coupler device. The coupling strength can vary according to the coupler operating frequency. Each of the neighboring pairs of qubit devices can include a first qubit device having a first qubit operating frequency and a second qubit device having a second, distinct qubit operating frequency. The offset electromagnetic field experienced by each coupler device can tunes the coupler device to a frequency range associated with at least one of the first qubit operating frequency or the second qubit operating frequency. A component of the coupler control signals can be an AC signal that drives the coupler devices while the coupler operating frequencies are tuned to the respective frequency ranges. Each control device can be driven at a drive frequency that corresponds to a sum or difference of the first qubit operating frequency and the second qubit operating frequency. Each coupler control signal can be configured to execute a two-qubit gate on the respective pair of qubit devices that the coupler device resides between. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array. The qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each of its nearest-neighbor qubit device. Each of the neighboring pairs of qubit devices can include a first qubit device having a first qubit operating frequency and a second qubit device having a second, distinct qubit operating frequency. The quantum computing method can include producing qubit readout signals by operation of readout devices associated with the multi-dimensional array of qubit devices. Each readout device can be operably coupled to a single, respective qubit device. Each qubit readout signal can be produced by one of the readout devices in response to a readout control signal. The qubit readout signal can be produced based on an electromagnetic interaction between the readout device and the respective qubit device. The quantum computing method can include receiving readout control signals at the readout devices. Each readout control signal can be received by a respective readout device. Each qubit readout signal can be produced by a respective readout device in response to the readout control signal received by the respective readout device. Each coupler device can be operatively coupled to a single respective neighboring pair of the qubit devices. Each coupler device can be configured to produce the electromagnetic field based on coupler control signals that include AC and DC components.
• In a general aspect of what is described above, a quantum computing system includes a multi-dimensional array of qubit devices. Each qubit device has a respective qubit operating frequency that is independent of an offset electromagnetic field experienced by the qubit device. The quantum computing system includes readout devices associated with the multi-dimensional array of qubit devices. Each readout device is operably coupled to a single, respective qubit device and configured to produce a qubit readout signal that indicates a state of the respective qubit device.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The qubit devices can have respective qubit operating frequencies in a first frequency band, and the readout devices can respective readout frequencies in a second, separate frequency band. The qubit devices can have respective qubit operating frequencies in a frequency band, and the readout devices can have respective readout frequencies that are interleaved between the qubit operating frequencies in the frequency band. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array. The qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each of its nearest-neighbor qubit device. Each readout device can have a respective readout frequency and two or more nearest-neighbor readout devices. The readout frequency of each readout device can be distinct from the respective readout to frequencies of each nearest-neighbor readout device. The quantum computing system can include coupler devices residing at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. Each coupler device can be configured to produce an electromagnetic interaction between the respective neighboring pair of qubit devices that the coupler device resides between. A coupling strength of the electromagnetic interaction produced by each coupler device can vary with an offset electromagnetic field experienced by the coupler device. The multi-dimensional array can be a two-dimensional array, and the qubit devices can define rows and columns of the two-dimensional array. The rows of the two-dimensional array can be oriented perpendicular to the columns of the two-dimensional array. The two-dimensional array can be a rectilinear array (e.g., a square array, a rectangular array). The multi-dimensional array can be a three-dimensional array, and the qubit devices can define rows, columns and layers of the three-dimensional array. The three-dimensional array can be a rectilinear array. Each of the qubit devices can be a charge qubit. Each of the qubit devices can be a transmon qubit. Each of the readout devices can be capacitively coupled to the single, respective qubit device. The quantum computing system can include device chips that each include one of the readout devices and the respective qubit device that the readout device is coupled to. The quantum computing system can include readout chips and separate qubit chips. Each readout chip can include one of the readout devices, and each qubit chip can include one of the qubit devices. The quantum computing system can include an electromagnetic waveguide system. The electromagnetic waveguide system can have an interior surface that defines an interior volume of intersecting waveguides. The qubit devices can be housed in the electromagnetic waveguide system. The intersecting waveguides can each define a cutoff frequency and be configured to evanesce electromagnetic waves below the cutoff frequency. The qubit operating frequency of each qubit device can be below the cutoff frequencies. The interior surface can define waveguide cross-sections, and the cutoff frequencies can be defined by the waveguide cross-sections.
• In a general aspect of what is described above, a quantum computing method includes receiving qubit control signals in a multi-dimensional array of qubit devices. Each qubit device has a respective qubit operating frequency that is independent of an offset electromagnetic field experienced by the qubit device. The qubit control signal received by each qubit device is configured to manipulate a quantum state of the qubit device. The method includes producing qubit readout signals at readout devices associated with the multi-dimensional array of qubit devices. Each readout device is operably coupled to a single, respective qubit device. Each qubit readout signal is produced by one of the readout devices based on an electromagnetic interaction between the readout device and the respective qubit device.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The qubit devices can have respective qubit operating frequencies in a first frequency band, and the readout devices can have respective readout frequencies in a second, separate frequency band. The qubit devices can have respective qubit operating frequencies in a frequency band, and the readout devices can have respective readout frequencies that are interleaved between the qubit operating frequencies in the frequency band. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array, and the qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each nearest-neighbor qubit device. Each readout device can have two or more nearest-neighbor readout devices, and a readout frequency of each readout device can be distinct from respective readout frequencies of each nearest-neighbor readout device. The quantum computing method can include receiving coupler control signals at coupler devices. The coupler devices can reside at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. The coupler control signal received by each coupler device can be configured to produce an electromagnetic interaction between the neighboring pair of qubit devices that the coupler device resides between. The quantum computing method can include manipulating coupling strengths of the electromagnetic interactions produced by the respective coupler devices by controlling offset electromagnetic fields experienced by the respective coupler devices. Each qubit control signal can include a microwave pulse. Each qubit control signal can be configured to execute a single-qubit gate on a qubit device that receives the qubit control signal. The quantum computing method can include receiving readout control signals at the readout devices. Each readout control signal can be received by a respective readout device, and each qubit readout signal can be produced by a respective readout device in response to the readout control signal received by the respective readout device. The qubit readout signal produced by each readout device can be influenced by a quantum state of the qubit device that the readout device is operably coupled to. Each of the readout devices can be capacitively coupled to the single, respective qubit device.
• In a general aspect of what is described above, a quantum computing system includes a quantum processor cell. The quantum processor cell includes a multi-dimensional array of qubit devices. The multi-dimensional array includes sub-arrays associated with separate frequency bands. The qubit devices in each sub-array have a qubit operating frequency within the frequency band associated with the sub-array. The quantum computing system includes a signal delivery system communicably coupled between the quantum processor cell and a control system. The signal delivery system is configured to transfer signals between the array of qubit devices and the control system.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The frequency bands can be spaced apart from each other by intervals along a frequency spectrum. At least one of the frequency bands can be spaced by a first interval from the nearest-neighbor frequency band in a first direction in the frequency spectrum, and the same frequency band can be spaced by a second, distinct interval from the nearest-neighbor frequency band in a second direction in the frequency spectrum. The frequency bands can be spaced apart from each other by intervals along a frequency spectrum, and the intervals between neighboring pairs of frequency bands can include a first subset of equal intervals and a second subset of equal intervals. The intervals in the first subset can be larger than the intervals in the second subset. The multi-dimensional array can include groups of the qubit devices. Each group can include one qubit device in each of the sub-arrays. The groups can collectively define a tiling over the multi-dimensional array. The multi-dimensional array can be a two-dimensional array, and the tiling can be a two-dimensional tiling. Each group can consist of six qubit devices, and the tiling can be a six-by-six tiling. Each group can consist of five qubit devices, and the tiling can be a five-by-five tiling. The control system can include one or more waveform generator systems configured to generate multiplexed control signals for each respective group of the qubit devices. The signal delivery system can include an input signal processing system that includes, for each group of qubit devices, an input channel, a de-multiplexer and output channels. The input channel can be configured to receive the multiplexed control signal for the group of qubit devices. The de-multiplexer can be configured to separate device control signals from the multiplexed control signal for the group of qubit devices. The output channels can be configured to communicate the respective device control signals into the quantum processor cell for the group of qubit devices. The signal delivery system can include an output signal processing system that includes, for each group of qubit devices, input channels, a multiplexer and an output channel. The input channels can be configured to receive qubit readout signals from a group of readout devices associated with the group of qubit devices. The multiplexer can be configured to generate a multiplexed readout signal by multiplexing the qubit readout signals. The output channel can be configured to communicate the multiplexed readout signal from the output signal processing system on a physical channel. The control system can include one or more data processors. The data processors can be operable to receive the multiplexed readout signal for each group of readout devices. The data processors can be operable to identify, from each multiplexed readout signal, qubit readout data for each qubit device in the group based on the readout frequency of the associated readout device. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array, and the qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each nearest-neighbor qubit device. The quantum computing system can include readout devices associated with the multi-dimensional array of qubit devices. Each readout device can be operably coupled to a single, respective qubit device and configured to produce a qubit readout signal that indicates a state of the respective qubit device. The quantum computing system can include coupler devices residing at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. Each coupler device can be configured to produce an electromagnetic interaction between the respective neighboring pair of qubit devices that the coupler device resides between. The electromagnetic interaction produced by each coupler device can have a coupling strength that varies with an offset electromagnetic field experienced by the coupler device. Each neighboring pair of qubit devices can include a first qubit device having a first qubit operating frequency and a second qubit device having a second, distinct qubit operating frequency. The multi-dimensional array can defines a first set of intervals along a first dimension of the array and a second set of intervals along a second dimension of the array. A first subset of the coupler devices can reside at the first set of intervals, and a second subset of the coupler devices can reside at the second set of intervals. Each of the qubit devices can be a charge qubit. Each of the qubit devices can be a transmon device. The quantum computing system can include an electromagnetic waveguide system. The electromagnetic waveguide system can have an interior surface that defines an interior volume of intersecting waveguides. The qubit devices can be housed in the electromagnetic waveguide system. The intersecting waveguides can each define a cutoff frequency and be configured to evanesce electromagnetic waves below the cutoff frequency. The qubit operating frequency of each qubit device can be below the cutoff frequencies. The interior surface can defines waveguide cross-sections, and the cutoff frequencies can be defined by the waveguide cross-sections.
• In a general aspect of what is described above, a quantum computing method includes receiving qubit control signals at a quantum processor cell comprising a multi-dimensional array of qubit devices. The multi-dimensional array includes sub-arrays associated with separate frequency bands. The qubit devices in each sub-array have a qubit operating frequency within the frequency band associated with the sub-array. The qubit control signal received by each qubit device is configured to manipulate a quantum state of the qubit device. The quantum computing method includes communicating the qubit control signals to respective qubit devices in the quantum processor cell.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The frequency bands can be spaced apart from each other at intervals along a frequency spectrum. At least one of the frequency bands is spaced by a first interval from the nearest-neighbor frequency band in a first direction in the frequency spectrum, and is spaced by a second, distinct interval from the nearest-neighbor frequency band in a second direction in the frequency spectrum. The intervals between neighboring pairs of frequency bands can include a first subset of equal intervals and a second subset of equal intervals. The intervals in the first subset can be larger than the intervals in the second subset. The multi-dimensional array can include groups of the qubit devices. Each group includes one qubit device in each of the sub-arrays. The groups can collectively define a tiling over the multi-dimensional array. The multi-dimensional array can be a two-dimensional array, and the tiling can be a two-dimensional tiling. The quantum computing method can include, for each respective group of the qubit devices: generating qubit control information; generating a multiplexed control signal from the qubit control information; communicating the multiplexed control signal on a physical channel into an input signal processing system; separating qubit control signals from the multiplexed control signal by de-multiplexing the multiplexed control signal in the input signal processing system; and communicating the respective qubit control signals into the quantum processor cell. The quantum computing method can include, for each respective group of the qubit devices: producing qubit readout signals by operating a group of readout devices associated with the group of qubit devices; generating a multiplexed readout signal in an output signal processing system by multiplexing the qubit readout signals; communicating the multiplexed readout signal from the output signal processing system on a physical channel; receiving the multiplexed readout signal at a control system; and identifying, by operation of the control system, qubit readout data for each device in the group, the qubit readout data from each respective readout device identified from the multiplexed readout signal based on the readout frequency of the readout device. Each qubit device can have two or more nearest-neighbor qubit devices in the multi-dimensional array, and the qubit operating frequency of each qubit device can be distinct from the respective qubit operating frequencies of each nearest-neighbor qubit device. The quantum computing method can include producing qubit readout signals at readout devices associated with the multi-dimensional array of qubit devices. Each readout device can be operably coupled to a single, respective qubit device. Each qubit readout signal can be produced by one of the readout devices based on an electromagnetic interaction between the readout device and the respective qubit device. The quantum computing method can include receiving coupler control signals at coupler devices. The coupler devices can reside at intervals between neighboring pairs of the qubit devices in the multi-dimensional array. The coupler control signal received by each coupler device can be configured to produce an electromagnetic interaction between the neighboring pair of qubit devices that the coupler device resides between. The quantum computing method can include manipulating a coupling strength of the electromagnetic interactions produced by the respective coupler devices by controlling offset electromagnetic fields experienced by the respective coupler devices.
• In a general aspect of what is described above, a quantum computing method includes generating quantum processor control information for a group of devices housed in a quantum processor cell. Each device in the group has a distinct operating frequency. A multiplexed control signal is generated based on the quantum processor control information. The multiplexed control signal is communicated on a physical channel into an input signal processing system. Device control signals are separated from the multiplexed control signal by de-multiplexing the multiplexed control signal in the input signal processing system. The respective device control signals are communicated into the quantum processor cell for the group of devices.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum computing method can include communicating the multiplexed control signal from a first, higher temperature stage to a second, lower temperature stage, wherein the input signal processing system and the quantum processor cell operate in the second temperature stage. The first temperature stage can be a room temperature stage, and the second temperature stage can be a cryogenic temperature stage. The quantum computing method can include de-multiplexing the multiplexed control signal in a low-noise, cryogenic environment. The multiplexed control signal can be a microwave signal communicated by a microwave transmission line. The quantum computing method can include shielding the quantum processor cell against microwave and optical frequencies. The shielding can be performed by metallic, superconducting, or lossy material, or a combination thereof. The quantum processor control information can include control sequences for the respective devices in the group. Each device control signal can correspond to one of the control sequences. The control sequences can include digital information, and the device control signals can be analog information. The quantum computing method can include: receiving, at an output signal processing system, qubit readout signals from a group of readout devices housed in a quantum processor cell; generating a multiplexed readout signal in the output signal processing system by multiplexing the qubit readout signals; and communicating the multiplexed readout signal from the output signal processing system on a physical channel. The quantum computing method can include: generating multiplexed control information from the quantum processor control information; and generating a multiplexed control signal from the multiplexed control information. The quantum processor control information can include digital information generated by operation of one or more processors executing computer-readable instructions, and the multiplexed control signal can include an analog signal generated by a waveform generator. Communicating the respective device control signals into the quantum processor cell can include communicating each device control signal from the input signal processing system to a respective input interconnect signal line. Each of the input interconnect signal lines can extend from an exterior of the quantum processor cell to an interior of the quantum processor cell. The quantum computing method can include routing the device control signals to the respective devices within the quantum processor cell. The group of devices can be supported in the quantum processor cell by a signal board that includes signal lines. The device control signals can be routed to the respective devices by the signal lines. The group of devices can be a group of qubit devices. The quantum processor control information can include qubit control information for the group of qubit devices. The qubit control information can include qubit control sequences for the respective qubit devices in the group, and the qubit control sequence for each qubit device can be configured to execute a single-qubit operation on the qubit device. The group of devices can be a group of coupler devices. The quantum processor control information can include coupler control information for the group of coupler devices. The coupler control information can include coupler control sequences for the respective coupler devices in the group, and the coupler control sequence for each coupler device can be configured to execute a two-qubit operation on a pair of qubit devices that neighbor the coupler device. The group of devices can be a group of readout devices. The quantum processor control information can include readout control information for the group of readout devices. The readout control information can include readout control sequences for the respective readout devices in the group, and the readout control sequence for each readout device can be configured to execute a readout operation of a qubit device associated with the readout device. The group of devices can be a first group of devices that each have distinct operating frequencies in a frequency range, and the method can include: generating first quantum processor control information for the first group of devices; generating second, distinct quantum processor control information for a second group of devices housed in a quantum processor cell; generating a first multiplexed control signal based on the first quantum processor control information; generating a second, distinct multiplexed control signal based on the second quantum processor control information; communicating the first multiplexed control signal on a first physical channel into the input signal processing system; communicating the second multiplexed control signal on a second, distinct physical channel into the input signal processing system; separating a first set of device control signals from the first multiplexed control signal by de-multiplexing the first multiplexed control signal in the input signal processing system; separating a second, distinct set of device control signals from the second multiplexed control signal by de-multiplexing the second multiplexed control signal in the input signal processing system; communicating the first set of device control signals into the quantum processor cell for the first group of devices; and communicating the second set of device control signals into the quantum processor cell for the second group of devices. The quantum processor cell can include a multi-dimensional array of qubit devices. The multi-dimensional array can include sub-arrays associated with separate frequency bands. The qubit devices in each sub-array can have a qubit operating frequency within the frequency band associated with the sub-array. The group of devices can be a group of the qubit devices in the multi-dimensional array, and the group of qubit devices can include one qubit device in each of the sub-arrays. The multi-dimensional array includes multiple groups of qubit devices, and each group of qubit devices can include one qubit device in each of the sub-arrays.
• In a general aspect of what is described above, a quantum computing system includes a control system and an input signal processing system. The control system includes one or more data processors and a waveform generator. The input signal processing system includes an input channel, a de-multiplexer and output channels.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The one or more data processors are configured to generate quantum processor control information for a group of qubit devices housed in a quantum processor cell. Each device in the group has a distinct operating frequency. The waveform generator is configured to generate a multiplexed control signal from the quantum processor control information. The waveform generator can be an arbitrary waveform generator configured to convert digital signals to analog signals. The input channel is configured to receive the multiplexed control signal. The de-multiplexer is configured to separate device control signals from the multiplexed control signal. The output channels are configured to communicate the respective device control signals into the quantum processor cell for the group of devices. The control system can be configured to operate at a first, higher temperature stage, and the input signal processing system and the quantum processor cell can be configured to operate at a second, lower temperature stage. The first temperature stage can be a room temperature stage, and the second temperature stage can be a cryogenic temperature stage. The input signal processing system can be configured to process device control signals in a low-noise, cryogenic environment. The quantum computing system can include magnetic shielding material about the quantum processor cell and the input signal processing system. The multiplexed control signal can be a microwave signal, and the quantum computing system can include a microwave transmission line configured to communicate the multiplexed control signal. The quantum processor control information can include control sequences for the respective devices in the group, and each device control signal can corresponds to one of the control sequences. The control system can be configured to generate digital information that defines the control sequences, and the waveform generator can be configured to generate analog information that defines the multiplexed control signal. The input signal processing system can include a board that supports processing cards. The processing cards can be supported in receptacle slots defined in the board. The input signal processing system can include multiple input processing domains. Each input processing domain can include a respective subset of the processing cards. At least one of the processing cards in each input processing can be interchangeable with a corresponding processing card in another input processing domain. The quantum computing system can include an output signal processing system that includes: input channels configured to receive qubit readout signals from the group of devices; a multiplexer configured to generate a multiplexed readout signal by multiplexing the qubit readout signals; and an output channel configured to communicate the multiplexed readout signal from the output signal processing system. The quantum computing system can include an input interconnect system that includes input interconnect signal lines extending from an exterior of the quantum processor cell to an interior of the quantum processor cell. The input interconnect signal lines can be configured to communicate the device control signals between the output channels and the respective devices. The input interconnect system can include plateau structures that support at least a portion of the input interconnect signal lines inside the quantum processor cell. The quantum computing system can include a signal board that supports the devices in the quantum processor cell and includes signal lines. The signal lines can be configured to route the device control signals within the quantum processor cell to the respective devices. The group of devices can be a group of qubit devices. The quantum processor control information can include qubit control information for the group of qubit devices. The group of devices can be a group of coupler devices. The quantum processor control information can include coupler control information for the group of coupler devices. The group of devices can be a group of readout devices. The quantum processor control information can include readout control information for the group of readout devices. The quantum processor cell can include a multi-dimensional array of qubit devices. The multi-dimensional array can include sub-arrays associated with separate frequency bands. The qubit devices in each sub-array can have a qubit operating frequency within the frequency band associated with the sub-array. The group of devices can include a group of the qubit devices in the multi-dimensional array. The group of qubit devices can include one qubit device in each of the sub-arrays. The multi-dimensional array can include multiple groups of qubit devices. Each group of qubit devices can include one qubit device in each of the sub-arrays.
• In a general aspect of what is described above, a quantum computing method includes receiving, at an output signal processing system, qubit readout signals from a group of readout devices housed in a quantum processor cell. A multiplexed readout signal is generated in the output signal processing system by multiplexing the qubit readout signals. The multiplexed readout signal is communicated from the output signal processing system on a physical channel. The multiplexed readout signal is received at a control system. Qubit readout data are identified, by operation of the control system, from each readout device. The qubit readout data for each respective readout device are identified from the multiplexed readout signal based on the distinct readout frequency of the readout device. Based on qubit readout data, multiplexed quantum processor control information is generated for the quantum processor cell.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The quantum computing method can include communicating the multiplexed readout signal from a first, lower temperature stage to a second, higher temperature stage. The output signal processing system and the quantum processor cell can operate in the first temperature stage, and the control system can operate in the second temperature stage. The first temperature stage can be a cryogenic temperature stage, and the second temperature stage can be a room temperature stage. The quantum computing method can include multiplexing the qubit readout signals in a low-noise, cryogenic environment. The quantum computing method can include shielding the quantum processor cell against microwave and optical frequencies. The shielding is performed by a metallic, superconducting, or lossy material, or a combination thereof. The quantum computing method can include: generating an analog multiplexed readout signal in the output signal processing system by multiplexing the qubit readout signals; communicating the analog multiplexed readout signal from the output signal processing system on a physical channel; generating a digital multiplexed readout signal by digitizing the analog multiplexed readout signal; and identifying, by operation of the control system, the qubit readout data from the digitized multiplexed readout signal. The qubit readout data for each respective device can correspond to the qubit readout signal from the device. The qubit readout data can include digital information, and the qubit readout signals can include analog information. The quantum computing method can include: generating a multiplexed control signal based on the multiplexed quantum processor control information; communicating the multiplexed control signal on a physical channel into an input signal processing system; separating device control signals from the multiplexed control signal by de-multiplexing the multiplexed control signal in the input signal processing system; and communicating the respective device control signals into the quantum processor cell for the group of devices. The qubit readout data can include digital information, and the multiplexed readout signal can include analog information. The quantum computing method can include communicating the qubit readout signals from the respective devices to the output signal processing system. Each qubit readout signal can be communicated to the output signal processing system by a respective output interconnect signal line. Each of the output interconnect signal lines can extends from an interior of the quantum processor cell to an exterior of the quantum processor cell. The quantum computing method can include routing the qubit readout signals from the devices to the output interconnect signal lines within the quantum processor cell. The group of devices can be supported in the quantum processor cell by a signal board that includes the signal lines. The qubit readout signals can be routed from the respective devices by the signal lines. The quantum computing method can include obtaining the qubit readout signals by operation of the readout devices in the quantum processor cell. Each of the readout devices can be operatively coupled to a respective qubit device in the quantum processor cell. The quantum processor control information can include coupler control information for a group of coupler devices in the quantum processor cell. The coupler control information can include coupler control sequences for the respective coupler devices in the group, and the coupler control sequence for each coupler device can be configured to execute a two-qubit operation on a pair of qubit devices that neighbor the coupler device. The quantum processor cell can house a group of qubit devices. Each of the readout devices can be operably coupled to a single, respective one of the qubit devices. The qubit readout signal produced by each readout device can indicates a state of the qubit device to which the readout device is operably coupled. The group of readout devices can include a first group of readout devices that each have distinct operating frequencies in a frequency range. The quantum computing method can include: receiving, at the output signal processing system, first qubit readout signals from the first group of readout devices; receiving, at the output signal processing system, second, distinct qubit readout signals from a second, distinct group of readout devices housed in the quantum processor cell, the second group each having distinct operating frequencies in the frequency range; generating a first multiplexed readout signal in the output signal processing system by multiplexing the first qubit readout signals; generating a second, distinct multiplexed readout signal in the output signal processing system by multiplexing the second qubit readout signals; communicating the first multiplexed readout signal from the output signal processing system on a first physical channel; communicating the second multiplexed readout signal from the output signal processing system on a second, distinct physical channel; receiving the first and second multiplexed readout signals at the control system; identifying, by operation of the control system, qubit readout data from each readout device in the first and second groups, the qubit readout data for each respective readout device identified from the first and second multiplexed readout signals based on the distinct readout frequency of the readout device; and based on qubit readout data, preparing the multiplexed quantum processor control information for the quantum processor cell. The quantum processor cell can include a multi-dimensional array of qubit devices. The multi-dimensional array can include sub-arrays associated with separate frequency bands. The qubit devices in each sub-array can have a qubit operating frequency within the frequency band associated with the sub-array. The qubit readout signals can be associated with a group of the qubit devices in the multi-dimensional array, and the group of qubit devices can include one qubit device in each of the sub-arrays.
• In a general aspect of what is described above, a quantum computing system includes an output signal processing system and a control system. The output signal processing system includes input channels, a multiplexer and an output channel. The control system includes one or more data processors.
• Implementations of any of the general aspects described in this document may include one or more of the following features. The input channels are configured to receive qubit readout signals from a group of readout devices housed in a quantum processor cell. Each readout device in the group has a distinct readout frequency. The multiplexer is configured to generate a multiplexed readout signal by multiplexing the qubit readout signals. The output channel is configured to communicate the multiplexed readout signal from the output signal processing system. The one or more data processors are operable to receive the multiplexed readout signal. The one or more data processors are operable to identify, from the multiplexed readout signal, qubit readout data for each qubit device in the group based on the distinct readout frequency of the readout device The one or more data processors are operable to prepare multiplexed quantum processor control information for the quantum processor cell based on the qubit readout data. The control system can be configured to operate at a first, higher temperature stage. The output signal processing system and the quantum processor cell can be configured to operate at a second, lower temperature stage. The first temperature stage can be a room temperature stage, and the second temperature stage can be a cryogenic temperature stage. The output signal processing system can be configured to process device control signals in a low-noise, cryogenic environment. The quantum computing system can include magnetic shielding material about the quantum processor cell and the output signal processing system. The qubit readout data for each respective device can corresponds to the qubit readout signal from the device. The output signal processing system can include a board that supports processing cards. The processing cards can be supported in receptacle slots defined in the board. The output signal processing system can include multiple output processing domains. Each output processing domain can include a respective subset of the processing cards. At least one of the processing cards in each output processing domain can be interchangeable with a corresponding processing card in another output processing domain. The quantum computing system can include a waveform generator configured to generate a multiplexed control signal from the multiplexed quantum processor control information and an input signal processing system. The input signal processing system can include: an input channel configured to receive the multiplexed control signal; a de-multiplexer configured to separate device control signals from the multiplexed control signal; and output channels configured to communicate the respective device control signals into the quantum processor cell. The quantum computing system can include an output interconnect system that includes output interconnect signal lines extending from an interior of the quantum processor cell to an exterior of the quantum processor cell. The output interconnect signal lines can be configured to communicate the qubit readout signals between the readout devices and the respective input channels of the output signal processing system. The output interconnect system can include plateau structures that support at least a portion of the output interconnect signal lines inside the quantum processor cell. The quantum computing system can include a signal board that supports the devices in the quantum processor cell and includes signal lines. The signal lines can be configured to route the qubit signals within the quantum processor cell from the respective readout devices. The quantum computing system can include the quantum processor cell and a group of qubit devices housed in the quantum processor cell. Each qubit device can have a respective qubit operating frequency. Each of the readout devices can be operably coupled to a single, respective one of the qubit devices. The qubit readout signal produced by each readout device can indicate a state of the qubit device to which the readout device is operably coupled. The quantum processor cell can include a multi-dimensional array of qubit devices. The multi-dimensional array can include sub-arrays associated with separate frequency bands. The qubit devices in each sub-array can have a qubit operating frequency within the frequency band associated with the sub-array. The qubit readout signals can be associated with a group of the qubit devices in the multi-dimensional array. The group of qubit devices can includes one qubit device in each of the sub-arrays. The output signal processing system can include filters, circulators and quantum amplifiers configured to process the qubit readout signals.
• While this specification contains many details, these should not be construed as limitations on the scope of what may be claimed, but rather as descriptions of features specific to particular examples. Certain features that are described in this specification in the context of separate implementations can also be combined. Conversely, various features that are described in the context of a single implementation can also be implemented in multiple embodiments separately or in any suitable subcombination.
• A number of examples have been described. Nevertheless, it will be understood that various modifications can be made. Accordingly, other implementations are within the scope of the following claims.

Claims (21)

1-108. (canceled)

109. A quantum computing method comprising:

receiving, at a coupler device in a quantum processor cell assembly, a coupler control signal from a control source external to the quantum processor cell assembly, the coupler device housed between qubit devices that have respective qubit operating frequencies, the coupler control signal causing the coupler device to produce an electromagnetic interaction between the qubit devices; and

suppressing, by a waveguide structure between the qubit devices, signal propagation at the qubit operating frequencies.

110. The quantum computing method ofclaim 109, wherein each qubit device comprises an electronic circuit that defines the qubit operating frequency of the qubit device.

111. The quantum computing method ofclaim 109, further comprising receiving a qubit control signal at one of the qubit devices, wherein the qubit control signal causes the qubit device to process information encoded in the qubit device.

112. The quantum computing method ofclaim 109, further comprising producing qubit readout signals by operation of readout devices housed in the processor cell assembly, the qubit readout signals produced in response to readout control signals delivered to the readout devices based on interactions between the readout devices and the qubit devices.

113. The quantum computing method ofclaim 109, wherein an electromagnetic waveguide system comprises an interior surface that defines an interior volume of intersecting waveguides, and the waveguide structure that suppresses propagation of signals comprises a subsection of electromagnetic waveguide system.

114. The quantum computing method ofclaim 109, comprising:

receiving qubit control signals at qubit devices housed in an electromagnetic waveguide system in the quantum processor cell assembly; and

receiving coupler control signals at coupler devices housed between respective pairs of the qubit devices in the electromagnetic waveguide system.

115. The quantum computing method ofclaim 114, wherein the electromagnetic waveguide system comprises a two-dimensional waveguide lattice that includes a first subset of waveguides intersecting a second subset of waveguides at waveguide intersections in the quantum processor cell assembly, and the qubit devices and coupler devices are arranged in alignment with the two-dimensional waveguide lattice.

116. The quantum computing method ofclaim 115, comprising suppressing signal propagation at one or more qubit operating frequencies by operation of the electromagnetic waveguide system.

117. A quantum computing method comprising:

encoding information in qubit devices housed in an electromagnetic waveguide system in a quantum processor cell assembly, the qubit devices having respective qubit operating frequencies, the electromagnetic waveguide system configured to suppress signal propagation over a frequency range that includes the qubit operating frequencies; and

processing the information encoded in the qubit devices by operation of coupler devices housed in the electromagnetic waveguide system between respective pairs of the qubit devices.

118. The quantum computing method ofclaim 117, comprising processing the information encoded in the qubit devices by operation of qubit devices.

119. The quantum computing method ofclaim 117, further comprising extracting output information from the qubit devices by operation of readout devices housed in the quantum processor cell assembly.

120. The quantum computing method ofclaim 117, comprising executing a quantum algorithm on the information encoded in the qubit devices, wherein the quantum algorithm includes one or more multi-qubit gates that are executed by operation of the coupler devices.

121. The quantum computing method ofclaim 120, wherein the quantum algorithm includes one or more single-qubit gates that are executed by operation of the qubit devices.

122-128. (canceled)

129. A quantum computing system comprising:

a quantum processor cell that houses qubit devices and coupler devices in an electromagnetic waveguide system, the qubit devices and the coupler devices forming a multi-dimensional device lattice comprising multiple adjoining unit cells, each unit cell of the device lattice comprising at least one of the qubit devices and at least one of the coupler devices; and

a control system communicably coupled to the quantum processor cell and configured to control the qubit devices.

130. The quantum computing system ofclaim 129, wherein the quantum processor cell houses readout devices, and each unit cell of the lattice includes at least one of the readout devices.

131. The quantum computing system ofclaim 129, wherein the electromagnetic waveguide system comprises a multi-dimensional waveguide lattice formed by intersecting waveguide sections, wherein the device lattice is aligned in the waveguide lattice.

132. The quantum computing system ofclaim 129, wherein the multi-dimensional device lattice comprises a two-dimensional device lattice, and each unit cell comprises two or more coupler devices.

133. The quantum computing system ofclaim 129, wherein the multi-dimensional device lattice comprises a three-dimensional device lattice, and each unit cell comprises three or more coupler devices.

134. The quantum computing system ofclaim 129, further comprising a signal delivery system that communicates signals between the control system and the quantum processor cell.

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