US20160359403A1 - Bjt driver with dynamic adjustment of storage time versus input line voltage variations - Google Patents

Abstract

A power converter controller includes a storage time reference circuit to generate a storage time reference signal in response to an input voltage signal. A first comparator generates a collector off signal in response to a current sense signal of a BJT and a collector off reference threshold signal. A storage time regulator circuit generates a base off reference threshold signal in response to the storage time reference signal and the collector off signal. A second comparator generates a base off signal in response to the current sense signal and a base off reference threshold signal. A driver circuit controls switching of the BJT in response to an output voltage signal, discontinues charging a base terminal of the BJT in response to the base off signal, and starts discharging the base terminal of the BJT in response to the collector off signal during a switching cycle of the BJT.

Description

BACKGROUND INFORMATION
• Field of the Disclosure
• The present invention relates generally to switched mode power converters utilizing a Bipolar Junction Transistor (BJT) as a switching element. More specifically, the present invention is directed to the measurement and prediction of the BJT storage time to provide a sufficient turn-off delay time for the improved performance of a power converter.
• Background
• Electronic devices (such as cell phones, tablets, laptops, etc.) use power to operate. Switched mode power converters are commonly used due to their high efficiency, small size, and low weight to power many of today's electronics. Conventional wall sockets provide a high voltage alternating current. In a switching power converter, a high voltage alternating current (AC), 50 or 60 Hz, input is converted through high frequency (HF) switching of a switching element with controlled on and off states to provide a well-regulated direct current (DC) output through an energy transfer element to a load. The desired output is provided by varying the duty cycle (ratio of the on-time to the total switching period, known as pulse width modulation (PWM), varying the switching frequency, which is known as pulse frequency modulation (PFM), or by skipping some switching pulses per the load change requirement, which is known as on-off control.
• With stringent energy saving regulations for power converters, there are continuing efforts to provide improved operation and high efficiency in power converters. One important parameter in an improved and efficient power converter is an optimized switching function. Switching elements of the power converter affect the efficiency of the power converter by contributing to both the conduction loss and switching loss, which form a major part of the power loss in the power converter.
• MOSFET, BJT, IGBT or other types of semiconductor switches may be used in switched mode power converters as a switching element. Each of these types of electronic/semiconductor switches may require specific driving provisions for efficient performance. BJT switches are fast and efficient devices for switching. However, due to their junction stored charge, BJT switches require special provisions in order to have an efficient turn off.
BRIEF DESCRIPTION OF THE DRAWINGS
• Non-limiting and non-exhaustive embodiments of the present invention are described with reference to the following figures, wherein like reference numerals refer to like parts throughout the various views unless otherwise specified.
• FIG. 1 is a block diagram illustrating one general example of a power converter based on the teachings of the present invention utilizing a BJT controller with dynamic storage time reference.
• FIG. 2 is an example graph illustrating examples of ambient temperature rise of a BJT versus storage time with low and high input line voltages.
• FIG. 3 illustrates interconnections of example BJT controller blocks with a dynamic storage time reference in accordance with the teachings of the present invention.
• FIG. 4A is a graph illustrating waveforms and relationships between example signals with a low line for a BJT controller blocks with dynamic storage time reference in accordance with the teachings of the present invention.
• FIG. 4B is a graph illustrating waveforms and relationships between example signals with a high line for a BJT controller blocks with dynamic storage time reference in accordance with the teachings of the present invention.
• Corresponding reference characters indicate corresponding components throughout the several views of the drawings. Skilled artisans will appreciate that elements in the figures are illustrated for simplicity and clarity and have not necessarily been drawn to scale. For example, the dimensions of some of the elements in the figures may be exaggerated relative to other elements to help to improve understanding of various embodiments of the present invention. Also, common but well-understood elements that are useful or necessary in a commercially feasible embodiment are often not depicted in order to facilitate a less obstructed view of these various embodiments of the present invention.
DETAILED DESCRIPTION
• In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention. It will be apparent, however, to one having ordinary skill in the art that the specific detail need not be employed to practice the present invention. In other instances, well-known materials or methods have not been described in detail in order to avoid obscuring the present invention.
• Reference throughout this specification to “one embodiment”, “an embodiment”, “one example” or “an example” means that a particular feature, structure or characteristic described in connection with the embodiment or example is included in at least one embodiment of the present invention. Thus, appearances of the phrases “in one embodiment”, “in an embodiment”, “one example” or “an example” in various places throughout this specification are not necessarily all referring to the same embodiment or example. Furthermore, the particular features, structures or characteristics may be combined in any suitable combinations and/or subcombinations in one or more embodiments or examples. Particular features, structures or characteristics may be included in an integrated circuit, an electronic circuit, a combinational logic circuit, or other suitable components that provide the described functionality. In addition, it is appreciated that the figures provided herewith are for explanation purposes to persons ordinarily skilled in the art and that the drawings are not necessarily drawn to scale.
• As will be discussed, example power converters utilizing a BJT power switch as a switching element with improved operation and performance are disclosed. In one example, an improved controller block for driving a BJT power switch element of a power converter is introduced. The input line voltage is dynamically monitored and modeled, and a storage time reference is generated in response to the input line voltage. In the example, the BJT base turn off and storage time of the BJT are dynamically adjusted each switching cycle in response to the storage time reference to insert a controlled BJT turn off delay in each switching cycle in response to a dynamically derived BJT storage time reference in accordance with the teachings of the present invention.
• For instance, in one example, a controller block is disclosed with dynamic adjustment of the BJT storage time reference to drive a BJT switching element of a power converter that optimizes or enhances the BJT switching performance, reduces the switching loss and avoids or reduces the temperature rise of the BJT. The controller block monitors or models the input line voltage each switching cycle and generates references and thresholds for the collector current and base current turn off. In one example, the BJT driver in the controller block includes a base drive switch and an emitter drive switch to be controlled individually through the controller. A storage time reference is generated in response to the input line voltage. The BJT base turn off and storage time of the BJT is dynamically adjusted in each switching cycle in response to the storage time reference. A controlled BJT turn off delay is achieved in each switching cycle based on the dynamically derived BJT storage time reference.
• In an example of typical power converter illustrated inFIG. 1, the switching element130 is coupled to the energy transfer element, transformer T1140, which in a flyback power converter is a coupled inductor acting like a transformer, and is controlled by a controller120 that includes the Dynamic Storage Time Reference Adjustment function in accordance with the teachings of the present invention. The AC line V_AC102 is coupled to the full bridge rectifier104 that generates rectified voltage105 to the power converter. In an example in which there is no input bulk capacitor, the full wave rectified voltage keeps the half sinusoidal waveform V_RECT106 applied to the power converter through the input filter108, which includes inductor113, and capacitors112 and114 as shown. The full wave rectified input voltage V_IN110 is applied to the primary side of power converter. The primary winding141 of transformer T1140 is coupled to the input line, and secondary winding142 of transformer T1140 is coupled to the output circuitry150, which in example illustrated inFIG. 1 includes a rectifier, which in the depicted example is implemented with a fast Schottky diode152, and a bulk filter capacitor C_O153 that generates the output DC voltage V_O156 across the load155 with output current I_O154.
• In the illustrated example, output regulation is provided through processing of the feedback from the output. The feedback signal from the output may be provided through an isolated or non-isolated sense circuit. When the feedback is referenced to the secondary ground, it is referred as the secondary control. In some power converters, the output sense may be extracted indirectly from an auxiliary winding magnetically coupled to the output/secondary winding so that the feedback signal may be referenced to the primary ground, and is therefore referred to as the primary control. The auxiliary winding may also provide operating power for controller, and is sometimes referred to as a bias or bypass winding.
• In example depicted inFIG. 1, the output ground/reference151 is isolated from input ground/reference101. A third/auxiliary winding143 on the magnetic core of transformer T1140 generates a supply voltage across the supply terminal (bypass pin) BP125 of the controller120 through a rectifier diode145 and a filter capacitor C_AUX148. Auxiliary winding143 is referenced to the primary ground101 that is coupled to the GND terminal121 of the controller120. The feedback information for regulating output, through a resistive divider including resistors146 and147, is retrieved indirectly from the auxiliary winding143 coupled to feedback terminal FB122 of the controller120. In one example, the feedback information could be retrieved without scaling down through the resistive divider as illustrated inFIG. 3, depending on the primary to auxiliary windings turns ratio (e.g., N_WAUX/N_W1). In one example, the auxiliary winding W_AUX143 is an anti-direction winding compared to the primary winding W1141, and provides a non-rectified AC induced voltage to the FB terminal122 of the controller120.
• In the depicted example, the input and output voltage detection is monitored through the AC induced voltage in the auxiliary winding W_AUX, which is wound on the energy transfer element T1 transformer in an anti-direction relative to the primary winding W1. During the on-time when the BJT switch is conducting, the negative voltage induced in the auxiliary winding W_AUXrepresents the input voltage. During off-time when the BJT switch is not conducting, the induced positive voltage in the auxiliary winding W_AUX, as the FB signal, represents the output voltage of the power converter. It is appreciated that in discontinuous conduction mode (DCM) operation when the induced voltage in the auxiliary winding W_AUXdrops towards zero, the idle oscillations in the voltage that occur due to the parasitic capacitances may go to the negative direction as well. In another example, it is appreciated that the input voltage of power converter could be monitored by measuring a required current injected through an internal current source to clamp the negative portions of the induced AC voltage in the auxiliary winding W_AUX143 to zero.
• The emitter and base terminals of the BJT switching element130 are coupled to the terminals ED126 and BD127 of the controller120, respectively. Current137 is sensed on the primary return line through the sense resistor R_CS136. In the example, the sensed current137 is represented with the voltage drop on sense resistor R_CS, which is coupled to be received on the terminal CS128 of the controller120. In the example, the voltage drop on sense resistor R_CSis with respect to the primary ground/reference101, and is therefore negative as illustrated inFIG. 4A (460A) andFIG. 4B (460B). In the example, the base terminal of the BJT switching element130 is coupled through a pull up resistor132 to the input voltage. In one example, the emitter terminal is coupled through ED126 through an internal switch of the controller120, which is illustrated and described in further detail below inFIG. 3 (switch388), is coupled to the primary ground/reference101 and current sense resistor R_CS136.
• FIG. 2 is an example graph that illustrates the benefits of utilizing a dynamic adjustment in accordance with the teachings of the present invention of the storage time reference in a BJT driver versus the input voltage. As shown,FIG. 2 illustrates temperature rise vs. storage time for two different types of BJTs at low line and high line voltage examples. The graph ofFIG. 2 shows on the vertical y-axis220 the temperature rise of case to ambient, in degrees Celsius [° C.], for two different types of BJTs (Type1 and type2) versus their storage time in nanoseconds [ns] along the horizontal x-axis210.
• Graphs230 and240 are test results at high input line voltage (e.g.,220 V_AC) for two different types of BJT transistors referred as type1 and type2 respectively. Similarly graphs250 and260 are the test results in low input line voltage (e.g.,110 V_AC) for the same BJT transistors of type1 and type2 respectively.
• These test results confirm that in high line if the adjustment of the storage time reference is not performed in accordance with the teachings of the present invention, that the temperature rise of the case to ambient for both types of the BJTs due to the extra switching loss will be higher. As will be discussed, examples in accordance with the teachings of the present invention utilize measurements of the storage time of a BJT that is used as a switching element in a power converter, and adjust the storage time reference versus the input line voltage to provide improved performance.
• In test results illustrated inFIG. 2, the effect of a non-adjusted storage time reference in temperature rise (case to ambient) is shown for two types of BJTs that illustrate the benefit of a BJT storage time reference adjustment versus input line variations in accordance with the teachings of the present invention. As will be discussed, a new controller block in accordance with the teachings of the present invention provides compensation with dynamic adjustment of the BJT storage time reference versus input line variations.
• To illustrate,FIG. 3 shows generally a schematic of an example power converter, as well as the internal block interconnections of an example controller for a BJT switching device of the power converter, in accordance with the teachings of the present invention. As will be described, the internal block interconnections of the illustrated controller provide input line voltage monitoring and modeling, measurement of the storage time in each switching cycle, and dynamic adjustment of the storage time reference in accordance with the teachings of the present invention. In particular, in one example, power converter300 includes a controller320 that includes internal blocks for input line voltage monitoring/modeling, storage time measurement in each switching cycle, and dynamic adjustment of the storage time reference.
• As shown in the depicted example, power converter300 includes an energy transfer element340, which in one example is a high frequency transformer or coupled inductor, having a first winding (e.g., primary winding)341 and a second winding (e.g., secondary winding)342 coupled between an input and an output of power converter300. As shown inFIG. 3, the input of power converter300 is coupled to receive an input voltage V_IN310. Energy is transferred through the energy transfer element340 to an output circuitry350 referenced to secondary ground/reference351 that is isolated from the primary ground/reference301. The output circuitry350 as depicted inFIG. 1 may include a rectifier diode, an output capacitor and a load coupled to the output that receives an output voltage V_Oand an output current I_O.
• In the depicted example, the switching element330 includes a BJT and is coupled to the first winding341 of the energy transfer element340. A controller320 is coupled to control switching of the BJT switch330 with a base drive signal from terminal BD327 of controller320 to control a transfer of energy from the input of power converter to the output of power converter through the energy transfer element340 in response to a feedback FB signal received on terminal322 of the controller320. In one example, an output quantity of power converter300 may be representative of the output voltage V_O, output current I_O, or a combination thereof, as shown for example inFIG. 1.
• A third winding (e.g., auxiliary winding)343 on the magnetic core of energy transfer element (e.g., transformer)340 generates a supply voltage through the rectifier diode D_AUX345 and a filter capacitor C_AUX348 across the supply terminal (e.g., bypass pin) BP325 of the controller320 that is referenced to the primary ground/reference301, coupled to GND terminal321 of the controller320. In one example, the regulation of the output is responsive to the feedback signal retrieved from the non-rectified voltage on the auxiliary winding343 that is coupled to the feedback terminal FB322 of the controller320. In example schematic illustrated inFIG. 3 in comparison to the example schematic ofFIG. 1, there is no scaling down resistive divider, and the FB signal is based on the turns ratio of the primary to auxiliary windings (e.g., N_WAUX/N_W1) and is directly coupled to the controller terminal FB322.
• The emitter and base terminals of the BJT switching element330 are coupled to the terminals ED326 and BD327 of the controller320 respectively. The BJT collector current335 during the conduction time of the BJT switching element330 is conducted through the ED terminal326 of the controller320 and through an internal switch388, which may be coupled to the ground terminal GND321 of the controller320. The collector current passes through the primary side return line and is sensed as the current337 through the sense resistor R_CS336.
• As mentioned above with respect toFIG. 1, the primary side return line current337 sensed on resistor R_CS336 that is applied to terminal CS328 of the controller320 shows as a negative signal with respect to the primary ground, which is illustrated as signal V_CS460A inFIG. 4A, and inFIG. 4B as V_CS460B).
• As shown in the example depicted inFIG. 3, controller320 processes multiple sensed and received input signals representative of the various parameters of the power converter300 and generates a control signal BD327 to control the on and off states of the BJT switching element330 to regulate the output of the power supply in a closed loop. The FB signal on terminal FB322 is received from the auxiliary winding343, which in the example is a non-rectified AC pulse signal, as shown for example inFIG. 4A as FB signal470A, and inFIG. 4B as FB signal470B. During the on-time when BJT is conducting, the induced voltage in the auxiliary winding343 is negative, due to the anti-phase of the auxiliary winding343 in relation to the primary winding341, and is representative of the input voltage. The scale factor for the monitored input voltage may be presented by V_IN*N_WAUX/N_W1, where N_W1is the number of winding turns of the primary winding, and N_WAUXis the number of winding turns of the auxiliary winding.
• During the on-time, the secondary current is blocked by the reverse biased output diode, which is illustrated for example inFIG. 1 as D1152. However, the increased flux in the magnetic core stores the energy, and when the BJT switch turns off or stops conducting, the output diode, which is illustrated for example inFIG. 1 as D1152, would be forward biased to transfer the stored energy to the output load. The signal on FB terminal322 during the BJT off-time (e.g., when output diode D1152 conducts) represents the scaled output voltage, V_O*N_WAUX/N_W2, where N_WAUXis the number of auxiliary winding turns, and N_W2is the number of secondary winding turns.
• The output regulator block360 in controller320 receives the AC feedback signal from terminal FB322 and extracts the positive half cycles that are representative of the output voltage to regulate the output. The signal361 from output regulator block360 is coupled to be received by the BJT control unit380. In one example, the BJT control unit380 is coupled to control the on and off timing of the switches384,386 and388 in the BJT driver390 in response to the signal361. It is appreciated that either the on-time (e.g., duty cycle control, PWM) or the switching period (e.g., frequency control, PFM) may be controlled to achieve a regulated output versus load and input voltage variations.
• The BJT driver390 receives the supply voltage on the V_CCbus391 from terminal BP325 of the controller320 coupled to the rectified auxiliary voltage across the C_AUXcapacitor348. The base drive current I_BDis generated from V_CCbus391 through the controlled current source382, which is controlled by signal381 from the BJT control unit380. In one example, current source382 is a variable current source that provides a variable current from zero to a desired level of base drive current I_BD. Switch384, which is controlled by signal Q_BA383 from the BJT control unit380, conducts the I_BDcurrent through node M392 and through BD terminal327 to the base of BJT330. In one example, switch384 is optional in an example in which the current source382 is variable from zero to the desired base drive current I_BD. Pulse width of the control signal Q_BA383 defines duration of the base current to the BJT switch330. Switch386 across node M392 to ground GND321 is controlled by signal Q_BG385 and may couple the base of BJT330 to GND321 to provide a discharge path for the storage charge of BJT at turn-off. The BJT drive signal from node M392 is coupled to the terminal BD327 of the controller320. The emitter of BJT330 is coupled to terminal ED326 of the controller320 and through a switch388 it is coupled to GND321.
• Switch388 is controlled by the signal Q_EG387 from the BJT control unit380. Control signal Q_EG387 is complementary of signal Q_BG385. For the duration of time that switch386 is open, switch388 remains closed and conducts the BJT current335 to the current sense resistor R_CS336 on the primary return line. The sensed current across the resistor R_CS336 is applied to terminal CS328. The input current I_INpeak regulator block373 receives the sensed current and limits the peak current in each switching cycle against a predefined current limit threshold to generate the signal Coff_Ref375, which is a reference for the collector turn off.
• Signal Coff_Ref375 on the positive input374 of the current comparator376 is compared to the sensed current377 on the negative input of the current comparator and generates signal Coff378 that may be used to define duration of the storage time. The Coff signal378 is fed back to the second input of the storage time regulator block368. The storage time regulator block368 processes combination of the two input signals, t_ref367 and Coff378, and generates signal Boff_Ref369, which is a reference signal for the base turn off. After the base switch384 is turned off by signal Q_BA381 going low, which is illustrated inFIG. 4A as Q_BA410A, the collector current continues to rise until the signal Q_EG387, which is illustrated inFIG. 4A as Q_EG430A, commands to turn off the emitter switch388, which is illustrated inFIG. 4A as time tst1454A.
• The storage time reference signal t_ref367 is generated in response to the input voltage of the power converter. Signal t_ref367 dynamically represents the input voltage to regulate the storage time through the storage time regulator block368. Signal Coff378 may be used to define the storage time that represents the discharge time required for the stored charge in the junction of BJT before its complete turn off. In the depicted example, the BJT storage time is defined and measured through the signal Coff in accordance with the teachings of the present invention. The start point for storage time is when the emitter switch388 has turned off by signal Q_EG387 going low, which is shown with signal430A inFIG. 4A and is presented by the intersection point tst1454A in graph450 inFIG. 4A. During the storage discharge interval, as indicted inFIG. 4A at reference numeral447A, the collector current450A due to the base discharge current through switch386, which is closed by signal385 Q_BGgoing high in graph420A ofFIG. 4A, continues until time tst2, which occurs at intersection455A, at which time the collector current450A bends back towards zero as shown.
• It is appreciated that when the emitter drive switch388 is turned off, the base to ground switch386 is simultaneously turned on by the signal Q_BG385 going high, which is indicated with signal420A inFIG. 4A, to discharge the BJT330 junction storage charge. When switch388 disconnects the emitter current path, the BJT330 may completely turn off only after the storage time period, which is indicated inFIG. 4A with reference numeral447A. The storage time is indicated with the intersections of Coff_Ref453A with the collector current450A, between time tst1454A to time tst2455A, at which time the collector current folds back towards zero.
• Signal “Boff_Ref”369 is coupled to the positive input of the comparator370. The negative input receives the sensed collector current as a voltage signal V_CSon the terminal CS328. The output signal Boff372 of the comparator370 would be logic high as long as the sensed current signal V_CSis lower than Boff_Ref369 and drops to logic low as soon as the sensed collector current signal V_CShits the Boff_Ref369 to turn off the base current.
• The AC feedback signal derived from terminal FB322 is received by the V_INmodel block362, which is coupled in parallel with the output regulator block360 inFIG. 3 as shown. A model of the input voltage that is generated by the V_INmodel block362 is buffered through driver363. Modeling of the input voltage may be as simple as extracting the negative portions of the signal FB322, or in another example by forcing a current out of the example controller320 during the negative portions to hold the signal FB322 node at zero, and measuring the forced current as a representation of the input voltage. The sampled input voltage may then be latched through the sample latch block364. It is appreciated that even though the sample latch block364 is described in the example controller ofFIG. 3, it is optional and in other examples, the controller may function without latching the sampled input voltage. The signal365 output from sample latch block364 is representative of the input voltage, and is coupled to be received by the storage time reference block366. The storage time reference block366 generates the t_refsignal367 received by the storage time regulator block368.
• In one example controller320 may be implemented in an integrated circuit (IC) and the BJT330 switching element may also be monolithically or non-monolithically (e.g., hybrid) included in the same IC.
• FIG. 4A andFIG. 4B illustrate the sample waveforms generated by the different function blocks ofFIG. 3 at a low input line voltage and a high input line voltage, respectively, to illustrate the dynamic measurement and adjustment of the BJT storage time versus the input voltage variations in accordance with the teachings of the present invention. To avoid repetition, only the description for the low input line voltage waveforms are explained below in the graphs400A ofFIG. 4A. It is appreciated, however, that all of the explanations for both graphs400A ofFIG. 4A and graphs400BFIG. 4B are substantially similar, except that for the high input line voltage the BJT conduction time (e.g., on-time) for the same power level would be shorter than the low input line voltage.
• In the example described inFIG. 4A, graphs400A are waveforms of the control signals utilized by a controller block for a BJT driver with the dynamic adjustment of the storage time reference versus the input line voltage variation in accordance with the teachings of the present invention. Graphs Q_BA410, Q_BG420, and Q_EG430 show the control signals for switch384 (e.g., signal Q_BA383 inFIG. 3), switch386 (e.g., signal Q_BG385 inFIG. 3) and switch388 (e.g., signal Q_EG387 inFIG. 3) inside the BJT driver390. A logic high of each signal means that switch is turned on (e.g., closed) and logic low means that switch is turned off (e.g., opened).
• The graph of base current I_B440A illustrates the BJT base current from the controlled current source382 and through switch384, which shows the positive injected base current in portions442A and444A. The discharged current of the stored charge in BJT junction during the storage time that is shown as the negative portion447A in graph of base current IB440A, which illustrates the current though the switch386 as indicated in graph Q_BG430A.
• The graph of collector current I_C450A shows the BJT collector current in positive direction and the graph of current sense V_CS460A shows the sensed current signal V_CSthat is measured across the sense resistor on the primary return line that is negative in reference to the primary side controller ground. It is appreciated that the turn on current spikes457A or467A on the collector current I_Cwaveform450A, and consequently on the current sense signal V_CS460A, may happen mostly due to the parasitic/stray capacitance of the transformer windings.
• In the graph of collector current I_C450A, the reference thresholds for the base switch off (e.g., Boff_Ref,451A) and for the collector switch off (e.g., Coff_Ref,453A) are illustrated in comparison to the BJT collector current, which is the on-time rising sloped current. These references or thresholds, Boff_Ref451A (e.g., Boff_Ref369A inFIG. 3) and Coff_Ref453A (e.g., Coff_Ref,375 inFIG. 3) define the switching signals for the BJT driver. InFIG. 3, the BJT driver390 through the BJT control unit380 generates the switching signals Q_BA383, Q_BG385, and Q_EG387 for the BJT driver switches384,386 and388 respectively. It should be mentioned that in an example in accordance with the teachings of the present invention the pulse width492A is a controlled variable. For instance, in one example, the pulse width492A is controlled by modulating and changing the Boff_Ref451 reference. The Boff_Ref451 reference determines the pulse width412A in graph Q_BA410A, which in turn determines the on-time of the switch383 and the amount of charge delivered to the base of the BJT. The amount of charge delivered to the base of the BJT in turn determines the required discharge time (e.g., portion447A), and the signal Coff490A determines the pulse width of492A. The signal Coff490A is regulated so that the pulse width492A is equal to the pulse497A of the storage time reference t_ref495A.
• The graph of FB signal470A illustrates the FB AC signal in which the negative half cycle472A represents the input line voltage, and the positive half cycle474A gives the output feedback information. If BJT operation is in DCM, after the output current drops to zero and remains almost zero476A until the next switching cycle starts.
• The graph of transformer flux Φ480A is an illustration of the transformer magnetic flux. During the first half cycle of BJT conduction period (e.g., on time), the transformer flux Φ480A has a rising slope, and in the second half cycle when energy is transferring to the output, transformer flux Φ480A has a falling slope. In DCM operation at the end of second half cycle when the output current is dropped to zero and transfer of energy is stopped, the transformer flux Φ480A remains almost zero. It is appreciated that even though not shown in graphs470A or480A, when the transfer of energy is stopped, some idle ringing due to resonant charge/discharge of the parasitic capacitances may be observed.
• The graph of current sense reference Boff485A shows the current sense reference signal Boff for the base current turn off that goes to logic high as long as the BJT collector current Ic, or the sense current signal V_CSin the negative direction, is higher than the Boff_Ref threshold.
• The graph of Coff490A shows the collector current turn off signal Coff and indicates that the collector current has reached the designated peak current threshold Coff_Ref. The pulse width of the Coff signal490A is a measure of the storage time. This signal goes to logic high as long as the BJT collector current Ic, or the sense current signal V_CSin negative direction, is higher than the Coff_Ref threshold (e.g., duration492A between tst1454A and tst2455A).
• The graph of storage time reference t_ref495A represents the storage time reference t_refwith a pulse width497A. This signal is generated in response to the input voltage of the power converter (e.g., through blocks362,363,364 and366 inFIG. 3). In each switching cycle, signal t_ref495A (e.g., t_ref367 inFIG. 3) in response to a latched value of the input voltage model through the storage time regulator block368 generates signal Boff_Ref451A, which is the base turn off reference threshold, to regulate the base turn off and the amount of the charge delivered to the BJT base for an optimum switching of the BJT power switch with the least turn off loss. The discharge time or storage time is defined by the time interval between tst1454A and tst2455A that the BJT collector current I_C450A is higher than the Coff_Ref reference threshold453A (e.g., signal Coff490A high, duration492A). In each switching cycle the discharge time follows (e.g., remains equal to) the t_refpulse duration497A.
• In operation, referring toFIG. 3 andFIG. 4A, in each switching cycle T_SW401A, signal410A Q_BAat the start of a switching cycle is logic high, and switch384 is closed conducting the base drive controlled current I_BD382 to the base of the BJT switch330 through the node M392 and terminal BD327 of the controller320. The amount of the base current I_BD382 is controlled through signal381 from BJT control unit380. When the Q_BA410A signal is logic high (e.g., switch384 is closed), the Q_BG420A signal is logic low (e.g., switch386 is open) to prevent any discharge from the base of the BJT330. The Q_EG430A signal remains logic high and switch388 is closed to conduct the collector current335, or its equivalent current337 to the return line through the sense resistor336.
• The base current is represented by the signal I_B440A, where the amount of the base current at the start of each BJT switch on time for a duration442A goes to a higher level to cover the junction capacitor inrush charge. After the junction capacitor inrush, the base current drops to a lower level for the rest of the BJT on-time444A. At the end of duration412A, the Q_BA410A signal drops from high to low. The base drive current turn off, which is the end of duration412A on graph410A, is defined on the graph of collector current I_C450A by the intersection point452A of the collector current I_C450A and Boff_Ref451A, which is the Boff_Ref369 signal inFIG. 3. From this point, no current is injected to the BJT base, as shown for example with signal Q_BAgoing low, switch384 opening, and base current I_B440A dropping to zero. However, due to the BJT stored charge, the collector current I_C450A continues rising for a period of446A up to the intersection point454A with the Coff_Ref453A, which is signal375 inFIG. 3. The intersection point454A is defined by the input current peak regulator, which is I_INpeak regulator block373 as described inFIG. 3. From this point, the stored charge in the BJT junction starts to discharge, and base current440A goes negative for a discharge time duration447A. The discharge time duration447A is defined by the time duration from time tst1 (454A) to time tst2 (455A).
• The time tst1454A is when the Q_BG420A signal and the Q_EG430A signal change their states, which is when Q_BGgoes from low to high closing the switch386, and Q_EGgoes from high to low opening the switch388. However, due to discharge of the storage charge through switch386, the collector current450A continues increasing above the Coff_Ref453A until the end of the discharge time, at which time it folds back falling towards the zero. The time tst2455A is when all the stored charge in the BJT junction has discharged and the collector current450A has dropped back below the Coff_Ref453A. It is appreciated that the current sense signal V_SC460A, which is the voltage drop of the collector current337 across the sense resistor336 inFIG. 3, is only a negative representation of the collector current450A.
• At time tst1454A the output of the comparator376, which is the Coff378 signal inFIG. 3, goes high until time tst2455A, at which time it drops back to logic low. The pulse width492A of the signal Coff490A dynamically follows, or remains equal to, the pulse width497A of the storage time reference signal t_ref495A represents the required discharge time and provides an easy dynamic and accurate measure to adjust the BJT storage time in each switching cycle in accordance with the teachings of the present invention.
• LikeFIG. 4A,FIG. 4B also illustrates the sample waveforms generated by the different function blocks ofFIG. 3. In particular,FIG. 4A illustrates the sample waveforms at a low input line voltage, whileFIG. 4B illustrates the sample waveforms generated by the different function blocks ofFIG. 3 at a high input line voltage. It is appreciated that the description of the sample waveforms illustratedFIG. 4B are similar to the descriptions provided with respect toFIG. 4A, except that for the high line input voltage, the conduction time and storage time associated with the BJT in the sample waveforms inFIG. 4B is shorter at the high line input voltage compared to the low line input voltage.
• It is also appreciated that for the simplicity with respect to the the graphs illustrated inFIG. 4A andFIG. 4B, that any parasitic ringing has not been illustrated and that in other examples, parasitic ringing may occur due to the resonance of parasitic capacitances and inductances on the circuit board, which may cause some turn on and turn off oscillations.
• The above description of illustrated examples of the present invention, including what is described in the Abstract, are not intended to be exhaustive or to be limitation to the precise forms disclosed. While specific embodiments of, and examples for, the invention are described herein for illustrative purposes, various equivalent modifications are possible without departing from the broader spirit and scope of the present invention. Indeed, it is appreciated that the specific example voltages, currents, frequencies, power range values, times, etc., are provided for explanation purposes and that other values may also be employed in other embodiments and examples in accordance with the teachings of the present invention.

Claims (22)

What is claimed is:

1. A controller for use in a power converter, comprising:

a storage time reference circuit coupled to receive an input voltage signal responsive to an input voltage of the power converter to generate a storage time reference signal in response to the input voltage signal;

a first comparator coupled to receive a current sense signal representative of a switch current of a bipolar junction transistor (BJT) power switch, wherein the first comparator is coupled to generate a collector off signal in response to a first comparison of the current sense signal and a collector off reference threshold signal;

a storage time regulator circuit coupled to generate a base off reference threshold signal in response to the storage time reference signal and the collector off signal;

a second comparator coupled to receive the current sense signal and the base off reference threshold signal, wherein the second comparator is coupled to generate a base off signal in response to a second comparison of the current sense signal and the base off reference threshold signal; and

a driver circuit coupled to control switching of the BJT power switch in response to an output voltage signal responsive to an output voltage of the power converter to regulate a transfer of energy from an input of the power converter to an output of the power converter, wherein the driver circuit is further coupled to discontinue charging a base terminal of the BJT power switch in response to the base off signal, and wherein the driver circuit is further coupled to start discharging the base terminal of the BJT power switch in response to the collector off signal during a switching cycle of the BJT power switch.

2. The controller ofclaim 1 further comprising an output regulator circuit coupled to receive a feedback signal of the power converter, wherein the output regulator is coupled to generate the output voltage signal in response to the feedback signal.

3. The controller ofclaim 1 further comprising an input voltage modeling circuit coupled to receive a feedback signal of the power converter, wherein at least one portion of the feedback signal represents the input voltage of the power converter and wherein the input voltage modeling circuit is coupled to generate the input voltage signal in response to the feedback signal.

4. The controller ofclaim 3 further comprising a latch coupled to generate the input voltage signal in response to the feedback signal, wherein the input voltage signal is a latched input voltage signal representative of the input voltage of the power converter in each switching cycle of the BJT power switch.

5. The controller ofclaim 1 wherein the driver circuit further comprises:

a current source coupled to provide a base drive current; and

a first switch coupled between the current source and the base terminal of the BJT power switch, wherein the driver circuit is coupled to turn on the first switch to charge the base terminal of the BJT power switch with the base drive current, and wherein the driver circuit is coupled to turn off the first switch to discontinue charging the base terminal of the BJT power switch with the base drive current.

6. The controller ofclaim 1 wherein the driver circuit further comprises a variable current source coupled to provide a variable base drive current to the base terminal of the BJT power switch, wherein the variable base drive current varies from zero to a desired level of base current.

7. The controller ofclaim 5 wherein the driver circuit further comprises a second switch coupled between the base terminal of the BJT power switch and a ground terminal, wherein the driver circuit is coupled to turn on the second switch to start discharging the base terminal of the BJT power switch.

8. The controller ofclaim 7 wherein the driver circuit further comprises a third switch coupled to the BJT power switch, wherein the driver circuit is coupled to turn on the third switch to conduct the switch current of the BJT power switch to a current sense resistor coupled to provide the current sense signal.

9. The controller ofclaim 8 wherein the ground terminal is further coupled between the third switch and the current sense resistor.

10. The controller ofclaim 1 wherein the storage time reference circuit is further coupled to adjust the storage time reference signal in response to variations in the input voltage signal.

11. The controller ofclaim 1 further comprising an input current peak regulator circuit coupled to generate the collector off reference threshold signal in response to the current sense signal.

12. A power converter, comprising:

an energy transfer element coupled between an input of the power converter and an output of the power converter;

a bipolar junction transistor (BJT) power switch coupled to the input of the power converter and the energy transfer element; and

a controller coupled to control switching of the BJT power switch to regulate a transfer of energy from the input of the power converter to the output of the power converter through the energy transfer element, the controller including:

a storage time reference circuit coupled to receive an input voltage signal responsive to an input voltage of the power converter to generate a storage time reference signal representative of a BJT power switch storage time;

a first comparator coupled to receive a current sense signal representative of a switch current of the BJT power switch, wherein the first comparator is coupled to generate a collector off signal in response to a first comparison of the current sense signal and a collector off reference threshold signal;

a storage time regulator circuit coupled to generate a base off reference threshold signal in response to the storage time reference signal and the collector off signal;

a second comparator coupled to receive the current sense signal and the base off reference threshold signal, wherein the second comparator is coupled to generate a base off signal in response to a second comparison of the current sense signal and the base off reference threshold signal; and

a driver circuit coupled to control the switching of the BJT power switch in response to an output voltage signal responsive to an output voltage of the power converter, wherein the driver circuit is further coupled to discontinue charging a base terminal of the BJT power switch in response to the base off signal, and wherein the driver circuit is further coupled to start discharging the base terminal of the BJT power switch in response to the collector off signal during a switching cycle of the BJT power switch.

13. The power converter ofclaim 12 wherein the energy transfer element comprises:

a first winding coupled to the input of the power converter;

a second winding coupled to the output of the power converter; and

a third winding coupled to provide a feedback signal.

14. The power converter ofclaim 13 wherein the controller further comprises an output regulator circuit coupled to receive the feedback signal, wherein the output regulator is coupled to generate the output voltage signal in response to the feedback signal.

15. The power converter ofclaim 13 wherein the controller further comprises an input voltage modeling circuit coupled to receive the feedback signal, wherein at least one portion of the feedback signal represents the input voltage of the power converter and wherein the input voltage modeling circuit is coupled to generate the input voltage signal in response to the feedback signal.

16. The power converter ofclaim 15 wherein the controller further comprises a latch coupled to generate the input voltage signal in response to the feedback signal, wherein the input voltage signal is a latched input voltage signal representative of the input voltage of the power converter of the BJT power switch.

17. The power converter ofclaim 12 wherein the driver circuit further comprises:

a current source coupled to provide a base drive current; and

a first switch coupled between the current source and the base terminal of the BJT power switch, wherein the driver circuit is coupled to turn on the first switch to charge the base terminal of the BJT power switch with the base drive current, and wherein the driver circuit is coupled to turn off the first switch to discontinue charging the base terminal of the BJT power switch with the base drive current.

18. The power converter ofclaim 17 wherein the driver circuit further comprises a second switch coupled between the base terminal of the BJT power switch and a ground terminal, wherein the driver circuit is coupled to turn on the second switch to start discharging the base terminal of the BJT power switch.

19. The power converter ofclaim 18 wherein the driver circuit further comprises a third switch coupled to the BJT power switch, wherein the driver circuit is coupled to turn on the third switch to conduct the switch current of the BJT power switch to a current sense resistor coupled to provide the current sense signal.

20. The power converter ofclaim 19 wherein the ground terminal is further coupled between the third switch and the current sense resistor.

21. The power converter ofclaim 12 wherein the storage time reference circuit is further coupled to adjust the storage time reference signal in response to variations in the input voltage signal.

22. The power converter ofclaim 12 wherein the controller further comprises an input current peak regulator circuit coupled to generate the collector off reference threshold signal in response to the current sense signal.

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