US20140322918A1 - Micro-posts having improved uniformity and a method of manufacture thereof - Google Patents

Abstract

As discussed herein, there is presented an apparatus comprising micro-posts. The apparatus includes a substrate having a planar surface, a plurality of micro-posts located on the planar surface, wherein each micro-post has a base portion on the planar surface and a post portion located on a top surface of the corresponding base portion, and wherein side surfaces of the base portions intersect the planar surface at oblique angles.

Description

CROSS-REFERENCE TO RELATED APPLICATION
• This application claims the benefit of U.S. application Ser. No. 12/165,880, filed by Cristian Bolle, et al., on Jul. 1, 2008, entitled “MICRO-POSTS HAVING UNIFORMITY AND A METHOD OF MANUFACTURE THEREOF,” incorporated herein by reference.
TECHNICAL FIELD
• The present invention is directed, in general, to an apparatus and methods for fabricating that apparatus method and, more specifically, to micro-posts and a method of fabricating those micro-posts.
BACKGROUND
• Micromachines, which are also referred to as micro electro mechanical system (MEMS) is an emerging technology that uses the tools and techniques, which were developed for the integrated circuit industry, to build microscopic machines. These machines, which are generally considered to be between 100 nanometers to 100 micrometers in size, are typically built on standard silicon wafers. The advantage of this technology is that many machines can be built at the same time across the surface of the wafer, and the processes used to fabricate these devices employ the same type of lithographic processes used to fabricate integrated circuits. These tiny machines are becoming ubiquitous and quickly finding their way into a variety of commercial and defense applications.
• As with any type of manufacturing effort, particularly as the sizes at which these devices are made, overall product quality, uniformity, and yield are important industry goals.
SUMMARY
• One embodiment as presented herein is directed to an apparatus. In this embodiment, the apparatus comprises a substrate having a planar surface, a plurality of micro-posts located on the planar surface, wherein each micro-post has a base portion on the planar surface and a post portion located on a top surface of the corresponding base portion, and wherein side surfaces of the base portions intersect the planar surface at oblique angles.
• Another embodiment is directed to a method for fabricating the apparatus. This embodiment comprises performing a dry etch to form a post portion of a micro-post in a trench on a surface of a substrate, performing a wet etch to remove a layer from said substrate such that the post portion is located on a base portion and the base portion is located on a planar surface of the substrate, wherein the base portion has side surfaces that intercept the top planar surface obliquely.
BRIEF DESCRIPTION OF THE DRAWINGS
• The various embodiments can be understood from the following detailed description, when read with the accompanying figures. Various features may not be drawn to scale and may be arbitrarily increased or reduced in size for clarity of discussion. Reference is now made to the following descriptions taken in conjunction with the accompanying drawings, in which:
• FIG. 1 illustrates an apparatus of the disclosure at an early stage of manufacture;
• FIG. 2 illustrates the apparatus ofFIG. 1 after the formation of a trench in the substrate that defines a post;
• FIGS. 3A-3B illustrate the formation and patterning of an etch mask following the formation of the trench;
• FIGS. 4A-4D illustrate various stages of an etch process that can be used to form the micropost, which includes a base portion; and
• FIGS. 5A-5B illustrate examples of different devices into which the apparatus may be configured.
DETAILED DESCRIPTION
• The embodiments discussed herein recognize the benefits associated with micro-posts having substantially uniform height across a substantially planar substrate, such as a semiconductor wafer. The side surfaces of the base portion intersect the surface at oblique angles and have a reduced lateral profile. As used herein a micro-post is a post with a height of less than about 100 micrometers and may have a number of geometric shapes, such as a rectangle, a polygon, or a cylinder. These micro-posts are an improvement over previous structures in that the uniform height across the substrate provides overall improved device yield and quality. Further, the reduced base width provides improved component density. Moreover, in other applications, such as those directed to infrared detectors, the height of the micro-posts can be controlled to provide flexibility in tuning, that is, to allow appropriate sizing of cavities to achieve the desired wavelengths for the infrared detector. Method embodiments, which are also discussed herein, provide methods for achieving the improved apparatus.
• FIG. 1 shows anexample apparatus100 of the present disclosure at an early stage of manufacture. This embodiment includes asubstrate110, which may be obtained from an internal or external source. Non-limiting examples of thesubstrate110 may include semiconductor substrates comprising materials, such as silicon, silicon-germanium, gallium arsenide, indium phosphide, or combinations of these materials. In some embodiments, thesubstrate110 may further include a material layer (not shown) that overlies thesubstrate110 from which the micro-posts may be formed. In such embodiments, an etch stop layer may be present. The material, when present, may comprise the same materials listed above for thesubstrate110, or it may comprise a different material. In one advantageous embodiment, thesubstrate110 is silicon. As discussed below, in those embodiments where thesubstrate110 or material layer is silicon, the presenting face (i.e., the crystal plane an etch initially encounters) may have a <100> crystal orientation, a <110> crystal orientation, or a <111> crystal orientation. Conventional processes may be used to form thesubstrate110.
• The thickness of thesubstrate110 will depend on the intended application. For example, in those applications where theapparatus100 may be a tilting mirror of a MEMS device, the thickness of thesubstrate110 may be at least 20 microns or greater. Alternatively, in those applications where theapparatus100 may be an infrared detector, thesubstrate110 may have a thickness of 2 microns or greater. These values are given for illustrative purposes only, and it should be understood that other thickness may also be used and will depend on the intended application of the apparatus.
• Given the advantages of improved height uniformity and higher component densification as provided herein, thicker substrates can be used while avoiding the problems associated with conventional apparatus and fabrication processes. In conventional processes, manufacturers used either a dry etch to form stand-alone posts with no base portion from the substrate, or they used a wet etch to form truncated support structures, both had associated problems. If the dry etch was used in conventional processes, significant post height non-uniformity across the wafer often occurred. Dry etched posts have the height non-uniformity issues typically associated with dry etching with variations in height of 10% to 15% across a wafer being normal. In addition, if isolated posts are desired, the amount of material that has to be removed between the posts may account for 99% of the wafer surface, and chemical loading of the etch chemistry may completely change the etching nature.
• On the other hand, even though an anisotropic wet etch can be highly uniform with below 1% variations in post height being the norm, the wet etch results in a truncated pyramidal-shaped structure, rather than a post, that can consume an unacceptably large amount of surface area on the substrate wafer. Thus, conventional processes left the manufacture with basically one of two options; either use a dry etch process to form stand-alone posts from the material layer while tolerating a significant amount of height non-uniformity across the substrate, or us a wet etch to form truncated bases that consumed an unacceptably large amount of surface area. The embodiments of the present disclosure address both of these problems.
• Embodiments of the processes, and thus, the resulting apparatus, described herein provide a benefit of being able to use athicker substrate110 that produces micro-posts with improved height uniformity and greater component densification when compared to conventional processes. For example, the height of the resulting micro-posts may be within 5% of each other and preferably, the height may be within 1% or better, across thesubstrate110 when commercially available wet etching tools are used. This provides an advantage of improved overall yield and apparatus quality.
• Additionally, the embodiments covered by this disclosure also provide a micro-post having a much smaller base, which allows for greater component densification. For instance, in certain embodiments as disclosed herein, the ratio of the micro-post height to base width may be 2:1 or greater, with other embodiments including micro-posts having a height to base width ratio of 5:2 or greater.
• FIG. 2 illustrates theapparatus100 following the deposition and patterning of alithographic mask205. Thelithographic mask205 may comprise a conventional material, such as an organic photoresist or a hardmask material, such as silicon oxide. Thelithographic mask205 may be patterned to defineopenings210 through which anetch215 may be conducted. In one advantageous embodiment, theetch215 is a dry etch, such as a conventional plasma etch, a sputter etch, ion milling etch, a reactive ion etch, deep reactive ion etch, or focused ion beam milling process, that can readily be conducted for the desired amount of time. The etch time will depend on the etching process being used, the material being etched, and the targeted depth of theetch215 into thesubstrate110 and could readily be determined by those of skill in the art. In those instances where theetch215 uses a plasma process, the etching chemistry and plasma conditions will depend on the tool, the composition of thesubstrate110 and the target depth.
• For example, in one embodiment, thesubstrate110 may comprise silicon. In such instances, the plasma etch may include any known chloro or fluoro-carbon gas, such as CCl₄, CF₄, C₄F₈, or a sulfur-fluoro gas, such as SF₆. As defined by themask205, theetch215 forms atrench220 in thesubstrate110, which, in turn, defines apost225. The depth of the trench will vary depending on the application. For instance, the depth of thetrench220 may range from about 2 microns to about 100 microns or greater. It should be noted that althoughFIG. 2 shows a cross section of a fabricated post, the shape of the post top surface can be fairly arbitrary and is not restricted to circular cylindrical shape, e.g., the post may have a cross-section that is a regular polygon.
• FIG. 3A illustrates theapparatus100 ofFIG. 2 following the formation of thetrench220 and the micro-post225 and the removal of thelithographic mask205. Thereafter, anetch mask layer305 is formed on thesubstrate110, on the walls of thetrench220 and on the top of thepost225, as generally illustrated. Theetch mask layer305 may be formed a number of ways. For example, theetch mask layer305 may be formed by subjecting thesubstrate110 to a wet oxidation process to grow a thin (e.g., about 0.1 microns) silicon oxide layer, e.g., a conformal layer. Alternatively, conventional deposition processes may be used to deposit theetch mask layer305, which may be comprised of a material, such as silicon nitride.
• FIG. 3B illustrates theapparatus100 ofFIG. 3A after a conventional patterning of theetch mask layer305 to form anetch mask310. Theetch mask310 protects the covered surfaces from a subsequent etch process. In certain embodiments, theetch mask310 may be patterned to leave an overhanging portion of theetch mask310 on the surface of thesubstrate110, as shown. For instance, the amount of overhang may range from about 0.25 microns to about 3.0 microns, depending on the type of lithography tool used. However, in other embodiments, theetch mask310 may be patterned such that no overhang is present and themask310 terminates as the edge of thetrench220.
• FIG. 4A illustrates theapparatus100 ofFIG. 3B wherein a presentingface410 of thesubstrate110 is subjected to awet etch415. In one advantageous embodiment, thesubstrate110 is silicon, and thewet etch415 is an anisotropic etch comprising either potassium hydroxide (KOH) or tetra methyl ammonium hydroxide (TMAH). Either of these chemistries may be used to etch various presenting crystalline faces of silicon or silicon germanium. As such, the weight percent of these etching components with water and the temperature at which the etch is conducted will vary. In one example, the silicon may have a presentingface410 with a crystal orientation of <100>. In such cases, thewet etch415 is conducted with KOH wherein the KOH comprises from about 20% to about 45% by weight of an aqueous solution, and the etch may be conducted at a temperature that ranges from about 30° C. to about 80° C.
• In another embodiment, the silicon may have a presentingface410 with a crystal orientation of <110>. In such embodiments, thewet etch415 may be conducted with KOH where the KOH comprises from about 30% to about 45% by weight of an aqueous solution, and the etch may be conducted at a temperature that ranges from about 20° C. to about 120° C. In yet other embodiments, thewet etch415 may comprise tetra methyl ammonium hydroxide (TMAH), wherein TMAH comprises from about 20% to about 25% by weight of the aqueous solution and the etch is conducted at a temperature ranging from about 60° C. to about 90° C.
• As mentioned above, thesubstrate110 may be one of a number of semiconductor materials, e.g., crystalline semiconductor materials, and may comprise other semiconductor materials such as, silicon-germanium, gallium arsenide, indium phosphide, etc. In such instances and given the disclosure as set forth herein, those who are skilled in the art would understand how to select the appropriate etch chemistry that would produce an anisotropic etch. For example, if thesubstrate110 is a crystalline gallium arsenide substrate, the etch chemistry may comprise bromide in methanol or an aqueous solution of ammonium hydroxide.
• Due to the crystalline structure of thesubstrate110, theetch415 etches the presentingface410 more quickly that the lateral face. Thus, theetch415 begins to undercut theetch mask310 and form anangled face418, as seen inFIG. 4A. Theetch mask310 is resistant to theetch415, and thus, protects the surfaces of thepost225.FIG. 4B shows the continued progression of theetch415 and the further undercutting of theetch mask310 and removal of thesubstrate110 from the substrate115.
• At the conclusion of theetch415,base420 is formed, as shown inFIG. 4C. As seen, in this embodiment, the side surfaces420aof thebase portion420 intersect theplanar surface110aat oblique angles. At this point in the process, theetch mask310 may then be removed using a conventional etch process, such as an aqueous hydrofluoric etch.
• FIG. 4D illustrates an embodiment of theapparatus100 ofFIG. 4C following the removal of theetch mask310. In this embodiment, theapparatus100 includes a micro-post425. Though onemicro-post425 is shown, it should be understood that the embodiments discussed herein may be used to form a plurality of such micro-posts on thesubstrate110. In one application, for example, there may be 20 or more micro-posts425. The micro-post425 is located on theplanar surface110aof thesubstrate110. It should be noted that a surface may be planar even though minor surface irregularities or surface roughness may be present at the sub-micron scale, but over all thesurface110ais substantially planar. The micro-post425 includes thebase portion420 formed by theetch415, as discussed above, and apost portion430 located on atop surface435 of thebase portion420.
• In one aspect where a plurality ofmicro-posts425 are present, the lateral width of each of thebase portions420 is at least 2 times as large as the diameter of each of thepost portions430. In yet another embodiment, thetop surface435 of one of thebase portions420 has an area that is less than half of the area of theplanar surface110acovered by thebase portions420. In other embodiments, a ratio of a height of eachpost portion430 to thewidth440 of eachbase portion420 is at least about 2:1. It should be noted that the micro-post425 may be considered to have a post portion even though the diameter along the length of the micro-post425 may vary due to process variations. For example, in one embodiment, thepost portion430 may have a diameter that varies by less than 30% along the length of thepost portion430.
• In another embodiment, theapparatus100 includes a plurality of at least 20adjacent micro-posts425, and theheights445 of thedifferent micro-posts420 differ by less than 5 percent over the plurality, and in yet another embodiment, theheights445 of thedifferent micro-posts420 differ by less that 1 percent over the plurality.
• FIGS. 5A and 5B illustratedifferent apparatus500 and510 in which the micro-post ofFIG. 4D may be used.Apparatus500 ofFIG. 5A illustrates a general schematic view of a configuration of an infrared detector. As seen in this embodiment, theapparatus500 includes a plurality ofmicro-posts515 located across asubstrate520, such as a wafer. The micro-posts515 supportdifferent membranes525 that formcavities530. In view of the advantages discussed above, themicro-posts515 have uniform height and a reduced base footprint that allows for overall improved product yield, product quality, and component densification.
• Apparatus510 ofFIG. 5B illustrates a general schematic view of a configuration of a MEMS device. As seen in this embodiment, theapparatus510 includes a plurality ofmicro-posts535 located across asubstrate540, such as a wafer. The micro-posts535 support different titling mirrors545. In view of the advantages discussed above, themicro-posts535 can be manufactured to have improved height with an improvement in height uniformity and a reduced base footprint that allows for overall improved device operability, product yield, product quality, and component densification.
• Although the present invention has been described in detail, those skilled in the art should understand that they can make various changes, substitutions and alterations herein without departing from the spirit and scope of the invention.

Claims (16)

What is claimed is:

1. A method, comprising:

performing a dry etch to form a post portion of a micro-post in a trench on a surface of a substrate;

performing a wet etch to remove a layer from said substrate such that the post portion is located on a base portion and the base portion is located on a planar surface of the substrate, the base portion having side surfaces that intercept the top planar surface obliquely.

2. The method ofclaim 1, further comprising:

forming a mask around the post portion and a laterally adjacent portion of the original surface prior to performing the wet etch.

3. The method ofclaim 2, wherein the performing a wet etch removes portion of the substrate below the mask.

4. The method ofclaim 1 wherein:

performing the dry etch includes forming a trench in the substrate and to a depth within the substrate;

forming a mask layer on the substrate, and the surfaces of the post, and the trench;

removing the mask from the substrate such that a portion of the mask remains on the substrate adjacent the trench, and on the surfaces of the trench and the post; and

using an anisotropic etch to remove the substrate, including removing the substrate located under the mask to the depth of the trench.

5. The method ofclaim 1, wherein performing the dry etch includes using a plasma etch and the trench is formed to a depth of at least 1 micron.

6. The method ofclaim 4, wherein forming the mask includes oxidizing surfaces of the substrate, the trench and the post to form an oxide mask thereon.

7. The method ofclaim 4, wherein forming the mask includes depositing a silicon nitride film on the substrate, the trench and the post.

8. The method ofclaim 1, wherein performing a wet etch includes using an anisotropic etch of an aqueous solution of potassium hydroxide (KOH).

9. The method ofclaim 1, wherein the substrate is a silicon substrate that presents a <100> crystal orientation at the surface.

10. The method ofclaim 9, wherein performing a wet etch includes using an anisotropic etch of a solution of potassium hydroxide (KOH).

11. The method ofclaim 9, wherein the KOH comprises from about 20% to about 45% by weight of the aqueous solution and the etch is conducted at a temperature that ranges from about 30° C. to about 80° C.

12. The method ofclaim 1, wherein the substrate is a silicon substrate that presents a <110> crystal orientation at the surface.

13. The method ofclaim 12, wherein performing a wet etch includes using an anisotropic etch of an aqueous solution of potassium hydroxide (KOH).

14. The method ofclaim 1, wherein performing a wet etch includes using an anisotropic etch of an aqueous solution of tetramethylammonium hydroxide (TMAH).

15. The method ofclaim 1, wherein performing the dry etch to form a trench includes forming the trench to a depth ranging from about 2 microns to about 100 microns.

16. The method ofclaim 1, wherein a ratio of a height of each micro-post to the width of each base portion is at least 2:1.

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