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US20140197865A1 - On-chip randomness generation - Google Patents

On-chip randomness generation
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Publication number
US20140197865A1
US20140197865A1US13/739,151US201313739151AUS2014197865A1US 20140197865 A1US20140197865 A1US 20140197865A1US 201313739151 AUS201313739151 AUS 201313739151AUS 2014197865 A1US2014197865 A1US 2014197865A1
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US
United States
Prior art keywords
zener diode
voltage
noise
current
amplifier
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Abandoned
Application number
US13/739,151
Inventor
Kai D. Feng
Ping-Chuan Wang
Zhijian Yang
Emmanuel Yashchin
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
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International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines CorpfiledCriticalInternational Business Machines Corp
Priority to US13/739,151priorityCriticalpatent/US20140197865A1/en
Assigned to INTERNATIONAL BUSINESS MACHINES CORPORATIONreassignmentINTERNATIONAL BUSINESS MACHINES CORPORATIONASSIGNMENT OF ASSIGNORS INTEREST (SEE DOCUMENT FOR DETAILS).Assignors: FENG, KAI D., WANG, PING-CHUAN, YANG, ZHIJIAN, YASHCHIN, EMMANUEL
Priority to GB1511989.4Aprioritypatent/GB2524429B/en
Priority to PCT/US2014/010433prioritypatent/WO2014110007A1/en
Priority to DE112014000289.5Tprioritypatent/DE112014000289T5/en
Publication of US20140197865A1publicationCriticalpatent/US20140197865A1/en
Priority to US15/421,465prioritypatent/US9985615B2/en
Abandonedlegal-statusCriticalCurrent

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Abstract

An on-chip true noise generator including an embedded noise source with a low-voltage, high-noise zener diode(s), and an in-situ close-loop zener diode power control circuit. The present invention proposes the use of heavily doped polysilicon and silicon p-n diode(s) structures to minimize the breakdown voltage, increasing noise level and improving reliability. The present invention also proposes an in-situ close-loop zener diode control circuit to safe-guard the zener diode from catastrophic burn-out.

Description

Claims (20)

What is claimed is:
1. An apparatus comprising:
a zener diode located on a substrate;
a voltage source located on the substrate to provide a supply voltage to the zener diode; and
a current monitor located on the substrate to monitor the current through the zener diode and adjust the supply voltage provide by the voltage source to maintain the zener diode in the avalanche zone close to the breakdown condition, wherein the zener diode provides a random noise output.
2. The apparatus ofclaim 1 further comprising a current probe, wherein the current probe receives the supply voltage and provides a voltage to the zener diode, the current probe providing a current mirroring the current through the zener diode to the current monitor.
3. The apparatus ofclaim 1, wherein the zener diode is a heavily doped pn junction zener diode.
4. The apparatus ofclaim 1, wherein voltage source comprises a counter and a digital to analog converter wherein the digital to analog converter provides a threshold voltage to an amplifier, the amplifier providing the supply voltage.
5. The apparatus ofclaim 3, wherein the zener diode comprises a multi-finger structure.
6. The apparatus ofclaim 1, wherein the avalanche zone is around 1.5 volts.
7. The apparatus ofclaim 2, wherein the current monitor comprises a trans-impedance amplifier to monitor the current from the current probe and provide an output voltage, wherein the current monitor provides a increment signal to the voltage source when the output voltage is below a first threshold, and a decrement signal to the voltage source when the output voltage is above a second threshold.
8. The apparatus ofclaim 4, wherein a noise signal is provided to amplifier in the voltage source.
9. An apparatus comprising:
a first and a second noise generating unit; and
a single-stage differential stochastic amplifier, wherein the first noise generating unit is input into a negative input of the amplifier, and the second noise generating unit is input into the positive input of the amplifier.
10. The apparatus ofclaim 9, wherein each of the noise generating unit comprises:
a zener diode located on a substrate;
a voltage source located on the substrate to provide a supply voltage to the zener diode; and
a current monitor located on the substrate to monitor the current through the zener diode and adjust the supply voltage provide by the voltage source to maintain the zener diode in the avalanchezone, wherein the zener diode provides a random noise output.
11. The apparatus ofclaim 10, wherein the zener diode is a heavily doped pn junction zener diode.
12. The apparatus ofclaim 11, wherein voltage source comprises a counter and a digital to analog converter wherein the digital to analog converter provides a threshold voltage to an amplifier, the amplifier providing the supply voltage.
13. The apparatus ofclaim 12, wherein the zener diode comprises a multi-finger structure.
14. The apparatus ofclaim 11, wherein the avalanche zone is around 1.5 volts.
15. An apparatus comprising:
A plurality of noise generating unit pairs, each of said pair of noise generating units having a first and a second noise generating units;
a first set of single-stage differential stochastic amplifiers, wherein each of said noise generating units pairs is input into one of the first set of single-stage differential stochastic amplifiers the first noise generating unit is input into a negative input of one of the first set of single-stage differential stochastic amplifiers, and the second noise generating unit is input into the positive input of one of the first set of single-stage differential stochastic amplifiers; and
at least a second single-stage differential stochastic amplifier receiving an input from two of the first set of single-stage differential stochastic amplifiers.
16. The apparatus ofclaim 15 wherein each of the noise generating unit comprises:
a zener diode located on a substrate;
a voltage source located on the substrate to provide a supply voltage to the zener diode; and
a current monitor located on the substrate to monitor the current through the zener diode and adjust the supply voltage provide by the voltage source to maintain the zener diode in the avalanche zone, wherein the zener diode provides a random noise output.
17. The apparatus ofclaim 16, wherein the zener diode is a heavily doped pn junction zener diode.
18. The apparatus ofclaim 17, wherein voltage source comprises a counter and a digital to analog converter wherein the digital to analog converter provides a threshold voltage to an amplifier, the amplifier providing the supply voltage.
19. The apparatus ofclaim 18, wherein the zener diode comprises a multi-finger structure.
20. The apparatus ofclaim 17, wherein the avalanche zone is around 1.5 volts.
US13/739,1512013-01-112013-01-11On-chip randomness generationAbandonedUS20140197865A1 (en)

Priority Applications (5)

Application NumberPriority DateFiling DateTitle
US13/739,151US20140197865A1 (en)2013-01-112013-01-11On-chip randomness generation
GB1511989.4AGB2524429B (en)2013-01-112014-01-07On-chip randomness generation
PCT/US2014/010433WO2014110007A1 (en)2013-01-112014-01-07On-chip randomness generation
DE112014000289.5TDE112014000289T5 (en)2013-01-112014-01-07 Random generation on the chip
US15/421,465US9985615B2 (en)2013-01-112017-02-01On-chip randomness generation

Applications Claiming Priority (1)

Application NumberPriority DateFiling DateTitle
US13/739,151US20140197865A1 (en)2013-01-112013-01-11On-chip randomness generation

Related Child Applications (1)

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US15/421,465ContinuationUS9985615B2 (en)2013-01-112017-02-01On-chip randomness generation

Publications (1)

Publication NumberPublication Date
US20140197865A1true US20140197865A1 (en)2014-07-17

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US13/739,151AbandonedUS20140197865A1 (en)2013-01-112013-01-11On-chip randomness generation
US15/421,465ActiveUS9985615B2 (en)2013-01-112017-02-01On-chip randomness generation

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US15/421,465ActiveUS9985615B2 (en)2013-01-112017-02-01On-chip randomness generation

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US (2)US20140197865A1 (en)
DE (1)DE112014000289T5 (en)
GB (1)GB2524429B (en)
WO (1)WO2014110007A1 (en)

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WO2018222747A1 (en)*2017-05-302018-12-06Interchange Laboratories, Inc.Method and apparatus for entraining signals
US12405665B2 (en)2021-10-212025-09-02Robert J. PlotkeMethod and apparatus for entraining signals

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US10855420B2 (en)*2017-06-162020-12-01Ofinno, LlcDistributed unit configuration update
US11132177B2 (en)2019-05-142021-09-28International Business Machines CorporationCMOS-compatible high-speed and low-power random number generator
CN114095977B (en)*2020-06-292025-06-03华为技术有限公司 A communication method and device
TWI737529B (en)*2020-10-302021-08-21精拓科技股份有限公司Digital isolator

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US9985615B2 (en)2013-01-112018-05-29International Business Machines CorporationOn-chip randomness generation
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Also Published As

Publication numberPublication date
WO2014110007A1 (en)2014-07-17
GB2524429B (en)2016-09-07
US9985615B2 (en)2018-05-29
GB201511989D0 (en)2015-08-19
US20170141771A1 (en)2017-05-18
GB2524429A (en)2015-09-23
DE112014000289T5 (en)2015-12-03

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Legal Events

DateCodeTitleDescription
ASAssignment

Owner name:INTERNATIONAL BUSINESS MACHINES CORPORATION, NEW Y

Free format text:ASSIGNMENT OF ASSIGNORS INTEREST;ASSIGNORS:FENG, KAI D.;WANG, PING-CHUAN;YANG, ZHIJIAN;AND OTHERS;SIGNING DATES FROM 20130108 TO 20130109;REEL/FRAME:029611/0714

STCBInformation on status: application discontinuation

Free format text:ABANDONED -- FAILURE TO RESPOND TO AN OFFICE ACTION


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