CROSS-REFERENCE TO RELATED APPLICATIONSThis application claims the benefit of U.S. Provisional Patent Application Ser. No. 61/418,616, filed Dec. 1, 2010, and also claims the benefit of U.S. Provisional Patent Application Ser. No. 61/479,284, filed Apr. 26, 2011, both of which are assigned to the assignee hereof and incorporated herein by reference in their entireties.
FIELDThe various circuit embodiments described herein relate in general to battery charging and controlling circuits and methods, and, more specifically, to battery charging and controlling circuits and methods in which current can be drawn from both a charging adapter and the battery in response to a high load demand for current.
BACKGROUNDRechargeable batteries, typically lithium-ion batteries, are widely used in consumer electronic devices, especially portable computers and mobile devices. Although examples of devices with which such batteries may be used are manifold, some recent examples include smartphone, notebook, tablet, and netbook computing devices, or the like, which have a CPU and memory that require operating power. When the device is not powered by the battery, an adapter is commonly used to power the device with which the battery is associated. At the same time, the adapter provides power to a charging circuit in the device to charge the battery. In such charging circuits, a synchronous switching buck converter is often used to control the charging current to the battery, while providing a substantially constant voltage to the load.
Traditionally, when the power required by the CPU and system load increase to reach the adapter power limit, the charge current can be reduced to zero, thereby giving a higher priority to power the system than to charge the battery. However, in certain conditions, if the CPU power demands are greater than those that can be met by the adapter, the adapter may crash. An example of such condition is when the system is cold and the CPU power needed for application processing and speeding up data flow is much more than the power that the adapter can supply, even with zero charging current.
In the past, several solutions to the problem have been advanced. For example, one solution disables the CPU high current mode. This, however, lowers the system performance. Another solution uses an adapter with an increased current capability. This, however, increase the adapter cost. Yet another solution reduces the system bus voltage. This, however, is not a widely adopted battery charger solution, and is not suitable for a high power system. Still another solution is to add an additional boost converter and include a boost controller. This, however, requires at least a power MOSFET, diode, and other circuit components. The cost of this solution, however, is high and needs more space.
Thus, in order to solve the problem of operating a CPU at a high speed to improve the system performance, while not crashing the adapter, it has been suggested to use the battery and adapter to simultaneously power the system when power demands are high. One way in which this has been done has been to use a boost converter in the charging circuit to convert the battery power for delivery to the system. The charger can operate in a synchronous buck mode during the battery charging and in a boost mode when additional power to CPU and system is needed. This type of charging circuit is referred to herein as a “hybrid power battery charger.”
What is needed is a system and method that uses the battery charger as a boost converter to boost battery voltage to adapter voltage and control method for achieving smooth mode transition between buck charging mode and boost supplement mode, and optimized efficiency.
SUMMARYThe proposed system and method described herein uses the existing battery charger configuration, but a control method is used that allows the charger to operate in a hybrid mode in which the charger operates in a buck mode during battery charging and in a boost mode during the battery discharging to supplement additional power to the system. This allows the CPU to operate at very high speed to realize its highest performance. In addition, the system does not need to increase the adapter current capability, thereby avoiding extra cost to the adapter. It realizes high power conversion efficiency, low total system cost, with a minimum space requirement.
Thus, according to one embodiment of a power supply system that is connectable to receive power from an adapter and supply power to a load, a rechargeable battery, a buck mode circuit, and a boost mode circuit are provided. A switching circuit is provided for switching between the buck mode circuit and boost mode circuit for supplying power to the load. If the power required by the load reaches a first predetermined level related to an adapter overload condition for a first predetermined time, the switching circuit disconnects said buck mode circuit from the load and connects the rechargeable battery and the boost mode circuit to said load. The first predetermined level may be established by a first predetermined percent of the current of a dynamic power management level established by the load, which may be related to a power level below that which can be provided by the adapter.
According to another embodiment of a power supply system connectable to a load, a power supply system having a rechargeable battery, a charging circuit, and an adapter connectable to receive power from a power supply source are provided. The charging circuit includes buck mode circuitry for selectively supplying power to the load in a normal operating mode and boost mode circuitry for selectively supplying power to the load in an adapter overload operating mode. Switching circuitry is provided for switching between the buck mode circuitry and the boost mode circuitry. If the power required by the load reaches an adapter overload condition, the charging circuit shuts down and waits a predetermined time. After the predetermined time, the charging circuit checks to determine whether the adapter overload condition still exists, and if the adapter overload is still exists, the charging circuit changes from the buck mode circuitry to the boost mode circuitry and connects the battery to the load to provide additional power to the load. The check to determine whether the adapter is still in the overload condition may be based, for example, on a system current.
According to an embodiment of a method for operating a charger circuit having a rechargeable battery, a buck mode circuit, and a boost mode circuit, the buck mode circuit is operated to provide power to a load in a normal operating mode. An input current to the charger circuit is sensed. If the input current exceeds a first predetermined percent of a current of a dynamic power management level established by the load, the charger circuit is shut down for a first predetermined time. If the input current continues to exceed the first predetermined percent of a current of a dynamic power management level established by the load after the first predetermined time, the boost mode circuit is started and the rechargeable battery is connected to provide power to the load.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a block diagram of an example of a hybrid battery charger environment in which battery charging and controlling circuits and methods described herein may be employed.
FIG. 2 is an electrical schematic diagram illustrating an example of an embodiment of a charger circuit having a voltage boost function that may be used in the battery charging and controlling circuits and methods described herein.
FIG. 3A is a block diagram of an example of feedback amplifier, duty cycle, and driver circuits for implementing the battery charging and controlling circuits and methods ofFIG. 2.
FIG. 3B is a block diagram of an example of start/stop control circuits for implementing the battery charging and controlling circuits and methods ofFIG. 2.
FIG. 4 is a flow chart illustrating one embodiment of a method for operating the circuit ofFIG. 2 to enter a boost mode of operation.
FIG. 5 is a flow chart illustrating one embodiment of a method for operating the circuit ofFIG. 2 to exit a boost mode of operation.
AndFIGS. 6A-6D are waveforms of various parameters verses time realized in the operation of the circuit ofFIG. 2.
In the various figures of the drawing, like reference numbers are used to denote like or similar parts.
DETAILED DESCRIPTIONA block diagram of an example of a hybridbattery charger environment10 is shown inFIG. 1. The hybridbattery charger environment10 includes asystem12, which may be, for instance, a smartphone, notebook, tablet, netbook computing devices, or the like, which has aCPU14 and amemory16 that require operating power. TheCPU14 andmemory16 are part of thesystem load18 for which the operating power is needed. The operating power to the system load is provided by a buck/boost charger system20 and an associatedrechargeable battery pack22, in a manner described below in greater detail. Therechargeable battery pack22 may be a lithium-ion battery pack, for example, although other rechargeable battery types may also be employed.
Anadapter24 is provided, which is optionally connectable to receive ac power, typically from an ac outlet, not shown, to convert the ac power to dc power to supply power to the buck/boost charger system20 to power thesystem load18 and to charge an associatedrechargeable battery pack22. For example, depending on the particular power requirements of aparticular system load18, a typical adapter may supply 90 W of power at about 20 V, thereby having the capability of supplying about 4.5 A current. The adapters, of course are load dependent, and may vary greatly from one application to another; however, one of the advantages of the hybrid battery charger of the type described herein is that the power requirements of the particular adapter needed can be reduced from that which would be required if the adapter alone is used to supply operating power to thesystem load18. Theadapter24 may be supplied as a component that is external to the device or system that it is intended to supply power, and is selectively connectable thereto.
Aswitch26 connects thebattery pack22 to thesystem load18 when theadapter24 is not connected to receive ac power so that system load18 is powered by therechargeable battery pack22 directly. When theadapter24 is connected to receive ac power, switch26 is opened to disconnect therechargeable battery pack22 from system load so that system load is powered by the ac adapter directly. According to the embodiments described below, therechargeable battery pack22 can supply additional power to thesystem load18 when the capabilities of theadapter24 are exceeded. More specifically, when the power required by thesystem load18 is more than theadapter24 can provide, the buck/boost charger system20 may call upon therechargeable battery pack22 to provide the additional power, for example by switching therechargeable battery pack22 into the system by, for instance, changing the buck converter charger to a boost converter. In addition, when the power required by thesystem load18 is higher than that which can be provided by theadapter24, the battery charge current is not only reduced to zero, but the buck/boost charger system20 is operated in a boost mode so that the adapter and battery power the system simultaneously.
In one embodiment, if the power demanded by thesystem load18 reaches an overload condition of theadapter24 at or exceeding the maximum power limit of the adapter, the buck/boost charger system20 immediately shuts down, and waits a predetermined period, referred to herein as a “deglitch time.” After the deglitch time, the buck/boost charger system20 checks to determine whether theadapter24 is still in an overload condition, based on the total system current. After the deglitch time, if the total system current is still higher than the maximum current limit of theadapter24, the buck/boost charger system changes from buck mode to boost mode and allows therechargeable battery pack22 to provide additional power to thesystem load18. As a result, theadapter24 and therechargeable battery pack22 together provide sufficient system power, thereby avoiding an adapter crash and enabling thesystem load18, including itsCPU14, to receive maximum available power for achieving its highest performance.
With reference now additionally toFIG. 2, an electrical schematic diagram is shown, illustrating an example of an embodiment of acharger circuit30 having a voltage boost function that may be used to provide the battery charging and controlling circuits and methods described herein. Thecharger circuit30 has a dynamic power management (DPM)circuit32 that receives input power oninput node34 from anadapter24 of the type described above which can be selectively connected thereto.
TheDPM loop32 includes an inputcurrent sensing resistor36, the nodes on either side of which being designated “ACP” and “ACN,” which are connected as inputs to thecharger control loops38, described below in greater detail. A pair ofMOSFET devices40 and42 are connected to receive respective high-side and low-side driving voltages from thecharger control loops38, depending on whether the charger is operating in buck or boost modes. Aninductor44 is connected to therechargeable battery pack22 by a chargecurrent sensing resistor46. The respective sides of the chargecurrent sensing resistor46 are designated “SRP and “SRN,” and are connected as inputs to thecharger control loops38, as described in greater detail below. The power output from thecharger circuit30 is represented by the VBUS voltage shown betweenline48 and the reference potential, orground line50, and by the current source ISYS52.
With reference now additionally toFIGS. 3A and 3B, respectively shown are thefeedback amplifier60, duty cycle and driver circuits62, and boost stop and start control andcircuit64. Thefeedback amplifier60 receives inputs ACP, ACN, SRP, and SRN respectively from the inputcurrent sensing resistor36 and chargecurrent sensing resistor46, providing an input to the typeIII compensation circuit66. The output from thecompensation circuit66 is applied to a control loopsaturation determining circuit68 and to aPWM circuit70. The output from the control loopsaturation determining circuit68 is connected to the boost stop and startcircuit64, described below, and the output from thePWM circuit70 is connected to thedriver logic circuit72.
The start boost and stop boost signals developed in the boost stop and startcircuit64 are also connected as inputs to thedriver logic circuit72. The outputs HSON and LSON signals are connected tooutput drivers74 and76, which are level adjusted by BTST, PHASE and REGN and GND voltages to provide drive signals to theMOSFET devices40 and42 (FIG. 1) at the correct voltage levels.
The boost start and stopcircuit64 is shown inFIG. 3B, to which reference is now additionally made. The boost start and stopcircuit64 receives inputs representing the voltage difference between ACP and ACN. This voltage difference may be developed, for example, in thefeedback amplifier60 ofFIG. 3A, with appropriate scaling.
With respect to the start boost mode, the voltage difference between ACP and ACN is compared to a reference voltage, for example 1.05×VREF_IAC bycomparator80. VREF_IAC represents a particular upper current level that is established by the host below which operation of the adapter should be held to avoid crashing the adapter. Thecomparator80 has hysteresis so that momentary changes in the ACP-ACN voltage difference do not cause thecomparator80 to change state. The reference voltage is established such that if the voltage difference ACP-ACN developed across the inputcurrent sensing resistor36 reaches a predetermined percentage of the power limit of theadapter24, in thiscase 105%, thecomparator80 changes output state.
The output from thecomparator80 is connected to adelay circuit82 which operates to shut down the charger and begin a predetermined delay, for example 170 μs in response to the change of state in the output of thecomparator80. If the voltage output from thecomparator80 returns to a low value before the predetermined delay, indicating that the boost mode is not required, the boost mode is not initiated and the charger is turned back on. However, after the expiration of the predetermined delay, the start boost output changes state, triggering the driver logic circuit72 (FIG. 3A) to turn on the low-side MOSFET device42 (FIG. 2) via the low-side driver76 and high-side MOSFET device (FIG. 2) via the high-side driver74.
With respect to the stop boost signal, four possible input signals can trigger the stop boost signal. The four signals are applied to anOR gate83, the output of which being the stop boost signal that is applied to the driver logic circuit72 (FIG. 3A). The first input signal is an immediate trigger developed bycomparator84 when the voltage difference ACP-ACN is less than a predetermined voltage, such as 10 mV. When this condition occurs, the boost mode is immediately shut down to prevent ACOV (system bus over voltage). The second input signal is a trigger that occurs when the voltage difference ACP-ACN is a predetermined percentage below the VREF_IAC voltage level. In the example illustrated, the percentage is 93%, and is established by thecomparator86. If the voltage difference ACP-ACN is a predetermined percentage below the VREF_IAC voltage level, and the output from thecomparator84 is not high, a 1 ms delay is timed by atimer88 to trigger the stop boost output signal.
In addition, if the control loop is in saturation, determined inblock90, and if the voltage difference ACP-ACN is not a predetermined percentage below the VREF_IAC voltage level, the stop boost output signal is triggered. Finally, awatchdog timer92 is provided to assure that the boost mode does not remain engage for a predetermined time, such as 175 seconds in the example shown.
The operation of thecharger circuit30 is illustrated in the flow diagram99 ofFIG. 4, to which reference is now additionally made. To enter boost mode for providing the power from both theadapter24 andrechargeable battery pack22 when the system power is higher than what the adapter can provide, a determination is made whether the input current is greater than 105% of IDPM,diamond100. IDPM is the current threshold setting for the adapter so that at this threshold the charger will reduce charging current and even give discharging current to try to regulate adapter current at this threshold to avoid adapter overload. For example, if a 20 V, 90 W adapter can give 4.5 A current, and a system load is set to trigger at 4.1 A, when the adapter current is above 4.1 A, charging current is reduced to hold the adapter current at 4.1 A. If the adapter current is close to a limit such as 4.4 A, the controller in the system load will throttle to reduce CPU power, so that adapter will not see a current higher than 4.5 A and crash. The 4.1 A is referred to as the IDPM current (DPM dynamic power management current). Thus, the charging current is dynamically changed based on system current, so that the total adapter current is well regulated on or below the IDPM set point.
If the input current is not greater than 105% of IDPM, the determination is repeated. On the other hand, if the input current is greater than 105% of IDPM, then the charger is immediately shutdown,box102. A delay of a minimum of 100 μs, for example a typical delay may be 170 μs) is initiated,box104. If the input current is still greater than 105% of IDPM,diamond106, then the boost mode is started,box108, if the other conditions are all met. If the input current is not greater than 105% of IDPM, then the process is reinitiated atdiamond100.
The conditions to trigger the exit from a boost mode are shown in theflowchart120 inFIG. 5, to which reference is now additionally made. As described above with reference toFIG. 3B, four conditions are concurrently monitored. As shown indiamond122, a determination is made bycomparator84 to determine whether the input current is above a predetermined level to prevent ACOV, or system bus over voltage. If the input current is less than the predetermined level, for example less than 10 mV for a 10 milliohm sensing resistor, the boost mode is immediately shut down,box124.
If the need for boost mode voltage no longer exists, boost mode is also exited. Thus, a determination is made,diamond126, bycomparator86 whether the input current is less than a predetermined percentage of IDPM, for example 93% in the embodiment illustrated. If it is, a deglitch time, for example 1 ms, is timed,box128, after which the boost mode is exited,box124.
On the other hand, if the input current is greater than 93% of IDPM but is less than the input current regulation point of the integrator,diamond130, if the loop integrator hit saturation (see control loopsaturation determining circuit68 inFIG. 3A and controlloop saturation box90 inFIG. 3B) then boost mode is exited,box124. The delay time depends on the loop response.
Finally, if the watchdog timer92 (SeeFIG. 3B) is enabled, if timer has expired and no charge voltage or current command are to be written,diamond134, then the boost mode is exited,box124. Of course, if any of the conditions for entering the boost mode still exist, the circuit will reenter the boost mode.
Various waveforms seen in the operation of thecharger circuit30 ofFIG. 2 are shown inFIGS. 6A-6D, to which reference is now additionally made. The system current, ISYS, is shown bywaveform140 inFIG. 6A, illustrating the increased system current in DPM mode. The adapter current, IADP, is shown bywaveform142 inFIG. 6B, illustrating the operation of the adapter current at the adapter current limit. The battery charge current, ICHG, is shown bywaveform144 inFIG. 6C, illustrating the drop in charge current due to regulation of the input current. And the constant output voltage is shown bywaveform146 inFIG. 6D.
One of the advantages of the embodiments described herein is that the existing battery charger topology can used, but the control method of the embodiments may be used to allow the charger to operate in a buck mode during the battery charging and in a boost mode during the battery discharging for supplementing additional power to the system. Some of the benefits realized include allowing the CPU to operate at high speeds with the high performance, reducing the requirement for increased adapter current capability, eliminating extra cost for the adapter, enabling high power conversion efficiency, reducing the total system cost, and requiring minimum solution space.
Electrical connections, couplings, and connections have been described with respect to various devices or elements. The connections and couplings may be direct or indirect. A connection between a first and second electrical device may be a direct electrical connection or may be an indirect electrical connection. An indirect electrical connection may include interposed elements that may process the signals from the first electrical device to the second electrical device.
Although the invention has been described and illustrated with a certain degree of particularity, it should be understood that the present disclosure has been made by way of example only, and that numerous changes in the combination and arrangement of parts may be resorted to without departing from the spirit and scope of the invention, as hereinafter claimed.