TECHNICAL FIELDThis invention relates to a photoelectric conversion element and to a solar cell including the photoelectric conversion element.
BACKGROUND ARTIn general, as solar cells for converting solar energy into electricity, there have been proposed various solar cells such as silicon-based, compound-based, and organic-based solar cells. It is considered that since the silicon-based solar cells use, as its material, silicon which is present in a large amount as an earth resource, the problem of resource exhaustion or the like does not arise as compared with the other compound-based and organic-based solar cells.
The silicon-based solar cells can be classified into the monocrystalline type, the polycrystalline type, and the amorphous type. Among these silicon-based solar cells, the monocrystalline type and polycrystalline type solar cells are of the bulk type while the amorphous type solar cell is of the thin film type. Herein, it is necessary to form a film having a thickness of about 100 μm for the bulk type silicon solar cell while it is sufficient to form a film having a thickness of about 0.5 μm for the thin film type silicon solar cell.
Recently, among the above-mentioned various solar cells, the bulk-type silicon solar cells tend to be widely used because the energy conversion efficiency is relatively high and further the manufacturing cost is relatively low. However, with the rapid increase in demand for the bulk-type silicon solar cells, a large amount of monocrystalline and polycrystalline silicon might be needed as materials and result in a serious increase in cost. This also might make it difficult to acquire the materials.
In the meanwhile, it has been proposed to use the solar energy as an alternative energy that substitutes for the thermal or hydraulic power. In order to use the solar energy as the alternative energy for substituting the thermal or hydraulic power, there is required a solar cell facility having a large area on the order of 1 km2to supply high power instead of the thermal or hydraulic power.
In the case of the monocrystalline type or polycrystalline type silicon solar cell, it is necessary to form a thick monocrystalline or polycrystalline silicon film, and therefore, it is very difficult to produce the solar cell facility with a large area and high power in terms of both cost and resource as also described above.
In contrast, in the case of the amorphous type silicon solar cell, the thickness of an amorphous silicon film can be 1/100 or less as compared with the monocrystalline type or polycrystalline type silicon solar cell, and therefore, it is suitable for actually manufacturing, at a low cost, the solar cell facility with a large area and high power.
However, it is pointed out that the amorphous type silicon solar cell is disadvantageous in that the energy conversion efficiency is about 6% to 7% and is extremely low as compared with the monocrystalline type or polycrystalline type silicon solar cell having an energy conversion efficiency of about 20%. In addition, it is also pointed out that the energy conversion efficiency of the amorphous type silicon solar cell decreases with an increase of the area.
Patent Document 1 discloses forming a transparent electrode having an oblique section on a substrate in order to improve the performance of a thin film type solar cell and using one of ZnO, SnO2, and ITO as the transparent electrode.
Patent Document 2 discloses an amorphous type silicon solar cell having SnO2or ZnO as a transparent electrode layer.
PRIOR ART DOCUMENTPatent Document- Patent Document 1: JP-A-2008-533737
- Patent Document 2: JP-A-H5-175529
SUMMARY OF THE INVENTIONProblem to be Solved by the InventionPatent Document 1 discloses a transparent electrode processing method that increases an effective area by minimizing the insulation distance between unit cells forming a solar cell, thereby enabling a reduction in the unit cost of production. However, no consideration is made about improving the energy conversion efficiency of a solar cell layer forming an amorphous type silicon solar cell.
Patent Document 2 discloses an amorphous silicon solar cell which has a laminate structure comprising a p-type amorphous silicon layer (hereinafter, a-Si layer) formed on a transparent electrode formed of ZnO or SnO2, with an i-type a-Si layer and an n-type a-Si layer laminated on the p-type a-Si layer in this order. In this case, a back metal electrode is provided on the n-type a-Si layer. However, Patent Document 2 makes it clear that the energy conversion efficiency of the amorphous silicon solar cell having the above-mentioned structure remains at 5.5%.
It is an object of this invention to provide a photoelectric conversion element structure suitable for a solar cell which is mass-produceable and which enables realization of a large-area solar cell facility.
It is an object of this invention to provide a photoelectric conversion element structure which is suitable for manufacturing a solar cell using a ZnO electrode and amorphous silicon and which enables effective use of the resources and realization of a large-area solar cell facility.
Further, it is an object of this invention to obtain an amorphous type silicon solar cell with an energy conversion efficiency exceeding 6% (preferably 10%).
Means for Solving the ProblemAccording to a first aspect of this invention, there is provided a photoelectric conversion element characterized by comprising a first electrode layer, a second electrode layer, and one or a plurality of power generating laminates provided between the first and second electrode layers,
wherein the power generating laminate comprises a p-type semiconductor layer, an i-type semiconductor layer formed in contact with the p-type semiconductor layer, and an n-type semiconductor layer formed in contact with the i-type semiconductor layer,
wherein the n-type semiconductor layer of said one power generating laminate or the n-type semiconductor layer of a first electrode side power generating laminate placed on the first electrode side of said plurality of power generating laminates is brought into contact with the first electrode layer and the p-type semiconductor layer of said one power generating laminate or the p-type semiconductor layer of a second electrode side power generating laminate placed on the second electrode side of said plurality of power generating laminates is in contact with the second electrode layer, and
wherein the first electrode layer contains ZnO at least at a portion which is brought into contact with the n-type semiconductor layer.
According to a second aspect of this invention, there is provided the photoelectric conversion element according to the first aspect, characterized in that the ZnO of the first electrode layer is doped with Ga, Al, or In to have an n-type conductivity.
According to a third aspect of this invention, there is provided the photoelectric conversion element according to the first or the second aspect, characterized in that the first electrode layer is a transparent electrode.
According to a fourth aspect of this invention, there is provided the photoelectric conversion element according to any one of the first to the third aspects, characterized in that the i-type semiconductor layer in at least one of the power generating laminates is formed of one of crystalline silicon, microcrystalline amorphous silicon, and amorphous silicon.
According to a fifth aspect of this invention, there is provided the photoelectric conversion element according to the first aspect, characterized in that the ZnO of the first electrode layer has an n-type conductivity and the n-type semiconductor layer brought into contact with the first electrode layer is formed of amorphous silicon.
According to a sixth aspect of this invention, there is provided the photoelectric conversion element according to any one of the first to the fifth aspects, characterized in that said one power generating laminate or the first electrode side power generating laminate of said plurality of power generating laminates is formed of amorphous silicon.
According to a seventh aspect of this invention, there is provided the photoelectric conversion element according to any one of the first to the sixth aspects, characterized in that the p-type semiconductor layer brought into contact with the second electrode layer is formed of amorphous silicon and the second electrode layer has at least a portion which is brought into contact with the p-type semiconductor layer and which is formed of Se or Pt.
According to an eighth aspect of this invention, there is provided the photoelectric conversion element according to any one of the first to the sixth aspects, characterized in that the plurality of power generating laminates are present and the second electrode side power generating laminate of said plurality of power generating laminates is formed of microcrystalline silicon.
According to a ninth aspect of this invention, there is provided the photoelectric conversion element according to the eighth aspect, characterized in that the p-type semiconductor layer brought into contact with the second electrode layer is formed of microcrystalline silicon and the second electrode layer has at least a portion which is brought into contact with the p-type semiconductor layer and which contains Ni.
According to a tenth aspect of this invention, there is provided the photoelectric conversion element according to the seventh or the ninth aspect, characterized in that the second electrode layer further comprises an Al layer.
According to an eleventh aspect of this invention, there is provided a solar cell module characterized by comprising the photoelectric conversion element according to any one of the first to the tenth aspects.
Effect of the InventionAccording to this invention, a massive, i.e. large-area, solar cell can be easily obtained at a low cost and, further, it is possible to obtain a photoelectric conversion element and a solar cell with high energy conversion efficiency. Moreover, according to this invention, it is possible to obtain an amorphous silicon photoelectric conversion element and an amorphous silicon solar cell which have no problem in terms of global resources and are also economically advantageous.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a diagram for explaining the principle of a photoelectric conversion element according to this invention.
FIG. 2 is a schematic diagram for explaining the structures of a photoelectric conversion element and a solar cell according to an embodiment of this invention.
FIG. 3A is a diagram for explaining, in order of processes, a manufacturing process of photoelectric conversion elements shown inFIG. 2.
FIG. 3B is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3C is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3D is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3E is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3F is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3G is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 3H is a diagram for explaining, in order of processes, a manufacturing process of the photoelectric conversion elements shown inFIG. 2.
FIG. 4 is a schematic diagram for explaining the structures of a photoelectric conversion element and a solar cell according to another embodiment of this invention.
MODE FOR CARRYING OUT THE INVENTIONPrinciple of this Invention:
First, this invention aims to realize a photoelectric conversion element and a solar cell with an open circuit voltage Voc of 1.3V or more and with an energy conversion efficiency of 10% or more using amorphous silicon, thereby enabling increase in area, power, and productivity.
Conventionally, in an amorphous silicon solar cell or an amorphous silicon photoelectric conversion element having a pin structure, a structure is usually employed in which a p-type amorphous silicon layer is formed in contact with a transparent electrode while an n-type amorphous silicon layer is in contact with a back electrode.
However, with this structure, as is also clear from Patent Document 2, the open circuit voltage Voc is 0.94V and the energy efficiency is about 5.5%. In contrast, it is suggested in Patent Document 2 that a further improvement can not be established in the pin-structure amorphous silicon solar cell.
The present inventor has obtained knowledge that one of the causes of the above-mentioned problem about the conventional amorphous silicon solar cell is that the amorphous silicon films are coarse films with many defects. Based on this knowledge, amorphous silicon films excellent in quality with few defects are formed by a CVD method using excellent radical reactions.
Further, a transparent electrode is formed without using a rare material (In) such as ITO, but by using a material (Zn) which is present in a large amount in the natural world with little worry about its exhaustion.
In general, indium is often used for forming a transparent electrode, but indium itself is rare as a resource and is expensive. Therefore, it is not expedient to use indium for manufacturing a large-area high-power solar cell facility from an economic point of view and in terms of effective use of the resource.
Taking into account the above-mentioned point, in this invention, zinc (specifically ZnO) which can be sufficiently ensured as a resource is used as a transparent electrode. An impurity is doped into ZnO to increase the semiconductor conductivity. The present inventor has obtained knowledge that it is difficult to dope a p-type impurity while it is easy to dope an n-type impurity such as Ga, Al, or In. As a result, the inventor has found out that n-type ZnO can be actually used.
Further, the present inventor has obtained knowledge that amorphous silicon which is in contact with a ZnO transparent electrode is conventionally p-type amorphous silicon, but that since the difference between work functions of p-type amorphous silicon and n-type ZnO is so large that it is difficult to allow a large current to flow. On the other hand, the present inventor has found out important knowledge that the electron energy difference between conduction bands of n-type amorphous silicon and n-type ZnO is so small that electrons can easily flow and thus it is possible to allow a large current to flow.
Referring toFIG. 1, the principle structure of a photoelectric conversion element according to this invention is shown. In the case of this example, an n-type amorphous silicon (a-Si) layer makes a junction with an n-type ZnO layer obtained by adding Ga to ZnO. As is also clear fromFIG. 1, it is structured that electrons easily flow from the n-type amorphous silicon (a-Si) layer side into the n-type ZnO layer.
Further,FIG. 1 shows an energy band structure when the n-type amorphous silicon (a-Si) layer makes a junction with the n-type ZnO layer (herein, the n+-type ZnO layer). In the illustrated energy band structure, the band gap between a conduction band Ec and a valence band Ev of the a-Si layer shown on the right side is 1.75 eV. On the other hand, a conduction band Ec of the n+-type ZnO layer shown on the left side in the figure is lower than the conduction band Ec of the a-Si layer by 0.2 eV and is lower than the Fermi level.
Therefore, as illustrated, since there is almost no electron barrier between the conduction band Ec of the a-Si layer and the conduction band Ec of the n+-type ZnO layer, electrons flow into the conduction band Ec of the n+-type ZnO layer from the conduction band Ec of the a-Si layer with high efficiency. In this way, since there is almost no barrier between the illustrated a-Si layer and n+-type ZnO layer, electrons can be efficiently moved from the a-Si layer to the n+-type ZnO layer. As a consequence, when a photoelectric conversion element is formed, it is possible to allow a large current to flow and thus to improve the energy efficiency. On the other hand, when p+-type amorphous silicon is brought into contact with n-type ZnO, the difference between conduction bands Ec thereof reaches even 1.6 eV so that it is difficult for electrons to flow into the p+-type amorphous silicon from the n-type ZnO.
Referring toFIG. 2, there is shown aphotoelectric conversion element10 according to an embodiment of this invention based on the above-mentioned principle of this invention. The illustratedphotoelectric conversion element10 is provided on a base comprising aguard glass12 and aglass substrate14 disposed on theguard glass12. The illustratedglass substrate14 is formed of inexpensive soda glass containing Na. For the purpose of preventing contamination of the element due to diffusion of Na from the soda glass, asodium barrier layer16 is provided between thephotoelectric conversion element10 and theglass substrate14. Thesodium barrier layer16 is formed by, for example, coating a surface flattening coating liquid and then drying and sintering it. As is also clear from the figure, thephotoelectric conversion element10 serving as a unit cell is electrically connected in series with adjacent other photoelectric conversion elements (cells), thereby forming a solar cell.
Specifically, thephotoelectric conversion element10 according to the embodiment of this invention comprises afirst electrode layer20, apower generating laminate22 with a pin structure formed of a-Si, and asecond electrode layer26 of Al formed on thepower generating laminate22 through aselenium layer24.
Thefirst electrode20 of thephotoelectric conversion element10 is a transparent conductor electrode (Transparent Conductive Oxide (TCO) layer) and herein is formed by a ZnO layer having a thickness of 1 μm. In this case, the ZnO layer serving as thefirst electrode20 is an n+-type ZnO layer doped with Ga. Further, the n+-type ZnO layer forming thefirst electrode20 is provided with insulating films201 (herein, SiCN) at a predetermined interval so as to be divided or partitioned per cell.
An n+-type a-Si layer221 forming part of thepower generating laminate22 is provided on thefirst electrode20. The n+-type a-Si layer221 is brought into contact with the transparent electrode forming thefirst electrode20. The illustrated n+-type a-Si layer221 has a thickness of 10 nm. An i-type a-Si layer222 and a p-type a-Si layer223 are formed in this order on the n+-type a-Si layer221 to provide thepower generating laminate22. The illustrated i-type a-Si layer222 and p-type a-Si layer223 have thicknesses of 480 nm and 10 nm, respectively. The illustrated n+-type a-Si layer221, i-type a-Si layer222, and p+-type a-Si layer223 serving as thepower generating laminate22 are provided with viaholes224 at positions different from those of the insulatinglayers201 of thefirst electrode20. A SiO2layer is formed on an inner wall of each via hole.
Thus, the above-mentioned nip-structure of thepower generating laminate22 has a total thickness of 500 nm which is 1/100 or less as compared with a photoelectric conversion element formed of monocrystalline or polycrystalline silicon.
Then, thesecond electrode layer26 is formed on the p-type a-Si layer223 through the selenium (Se)layer24. The Al forming thesecond electrode layer26 is also formed in the via holes224 (the inner wall is insulated by SiO2) of thepower generating laminate22. The Al in the via holes224 is electrically connected to thefirst electrodes20 of the adjacent other photoelectric conversion elements. The selenium (Se)layer24 is formed as a contact portion of the second electrode with the p-type a-Si layer. This is because the work function of Se (−6.0 eV) is close to that of the p-type a-Si layer, and therefore, it may be replaced by Pt which also has an approximate work function (−5.7 eV).
Further, apassivation film28 of SiCN is formed on thesecond electrode26. The insulating material (herein, SiCN) forming thepassivation film28 is also buried inholes225 reaching the i-type a-Si layer222 through thesecond electrode26/24 and the p-type a-Si layer223. On thepassivation film28, a heat sink30 (e.g. formed of Al) is attached through anadhesive layer29 formed of a material with excellent thermal conductivity.
As the ZnO layer forming thefirst electrode layer20, an n+-type ZnO layer can be formed by doping Al, In, or the like instead of Ga.
Thephotoelectric conversion element10 shown inFIG. 2 could practically accomplish an energy conversion efficiency of about 20% per cell. Further, when eachphotoelectric conversion element10 was connected to form a solar cell module of 1.15 m×1.40 m, a power of 307 W was obtained and the energy conversion efficiency in the module was 18.9%.
Hereinbelow, a method of manufacturing thephotoelectric conversion elements10 and the solar cell shown inFIG. 2 will be described with reference toFIGS. 3A to 3H. In this example, use is made of a system in which a MSEP (Metal Surface-wave Excited Plasma) type plasma processing apparatus (may be either a type which has lower gas nozzles or a lower gas shower plate or a type which has none of them) proposed in the specification of JP Patent Application No. 2008-153379 previously filed by the present inventor et al. is used as each of first to eighth plasma processing apparatuses in a cluster arrangement.
As shown inFIG. 3A, first, thesodium barrier layer16 having a thickness of 0.2 μm is formed on a surface of theglass substrate14 made of soda glass in a low-pressure atmosphere of about 5 Torr.
Then, as shown inFIG. 3B, theglass substrate14 formed with thesodium barrier layer16 is introduced into the first plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where the transparent electrode (TCO layer) having a thickness of 1 μm is formed for thefirst electrodes20. In the first plasma processing apparatus, the n+-type ZnO layer is formed by doping Ga. In the first plasma processing apparatus, the Ga-doped n+-type ZnO layer is formed by plasma CVD on thesodium barrier layer16 by supplying a mixed gas of Kr and O2into a chamber from upper gas nozzles, producing a plasma, and ejecting a mixed gas of Ar, Zn (CH3)2, and Ga (CH3)3from the lower gas nozzles or the lower gas shower plate into the plasma produced in the atmosphere containing Kr and oxygen.
Subsequently, a photoresist is coated on the n+-type ZnO layer (20) and then the photoresist is patterned using the photolithography technique. After patterning the photoresist, theglass substrate14 with the patterned photoresist is introduced into the second plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the second plasma processing apparatus, the n+-type ZnO layer is selectively etched using the patterned photoresist as a mask so that, as shown inFIG. 3C, openings reaching thesodium barrier layer16 are formed in the n+-type ZnO layer which forms thefirst electrodes20. The etching in the second plasma processing apparatus is carried out by supplying an Ar gas into a chamber from upper gas nozzles and supplying a mixed gas of Ar, Cl2, and HBr from the lower gas nozzles or the lower gas shower plate into a plasma produced in the Ar atmosphere.
Theglass substrate14 with the n+-type ZnO layer having the openings and with the photoresist coated on the n+-type ZnO layer is conveyed into the third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate. In the third plasma processing apparatus, the photoresist is removed by ashing in a Kr/O2plasma atmosphere.
After removing the photoresist, theglass substrate14 with the n+-type ZnO layer (first electrodes20) formed with the openings is introduced into the fourth plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the fourth plasma processing apparatus, first, SiCN is formed as the insulatingfilm201 by plasma CVD in the openings and on a surface of the n+-type ZnO layer (20). Then, the SiCN on the surface of the n+-type ZnO layer (20) is removed by etching in the same fourth plasma processing apparatus. As a result, the insulatingfilm201 is buried only in the openings of the n+-type ZnO layer (20). In the fourth plasma processing apparatus, the SiCN film is formed by CVD by supplying a Xe/NH3gas mixture into a chamber from upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar, SiH4, and SiH(CH3)3into the chamber from the lower gas nozzles or the lower gas shower plate. Then, switching the feed gases, in the same chamber, the SiCN on the surface of the n+-type ZnO layer (20) is removed by etching by supplying an Ar gas into the chamber from the upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar and CF4into the chamber from the lower gas nozzles or the lower gas shower plate.
Subsequently, in the same fourth plasma processing apparatus, thepower generating laminate22 having the nip structure and theSe24 are formed by continuous CVD by switching feed gases in sequence. As shown inFIG. 3D, in the fourth plasma processing apparatus, the n+-type a-Si layer221, the i-type a-Si layer222, the p+-type a-Si layer223, and the selenium (Se)layer24 are formed in this order. Specifically, in the fourth plasma processing apparatus, the n+-type a-Si layer221 is formed by plasma CVD by supplying a mixed gas of Ar and H2into the chamber from the upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar, SiH4, and PH3into the chamber from the lower gas nozzles or the lower gas shower plate. Then, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the i-type a-Si layer222 is formed by switching the Ar/SiH4/PH3gas mixture to an Ar/SiH4gas mixture and introducing it from the lower gas nozzles or the lower gas shower plate. Further, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the p+-type a-Si layer223 is formed by replacing the Ar/SiH4gas mixture from the lower gas nozzles or the lower gas shower plate by an Ar/SiH4/B2H6gas mixture. Then, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, theselenium layer24 is formed by CVD by replacing the Ar/SiH4/B2H6gas mixture from the lower gas nozzles or the lower gas shower plate by a mixed gas of Ar and H2Se. In this manner, since the formation and etching of the six layers are carried out by switching the feed gases in sequence in the same MSEP type plasma processing apparatus, it is possible to form the excellent films with few defects and simultaneously to significantly reduce the manufacturing cost.
Theglass substrate14 formed with theselenium layer24 and thepower generating laminate22 is introduced from the fourth plasma processing apparatus into a photoresist coater (slit coater), where a photoresist is coated and then the photoresist is patterned using the photolithography technique.
After patterning the photoresist, theglass substrate14 formed with theselenium layer24 and thepower generating laminate22 is, along with the patterned photoresist, introduced into the fifth plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the fifth plasma processing apparatus, theselenium layer24 and thepower generating laminate22 are selectively etched using the photoresist as a mask so that, as shown inFIG. 3E, the viaholes224 reaching thefirst electrodes20 are formed. That is, the four layers are continuously etched in the fifth plasma processing apparatus.
Specifically, while a mixed gas of Ar and H2is being supplied into a chamber from upper gas nozzles and producing a plasma, the etching of theselenium layer24 is carried out by ejecting a mixed gas of Ar and CH4into the plasma from the lower gas nozzles or the lower gas shower plate. Subsequently, while continuously supplying Ar into the chamber from the upper gas nozzles and producing a plasma, the etching of thepower generating laminate22 comprising the nip three layers is carried out by ejecting an Ar/HBr gas mixture from the lower gas nozzles or the lower gas shower plate.
Theglass substrate14 is provided, by the etching in the fifth plasma processing apparatus, with the via holes224 that pass through the layers from theselenium layer24 to the n+-type ZnO layer (first electrodes20) and that reach thefirst electrodes20. Thereafter, the glass substrate is transferred from the fifth plasma processing apparatus into the above-mentioned third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate, where the photoresist is removed by ashing in a plasma produced in an atmosphere of a Kr/O2gas mixture introduced into a chamber from upper gas nozzles.
Theglass substrate14, after the removal of the photoresist, is transferred into the sixth plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where, as shown inFIG. 3F, the Al layer having a thickness of 1 μm is formed as thesecond electrode26 on theselenium layer24. The Al layer is also formed in the via holes224. While a mixed gas of Ar and H2is being supplied into a chamber from upper gas nozzles and producing a plasma, the formation of the Al layer is carried out by ejecting an Ar/Al(CH3)3gas mixture into the plasma, produced in the Ar/H2atmosphere, from the lower gas nozzles or the lower gas shower plate.
Subsequently, a photoresist is coated on the Al layer, i.e. thesecond electrode26, and then is patterned. Theglass substrate14 with the patterned photoresist is introduced into the seventh plasma processing apparatus having lower gas nozzles or a lower gas shower plate.
In the seventh plasma processing apparatus, the Al layer is etched by, while supplying an Ar gas into a chamber from upper gas nozzles and producing a plasma, ejecting an Ar/Cl2gas mixture into the plasma, produced in the Ar atmosphere, from the lower gas nozzles or the lower gas shower plate. Subsequently, while supplying a mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, theselenium layer24 is etched by introducing an Ar/CH4gas mixture into the plasma, produced in the Ar/H2atmosphere, from the lower gas nozzles or the lower gas shower plate. Then, while supplying an Ar gas into the chamber from the upper gas nozzles and producing a plasma, the p+-type a-Si layer223 and part of the i-type a-Si layer222 are etched by switching the gases from the lower gas nozzles or the lower gas shower plate to an Ar/HBr gas mixture. As a result, as shown inFIG. 3G, theholes225 reaching midway of the i-type a-Si layer222 from a surface of theAl layer26 are formed. Also in this process, the four layers are continuously etched by switching the gases in sequence in the same MSEP type plasma processing apparatus. Thus, the processing time and cost are significantly reduced.
Then, theglass substrate14 having thereon the elements shown inFIG. 3G is transferred into the above-mentioned third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate, where the photoresist is removed by ashing in a plasma produced in an atmosphere of a Kr/O2gas mixture introduced into the chamber from the upper gas nozzles.
Theglass substrate14 having, as thesecond electrode26, the Al layer with the photoresist removed is introduced into the eighth plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where the SiCN film is formed by CVD so that the insulatinglayer28 is formed on theAl layer26 and in theholes225. As a consequence, the required photoelectric conversion elements and solar cell are produced as shown inFIG. 3H. The SiCN film is formed by supplying a Xe/NH3gas mixture into a chamber from upper gas nozzles, producing a plasma, and ejecting an Ar/SiH4/SiH(CH3)3gas mixture from the lower gas nozzles or the lower gas shower plate.
According to the above-mentioned manufacturing method, it is possible to use the same plasma processing apparatus for forming a plurality of layers and so on. Therefore, it is possible to produce the photoelectric conversion elements and the solar cell in the state where contamination due to oxygen, impurities, and so on in the atmosphere is removed.
As a result, the energy conversion efficiency in the single photoelectric conversion element can be enhanced to 20% and the energy efficiency of the module formed by the plurality of photoelectric conversion elements can be improved to 18.9%.
In the above-mentioned embodiment, the description has been given of only the case where the nip-structure power generating laminate is all formed by the a-Si layers. However, the i-type a-Si layer may be formed of crystalline silicon or microcrystalline amorphous silicon. Further, one or more power generating laminates may be deposited on thepower generating laminate22.
Next, another embodiment will be described as an example in which another power generating laminate is deposited on thepower generating laminate22.
Referring toFIG. 4, there is shown aphotoelectric conversion element40 according to another embodiment of this invention based on the above-mentioned principle of this invention. InFIG. 4, the same reference numerals as those inFIG. 2 are assigned to the same portions as those of the element ofFIG. 2. For those portions with the same reference numerals as inFIG. 2, a detailed description will be omitted. Thephotoelectric conversion element40 inFIG. 4 has, through asodium barrier layer16 and an n+-type ZnO layer having a thickness of 1 μm and serving as afirst electrode20, apower generating laminate22 with an nip structure formed of the same a-Si as in the previous embodiment on aglass substrate14 formed of inexpensive soda glass containing Na. InFIG. 4, a secondpower generating laminate42 with an nip structure formed of microcrystalline silicon (μc-Si) is provided on thepower generating laminate22 and asecond electrode layer26 of Al is formed on the secondpower generating laminate42 through a nickel (Ni)layer44.
Specifically, an n+-type μc-Si layer421 forming part of the secondpower generating laminate42 is provided on thepower generating laminate22 so as to be in contact with a p+-type a-Si layer223. The illustrated n+-type μc-Si layer421 has a thickness of 20 nm. An i-type μc-Si layer422 and a p-type μc-Si layer423 forming the secondpower generating laminate42 are formed in this order on the n+-type μc-Si layer421. The i-type μc-Si layer422 and the p-type μc-Si layer423 have thicknesses of 1.86 μm and 20 nm, respectively. Viaholes244 are provided so as to reach thefirst electrodes20 from theAl layer26 through an n+-type a-Si layer221, an i-type a-Si layer222, and the p+-type a-Si layer223 forming thepower generating laminate22, the n+-type μc-Si layer421, the i-type μc-Si layer422, and the p-type μc-Si layer423 forming the secondpower generating laminate42, and theNi layer44. An inner wall of each via hole is coated with a SiO2layer and each via hole is provided therein with an Al layer so that one photoelectric conversion element is connected in series with adjacent other photoelectric conversion elements.
The secondpower generating laminate42 formed of microcrystalline silicon has a total thickness of 2.26 μm and serves to absorb sunlight with wavelengths that cannot be absorbed by thepower generating laminate22 formed of amorphous silicon, thereby enhancing the total power generation efficiency. As a result, the power generation efficiency reaches 30% in the illustrated structure.
The nickel (Ni)layer44 forming a contact portion of the second electrode with the p-type μc-Si layer423 is employed because its work function is close to that of the p-type μc-Si layer. AlthoughSiCN insulating holes245 reach the i-type a-Si layer222 through thesecond electrode26, theNi layer44, the p+-type μc-Si layer423, the i-type μc-Si layer422, the n-type μc-Si layer421, and the p-type a-Si layer223, since μc-Si has a high resistance, it may be configured that theholes245 are stopped upon reaching the i-type μc-Si layer422.
Next, a method of manufacturing thephotoelectric conversion elements40 and the solar cell shown inFIG. 4 will be described. In this example, a description will be given of a case where a MSEP (Metal Surface-wave Excited Plasma) type plasma processing apparatus (having lower gas nozzles or a lower gas shower plate or having none of them) proposed in the specification of JP Patent Application No. 2008-153379 previously filed by the present inventor et al. is used as each of first to eighth plasma processing apparatuses and use is made of a system in which these plasma processing apparatuses are arranged in a cluster.
First, thesodium barrier layer16 having a thickness of 0.2 μm is formed on a surface of theglass substrate14 made of soda glass in a low-pressure atmosphere of about 5 Torr.
Then, theglass substrate14 formed with thesodium barrier layer16 is introduced into the first plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where the transparent electrode (TCO layer) having a thickness of 1 μm is formed for thefirst electrodes20. In the first plasma processing apparatus, the n+-type ZnO layer is formed by doping Ga. In the first plasma processing apparatus, the Ga-doped n+-type ZnO layer is formed by plasma CVD on thesodium barrier layer16 by supplying a mixed gas of Kr and O2into a chamber from upper gas nozzles, producing a plasma, and ejecting a mixed gas of Ar, Zn (CH3)2, and Ga (CH3)3from the lower gas nozzles or the lower gas shower plate into the plasma produced in the atmosphere containing Kr and oxygen.
Subsequently, a photoresist is coated on the n+-type ZnO layer (20) and then the photoresist is patterned using the photolithography technique. After patterning the photoresist, theglass substrate14 with the patterned photoresist is introduced into the second plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the second plasma processing apparatus, the n+-type ZnO layer is selectively etched using the patterned photoresist as a mask so that openings reaching thesodium barrier layer16 are formed in the n+-type ZnO layer which serves as thefirst electrodes20. The etching in the second plasma processing apparatus is carried out by supplying an Ar gas into a chamber from upper gas nozzles and supplying a mixed gas of Ar, Cl2, and HBr from the lower gas nozzles or the lower gas shower plate into a plasma produced in the Ar atmosphere.
Theglass substrate14 with the n+-type ZnO layer having the openings and with the photoresist coated on the n+-type ZnO layer is conveyed into the third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate. In the third plasma processing apparatus, the photoresist is removed by ashing in a Kr/O2plasma atmosphere.
After removing the photoresist, theglass substrate14 with the n+-type ZnO layer, which serves as thefirst electrodes20, formed with the openings is introduced into the fourth plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the fourth plasma processing apparatus, first, SiCN is formed as an insulatingfilm201 by plasma CVD in the openings and on a surface of the n+-type ZnO layer (20). Then, the SiCN on the surface of the n+-type ZnO layer (20) is removed by etching in the same fourth plasma processing apparatus. As a result, the insulatingfilm201 is buried only in the openings of the n+-type ZnO layer (20). In the fourth plasma processing apparatus, the SiCN film is formed by CVD by supplying a Xe/NH3gas mixture into a chamber from upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar, SiH4, and SiH(CH3)3into the chamber from the lower gas nozzles or the lower gas shower plate. Then, switching the feed gases, in the same chamber, the SiCN on the surface of the n+-type ZnO layer (20) is removed by etching by supplying an Ar gas into the chamber from the upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar and CF4into the chamber from the lower gas nozzles or the lower gas shower plate.
Subsequently, in the same fourth plasma processing apparatus, thepower generating laminate22 having the nip structure, the secondpower generating laminate42 having the nip structure, and theNi layer24 are formed in this order by continuous CVD by switching feed gases in sequence. Specifically, in the fourth plasma processing apparatus, the n+-type a-Si layer221 is formed by plasma CVD by supplying a mixed gas of Ar and H2into the chamber from the upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar, SiH4, and PH3into the chamber from the lower gas nozzles or the lower gas shower plate. Then, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the i-type a-Si layer222 is formed by switching the Ar/SiH4/PH3gas mixture to an Ar/SiH4gas mixture and introducing it from the lower gas nozzles or the lower gas shower plate. Further, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the p+-type a-Si layer223 is formed by replacing the Ar/SiH4gas mixture from the lower gas nozzles or the lower gas shower plate by an Ar/SiH4/B2H6gas mixture.
Subsequently, the n+-type μc-Si layer421 is formed by plasma CVD by supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles, producing a plasma, and introducing a mixed gas of Ar, SiH4, and PH3into the chamber from the lower gas nozzles or the lower gas shower plate. Then, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the i-type μc-Si layer42 is formed by switching the Ar/SiH4/PH3gas mixture to an Ar/SiH4gas mixture and introducing it from the lower gas nozzles or the lower gas shower plate. Further, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, the p+-type μc-Si layer423 is formed by replacing the Ar/SiH4gas mixture from the lower gas nozzles or the lower gas shower plate by an Ar/SiH4/B2H6gas mixture. Then, while continuously supplying the mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, theNi layer44 is formed by CVD by replacing the Ar/SiH4/B2H6gas mixture from the lower gas nozzles or the lower gas shower plate by a mixed gas containing Ar and Ni.
In this manner, since the formation and etching of the nine layers are carried out by switching the feed gases in sequence in the same MSEP type plasma processing apparatus, it is possible to form the excellent films with few defects and simultaneously to significantly reduce the manufacturing cost.
Theglass substrate14 formed with theNi layer44 and the two power generating laminates22 and42 is introduced from the fourth plasma processing apparatus into a photoresist coater (slit coater), where a photoresist is coated and then the photoresist is patterned using the photolithography technique.
After patterning the photoresist, theglass substrate14 formed with theNi layer44 and the two power generating laminates22 and42 is, along with the patterned photoresist, introduced into the fifth plasma processing apparatus having lower gas nozzles or a lower gas shower plate. In the fifth plasma processing apparatus, theNi layer44 and the two power generating laminates22 and42 are selectively etched using the photoresist as a mask so that the via holes244 reaching thefirst electrodes20 are formed. That is, the seven layers are continuously etched in the fifth plasma processing apparatus.
Specifically, the etching of theNi layer44 is carried out by, while supplying a mixed gas of Ar and H2into a chamber from upper gas nozzles and producing a plasma, ejecting a mixed gas of Ar and CH4into the plasma from the lower gas nozzles or the lower gas shower plate. Subsequently, while continuously supplying Ar into the chamber from the upper gas nozzles and producing a plasma, the etching of the two power generating laminates22 and42 comprising the nip-nip six layers is carried out by ejecting an Ar/HBr gas mixture from the lower gas nozzles or the lower gas shower plate.
Theglass substrate14 is provided, by the etching in the fifth plasma processing apparatus, with the via holes244 that pass through the layers from theNi layer44 to the n+-type ZnO layer (20) and that reach thefirst electrodes20. Then, the glass substrate is transferred from the fifth plasma processing apparatus into the above-mentioned third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate, where the photoresist is removed by ashing in a plasma produced in an atmosphere of a Kr/O2gas mixture introduced into a chamber from upper gas nozzles.
Theglass substrate14, after the removal of the photoresist, is transferred into the sixth plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where the Al layer having a thickness of 1 μm is formed as thesecond electrode26 on theNi layer44. The Al layer is also formed in the via holes244. The formation of the Al layer is carried out by, while supplying a mixed gas of Ar and H2into a chamber from upper gas nozzles and producing a plasma, ejecting an Ar/Al(CH3)3gas mixture into the plasma, produced in the Ar/H2atmosphere, from the lower gas nozzles or the lower gas shower plate.
Subsequently, a photoresist is coated on the Al layer, i.e. thesecond electrode26, and then is patterned. Theglass substrate14 with the patterned photoresist is introduced into the seventh plasma processing apparatus having lower gas nozzles or a lower gas shower plate.
In the seventh plasma processing apparatus, the Al layer is etched by, while supplying an Ar gas into a chamber from upper gas nozzles and producing a plasma, ejecting an Ar/Cl2gas mixture into the plasma, produced in the Ar atmosphere, from the lower gas nozzles or the lower gas shower plate. Subsequently, while supplying a mixed gas of Ar and H2into the chamber from the upper gas nozzles and producing a plasma, theNi layer44 is etched by introducing an Ar/CH4gas mixture from the lower gas nozzles or the lower gas shower plate into the plasma produced in the Ar/H2atmosphere. Then, while supplying an Ar gas into the chamber from the upper gas nozzles and producing a plasma, the p+-type μc-Si layer423, the i-type μc-Si layer422, the n-type pc-Si layer421, the p-type a-Si layer223, and part of the i-type a-Si layer222 are etched by switching the gases from the lower gas nozzles or the lower gas shower plate to an Ar/HBr gas mixture. As a result, the insulatingholes245 reaching midway of the i-type a-Si layer222 from a surface of theAl layer26 are formed. Also in this process, the seven layers are continuously etched by switching the gases in sequence in the same MSEP type plasma processing apparatus. Thus, the processing time and cost are significantly reduced.
Then, theglass substrate14 having thereon the elements is transferred into the above-mentioned third plasma processing apparatus having neither lower gas nozzles nor a lower gas shower plate, where the photoresist is removed by ashing in a plasma produced in an atmosphere of a Kr/O2gas mixture introduced into the chamber from the upper gas nozzles.
Theglass substrate14 having, as thesecond electrode26, the Al layer with the photoresist removed is introduced into the eighth plasma processing apparatus having lower gas nozzles or a lower gas shower plate, where a SiCN film is formed by CVD so that an insulatinglayer28 is formed on theAl layer26 and in theholes225. As a consequence, the required photoelectric conversion elements and solar cell are produced. The SiCN film is formed by supplying a Xe/NH3gas mixture into a chamber from upper gas nozzles, producing a plasma, and ejecting an Ar/SiH4/SiH(CH3)3gas mixture from the lower gas nozzles or the lower gas shower plate.
INDUSTRIAL APPLICABILITYAccording to this invention, using silicon and ZnO with large reserves, it is possible to produce a photoelectric conversion element and a solar cell with thin film thickness of amorphous silicon, which have high energy conversion efficiency. As a consequence, it is possible to manufacture a large-area high-power solar cell at a low cost.
In the above-mentioned embodiment, the description has been mainly given of only the photoelectric conversion element which uses one set of the nip structure. However, this invention is by no means limited thereto and is also applicable to a photoelectric conversion element and a solar cell comprising a plurality of sets of power generating laminates each having an nip structure. In this case, it may be configured that an n-type a-Si layer of the power generating laminate on the transparent first electrode side is in contact with an n+-type ZnO layer serving as a first electrode, while, a p-type a-Si layer of the power generating laminate on the second electrode side is in contact with a second electrode.
DESCRIPTION OF SYMBOLS- 10 photoelectric conversion element
- 12 guard glass
- 14 soda glass substrate
- 16 sodium barrier film
- 20 first electrode (n+-type ZnO layer)
- 22 power generating laminate
- 221 n+-type a-Si layer
- 222 i-type a-Si layer
- 223 p+-type a-Si layer
- 24 selenium layer
- 26 second electrode (Al layer)
- 28 insulating layer (SiCN layer)
- 201 insulating layer (SiCN layer)
- 224 SiO2layer
- 30 heat sink
- 40 photoelectric conversion element
- 42 second power generating laminate
- 421 n+-type μc-Si layer
- 422 i-type μc-Si layer
- 423 p+-type μc-Si layer
- 44 nickel (Ni) layer
- 244 via hole
- 245 insulating hole