US20110234286A1 - Three-Phase Generator for Motor Control - Google Patents
Three-Phase Generator for Motor ControlDownload PDFInfo
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- US20110234286A1 US20110234286A1US12/732,355US73235510AUS2011234286A1US 20110234286 A1US20110234286 A1US 20110234286A1US 73235510 AUS73235510 AUS 73235510AUS 2011234286 A1US2011234286 A1US 2011234286A1
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- 101100171060Caenorhabditis elegans div-1 geneProteins0.000claimsdescription15
- 101100115215Caenorhabditis elegans cul-2 geneProteins0.000claimsdescription14
- 230000003111delayed effectEffects0.000claims1
- 238000004804windingMethods0.000description9
- 239000003990capacitorSubstances0.000description2
- 238000010586diagramMethods0.000description2
- 238000004519manufacturing processMethods0.000description1
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Classifications
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
- H03K5/15013—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with more than two outputs
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/02—Input circuits
- H03K21/023—Input circuits comprising pulse shaping or differentiating circuits
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K21/00—Details of pulse counters or frequency dividers
- H03K21/08—Output circuits
- H03K21/10—Output circuits comprising logic circuits
- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M7/00—Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
- H02M7/42—Conversion of DC power input into AC power output without possibility of reversal
- H02M7/44—Conversion of DC power input into AC power output without possibility of reversal by static converters
- H02M7/48—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M7/53—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M7/537—Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
Definitions
- the present inventionrelates generally to the field of 3-phase motor controllers and more particularly to a pulse generator that can generate three phase signals suitable to control a 3-phase motor.
- 3-phase motorshave been used in numerous industrial applications for decades. These motors, while having three separate windings normally have the windings connected in standard delta or wye configurations. It is known in the art, but not common, to control each motor phase separately with power sinusoidal signal applied to each winding. For example, Eaves in U.S. Pat. No. 6,320,731 teaches a 3-phase motor system with separate windings driven by separate sinusoidal power supplies. In motor-vehicle applications, where a 3-phase electric motor is used in a vehicle to replace a gasoline or diesel engine, it is very desirable to drive and control each phase separately.
- the present inventionrelates to a pulse generator that can generate pulses separated by 120 degrees phase on each of three separate phase output leads. These output pulses can be of any desired frequency and voltage.
- the phase output pulsestake a logic level of 0-12 volts (12 volts peak) with an adjustable frequency of around 250 Hz and a duty cycle of around 50%. This combination of parameters is ideal for driving a 3-phase motor in a vehicle. Any combination of pulse width or duty cycle, output level and frequency is within the scope of the present invention.
- the 3-phase pulse generator of the present inventionis normally free-running, economical to manufacture, rugged, and applicable to a wide range of 3-phase motor applications.
- the generatorcan run at a fixed frequency (repetition rate), or it can be continuously adjustable over a wide frequency range.
- FIG. 1is a block diagram of a vehicle 3-phase motor application containing the generator of the present invention.
- FIG. 2is an embodiment of a 3-phase pulse generator.
- FIG. 3shows sample waveforms generated by the embodiment of FIG. 2 .
- the present inventionrelates to a pulse generator that can produce logic pulses on three outputs that are separated by 120 degrees in phase suitable to drive a power controller for a 3-phase motor.
- the frequency or repetition rateis selectable and optionally adjustable with a preferred rate around 250 Hz.
- the output logic levelcan be controlled by choosing different voltages to power the output driver transistors. Pulse width could be optionally altered by placing devices like one-shots before the drivers.
- FIG. 1a block diagram of a vehicle 3-phase motor application can be seen.
- a voltage multiplier 6converts 48 VDC to around 300 VDC which is applied to a power converter control module 2 .
- This power control moduleis connected to each of the three phases of the motor 1 with a capacitor in series with the motor winding and an optional surge suppressor across the winding.
- the 48 volt battery voltagecan also be down-converted 4 to 12 VDC to control logic or 12 VDC can be taken from one of the four battery parts.
- the pulse generator 3 of the present inventiontakes 12 VDC in and produces three phase control pulse signals out that drive the C.S windings of the power converter control module.
- FIG. 2shows an embodiment of a pulse generator of the present invention.
- a 555 oscillator chipis connected to free-run and produce an adjustable square-wave of around 250 Hz. This chip, and all of the other logic in this embodiment is run at 12 VDC. The 555 chip and the other CMOS logic of this embodiment will operate over a range of voltages from around 5 VDC up to around 15 VDC.
- the square-wave from the 555 oscillatorruns a CMOS CD4017 counter that acts as a simple divider. If the input on pin 14 is a square-wave of 250 Hz, the output on pin 3 is 125 Hz, on pin 2 is 62.5 Hz and on pin 4 is 31.25 Hz. These frequencies will be henceforth referred to as fundamental, 1st divide, 2nd divide and 3rd divide. The combination of the three divided frequencies is compared against the fundamental undivided frequency by three AND gates. These AND gates can be standard CMOS parts such as the CD4081. The output of the AND gates are each connected to the one input of three EXCLUSIVE OR gates (EOR). These EOR gates can be standard CMOS parts such as the CD4030.
- EOREXCLUSIVE OR gates
- phase logicPH1, PH2 and PH3 logic
- the other input of the EOR gates in each phase logicis connected to one of the divided frequencies.
- PH1the AND ties to the 1st divide, and the EOR ties to the 3rd divide.
- PH2the AND ties to the 2nd divide, and the EOR ties to the 1st divide.
- PH3the AND ties to the 3rd divide, and the EOR ties to the 2nd divide.
- This unique combination of logicproduces the pulse waveforms shown in FIG. 3 , namely (at a fundamental of 250 Hz), with a cycle time of 4 mS with 1.33 mS offset between phases.
- Each phase logic group's outputis connected to a 2N2222 NPN transistor driver running +12 VDC or equivalent driver. This produces a pulse height of slightly less than 12 volts suitable to drive a power controller.
- An embodiment of this driver circuitis shown in FIG. 2 . Any driver is within the scope of the present invention including no driver at all.
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- Physics & Mathematics (AREA)
- Nonlinear Science (AREA)
- Control Of Eletrric Generators (AREA)
Abstract
Description
- 1. Field of the Invention
- The present invention relates generally to the field of 3-phase motor controllers and more particularly to a pulse generator that can generate three phase signals suitable to control a 3-phase motor.
- 2. Description of the Prior Art
- 3-phase motors have been used in numerous industrial applications for decades. These motors, while having three separate windings normally have the windings connected in standard delta or wye configurations. It is known in the art, but not common, to control each motor phase separately with power sinusoidal signal applied to each winding. For example, Eaves in U.S. Pat. No. 6,320,731 teaches a 3-phase motor system with separate windings driven by separate sinusoidal power supplies. In motor-vehicle applications, where a 3-phase electric motor is used in a vehicle to replace a gasoline or diesel engine, it is very desirable to drive and control each phase separately.
- It would be advantageous to have a 3-phase generator that could generate pulses on three phase leads that are separated by 120 degrees of phase. This pulse generator could then drive a voltage converter to supply high voltage pulses to each phase winding of the motor and to a capacitor that is coupled across the phase winding.
- The present invention relates to a pulse generator that can generate pulses separated by 120 degrees phase on each of three separate phase output leads. These output pulses can be of any desired frequency and voltage. In a particular embodiment of the invention, the phase output pulses take a logic level of 0-12 volts (12 volts peak) with an adjustable frequency of around 250 Hz and a duty cycle of around 50%. This combination of parameters is ideal for driving a 3-phase motor in a vehicle. Any combination of pulse width or duty cycle, output level and frequency is within the scope of the present invention.
- The 3-phase pulse generator of the present invention is normally free-running, economical to manufacture, rugged, and applicable to a wide range of 3-phase motor applications. The generator can run at a fixed frequency (repetition rate), or it can be continuously adjustable over a wide frequency range.
- Attention is now directed to several illustrations that describe features of the present invention.
FIG. 1 is a block diagram of a vehicle 3-phase motor application containing the generator of the present invention.FIG. 2 is an embodiment of a 3-phase pulse generator.FIG. 3 shows sample waveforms generated by the embodiment ofFIG. 2 .- Several illustrations and drawings have been presented to aid in understanding the present invention. The scope of the present invention is not limited to what is shown in the figures.
- The present invention relates to a pulse generator that can produce logic pulses on three outputs that are separated by 120 degrees in phase suitable to drive a power controller for a 3-phase motor. The frequency or repetition rate is selectable and optionally adjustable with a preferred rate around 250 Hz. The output logic level can be controlled by choosing different voltages to power the output driver transistors. Pulse width could be optionally altered by placing devices like one-shots before the drivers.
- Turning to
FIG. 1 , a block diagram of a vehicle 3-phase motor application can be seen. A voltage multiplier6 converts 48 VDC to around 300 VDC which is applied to a powerconverter control module 2. This power control module is connected to each of the three phases of themotor 1 with a capacitor in series with the motor winding and an optional surge suppressor across the winding. The 48 volt battery voltage can also be down-converted 4 to 12 VDC to control logic or 12 VDC can be taken from one of the four battery parts. Thepulse generator 3 of the present invention takes 12 VDC in and produces three phase control pulse signals out that drive the C.S windings of the power converter control module. FIG. 2 shows an embodiment of a pulse generator of the present invention. A 555 oscillator chip is connected to free-run and produce an adjustable square-wave of around 250 Hz. This chip, and all of the other logic in this embodiment is run at 12 VDC. The 555 chip and the other CMOS logic of this embodiment will operate over a range of voltages from around 5 VDC up to around 15 VDC.- The square-wave from the 555 oscillator runs a CMOS CD4017 counter that acts as a simple divider. If the input on
pin 14 is a square-wave of 250 Hz, the output onpin 3 is 125 Hz, onpin 2 is 62.5 Hz and onpin 4 is 31.25 Hz. These frequencies will be henceforth referred to as fundamental, 1st divide, 2nd divide and 3rd divide. The combination of the three divided frequencies is compared against the fundamental undivided frequency by three AND gates. These AND gates can be standard CMOS parts such as the CD4081. The output of the AND gates are each connected to the one input of three EXCLUSIVE OR gates (EOR). These EOR gates can be standard CMOS parts such as the CD4030. These AND/EOR pairs will be referred to phase logic (PH1, PH2 and PH3 logic). The other input of the EOR gates in each phase logic is connected to one of the divided frequencies. In the case of PH1, the AND ties to the 1st divide, and the EOR ties to the 3rd divide. For PH2, the AND ties to the 2nd divide, and the EOR ties to the 1st divide. For PH3, the AND ties to the 3rd divide, and the EOR ties to the 2nd divide. This unique combination of logic produces the pulse waveforms shown inFIG. 3 , namely (at a fundamental of 250 Hz), with a cycle time of 4 mS with 1.33 mS offset between phases. - If the undivided square-wave signal is labeled (div0), the divided by 2 signal (div1), the divided by 4 signal (div2), and the divided by 8 signal (div3), the outputs A, B, and C of the three EOR gates obey the following equations: A=(div3) EOR (div1 AND div0), a second output B=(div1) EOR (div2 AND div0), and a third output C=(div2) EOR (div3 AND div0).
- Each phase logic group's output is connected to a 2N2222 NPN transistor driver running +12 VDC or equivalent driver. This produces a pulse height of slightly less than 12 volts suitable to drive a power controller. An embodiment of this driver circuit is shown in
FIG. 2 . Any driver is within the scope of the present invention including no driver at all. - Several descriptions and illustrations have been presented to aid in understanding the present invention. One skilled in the art will realize that numerous changes and variations can be made without departing from the spirit of the invention. Each of these changes and variations is within the scope of the present invention.
Claims (20)
1. A free-running 3-phase pulse driver comprising:
a free-running oscillator;
3-phase generating logic circuit having an input and three outputs, said input electrically coupled to said free-running oscillator, wherein said 3-phase generating logic circuit generates electrical signals on each of said outputs, said electrical signals separated from one another by 120 degrees of phase;
at least three separate phase drivers, each of said phase drivers electrically attached to an output of said 3-phase generating logic.
2. The free-running 3-phase pulse driver ofclaim 1 wherein said free-running oscillator is a square-wave oscillator.
3. The free-running 3-phase pulse driver ofclaim 1 wherein said 3-phase generating logic further comprises AND gates and EXCLUSIVE OR gates and at least one divider.
4. The free-running 3-phase pulse driver ofclaim 1 wherein said 3-phase generating logic further comprises three AND gates and three EXCLUSIVE OR gates and one four-bit divider.
5. The free-running 3-phase pulse driver ofclaim 2 wherein said 3-phase generating logic further comprises:
a divider taking an undivided square wave (div0) from said free-running square-wave oscillator and dividing it by 2 to produce a first divided square-wave (div1), and dividing it by 4 to produce a second divided square-wave (div2), and dividing it by 8 to produce a third divided square-wave (div3);
a logic gate circuit electrically coupled to said divider and said square wave oscillator producing a first output A=(div3) EOR (div1 AND div0), a second output B=(div1) EOR (div2 AND div0), and a third output C=(div2) EOR (div3 AND div0).
6. The free-running 3-phase pulse driver ofclaim 1 wherein said phase drivers have a pulse output of between 0 and 12 volts.
7. The free-running 3-phase pulse driver ofclaim 1 wherein said free-running oscillator runs at around 250 Hz.
8. The free-running 3-phase pulse driver ofclaim 1 wherein said free-running oscillator is frequency adjustable.
9. A 3-phase pulse producing circuit producing pulses delayed by around 120 electrical degrees on each of three outputs, said circuit comprising:
a free-running square wave oscillator producing a square-wave (div0);
a divider electrically coupled to said free-running square wave oscillator producing a first divided signal (div1), a second divided signal (div2), a third divided signal (div3);
a logic circuit coupled to said free-running oscillator and said divider producing three outputs A, B and C obeying the equations: A=(div3) EOR (div1 AND div0), a second output B=(div1) EOR (div2 AND div0), and a third output C=(div2) EOR (div3 AND div0).
10. The 3-phase pulse producing circuit ofclaim 9 wherein said free-running square-wave oscillator runs at a frequency of around 250 Hz.
11. The 3-phase pulse producing circuit ofclaim 9 wherein said free-running oscillator is frequency adjustable.
12. The 3-phase pulse producing circuit ofclaim 9 further comprising power drivers electrically coupled to said three outputs A, B and C.
13. The 3-phase pulse producing circuit ofclaim 9 wherein said equations are realized by three AND gates and three EOR gates.
14. The 3-phase pulse producing circuit ofclaim 12 wherein said power drivers are bipolar transistors.
15. A 3-phase pulse producing logic circuit having four inputs (div0), (div1), (div2) and (div3) and three outputs A, B and C wherein (div0) is a square-wave of a particular frequency, (div1) is a square-wave of half frequency of (div0), (div2) is a square-wave of half frequency of (div1), and (div3) is a square-wave of half frequency of (div2) comprising:
a plurality of logic gates producing said outputs A, B and C according to: A=(div3) EOR (div1 AND div0), B=(div1) EOR (div2 AND div0), C=(div2) EOR (div3 AND div0).
16. The 3-phase pulse producing logic circuit ofclaim 15 further comprising a free-running oscillator producing said input (div0).
17. The 3-phase pulse producing logic circuit ofclaim 15 further comprising a free-running oscillator producing said input (div0) and a divider producing said inputs (div1), (div2) and (div3) by successive division.
18. The 3-phase pulse producing logic circuit ofclaim 15 further comprising power drivers electrically coupled to said outputs A, B and C.
19. The 3-phase pulse producing logic circuit ofclaim 18 wherein said power drivers are bipolar transistors.
20. The 3-phase pulse producing logic circuit ofclaim 19 wherein said bipolar transistors operate between 0 and 12 volts.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/732,355US8179168B2 (en) | 2010-03-26 | 2010-03-26 | Three-phase generator for motor control |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US12/732,355US8179168B2 (en) | 2010-03-26 | 2010-03-26 | Three-phase generator for motor control |
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| Publication Number | Publication Date |
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| US20110234286A1true US20110234286A1 (en) | 2011-09-29 |
| US8179168B2 US8179168B2 (en) | 2012-05-15 |
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| Application Number | Title | Priority Date | Filing Date |
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| US12/732,355Expired - Fee RelatedUS8179168B2 (en) | 2010-03-26 | 2010-03-26 | Three-phase generator for motor control |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130066482A1 (en)* | 2011-09-13 | 2013-03-14 | Samsung Electronics Co., Ltd. | Apparatus and method for executing energy demand response process in an electrical power network |
Families Citing this family (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120268044A1 (en)* | 2011-04-21 | 2012-10-25 | Shvartsman Vladimir A | High Efficiency All-Electric Vehicle Propulsion System |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5734250A (en)* | 1994-03-01 | 1998-03-31 | Aktiebolaget Electrolux | Method and arrangement for controlling an induction motor |
| US6320731B1 (en)* | 2000-05-24 | 2001-11-20 | Electric Boat Corporation | Fault tolerant motor drive arrangement with independent phase connections and monitoring system |
| US6999347B2 (en)* | 2003-09-11 | 2006-02-14 | Renesas Technology Corp. | Non-volatile semiconductor memory device with expected value comparison capability |
- 2010
- 2010-03-26USUS12/732,355patent/US8179168B2/ennot_activeExpired - Fee Related
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5734250A (en)* | 1994-03-01 | 1998-03-31 | Aktiebolaget Electrolux | Method and arrangement for controlling an induction motor |
| US6320731B1 (en)* | 2000-05-24 | 2001-11-20 | Electric Boat Corporation | Fault tolerant motor drive arrangement with independent phase connections and monitoring system |
| US6999347B2 (en)* | 2003-09-11 | 2006-02-14 | Renesas Technology Corp. | Non-volatile semiconductor memory device with expected value comparison capability |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20130066482A1 (en)* | 2011-09-13 | 2013-03-14 | Samsung Electronics Co., Ltd. | Apparatus and method for executing energy demand response process in an electrical power network |
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| Publication number | Publication date |
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| US8179168B2 (en) | 2012-05-15 |
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| FP | Lapsed due to failure to pay maintenance fee | Effective date:20160515 |