CROSS REFERENCE TO RELATED APPLICATIONSThis patent application claims to the benefit of U.S. Provisional Patent Application No. 61/308,697, entitled “High Power Cascaded Filter Based Noise Canceller” and filed Feb. 26, 2010. This application also claims to the benefit of U.S. Provisional Patent Application No. 61/375,491, entitled “Methods and Systems for Noise and Interference Cancellation” and filed Aug. 20, 2010. This application is related to U.S. patent application Ser. No. ______, [Attorney Docket No. 07982.105115], entitled “Methods and Systems for Noise and Interference Cancellation,” filed on the same date as this application. The entire contents of each of the foregoing priority and related applications are hereby fully incorporated herein by reference.
BRIEF DESCRIPTION OF THE DRAWINGSFIG. 1 is a functional block diagram of a communication system, in accordance with certain exemplary embodiments.
FIG. 2 is a block schematic diagram of a high input power cascaded filter (HIPCF) canceller, in accordance with certain exemplary embodiments.
FIG. 3 is a block schematic diagram of certain components of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 4 depicts a spectral diagram of signals received at a victim receiver antenna, in accordance with certain exemplary embodiments.
FIG. 5 depicts a spectral diagram of signals received at the input of a victim receiver after cancellation of in-band unwanted spectral components by an HIPCF canceller, in accordance with certain exemplary embodiments.
FIG. 6 is a block schematic diagram of a Q-enhanced band-pass filter (Q-Enhanced-BPF), in accordance with certain exemplary embodiments
FIG. 7 is a block schematic diagram illustrating additional components of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 8 depicts a functional block diagram of a communication system, in accordance with certain exemplary embodiments.
FIG. 9 depicts a lookup table, in accordance with certain exemplary embodiments.
FIG. 10 is a flow chart depicting a method for calibrating certain components of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 11 is a flow chart depicting a method for configuring the filters of the HIPCF canceller ofFIG. 2 for a desired center frequency, in accordance with certain exemplary embodiments.
FIG. 12 is a flow chart depicting a method for calibrating an input band-pass filter (Input-BPF) of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 13 is a flow chart depicting a method for calibrating a low noise amplifier band-pass filter (LNA-BPF) of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIGS. 14A and 14B, collectivelyFIG. 14, depict a flow chart of a method for calibrating a Q-Enhanced-BPF of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 15 is a flow chart depicting a method for calibrating the Input-BPF of the HIPCF canceller ofFIG. 2, in accordance with certain exemplary embodiments.
FIG. 16 is a flow chart depicting a method for determining switch settings for a given frequency, in accordance with certain exemplary embodiments.
FIG. 17 depicts implementation layers of noise and/or interference cancellation algorithms, in accordance with certain exemplary embodiments.
FIG. 18 is a diagram depicting receiver sensitivity plotted versus coupled power amplifier phase noise, in accordance with certain exemplary embodiments.
FIG. 19 is a diagram depicting an output signal to noise ratio (SNR) of a mobile TV tuner plotted versus a received mobile TV tuner signal strength, in accordance with certain exemplary embodiments.
FIG. 20 is a flow chart depicting a fast binary algorithm for canceling noise or interference, in accordance with certain exemplary embodiments.
FIG. 21 depicts a graph of in-phase (I) and quadrature (Q) values adjusted using binary algorithms, in accordance with certain exemplary embodiments.
FIG. 22 is a flow chart depicting a minstep algorithm for canceling noise and/or interference, in accordance with certain exemplary embodiments.
FIG. 23 depicts an I-Q plane with pseudorandom feedback values, in accordance with certain exemplary embodiments.
FIG. 24 is a graph depicting a receive quality indicator plotted versus I or Q values resulting from an implementation of a dual slope algorithm (DSA), in accordance with certain exemplary embodiments.
FIG. 25 is a flow chart depicting a DSA for canceling noise and/or interference, in accordance with certain exemplary embodiments.
FIG. 26 is a graph depicting a receive quality indicator plotted versus I or Q values resulting from an implementation of the dual slope algorithm ofFIG. 24, in accordance with certain exemplary embodiments.
FIG. 27 is a flow chart depicting a track and search algorithm (TSA) for canceling noise and/or interference, in accordance with certain exemplary embodiments.
FIG. 28 is a graph depicting cancellation points along an I-Q plane evaluated in an implementation of the TSA ofFIG. 27, in accordance with certain exemplary embodiments.
FIG. 29 is a flow chart depicting a method for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, in accordance with certain exemplary embodiments.
FIG. 30 is a flow chart depicting a method for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, in accordance with certain exemplary embodiments.
FIG. 31 is a flow chart depicting a method for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, in accordance with certain exemplary embodiments.
Many aspects of the invention can be better understood with reference to the above drawings. The drawings illustrate only exemplary embodiments of the invention and are therefore not to be considered limiting of its scope, as the invention may admit to other equally effective embodiments. The elements and features shown in the drawings are not necessarily to scale, emphasis instead being placed upon clearly illustrating the principles of exemplary embodiments of the present invention. Additionally, certain dimensions may be exaggerated to help visually convey such principles. In the drawings, reference numerals designate like or corresponding, but not necessarily identical, elements.
DETAILED DESCRIPTION OF EXEMPLARY EMBODIMENTSThe present invention is directed to systems and methods for compensating for signal interference occurring between two or more communication channels or between two or more communication elements in a communication system. Compensating for interference can improve signal quality, enhance communication bandwidth or information carrying capability, or improve receiver sensitivity. A communication channel may comprise a transmission line, a printed circuit board (PCB) trace, a flex circuit trace, an electrical conductor, a waveguide, a bus, a communication antenna, a medium that provides a signal path, or an active or passive circuit or circuit element such as a filter, oscillator, diode, VCO, PLL, amplifier, digital or mixed signal integrated circuit. Thus, a channel can comprise a global system for mobile communications (GSM) device, a processor, a detector, a source, a diode, an inductor, an integrated circuit, a connector, a circuit trace, or a digital signal processing (DSP) chip, to name only a few possibilities.
Exemplary embodiments described herein can include a high input power cascaded filter (HIPCF) noise and interference canceling device. Exemplary HIPCF cancellers described herein can support selectively canceling, correcting, addressing, or compensating for interference, electromagnetic interference (EMI), noise (e.g., phase noise, intermodulation products, and other interfering noise), spurs, or other unwanted spectral components associated with one or more communication paths of a communication system, such as a high speed digital communication system in a portable electronic device. For the purpose of this specification, the term “high power” generally refers to signals having a power ratio up to approximately +33 dBm (decibels relative to one milliwatt) or more. For example, exemplary HIPCF cancellers described herein can be coupled to the output of cellular telephone power amplifiers having output power of this magnitude.
The HIPCF cancellers can obtain a sample of a communication signal that imposes interference from a communication path of an aggressor transmitting device and process the sampled signal to produce an interference compensation signal. The HIPCF can deliver the interference compensation signal into or onto a communication path of a victim receiver that is a recipient of the interference, to cancel, mitigate, suppress, or otherwise compensate for the received interference.
Turning now to the drawings, in which like numerals indicate like or corresponding (but not necessarily identical) elements throughout the figures, exemplary embodiments of the invention are described in detail.FIG. 1 is a functional block diagram of acommunication system100, in accordance with certain exemplary embodiments. Referring toFIG. 1, thecommunication system100 includes atransmitter105 that transmits electromagnetic signals via a transmittingantenna115. Atransmit path107, including one or more electrical conductors, couples thetransmitter105 to the transmittingantenna115. In certain exemplary embodiments, thetransmitter105 conveys data to a remote device using one or more communications standards or methods, such as the Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Long Term Evolution (LTE), Wideband Code Division Multiple Access (W-CDMA), Digital Cellular System (DCS), Personal Communication Service (PCS), and Wireless Local Area Network (WLAN). One of ordinary skill in the art having the benefit of the present disclosure would appreciate that thecommunication system100 described herein is not limited to the aforementioned communication standards and methods, but instead can be used with many other types of signal transmitting technologies.
Disposed along thetransmit path107 between thetransmitter105 and the transmittingantenna115 is apower amplifier110. Thepower amplifier110 adjusts the power level of the transmitter's output signals prior to the signals being propagated by theantenna115. When apower amplifier110 adjusts the power level of a signal, unwanted spectral components can be introduced onto the signal. For example, thetransmitter105 can transmit signals having a certain carrier frequency or a certain fundamental tone. Thepower amplifier110 can introduce intermodulation products having a different frequency than that carrier frequency or fundamental tone. Other components associated with thetransmitter105 also can cause noise or other unwanted spectral components to be introduced onto the signal. For example, thetransmitter105 may include a local oscillator and/or one or more up-conversion mixer(s) that can cause unwanted spectral components, including out-of-band noise (outside the frequency band of the transmitted signal) sometimes referred to as out-of-band blockers, to be introduced onto the signal.
Thecommunication system100 also includes areceiver135 that receives signals via a receivingantenna120 and a receivepath133 that electrically couples the receivingantenna120 to thereceiver135. In certain exemplary embodiments, thereceiver135 receives signals within the same or a different frequency band than that of thetransmitter105. For example, a mobile electronic device, such as a mobile telephone, personal digital assistant (PDA) or mobile computer, may include atransmitter105 that communicates via one of the communication protocols discussed above and areceiver135 that communicates in a different frequency band, such as a mobile TV tuner, a Bluetooth receiver, a Worldwide Interoperability for Microwave Access (WiMAX) receiver, or a Global Positioning System (GPS) receiver. In the illustrated embodiment, the receivepath133 includes an optional receive (RX)filter140. The optional receivefilter140 can include a band-pass filter or other filter arrangement that allows communication signals received by theantenna120 within the frequency band of thereceiver135 to pass to thereceiver135, while blocking signals outside the frequency band of thereceiver135.
The frequency band of thereceiver135 may be near the frequency band of thetransmitter105 such that phase noise or other unwanted spectral components produced by thepower amplifier110 or another component disposed along the transmitpath107 degrades the sensitivity of thereceiver135. For example, thecommunication system100 may be embodied in a mobile device having a CDMA, GSM orLTE transmitter105 and a mobile TV tuner asreceiver135. Certain types of CDMA andGSM transmitters105 transmit signals within a frequency band of approximately 800 MHz to 900 MHz and certain types ofLTE transmitters105 operate within a frequency band of 698 MHz to 798 MHz. These transmitted signals often include phase noise having a frequency between 450 MHz and 776 MHz, which falls within the receive band of some mobile TV tuners and many other communication devices. If this in-band phase noise is imposed onto the signal path of the receiver135 (e.g., air coupled from the transmittingantenna115 to the receiving antenna120), the phase noise can degrade the sensitivity of thereceiver135. Generally, receive filters, such as receivefilter140, do not filter out in-band noise as the noise is within the frequency band of thereceiver135 and thus, the pass-band of receivefilter140. Therefore, the phase noise may pass through the receivefilter140 and degrade the sensitivity of thereceiver135.
To prevent a degradation of the sensitivity of thereceiver135 caused by in-band noise (noise having a frequency within the frequency band of the receiver135) or nearby out-of-band noise caused by the transmissions from the transmittingantenna115, thecommunication system100 includes aHIPCF canceller130. An input of theHIPCF canceller130 is coupled to the transmitpath107 at the output of thepower amplifier110 by way of asampling device125. Thesampling device125 can include a capacitor, (e.g., a sampling or tapping capacitor), a resistor, a coupler, a coil, a transformer, a signal trace, or an antenna/detector. Sampling devices having two ports or two terminals, such as a resistor, capacitor, coil, transformer, or signal trace, can have a first port electrically coupled to the transmitpath107 and a second port electrically coupled to the input of theHIPCF canceller130. In an antenna/detector, having mostly one terminal, the second terminal is formed by the electromagnetic field protruding from the device, allowing for locating the device close to the transmitpath107.
In the illustrated embodiment, thesampling device125 is connected to the transmitpath107 at the output of thepower amplifier110. Thesampling device125 obtains samples of the signal (“sampled transmit signals”) at the output of thepower amplifier110 and provides the sampled transmit signals to theHIPCF canceller130. In certain exemplary embodiments, thesampling device125 may produce attenuation on the sampled transmit signals. For example, the amplitude of the sampled transmit signal may be 20 dBc (decibels relative to carrier) lower than the signal at the output of thepower amplifier110.
In certain exemplary embodiments, thesampling device125 includes a voltage-controlled capacitor (varactor) for trimming frequency dependent attenuation to a desired value and hence, compensate for gain ripple. In one example, thesampling device125 includes a voltage controlled varactor. The capacitance of the varactor can be adjusted via a control voltage. This control voltage can be generated by a controller235 (FIG. 2) of theHIPCF Canceller130 and transmitted to thesampling device125 via one or moreelectrical conductors127.
TheHIPCF canceller130 selectively suppresses or cancels interfering signals (e.g., phase noise, intermodulation products, unwanted spectral components, etc.) produced by the power amplifier110 (or another component along the transmit path107) having a frequency within or near the receive frequency band of thereceiver135 that would otherwise interfere with the sensitivity of thereceiver135. TheHIPCF canceller130 obtains samples of the signals output by thepower amplifier110 and processes the sampled transmit signals to produce an interference compensation signal that, when applied to an input of thereceiver135, suppresses or cancels the interfering signals. In certain exemplary embodiments, theHIPCF canceller130 tunes the interference compensation signal using feedback, such as a receive signal quality indicator, obtained from thereceiver135 via afeedback path180 including one or more electrical conductors. Theexemplary HIPCF canceller130 is described in further detail below in connection withFIGS. 2-31.
The interference compensation signal is applied to the receivepath133 of thereceiver135 at acancellation point134. In certain exemplary embodiments, thecancellation point134 is implemented by converging an electrical conductor of the receivepath133 with an electrical conductor along the output path of theHIPCF canceller130 such that the electrical conductors make electrical contact. For example, a flex circuit trace of the receivepath134 may be connected to a flex circuit trace of the HIPCF output. In certain exemplary embodiments, a component, such as a coupler, a summation node, an adder, or another suitable technology may be used to apply the interference compensation signal to thereceiver path133 of thereceiver135.
Thecommunication system100 illustrated inFIG. 1 can transmit electromagnetic signals having a frequency within a first frequency range and receive electromagnetic signals having a frequency within a second frequency range. The first frequency range may be close to the second frequency range or even include frequencies that overlap or are included in the second frequency range. In operation, thetransmitter105 transmits signals along the transmitpath107 to thepower amplifier110. Thepower amplifier110 adjusts the intensity of the signals received from thetransmitter105 and outputs the intensity adjusted signal to the transmittingantenna115. The transmittingantenna115 transmits the signals received from thepower amplifier110. A portion of the signals transmitted by the transmittingantenna115 is coupled to the receivingantenna120 via air. If received by thereceiver135, signals coupled onto the receivingantenna120 originating from the transmittingantenna105 may interfere with or degrade the sensitivity of thereceiver135. For example, signals transmitted by the transmittingantenna115 having a frequency within the frequency band or close to the frequency band of the receiver135 (e.g., intermodulation spectra appearing like phase noise tails generated by the power amplifier110) can degrade the sensitivity of thereceiver135. To compensate for this interference or sensitivity degradation, theHIPCF canceller130 obtains samples of the signals output by the power amplifier110 (via the sampling device125) and processes the sampled transmit signals to produce an interference compensation signal that, when applied to an input of thereceiver135, compensates for the interference imposed on thereceiver135 by the signals transmitted by transmittingantenna115.
FIG. 2 is a block schematic diagram of theHIPCF canceller130 ofFIG. 1, in accordance with certain exemplary embodiments. Theexemplary HIPCF canceller130 includes a band-pass filter (Input-BPF)205 that receives signal samples from thesampling device125. In this exemplary embodiment, the Input-BPF205 includes an inductor L1 and two switchable capacitors C1 and C2. The resonant frequency of the Input-BPF205 is tunable by adjusting capacitance of one or both of the switchable capacitors C1 and C2. The switchable capacitors C1 and C2 are described in further detail below in connection withFIG. 3.
In certain exemplary embodiments, the inductor L1 is a high-Q inductor. The use of a high-Q inductor can provide performance advantages, such as providing additional attenuation to signals outside of the pass band of the Input-BPF205 and hence to protect subsequent components in theHIPCF canceller130, allowing to trade linearity for a lower noise floor. In certain exemplary embodiments, the inductor L1 is a low-Q inductor. In certain exemplary embodiments, the Input-BPF205 includes a Q-enhancement circuit290 to improve the quality factor (Q-factor) of the inductor L1. However, some Q-enhancement circuits may introduce noise or interference onto signals passed through the Input-BPF205.
The resonant frequency of the Input-BPF205 can be tuned to (or near) the receive frequency of thereceiver135 in order to pass interfering signals at that frequency that may be present on the sampled transmit signals and block or filter out aggressor signals, such as fundamental tones or carrier signals transmitted by thetransmitter105 as well as other out-of-band blocker signals (signals having a frequency outside of the receiver's frequency band). If thereceiver135 includes a mobile TV tuner or other frequency adjustable device, the resonant frequency of the Input-BPF205 may be adjusted to match the frequency of a current channel to which the mobile TV tuner is set. For example,channel50 of a mobile TV tuner may have a receive frequency within the frequency band of 686 MHz to 692 MHz. While the mobile TV is tuned to this frequency, the Input-BPF205 also can be tuned to this frequency automatically. If the mobile TV is subsequently tuned to another channel having a different receive frequency, the resonant frequency of the Input-BPF205 can be adjusted to match the receive frequency of the new channel. For example, thecontroller235 may communicate with thereceiver135 to obtain the current receive frequency for thereceiver135. In response, thecontroller235 may adjust the switchable capacitors C1 and C2 such that the resonant frequency of the Input-BPF205 is close to or equal to the receive frequency.
The Input-BPF205 reduces the amplitude of signals having frequencies differing from the resonant frequency of the Input-BPF205. For example, if thereceiver135 and thetransmitter105 are operating at different frequencies, the Input-BPF205 can reduce the amplitude of the fundamental tones of the sampled transmit signal. In certain exemplary embodiments, the Input-BPF205 may reduce the amplitude of the fundamental tones of the sampled transmit signal located at 824 MHz by approximately 13-18 dBc while its center frequency is tuned to 749 MHz (corresponding to channel60 of a mobile TV tuner). The output of the Input-BPF205 is electrically coupled to a low noise amplifier (LNA)210. TheLNA210 amplifies the signal output by the Input-BPF205 and passes this amplified signal to a second band-pass filter, referred to herein as LNA-BPF215. In certain exemplary embodiments, theLNA210 is a cascode LNA.
In this exemplary embodiment, the LNA-BPF215 includes an inductor L2 and a switchable capacitor C3. In certain exemplary embodiments, the inductor L2 is a high-Q inductor. In certain exemplary embodiments, the inductor L2 is a low-Q inductor. In certain exemplary embodiments, the LNA-BPF215 includes a Q-enhancement circuit291 to improve the Q-factor of the inductor L2. In certain exemplary embodiments, the Q-factor of L2 is less than the Q-factor of L1. In certain exemplary embodiments, the Q-factor of L2 is greater than the Q-factor of L2.
Similar to the Input-BPF205, the resonant frequency of the LNA-BPF215 can be set to the receive frequency of thereceiver135 to pass signals at that frequency and to further filter the fundamental tones and out-of-band blockers from the sampled transmit signal. In certain exemplary embodiments, the LNA-BPF215 may further reduce the amplitude of the fundamental tones located at 824 MHz by approximately 13-18 dBc while its center frequency is tuned to 749 MHz.
The output of the LNA-BPF215 is electrically coupled to a variable gain amplifier (VGA)220 that adjusts the amplitude of signals output by the LNA-BPF215. In certain exemplary embodiments, theVGA220 includes multiple variable gain amplifiers for adjusting the amplitude of the signal received from the LNA-BPF215. The amplitude adjusted signal output by theVGA220 is then passed to a third band-pass filter (Q-Enhanced-BPF)225.
The Q-Enhanced-BPF225 can include an inductor L3 and a switchable capacitor615 (FIG. 6) for tuning the Q-Enhanced-BPF225 to the receive frequency of thereceiver135 to pass any signals at that frequency and to further filter the fundamental tones and out-of-band blockers of the sampled transmit signal. In certain exemplary embodiments, the inductor L3 can be a high-Q inductor (e.g., off-chip), or a low-Q on-chip spiral inductor. In certain exemplary embodiments, the Q-Enhanced-BPF225 also includes a Q-enhancement circuit292. In certain exemplary embodiments, the Q-Enhanced-BPF225 includes current switching (FIG. 6) to adjust its Q-factor. In certain exemplary embodiments, the Q-Enhanced-BPF225 can further reduce the amplitude of the fundamental tones remaining in the signal received from theVGA220 located at 824 MHz by up to 26 dBc or more while its center frequency is tuned to 749 MHz. The output of the Q-Enhanced BPF225 is electrically coupled to an I/Q modulator230.
Although in the illustrated embodiment, a cascade of band-pass filters205,215, and225 are used to filter noise or other signals having frequencies outside the frequency band of thereceiver135, other types of filters may be utilized in addition to or in place of one or more of the band-pass filters205,215, and225. For example, one or more high-pass and/or low-pass filters can be used in certain exemplary embodiments. The cascade of band-pass filters205,215,225 block or reduce the amplitude of signals outside of the receive frequency band of thereceiver135 which would normally not interfere with the receiver's sensitivity. The signals within the receive frequency band of thereceiver135 are passed through the band-pass filters205,215, and225 to the I/Q modulator230. These in-band signals are also amplified by theLNA210 and theVGA220.
The I/Q modulator230 adjusts at least one of the phase, amplitude, and delay of the signal received from the Q-Enhanced-BPF225 to produce an interference compensation signal that, when applied to the receivepath133 of thereceiver135, reduces, suppresses, cancels, or otherwise compensates for the noise and/or interference present on the receivedpath133 of thereceiver135 imposed by signals transmitted by the transmittingantenna115. In certain exemplary embodiments, this interference compensation signal has a 180 degree phase shift relative to that of the in-band noisy signal and an amplitude close to or the same as that of the in-band noisy signal. Thus, the interference compensation signal reduces or cancels the in-band noisy signal.
In certain exemplary embodiments, the aforementioned parameters of amplitude, phase, and delay are tuned based on a set of instructions (e.g., algorithms) stored in a memory device760 (FIG. 7) and executed by thecontroller235 using feedback from the victim receiver's receive signal quality indicator, such as Bit-Error-Rate (BER), Packet-Error-Rate (PER), Receive Signal Strength Indicator (RSSI), noise floor, Signal-Noise-Ratio (SNR), Error Vector Magnitude (EVM), and Position Accuracy (for GPS) etc. Exemplary algorithms for determining settings for adjusting the amplitude, phase, and delay are described below with reference toFIGS. 17-31.
As shown inFIG. 7, in certain exemplary embodiments, theHIPCF canceller130 includes apower detector745, such as a peak detector, coupled to the input of the I/Q modulator230. Thepower detector745 senses or measures the power level of the signal at the input of the I/Q modulator230 and provides an indication of the power level to thecontroller235. Thecontroller235 uses this power level value to trim the currents and hence Qmaxof the Q-Enhanced-BPF225 for maintaining an acceptable suppression of the noise and/or interference imposed on thereceiver135 by signals transmitted by the transmittingantenna115. In certain exemplary embodiments, theHIPCF canceller130 includes an analog-to-digital (A/D)converter750 that receives the power level value from thepower detector745 and provides a digital representation of the power level value to thecontroller235. Thecontroller235 executes a calibration routine to ensure an acceptable level of suppression of the noise and/or interference imposed on thereceiver135 by signals transmitted by the transmittingantenna115. Exemplary calibration routines are described below with reference toFIGS. 9-16.
Thecontroller235 can be implemented in the form of a microcontroller, microprocessor, computer, state machine, programmable device, control logic, analog and digital circuitry, or other appropriate technology. Thecontroller235 can execute one or more processes or programs for adjusting the settings of each of the band-pass filters205,215, and225 and for operating the switchable capacitors C1-C3 and SCA615 (FIG. 6). In one example, thecontroller235 automatically adjusts the resonant frequencies of one or more of the band-pass filters205,215,225 in response to a change in frequency of thereceiver135. For example, if thereceiver135 comprises a mobile TV tuner, thecontroller235 adjusts the resonant frequency of the band-pass filters205,215,225 to match or correspond to the receiver frequency. Thecontroller235 adjusts the resonant frequencies of the band-pass filters205,215,225 by adjusting the capacitance of the switchable capacitors C1-C3 andSCA615, respectively, as discussed below with reference toFIG. 3.
Thecontroller235 also can adjust or refine the settings of the I/Q modulator230, the band-pass filters205,215, and225, and theVGA220 to account for environmental changes, such as changes to temperature, supply voltage, and antenna coupling. In certain exemplary embodiments, thecontroller235 executes a calibration routine (FIG. 16) to identify acceptable settings based on these environmental changes and stores the identified optimal settings for subsequent use. The algorithm(s) can be embodied as software stored on thecontroller235 or on amemory storage device760. Alternatively, the algorithm(s) can be implemented in one or more hardware devices, such as discrete logic gates.
TheHIPCF canceller130 also includesauxiliary circuits240. As shown inFIG. 7, theauxiliary circuits240 include atemperature sensor755, apower detector745, one or more analog todigital converters750, digital to analog converters, and other types of circuits for use by theHIPCF canceller130. Theauxiliary circuits240 can also include one or morememory storage devices760, such as RAM, ROM, and/or flash memory. Settings for each band-pass filter205,215, and225 may be stored on thememory storage device760. Additionally, settings for the I/Q modulator230 may be stored on thememory storage device760. For example, settings for each channel of a mobile TV tuner may be stored on thememory storage device760.
Certain elements or functions of theHIPCF canceller130 can be embodied in an integrated circuit, for example as depicted by thechip boundary250 thatFIG. 2 illustrates. For example, the switchable capacitors C1-C3, theLNA210, theVGA220, the Q-Enhanced-BPF225, the I/Q modulator230, thecontroller235 and one or more of theauxiliary circuits240 can be embodied in a single integrated circuit or multiple integrated circuits. Although the inductors L1 and L2 are illustrated as off-chip inductors in the illustrated exemplary embodiment, other exemplary embodiments may employ on-chip inductors in the band-pass filters205 and215. The integrated circuit(s) and/or the inductors L1 and L2 can be installed on a mobile device, such as a mobile phone, as well as other communication devices. The single or multiple integrated circuits can be embodied in or on a complementary-metal-oxide semiconductor (CMOS).
Referring toFIGS. 1 and 2, theHIPCF canceller130 suppresses, cancels, or otherwise compensates for in-band or nearby out-of-band (relative to the receive frequency of the receiver135) interfering signals imposed on thereceiver135 by signals transmitted by thetransmitter105 via the transmittingantenna115. That is, theHIPCF canceller130 compensates for interfering signals transmitted by the transmittingantenna115 that has a frequency within or near the frequency band of thereceiver135. TheHIPCF canceller130 obtains samples of signals transmitted by thetransmitter105 from thesampling device125 and process the samples to produce an interference compensation signal that, when applied to an input of thereceiver135, compensates for the imposed interfering signals.
Theexemplary HIPCF130 includes three band-pass filters205,215, and225 that each filter, block, or reduce the intensity of signal components of the sampled transmit signals received from thesampling device125 that are out-of-band with respect to the receive frequency of thereceiver135. The components of the sampled transmit signals in-band with respect to thereceiver135 are used to generate the interference compensation signal. At least one of phase, amplitude, and delay of these components of the sampled transmit signal are adjusted by the I/Q modulator230 to generate the interference compensation signal. Thecontroller235 can execute one or more calibration algorithms and/or one or more tuning algorithms to improve the level of interference compensation. Thecontroller235 can obtain feedback from thepower detector745 or from thereceiver135 and use this feedback during execution of the algorithms. These algorithms are discussed in detail below with reference toFIGS. 9-31.
FIG. 3 is a block schematic diagram300 of certain components of theHIPCF canceller130 ofFIG. 2, in accordance with certain exemplary embodiments. In particular,FIG. 3 is a transistor level diagram of an exemplary Input-BPF205, an exemplary LNA-BPF215, and anexemplary LNA210. Referring toFIG. 3, the Input-BPF205 includes a first switched capacitor array (SCA)305 and asecond SCA310. Each of theSCAs305,310 includes an array having a number ‘n+1’ of capacitors which typically include 1 or 2 standard capacitor sizes (unity cap). Each capacitor in theSCAs305,310 has a corresponding transistor switch (e.g., a MOS transistor) for activating the capacitor. The resonant frequency of the Input-BPF205 can be adjusted by selecting one or more of the capacitors from theSCAs305 and310. The capacitor(s) can be selected by activating the switch associated with each selected capacitor(s). For example, the capacitor C10 can be selected by activating (or turning on) switch M10. Each capacitor in theSCAs305,310 can have a different value of capacitance corresponding to a different resonant frequency for the Input-BPF205, or have a different weighted value to cover the frequency band of thereceiver135. In certain exemplary embodiments, thecontroller235 can activate and deactivate the switches in theSCAs305 and310 to select the resonant frequency for the Input-BPF205.
TheSCAs305 and310 also can provide a voltage divider function. This is particularly useful for mobile telephone embodiments having a wide-band mobile TV tuner as areceiver135. In certain exemplary embodiments, theSCAs305 and310 have a capacitor ratio (e.g., 1:5) that produces an additional 15 dBc reduction of the amplitude of the sampled transmit signal, thus either reducing the linearity requirements for the subsequent stages or allowing for more gain when a smaller ratio (e.g., 1:1) is selected. The ratio also may be varied depending on the channel in order to flatten or adjust the overall gain over the entire mobile TV band. To configure the Input-BPF205 for high UHF (ultra high frequency) channels (such aschannel50 for a mobile TV tuner) that have frequencies close to that of a GSM, CDMA, orLTE transmitter105, switch M61 can be activated and switches M60 and M62 can be deactivated. This provides a voltage divider between a capacitor in thefirst SCA305 and a capacitor in thesecond SCA310.
To configure the Input-BPF205 for low UHF channels, such as channel26 of a mobile TV tuner which may have a frequency between 542 MHz and 548 MHz, thesecond SCA310 can be disconnected from the Input-BPF205 circuit by activating switches M60 and M62 and deactivating switch M61. In certain exemplary embodiments, this configuration reduces the attenuation of the sampled signal by 15 dB. This compensates for frequency dependent gain variations of the three band-pass filters205,215, and225.
In certain exemplary embodiments, the inductor L1 of the Input-BPF205 can be biased at half of Vdd for an integrated circuit that the inductor L1 is coupled to in order to maximize the input voltage swing without violating the integrated circuit's specification while capacitor C4 provides a return path to ground. In certain exemplary embodiments, the bias voltage for the inductor L1 may be higher if adequate precautions are taken regarding the maximum breakdown voltage of the circuit, for example by employing zener diodes for ESD, cascoded input stages, larger channel devices, LDD MOSFETs, etc.
The LNA-BPF215 also includes an SCA315 having ‘n+1’ number of capacitors. In this exemplary embodiment, each capacitor in the SCA315 includes a corresponding transistor switch (e.g., a MOS transistor) for activating the capacitor. Similar to the Input-BPF205, the resonant frequency of the LNA-BPF215 can be adjusted by selecting one or more of the capacitors of the SCA315.
In this exemplary embodiment, theLNA210 is a cascode LNA having two transistors M4 and M5. Thecascode LNA210 can use a frequency dependent degeneration that can be activated at high frequencies by deactivating switch M7. This serves the purpose of increasing input linearity at high frequencies as well as providing sufficient gain at low frequencies for maintaining low noise figure of theLNA210 by activating switch M7.
The capacitors and the switches in each of theSCAs305,310, and315 can be configured to avoid charge pumping due to their single ended nature. As shown inFIG. 3, this can be accomplished by inserting MOS switches M10 to M1nbetween capacitor C10 to C1nand the chip input, MOS switches M20 to M2nbetween capacitor C20 to C2nand the AC coupling capacitor C4, and MOS switches M30 to M3nbetween capacitor C30 to C3nand the output ofLNA210. High-Q external inductors L1 and L2 may be used in theHIPCF canceller130 instead of on-chip inductors to provide higher frequency selectivity. The use ofSCAs305,310, and315 with sufficient tuning range can compensate for the spread of the two off-chip inductors L1 and L2 and parasitic capacitance associated with printed circuit boards. The integrated circuit having components of theHIPCF canceller130 can have an input pin, an AC ground pin, and an LNA pull-up pin, each having multiple ESD diodes arranged in series to allow for a larger signal swing.
In certain exemplary embodiments, one or more of the band-pass filters205,215, and225 are implemented as parallel resonance circuits. In certain exemplary embodiments, one or more of the band-pass filters205,215, and225 are implemented as series resonance circuits. In certain exemplary embodiments, one or more of the band-pass filters205,215, and225 are implemented as a low-pass filter rather than a band-pass filter. For example, each of the band-pass filters205,215, and225 may be replaced with a low-pass filter if the main tone of thetransmitter105 has a frequency greater than the frequency range for interference suppression. In certain exemplary embodiments, one or more of the band-pass filters205,215, and225 are implemented as a high-pass filter rather than a band-pass filter. For example, each of the band-pass filters205,215, and225 may be replaced with a high-pass filter if the main tone of thetransmitter105 has a frequency less than the frequency range for interference suppression. In certain exemplary embodiments, a combination of low-pass, high-pass, and band-pass filters may be used in place of the band-pass filters205,215, and225.
FIG. 4 depicts a spectral diagram400 of signals received at a victim receiver antenna, such asantenna120 ofFIG. 1, in accordance with certain exemplary embodiments. Referring toFIGS. 1 and 4, the spectral diagram400 shows theamplitude403 of the signals received at theantenna120 plotted againstsignal frequency402. The spectral diagram400 includes afirst peak404 corresponding to the carrier frequency FTof theaggressor transmitter105 and asecond peak405 corresponding to the channel frequency FRof thevictim receiver135. The spectral diagram400 also includes anoise sideband406 corresponding to the phase noise or other unwanted spectral components generated by theaggressor transmitter105. In certain exemplary embodiments, the victim receiver's preferred signal-to-noise ratio (SNR) for proper reception is not met by the amplitude difference between thesecond peak405 and thenoise sideband406.
FIG. 5 depicts a spectral diagram500 of signals received at the input of a victim receiver, such asreceiver135 ofFIG. 1, after cancellation of in-band unwanted spectral components by an HIPCF canceller, such as theHIPCF canceller130 ofFIG. 1, in accordance with certain exemplary embodiments. Referring toFIGS. 1 and 5, the spectral diagram,500 shows theamplitude403 of the signals received at thereceiver135 plotted againstsignal frequency402. The spectral diagram500 includes anoise sideband506 corresponding to the phase noise or other unwanted spectral components generated by theaggressor transmitter105. Thisnoise sideband506 differs from thenoise sideband406 of spectral diagram400 in that thenoise sideband506 includes anotch507 centered at the channel frequency FRof thevictim receiver135. Thisnotch507 results from the compensation provided by the interference compensation signal generated by theHIPCF canceller130 and applied to the input of thereceiver135. In certain exemplary embodiments, the SNR of the signal is improved by an amount corresponding to the depth of thenotch507. Thus, thenotch507 improves the signal SNR, thus increasing the sensitivity of thevictim receiver135. For example, improved cancellation of phase noise or other unwanted spectral components by theHIPCF canceller130 results in adeeper notch507 and thus, better SNR for thevictim receiver135.
FIG. 6 is a block schematic diagram of the Q-enhancedBPF225 ofFIG. 2, in accordance with certain exemplary embodiments. In particular,FIG. 6 is a transistor level diagram of the Q-enhancedBPF225. The exemplary Q-enhancedBPF225 includes anLC tank610 having an inductor L3, abypass switch670, and anSCA615. In certain exemplary embodiments, the inductor L3 is a low-Q on-chip spiral inductor. In certain exemplary embodiments, the inductor L3 is a high-Q off-chip inductor. Similar to the band-pass filters205 and215, the resonant frequency of the Q-Enhanced-BPF225 can be set (e.g., automatically by the controller235) to the receive frequency of thereceiver135 to pass in-band signal components and to further filter, block, or reduce the intensity of the fundamental tones and out-of-band blockers from the sampled transmit signal.
TheSCA615 includes a number ‘n+1’ of capacitors C40-C4n. In the illustrated embodiment, each capacitor C40-C4nincludes two corresponding transistor switches (e.g., a MOS transistor) for activating the capacitor. For example, the capacitor C40 includes transistor switches M40 and M50. In addition, the Q-Enhanced-BPF225 also includes two series-connected voltage controlled capacitors VC1 and VC2 in parallel with theSCA615. In certain exemplary embodiments, the voltage controlled capacitors VC1 and VC2 are varactors. Disposed between the two voltage controlled capacitors VC1 and VC2 is acenter tap655 that electrically couples the voltage controlled capacitors VC1 and VC2 to a digital-to-analog (D/A)converter650. The D/A converter650 varies the voltage level of the voltage control capacitors VC1 and VC2 in response to a signal received from thecontroller235. Thecontroller235 can adjust the resonant frequency of the Q-Enhanced-BPF225 by activating one or more of the capacitors C40-C4n(via switches M40-M4nand M50-M5n) and by controlling the voltage level at thecenter tap655 and thus, the capacitance of the voltage controlled capacitors VC1 and VC2. The voltage controlled capacitors VC1 and VC1 enable thecontroller235 to finely tune the resonant frequency of the Q-Enhanced-BPF225.
The exemplary Q-Enhanced-BPF225 also includes across-coupled pair620 of transistor switches M8 and M9 in parallel with theSCA615. Thecross-coupled pair620 provides a negative resistance to reduce the resistance of an LC tank formed by inductor L3, theSCA615, and voltage controlled capacitors VC1 and VC2.
The Q-Enhanced-BPF225 includes a number ‘n+1’ of current sources M60-M6n(e.g., binary weighted), each having a gate terminal electrically coupled together and with a reference current (Ref_C). The Q-Enhanced-BPF225 also includes a number ‘n+1’ of current switches M70-M7n. By selecting one or more of the current sources M60-M6nvia activating and deactivating (e.g., by the controller235) the corresponding current switch(es) M70-M7n, the current in switches M8 and M9 can be adjusted which in turn adjusts the resistance of theLC tank610. Thus, the Q-factor of the Q-Enhanced-BPF225 can be adjusted. For example, the Q-factor of the Q-Enhanced-BPF225 can be adjusted to a desired level such that filtering of out-of-band signals is improved or maximized without the Q-Enhanced-BPF225 oscillating.
The Q-Enhanced-BPF225 also includes abypass switch670 having a resistor R8 electrically coupled to and disposed between two transistor switches M80 and M81. As discussed in further detail with reference toFIGS. 11-15, the switches M80 and M81 can be activated or turned on during calibration of the Input-BPF205 and the LNA-BPF215 while current sources M60-M6nare deactivated. When the switches M80 and M81 are activated, the resistor R8 may detune the LC tank. During normal operation, the switches M80 and M81 are typically deactivated.
FIG. 7 is another block schematic diagram of theHIPCF canceller130 depicting additional components of theHIPCF130, in accordance with certain exemplary embodiments. As shown inFIG. 7, theexemplary HIPCF130 also includes bypass switches720 and725 for use during calibration of theHIPCF130. In particular, the Input-BPF205 includes thebypass switch720 and theLNA215 includes thebypass switch725. Thebypass switch720 includes a transistor switch M82 and a resistor R2. Similarly, thebypass switch725 includes a transistor switch M83 and a resistor R3. During the configuration of the HIPCF130 (e.g., using automatic test equipment (ATE), bench measurement, or in-site calibration), each of the bypass switches720,725 and thebypass switch670 of the Q-Enhanced-BPF225 can be activated and deactivated to selectively tune the band-pass filters205,215, and225.
TheHIPCF canceller130 also includes abuffer770 disposed between theVGA220, Q-enhanced-BPF225, and the I/Q Modulator230. Theauxiliary circuits240 include apower detector745 electrically coupled to the output of thebuffer770. Thepower detector745 measures the power level of the sampled transmit signal at the output of thebuffer770 and provides an indication of the measurement to an A/D converter750. The A/D converter750 converts the indication to a digital signal and provides the digital signal to thecontroller235.
Theauxiliary circuits240 also include atemperature sensor755 having an output electrically coupled to thecontroller235. Thetemperature sensor755 is positioned on the chip (integrated circuit) that theHIPCF canceller130 is mounted or fabricated on to measure the temperature of the chip. Thecontroller235 can receive temperature measurements from thetemperature sensor755 and use these measurements for monitoring, calibration, and for temperature compensation. In certain exemplary embodiments, the output of thetemperature sensor755 is coupled to an A/D converter, such as A/D converter750 or a second A/D converter. In exemplary embodiments having a shared A/D converter750 for thepower detector745 and thetemperature sensor755, thecontroller235 can provide a signal to the A/D converter requesting which of the two measurements (power or temperature) to obtain.
FIG. 8 depicts a functional block diagram of acommunication system800, in accordance with certain exemplary embodiments. Theexemplary communication system800 includes twocommunication devices805 and850, each having atransmitter810 and855, respectively, and areceiver820 and865, respectively. Thecommunication system800 includes afirst HIPCF canceller880 for compensating for noise and/or interference imposed onto an input of thereceiver865 from signals transmitted by thetransmitter810 via afirst antenna825. Thecommunication system800 also includes asecond HIPCF canceller885 for compensating for noise and/or interference imposed onto an input of thereceiver820 from signals transmitted by thetransmitter855 via asecond antenna870. Thus, thecommunication system800 includes interference compensation circuits for protecting bothcommunication devices805 and850. For example, thecommunication device805 may be a cellular radio and thecommunication device850 may be a WiFi radio. In this example, the cellular radio would be protected from interference imposed on the cellular radio receiver caused by signals transmitted by the WiFi radio and, conversely, the WiFi radio would be protected from interference imposed on the WiFi receiver from signals transmitted by the cellular radio.
TheHIPCF canceller880 receives samples of signals transmitted by thetransmitter810 via asampling device890 electrically coupled to the output of the transmitter'spower amplifier815 and processes those samples to generate an interference compensation signal. TheHIPCF canceller880 applies the generated interference compensation signal to the input of thereceiver865 atcancellation point833 and, in turn, the interference compensation signal cancels, suppresses, or otherwise compensates for noise and/or interference imposed on thereceiver865. TheHIPCF canceller880 can include a controller similar tocontroller235 ofFIG. 2 that executes one or more calibration and one or more tuning algorithms to improve the noise and/or interference compensation. The controller can receive feedback, such as a “receive signal quality indicator,” and use the feedback during the execution of the algorithms to improve the noise and/or interference compensation. Similar to thecancellation point134, thecancellation point833 can be implemented as converging electrical conductors, a coupler, a summation node, an adder, or other suitable technology.
Similarly, theHIPCF canceller885 receives samples of signals transmitted by thetransmitter855 via asampling device895 electrically coupled to the output of the transmitter'spower amplifier860 and processes those samples to generate an interference compensation signal. TheHIPCF canceller885 applies the generated interference compensation signal to the input of thereceiver820 atcancellation point834 and, in turn, the interference compensation signal cancels, suppresses, or otherwise compensates for noise and/or interference imposed on thereceiver820. TheHIPCF canceller885 can include a controller similar tocontroller235 ofFIG. 2 that executes one or more calibration and one or more tuning algorithms to improve the noise and/or interference compensation. The controller can receive feedback, such as a “receive signal quality indicator,” and use the feedback during the execution of the algorithms to improve the noise and/or interference compensation. Similar to thecancellation point134, thecancellation point834 can be implemented as converging electrical conductors, a coupler, a summation node, an adder, or other suitable technology.
FIG. 9 depicts a lookup table900, in accordance with certain exemplary embodiments. Referring toFIGS. 2,7, and9, the lookup table900 can be stored in thememory device760 of theHIPCF canceller130. The exemplary lookup table900 includescenter frequency settings910 for the Input-BPF205,center frequency settings920 for the LNA-BPF215, andcenter frequency settings930 for the Q-Enhanced-BPF225. In this exemplary embodiment, the Input-BPFcenter frequency settings910 include three frequency values (Freq1, Freq2, and Freq3) for which the band-pass filters205,215, and225 have been characterized. For example, each of the band-pass filters205,215, and225 may be characterized at 450 MHz, 600 MHz, and 770 MHz in amobile TV receiver135 embodiment. The Input-BPFcenter frequency settings910 also include switched capacitor array settings (SCA_Input_BPF1-SCA-Input_BPF3) for each of the three frequency values (Freq1-Freq3), respectively. The switched capacitor array settings (SCA_Input_BPF1-SCA-Input_BPF3) control how theSCA305 and theSCA310 are controlled for each of the frequencies (Freq1-Freq3) and thus, the resonant frequency of the Input-BPF205 for those frequencies. The Input-BPFcenter frequency settings910 also include temperature coefficient values (Tempco1-Tempco3) for each frequency value (Freq1-Freq3), respectively. The temperature coefficient values (Tempco1-Tempco3) are used by thecontroller235 to adjust the settings of theSCA305 and310 based on changes in temperature.
Similarly, the LNA-BPFcenter frequency settings920 includes switched capacitor array settings (SCA_LNA_BPF1-SCA-LNA_BPF3) for each of the three frequency values (Freq1-Freq3), respectively. The switched capacitor array settings (SCA_LNA_BPF1-SCA-LNA_BPF3) control how the SCA315 is controlled for each of the frequencies (Freq1-Freq3) and thus, the resonant frequency of the LNA-BPF215 for those frequencies. The LNA-BPFcenter frequency settings920 also include temperature coefficient values (Tempco1-Tempco3) for each frequency value (Freq1-Freq3), respectively. These temperature coefficient values (Tempco1-Tempco3) are used by thecontroller235 to adjust the settings of the SCA315 based on changes in temperature.
The Q-Enhanced-BPFcenter frequency settings930 include switched capacitor array settings (SCA_QE_BPF1-SCA-QE_BPF3) for each of the three frequency values (Freq1-Freq3), respectively. The switched capacitor array settings (SCA_QE_BPF1-SCA-QE_BPF3) control how theSCA615 is controlled for each of the frequencies (Freq1-Freq3) and thus, the resonant frequency of the Input-BPF205 for those frequencies. The Q-Enhanced-BPFcenter frequency settings920 also include temperature coefficient values (Tempco1-Tempco3) for each frequency value (Freq1-Freq3), respectively. These temperature coefficient values (Tempco1-Tempco3) are used by thecontroller235 to adjust the settings of theSCA615 based on changes in temperature. The Q-Enhanced-BPFcenter frequency settings930 also include DAC settings (DAC1-DAC3) for the voltage controlled capacitors VC1 and VC2 for each frequency (Freq1-Freq3), respectively. The Q-Enhanced-BPFcenter frequency settings920 also include temperature coefficient values (CurrentTempco1-CurrentTempco3) for each frequency value (Freq1-Freq3), respectively. These temperature coefficient values (CurrentTempco1-CurrentTempco3) are used by thecontroller235 to adjust the settings of the current switches M70-M7n, and thus, the bias current in the Q-enhanced-BPF225 based on changes in temperature.
The exemplary lookup table900 also includes seed values940 for the I/Q modulator230. The seed values940 include in-phase and quadrature (I, Q) settings ((I1, Q1)−(I3, Q3)) for the I/Q modulator230 at each frequency (Freq1-Freq3), respectively. The lookup table900 also includesmiscellaneous settings950. Themiscellaneous settings950 include the temperature at which a calibration of theHIPCF canceller130 was performed, the process parameters of the lot theHIPCF canceller130 was fabricated in, the temperature coefficient of the settings of theDAC650, the minimum current required to keep the transistor switches M8 and M9 of the Q-Enhanced-BPF225 turned on, and the threshold of detecting oscillation for the on-chip power detector745.
The lookup table900 is stored on thememory device760 and accessed by thecontroller235 to adjust the settings of certain components within theHIPCF canceller130 during normal operation and during calibration and tuning processes discussed below. Many of the settings in the lookup table900 are also populated during these calibration and tuning processes, as discussed in further detail below.
FIG. 10 is a flow chart depicting amethod1000 for calibrating certain components of theHIPCF canceller130, in accordance with certain exemplary embodiments. After fabrication of theHIPCF canceller130, for example in an integrated circuit, initial settings shown in the lookup table900 ofFIG. 9 are populated during an ATE or bench characterization process inblock1005. Inblock1010, in the application stage when theHIPCF canceller130 is powered on, the values for the settings in the lookup table900 are loaded into an internal register of thecontroller235. Thecontroller235 can access the lookup table900 and control the components of theHIPCF canceller130 using a current temperature measurement from thetemperature sensor755 and the channel frequency that thereceiver135 is tuned to. An optional calibration routine may also be performed inblock1010 to calibrate the band-pass filters205,215, and225 and/or the I/Q modulator230.
Inblock1015, if the channel of thereceiver135 changes, the I/Q modulator230 is recalibrated by thecontroller235. This recalibration can improve the noise and/or interference cancellation based on the receiver's receive signal quality indicator and cancellation algorithms described below. Inblock1020, thecontroller235 triggers the calibration of the band-pass filters205,215,225 and the I/Q modulator230 in response to a command from a user or in response to the temperature change exceeding a preset threshold, for example 10 degrees C. During the calibration process of themethod1000, the values in the lookup table900 are updated.
FIG. 11 is a flow chart depicting amethod1100 for configuring the filters of theHIPCF canceller130 for a desired center frequency (e.g., 450 MHz, 600 MHz, or 770 MHz for a mobile TV embodiment), in accordance with certain exemplary embodiments. Inblock1105, the Input-BPF205 is calibrated. The LNA-BPF215 and the Q-Enhanced-BPF225 are bypassed by activatingbypass switches725 and670 and deactivatingbypass switch720. A pilot tone or tuner signal is applied to the input of theHIPCF canceller130 and the power level of the pilot tone or tuner signal is measured at the output of theHIPCF canceller130. The settings of theSCA305 and theSCA310 are adjusted based on the measured power level until the power level reaches an acceptable level. The settings of theSCA305 and theSCA310 corresponding to the acceptable power level are populated in the lookup table900 for later use by thecontroller235.Block1105 is discussed in further detail below with reference toFIG. 12.
Inblock1110, the LNA-BPF215 is calibrated. The Input-BPF205 and the Q-Enhanced-BPF225 are bypassed by activatingbypass switches720 and670 and deactivatingbypass switch725. With the pilot tone or tuner signal still applied to the input of theHIPCF canceller130, the settings of the SCA315 are adjusted based on the measured power level until the measured power level reaches an acceptable level. The settings of the SCA315 corresponding to the acceptable power level are populated in the lookup table900 for later use by thecontroller235.Block1110 is discussed in further detail below with reference toFIG. 13. Inblock1115, the Q-Enhanced-BPF225 is calibrated.Block1115 is discussed in further detail below with reference toFIG. 14.
Inblock1120, the temperature coefficients for the band-pass filters205,215, and225 are calculated. In certain exemplary embodiments, the ATE (or bench measurement equipment) calibrates the settings for each of the band-pass filters205,215, and225 for more than one temperature. For example, the band-pass filters may be calibrated at room temperature (e.g., 27° C.), at 70° C., and at 0° C. Thecontroller235 can calculate the temperature coefficients by taking the difference between the settings for each band-pass-filter205,215,225 at each temperature. The temperature coefficients can be stored in the lookup table900 in the corresponding fields offields910,920,930, and950.
Inblock1125, the I and Q seed values for the I/Q modulator230 are calibrated. In certain exemplary embodiments, the ATE (or bench measurement equipment) can employ a setup similar to thecircuit100 depicted inFIG. 1. Thetransmitter105 can be activated and one or more of the cancellation algorithms discussed below can be executed to identify a preferred or acceptable cancellation point for the desired center frequency. The (I, Q) settings corresponding to the identified cancellation point can be stored infield940 of the lookup table900.
Afterblock1125, themethod1100 ends. Of course, themethod1100 could be executed more than one time. For example, themethod1100 may be executed during ATE and then executed again after the chip or system being placed into operation.
FIG. 12 is a flow chart depicting amethod1105 for calibrating the Input-BPF205 of theHIPCF canceller130, in accordance with certain exemplary embodiments, as referenced inFIG. 11. Inblock1205, the bypass switches725 and670 are activated andbypass switch720 is deactivated. This bypasses the LNA-BPF215 and the Q-Enhanced-BPF225 for the calibration of the Input-BPF205. In certain exemplary embodiments, thecontroller235 operates the bypass switches670,720, and725 in response to a command to configure the band-pass filters205,215, and225.
Inblock1210, a pilot tone or a tuner signal (e.g., a mobile TV signal) with the desired center frequency (e.g., 450 MHz, 600 MHz, or 770 MHz) is applied to the input of theHIPCF canceller130. In certain exemplary embodiments, theHIPCF canceller130 generates the pilot tone or tuner like signal using an on-chip phase locked loop. In certain exemplary embodiments, the pilot tone or tuner signal is generated by re-using the phase locked loop of thereceiver135, for example via one of the receiver's output pins.
Inblock1215, the power level of the pilot tone or tuner signal is measured at the output of theHIPCF canceller130. In certain exemplary embodiments, the output power level of the pilot tone or tuner signal is measured using ATE or bench characterization equipment. For example, the ATE or bench characterization equipment may include a spectrum analyzer. In certain exemplary embodiments, the output power level of the pilot tone or tuner signal is measured using a receive signal quality indicator obtained from thereceiver135. In certain exemplary embodiments, the output power level of the pilot tone or tuner signal is measured using thepower detector745.
Inblock1220, thecontroller235 makes one or more adjustments to the settings of theSCA305 and theSCA310 and measures the output power level of the pilot tone or tuner signal resulting from each adjustment. Thecontroller235 can continue to make adjustments until the output power level of the pilot tone or tuner signal reaches or exceeds an acceptable, preferred, or maximum level. In addition or in the alternative, thecontroller235 can make a certain number of adjustments and record the output power level of the pilot tone or tuner signal (e.g., in memory device760) and identify the recorded output power level having the best, preferred, or highest power level. In certain exemplary embodiments, thecontroller235 sweeps the setting values for theSCA305 and theSCA310 in a monotonically increasing or decreasing process (e.g., one least significant bit (“LSB”) or multiple LSBs at a time for digital SCAs). In certain exemplary embodiments, a binary algorithm, such as the algorithm illustrated inFIG. 20 and discussed below, could be used to find a preferred setting for theSCA305 andSCA310.
Inblock1225, thecontroller235 stores the desired center frequency and the settings for theSCA305 andSCA310 corresponding to the acceptable, preferred, or maximum level in the lookup table900 in thememory device760. For example, the desired center frequency may be stored in the field “Freq1” and the settings for theSCA305 and theSCA310 may be stored in field “SCA_Input_BPF1.” Afterblock1225, themethod1105 proceeds to block1110, as referenced inFIG. 11.
FIG. 13 is a flow chart depicting amethod1110 for calibrating the LNA-BPF215 of theHIPCF canceller130, in accordance with certain exemplary embodiments, as referenced inblock1110 ofFIG. 11. Inblock1305, the bypass switches720 and670 are activated andbypass switch725 is deactivated. This bypasses the Input-BPF205 and the Q-Enhanced-BPF225 for the calibration of the LNA-BPF215.
Inblock1310, thecontroller235 makes one or more adjustments to the settings of the SCA315 and measures the output power level of the pilot tone or tuner signal resulting from each adjustment. Thecontroller235 can continue to make adjustments until the output power level of the pilot tone or tuner signal reaches or exceeds an acceptable, preferred, or maximum level. In addition or in the alternative, thecontroller235 can make a certain number of adjustments and record the output power level of the pilot tone or tuner signal (e.g., in memory device760) and identify the recorded output power level having the best, preferred, or highest power level. In certain exemplary embodiments, thecontroller235 sweeps the setting values for the SCA315 in a monotonically increasing or decreasing process (e.g., one LSB or multiple LSBs at a time for digital SCAs). In certain exemplary embodiments, a binary algorithm, such as the algorithm illustrated inFIG. 20 and discussed below, could be used to find a preferred setting for the SCA315.
Inblock1315, thecontroller235 stores the settings for the SCA315 corresponding to the acceptable, preferred, or maximum level in the lookup table900 in thememory device760. For example, the settings for the SCA315 may be stored in field “SCA_LNA_BPF1.” Afterblock1315, themethod1110 proceeds to block1115, as referenced inFIG. 11.
FIGS. 14A and 14B, collectivelyFIG. 14, depict a flow chart of amethod1115 for calibrating the Q-Enhanced-BPF225 of theHIPCF canceller130, in accordance with certain exemplary embodiments, as referenced inblock1115 ofFIG. 11. Inblock1405, the bypass switches720 and725 are activated andbypass switch670 is deactivated. This bypasses the Input-BPF205 and the LNA-BPF215 for the calibration of the Q-Enhanced-BPF225.
Inblock1410, a bias current is applied (e.g., by the controller235) to the current switches M70-M7nfor the purpose of keeping the transistor switches M8 and M9 in thecross-coupled pair620 and the current sources M60-M6nactive or turned on, yet avoiding oscillation of the Q-Enhanced-BPF225. The amount of current applied to the current switched M70-M7nmay correspond to the value of the “Minimum Current for QE” field of the lookup table900.
Inblock1415, thecontroller235 makes one or more adjustments to the settings of theSCA615 and measures the output power level of the pilot tone or tuner signal resulting from each adjustment. Thecontroller235 can continue to make adjustments until the output power level of the pilot tone or tuner signal reaches or exceeds an acceptable, preferred, or maximum level. In addition or in the alternative, thecontroller235 can make a certain number of adjustments and record the output power level of the pilot tone or tuner signal (e.g., in memory device760) and identify the recorded output power level having the best, preferred, or highest power level. In certain exemplary embodiments, thecontroller235 sweeps the setting values for theSCA615 in a monotonically increasing or decreasing process (e.g., one LSB or multiple LSBs at a time for digital SCAs). In certain exemplary embodiments, a binary algorithm, such as the algorithm illustrated inFIG. 20 and discussed below, could be used to find a preferred setting for theSCA615.
Inblock1420, thecontroller235 increases the amount of current applied to the cross-coupled transistor switches M8, M9 by increasing the settings of the current switches M70-M7n. In certain exemplary embodiments, the amount of current is increased by a few (e.g., 4) LSB. Inblock1425, the pilot tone or tuner signal is turned off. Inblock1430, an inquiry is conducted by thecontroller235 as to whether there is any oscillation generated by the Q-Enhanced-BPF225. In certain exemplary embodiments, this inquiry includes comparing the measured output power level of theHIPCF canceller130 with a predetermined threshold value at the ATE or a threshold value “Power Detector Output Threshold for Oscillation” stored in themiscellaneous values950 of the lookup table900. If the measured output power level is below the threshold, then thecontroller235 determines that there is no oscillation. If thecontroller235 determines that there is no or sufficiently low oscillation, themethod1115 proceeds to block1435, where thecontroller235 turns on the pilot tone or tuner signal again and applies the pilot tone or tuner signal to the input of theHIPCF canceller130. Afterblock1435, themethod1115 returns to block1415. If thecontroller235 determines that there is oscillation, themethod1115 proceeds to block1440.
Inblock1440, thecontroller235 decreases the amount of current applied to the current switches M70-M7nto the level prior to oscillation. Inblock1445, thecontroller235 stores the settings for theSCA615 corresponding to current level prior to oscillation in the lookup table900 in thememory device760. For example, the settings for theSCA615 may be stored in field “SCA_QE_BPF1.”
Inblock1450, the pilot tone or tuner signal is reactivated and applied to the input of theHIPCF canceller130. Thecontroller235 makes one or more adjustments to the settings for theDAC650 for biasing the voltage controlled capacitors VC1 and VC2 and measures the output power level of the pilot tone or tuner signal resulting from each adjustment. The adjustments to theDAC650 adjust the voltage level at the voltage controlled capacitors VC1 and VC2. Thecontroller235 can continue to make adjustments until the output power level of the pilot tone or tuner signal reaches or exceeds an acceptable, preferred, or maximum level. In addition or in the alternative, thecontroller235 can make a certain number of adjustments and record the output power level of the pilot tone or tuner signal (e.g., in memory device760) and identify the recorded output power level having the best, preferred, or highest power level. In certain exemplary embodiments, thecontroller235 sweeps the setting values for theDAC650 in a monotonically increasing or decreasing process (e.g., one LSB or multiple LSBs at a time). In certain exemplary embodiments, a binary algorithm, such as the algorithm illustrated inFIG. 20 and discussed below could be used to find a preferred setting for theDAC650.
Inblock1455, the pilot tone or tuner signal is turned off. Inblock1460, the output power level of theHIPCF canceller130 is measured. Inblock1465, an inquiry is conducted by thecontroller235 as to whether there is any oscillation generated by the Q-Enhanced-BPF225, similar to block1430. If thecontroller235 determines that there is oscillation, themethod1115 proceed to block1470. If thecontroller235 determines that there is no oscillation, themethod1115 proceeds to block1475.
Inblock1470, thecontroller235 lowers the current level for biasing the cross-coupled transistors M8, M9 by decreasing the settings of current switches M70-7n, for example by a few LSB. After the current level is lowered, themethod1115 returns to block1450.
Inblock1475, thecontroller235 stores the settings for theDAC650 and the current switches M70-M7nin the lookup table900 in thememory device760. For example, the setting for the current switches M70-M7nmay be stored in the field “Currentl” and the setting for theDAC650 may be stored in field “DAC1.” Afterblock1475, themethod1115 ends. Of course, themethod1100 can be repeated any number of times for any number of frequencies. For example, the band-pass filters205,215, and225 may be calibrated for three frequencies (Freq1, Freq2, and Freq3).
FIG. 15 is a flow chart depicting amethod1500 for calibrating the Input-BPF205 of theHIPCF canceller130 ofFIG. 7, in accordance with certain exemplary embodiments. Thismethod1500 is an alternative method to that of themethod1105 ofFIG. 12. Inblock1505, the bypass switches720,725, and670 are deactivated. For example, thecontroller235 may deactivate the bypass switches720,725, and670.
Inblock1510, a pilot tone or tuner signal with the desired center frequency is applied to the input of theHIPCF canceller130. Inblock1515, a measurement of the reflected pilot tone or tuner signal (e.g., reflection coefficient or return loss) is made at the input of theHIPCF canceller130. This measurement may be made by a power detector or spectral analyzer, for example. Inblock1520, thecontroller235 makes one or more adjustments to the settings of theSCA305 and theSCA310 and measures the reflected pilot tone or tuner signal. Thecontroller235 can continue to make adjustments until the reflected pilot tone or tuner signal reaches or exceeds an acceptable, preferred, or minimum level. In addition or in the alternative, thecontroller235 can make a certain number of adjustments and record the reflected pilot tone or tuner signal (e.g., in memory device760) and identify the recorded reflected pilot tone or tuner signal having the best, preferred, or lowest level. In certain exemplary embodiments, thecontroller235 sweeps the setting values for theSCA305 and theSCA310 in a monotonically increasing or decreasing process (e.g., one LSB or multiple LSBs at a time for digital SCAs). In certain exemplary embodiments, a binary algorithm, such as the algorithm illustrated inFIG. 20 and discussed below could be used to find a preferred setting for theSCA305 andSCA310.
Inblock1525, thecontroller235 stores the desired center frequency and the settings for theSCA305 andSCA310 corresponding to the acceptable, preferred, or minimum level in the lookup table900 in thememory device760. For example, the desired center frequency may be stored in the field “Freq1” and the settings for theSCA305 and theSCA310 may be stored in field “SCA_Input_BPF1.”
FIG. 16 is a flow chart depicting amethod1600 for determining switch settings for a given frequency, in accordance with certain exemplary embodiments. For example, themethod1600 may be performed in response to a user applying a channel change for a mobile TV. In certain exemplary embodiments, the lookup table900 includes the settings for each band-pass filter205,215, and225 and the I and Q seed values for each channel thereceiver135 may tune to. In certain exemplary embodiments, the lookup table900 includes the settings for each band-pass filter205,215, and225 and the I and Q seed values for a predetermined number (e.g., 3) of channel frequencies. For such embodiments that do not include calibrated settings for each channel frequency, themethod1600 provides an exemplary process for computing the SCA switch settings for each band-pass filter205,215, and225 at any application selectable channel frequency. Theexemplary method1600 takes into account the calibration values in the lookup table900 identified for the predetermined number of channel frequencies and the actual temperature measured by an on-chip temperature sensor, such astemperature sensor755.
Inblock1605, thecontroller235 conducts an inquiry to determine whether to start determining switch settings for each band-pass filter205,215,225. In certain exemplary embodiments, thecontroller235 communicates with thereceiver135 to determine whether the receive frequency for thereceiver135 has changed, for example as a result of a change in channel for thereceiver135. If the receive frequency for the receiver has changed, thecontroller235 determines to start determining the switch settings for each band-pass filter205,215,225 and proceeds to block1610. Otherwise, themethod1600 remains inblock1605.
In certain exemplary embodiments, thecontroller235 determines whether the temperature of the chip that theHIPCF canceller130 resides has changed. Thecontroller235 monitors the temperature measurement received to determine whether the temperature has changed by a certain threshold. If thecontroller235 determines that the temperature has changed by an amount equal to or exceeding the threshold, thecontroller235 determines to start determining the switch settings for each band-pass filter205,215,225 and proceeds to block1610. Otherwise, themethod1600 remains inblock1605.
In certain exemplary embodiments, thecontroller235 determines whether the lookup table900 has changed or whether a setting or value in the lookup table900 has been updated. If thecontroller235 determines that the lookup table has changed, thecontroller235 determines to start determining the switch settings for each band-pass filter205,215,225 and proceeds to block1610. Otherwise, themethod1600 remains inblock1605.
Inblock1610, thecontroller235 receives the receive frequency for the receiver135 (“target frequency”), the current calibration values for the band-pass filters205,215, and225 from the lookup table900, a real-time or near real-time temperature measurement from thetemperature sensor755, and the temperature value during calibration from the lookup table900.
Inblock1615, thecontroller235 conducts an inquiry to determine whether the target frequency is less than a frequency threshold. For example in certain mobile TV embodiments, this frequency threshold is set at 600 MHz which corresponds to the middle of the receive band of certain mobile TV tuners. If the target frequency is less than the frequency threshold, themethod1615 proceeds to block1620. Otherwise, themethod1600 proceeds to block1625.
Inblock1620,controller235 computes a variable “DeltaF” indicating the difference between the target frequency and the frequency threshold. Thecontroller235 performs an interpolation process, for example linear interpolation, using two or more of the calibration values in the lookup table900 to determine the settings for theSCAs305,310,315, and615, the DAC settings for the voltage controlled capacitors VC1 and VC2, and bias current switch settings for the current switches M70-M7n. For example, for each aforementioned component, thecontroller235 uses the setting stored for a first frequency, such as Freq1, and the setting stored for a second frequency, such as Freq2, in a linear interpolation calculation with DeltaF to determine the setting for that component.
Inblock1625, the controller computes the variable DeltaF indicating the difference between the target frequency and a second frequency value. In certain exemplary embodiments, if the frequency threshold if 600 MHz, the second frequency value is 770 MHz. These frequency values are exemplary, rather than limiting, and other frequency values can be used without departing from the scope and spirit of the present invention. Similar to block1620, the controller performs an interpolation process using two or more of the calibration values in the lookup table900 to determine the settings for theSCAs305,310,315, and615, the DAC settings for the voltage controlled capacitors VC1 and VC2, and bias current switch settings for the current switches M70-M7n. For example, for each aforementioned component, thecontroller235 uses the setting stored for a first frequency, such as Freq2, and the setting stored for a second frequency, such as Freq3, in a linear interpolation calculation with DeltaF to determine the setting for that component.
As shown inblocks1620 and1625, themethod1600 uses two different sets of calibrated settings to determine the settings for the components of theHIPCF canceller130 depending upon the target frequency. This enables thecontroller235 to use the calibrated settings nearest the target frequency to determine the appropriate settings for the components.
Inblock1630, thecontroller235 determines a temperature compensation by computing a variable “DeltaTemp” which yields the difference between actual temperature and the temperature at which the last calibration was performed (stored infield950 of the lookup table900). Thecontroller235 also computes offset values caused by the temperature difference for the settings for each component. Thecontroller235 uses the offset values to determine final setting for the components at the target frequency. Thecontroller235 stores the final settings in internal registers for use in operating the components. Note that the I and Q settings for the I/Q modulator230 may not be temperature compensated in themethod1600 as the I and Q settings may be calibrated using one of the cancellation algorithms discussed below with reference toFIGS. 17-31.
FIG. 17 depictsimplementation layers1700 of noise and/or interference cancellation algorithms, in accordance with certain exemplary embodiments. These algorithms can use a feedback signal from thevictim receiver135 to determine appropriate I and Q settings for theHIPCF canceller130. This feedback signal includes a quality indicator (e.g., BER, PER, RSSI, noise floor, SNR, EVM, and Position Accuracy, etc.) for thecommunication system100. This exemplary implementation of algorithms includes four layers, alink control layer1710, asignal processing layer1720, analgorithm control layer1730, and analgorithm execution layer1740. In certain exemplary embodiments, each of the layers1710-1740 may reside in any of the following three components: 1) a baseband integrated circuit of thevictim receiver135, 2) a stand alone microcontroller, or 3) the on-chip controller235 (or another control device) of theHIPCF130. For ease of discussion, the layers1710-1740 will be discussed hereinafter in terms of thecontroller235 performing the respective functions.
In thelink control layer1710, the feedback signal is analyzed and tested for quality to determine whether cancellation should be activated to improve the sensitivity of thevictim receiver135. Due to the nature of the active noise and/or interference cancellation which theHIPCF canceller130 provides, theHIPCF canceller130 may also output its own noise floor while canceling the noise and/or interference generated by the power amplifier110 (or another component) at the input of thevictim receiver135. As a result, the overall noise floor seen by thevictim receiver135 is the summation of the output noise floor of theHIPCF canceller130, the receivingantenna120, the power amplifier noise and/or interference received by the receivingantenna120, and the phase and gain adjusted noise floor of the power amplifier110 (via the HIPCF canceller130), which in turn can affect the sensitivity of thevictim receiver135. Thus, the determination as to whether or not to activate theHIPCF canceller130 to improve the sensitivity of thevictim receiver135 may be decided based on the actual noise and/or interference of thepower amplifier110 received by thevictim receiver135.
FIG. 18 depicts a diagram1800 of receiver sensitivity plotted versus coupled power amplifier noise for a mobile TV tuner tuned at 746 MHz with a channel bandwidth of 8 MHz and a CDMA800 power amplifier, in accordance with certain exemplary embodiments. Referring toFIG. 18, the diagram1800 includes afirst curve1805 depicting the mobile TV tuner sensitivity with theHIPCF canceller130 inactive and asecond curve1810 depicting the mobile TV tuner sensitivity with theHIPCF canceller130 canceling or suppressing the power amplifier noise. As illustrated in the exemplary implementation, there is no advantage to activating theHIPCF noise canceller130 for power amplifier noise below −174 dBm/Hz as the output noise floor of theHIPCF canceller130 would exceed the benefit of canceling the coupled power amplifier noise. For power amplifier noise above approximately −160 dBm/Hz, maximum cancellation/sensitivity improvement (e.g., approximately 10 dB in this exemplary implementation) would be achieved with theHIPCF canceller130 active as the received power amplifier noise is typically much higher than the output noise floor of theHIPCF canceller130. Additionally, thelink control layer1710 detects in multi-channel systems whether a particular channel has been optimized in the past and passes the setting corresponding to prior optimization from the memory to theHIPCF130. An indication of whether the channel has been optimized previously can be stored in memory by thecontroller235 at the conclusion of or during an optimization.
The desired victim receive signal quality may be assessed with respect to feedback (e.g., BER, PER, RSSI, noise floor, SNR, EVM, and Position Accuracy, etc.) received from the receiver to determine whether to activate theHIPCF canceller130. For example, theHIPCF130 may be activated if the feedback indicates that the receive signal is above the combined noise floor (i.e., the summation of the output noise floor of theHIPCF canceller130, the receivingantenna120, the power amplifier noise and/or interference received by the receivingantenna120, and the phase and gain adjusted noise floor of the power amplifier110 (via the HIPCF canceller130). This feature is illustrated inFIG. 19, which depicts a diagram1900 of an output SNR of a mobile TV tuner tuned at 746 MHz with a channel bandwidth of 8 MHz versus received mobile TV signal strength with a coupled CDMA800 power amplifier phase noise at −161 dBm/Hz at the input ofvictim receiver135, in accordance with certain exemplary embodiments. Referring toFIG. 19, the diagram1900 includes afirst curve1905 depicting the mobile TV tuner output SNR with theHIPCF canceller130 inactive, and asecond curve1910 depicting the mobile TV tuner output SNR with theHIPCF canceller130 canceling or suppressing the power amplifier phase noise. Athird curve1915 depicts a desired minimum SNR output for the mobile TV tuner. As illustrated in the exemplary implementation, there may not be an advantage in activating theHIPCF noise canceller130 when the received mobile TV signal is below −90 dBm.
The exemplarylink control layer1710 includes several modes of operation. Thecontroller235 can determine which mode of operation to be active based on the signal quality of the signal received by thereceiver135. In certain exemplary embodiments, thelink control layer1710 includes four modes of operation, a maximum cancellation mode, a limited cancellation mode, a wait for acceptable signal mode, and a no signal mode. In this exemplary embodiment, if the received signal strength is acceptable (e.g., above an acceptable threshold level which is −81 dBm inFIG. 19), thecontroller235 commences the maximum cancellation mode whereby the noise and/or interference cancellation of theHIPCF canceller130 is at a high level. If the received signal strength is low (e.g., between an acceptable level threshold and a very low level threshold, which is between −81 dBm and −90 dBm inFIG. 19), thecontroller235 commences the limited cancellation mode of theHIPCF canceller135 whereby the noise and/or interference cancellation level is bounded by the noise floor. If the received signal is lower than a threshold indicating, for example, a very low signal (e.g. around −90 dBm inFIG. 19), thecontroller235 will commence the wait for acceptable signal mode whereby thecontroller235 delays entering the subsequent layers1720-1740 until the received signal meets or exceeds the threshold. If the received signal meets or exceeds the threshold while thecontroller235 is in the wait for acceptable signal mode, thecontroller235 can enter the subsequent layers1720-1740. If there is no signal received at thereceiver135, then thecontroller235 commences the no signal mode whereby theHIPCF canceller130 is inactive.
Thelink control layer1710 also may deduct information on the time dependent passing of the thresholds, for example when both threshold levels are passed in less than one second. A mobile device may be transported into a tunnel or under a bridge and all settings can be held constant until the passing of the acceptable level threshold indicates that the mobile device has returned from the tunnel or bridge. The operation of thelink control layer1710 can then resume using the held settings.
Thesignal processing layer1720 includes several processes that ensure stability and robustness of the feedback signal. A first process includes averaging a predetermined number of feedback values of the feedback signal before executing a noise cancellation algorithm.
A second process includes correction for errors in feedback signals during the execution of a noise cancellation algorithm. One exemplary error correction process includes obtaining two feedback values from thereceiver135 and computing the difference between the two feedback values. If this difference is less than a tolerance level, then the two feedback values are averaged. Otherwise, a third feedback value is obtained from thereceiver135 and the difference between the third feedback value and the second feedback value is determined. If this difference is less than the tolerance level, then the second and third feedback values are averaged. Otherwise, a fourth feedback value is obtained and a similar process is performed for a predetermined number of iterations. If no two feedback values are found that have a difference less than the tolerance level, then an error may be indicated and theHIPCF canceller130 may be deactivated. A second exemplary error correction process includes ranking a certain number of feedback values and selecting a certain number of the feedback values while a noise cancellation algorithm is running. For example, thecontroller235 may rank ten feedback values and select the five feedback values ranked in the middle. The average of the selected feedback signals are calculated and used in the noise cancellation algorithms.
A third process of thesignal processing layer1720 includes SNR averaging. This SNR averaging process includes computing the average value of the SNRs for different satellites (SVs), for example GPS systems, DARS (Digital Audio Radio Service), or Iridium. The SNR averaging may be performed for satellites that have a certain elevation level above an elevation threshold only, to avoid an incorrect decision in thealgorithm execution layer1740.
In thealgorithm control layer1730, several user controls can be implemented to control the algorithms described in thealgorithm execution layer1740. One such user control is the polarity of the logic used to compare two feedback values, for example before and after a change of I and/or Q settings of theHIPCF canceller130. The polarity can either be positive (e.g., higher feedback value is better) or negative (e.g., lower feedback value is better). Some exemplary feedback signals where a positive polarity may be used are SNR, Carrier to Noise Ratio (C/N), and Repeater Amplifier Gain. Some exemplary feedback signals where a negative polarity may be used are PER, BER, Error Vector Magnitude, Noise Floor Level, Adjacent Channel Power Ratio, and Adjacent Channel Leakage Ratio.
Thealgorithm execution layer1740 includes the execution of one of several noise cancellation algorithms. These algorithms include acts to adjust the I and Q values of theHIPCF canceller130 and evaluate the feedback signal resulting from the adjustment to find acceptable I and Q values for operating theHIPCF canceller130. The algorithms include two types of binary algorithms (a fast binary algorithm (FBA) and a binary correction algorithm (BCA)), a minstep algorithm (MSA), a blind shot algorithm (BSA), a dual slope algorithm (DSA), and a track and search algorithm (TSA).
FIG. 20 is a flow chart depicting afast binary algorithm2000 for canceling noise and/or interference, in accordance with certain exemplary embodiments. In thisexemplary FBA2000, each bit in I and Q values for theHIPCF canceller130 are sequentially reversed and tested for a better feedback value as determined by the polarity defined in thealgorithm control layer1730. TheFBA2000 may start with a start bit and progress sequentially through each of the bits of the I-value and Q-value until reaching a pre-defined stop bit. In certain exemplary embodiments, the start bit and stop bit may be user selected.
Inblock2005, thecontroller235 selects a first I-value and a first Q-value for operating theHIPCF canceller130. These first values may be start values from the lookup table900, seed values, or middle of range values. Inblock2010, theHIPCF canceller130 applies the first I-value and first Q-value to the I/Q modulator230.
Inblock2015, thereceiver135 provides a feedback signal having a feedback value to thecontroller235. The feedback value may be an SNR, an RSSI, a Carrier to Noise Ratio (C/N), RSSI, a Repeater Amplifier Gain, a PER, a BER, an Error Vector Magnitude, a Noise Floor Level, an Adjacent Channel Power Ratio, or an Adjacent Channel Leakage Ratio. After obtaining the feedback value from thereceiver135, thecontroller235 stores the feedback value in memory.
Inblock2020, thecontroller235 inverts a bit of the I-value and transmits the updated I-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated I-value to the I/Q modulator230. For example,bit2075 of I-value2071 may be inverted from a value of “1” to a value of “0.” In the first iteration of thisblock2020, thecontroller235 may invert the start bit of the I-value. In each subsequent iteration, the next bit may be inverted until the stop bit is completed.
Inblock2025, thecontroller235 obtains an updated feedback value from thereceiver135. Inblock2030, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. For example, if the polarity is positive and the updated feedback value is greater than the stored feedback value, then thecontroller235 will determine that the updated feedback value is better. Likewise, if the polarity is negative and the updated feedback value is greater than the stored feedback value, then thecontroller235 will determine that the stored feedback value is better. Thecontroller235 stores the better feedback value and sets the I-value to the I-value that resulted in the better feedback value. Thecontroller235 also applies the I-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2035, thecontroller235 inverts a bit of the Q-value and transmits the updated Q-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated Q-value to the I/Q modulator230. For example,bit2085 of Q-value2081 may be inverted from a value of “1” to a value of “0.” In the first iteration of thisblock2035, thecontroller235 may invert the start bit of the Q-value. In each subsequent iteration, the next bit may be inverted until the stop bit is completed.
Inblock2040, thecontroller235 obtains an updated feedback value from thereceiver135. Inblock2045, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. Thecontroller235 stores the better feedback value and sets the Q-value to the Q-value that resulted in the better feedback value. Thecontroller235 also applies the Q-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2050, thecontroller235 conducts an inquiry to determine whether there are more bits in the I-value and Q-value to test. For example, thecontroller235 may determine whether the previous iteration of blocks2020-2050 evaluated the stop bit. If there are more bits to test, the “Yes” branch is followed back to block2020 where another bit is inverted and evaluated for better feedback. Otherwise, the “No” branch is followed to block2055. Inblock2055, thecontroller235 operates theHIPCF canceller130 using the final stored I-value and Q-value.
In certain exemplary embodiments, theFBA2000 illustrated inFIG. 20 may not cover every condition and thus, it may be improved by assigning a one or two bit start value (e.g., most significant bit (MSB)) for both the I-value and the Q-value. Another improvement to theFBA2000 includes executing the BSA described below prior to executing theFBA2000 to obtain a start value for the I-value and for the Q-value.
The BCA is a modification to the fast binary algorithm illustrated inFIG. 20 and described above. In the BCA, each bit of both the I and Q values are sequentially reversed as in the fast binary algorithm, and either increased by a value of “1” if the original value of the bit is “1” (and thus, causing a carry to its immediate neighboring more significant bit) or decreased by “1” if the original value is “0” (and thus, causing a borrow from its immediate neighboring more significant bit). In both cases, thecontroller235 would evaluate the feedback value to determine which value (I-value or Q-value depending on the block) resulted in better feedback. Similar to the FBA, the I-value and Q-value that resulted in the better feedback value is stored and used at the completion of the algorithm to control theHIPCF canceller130. The BCA may begin with a start bit and proceed through each bit until the stop bit is completed. In certain exemplary embodiment, the start and stop bits may be user selected. In certain exemplary embodiments, if no BSA is performed prior to the execution of the binary correction algorithm, the binary correction algorithm may start with the MSB and with bit reversal only for the MSB of the I-value and the Q-value as there is not a more significant bit to carry to or borrow from for the MSB. After the MSB for the I-value and Q-value have been completed, the feature of increasing or decreasing an evaluated bit by a value of “1” may begin with the second MSB.
The motivation for implementing the BCA in place of theFBA2000 can be discussed with reference toFIG. 21, which depicts agraph2100 of I and Q values adjusted using the binary algorithms. Referring toFIG. 21, point X1 represents a plot of an initial I-value and Q-value for theHIPCF canceller130. As part of the binary algorithms, the MSB of the I-value is inverted to proceed from point X1 point X2. In this graph, the feedback value at point X2 is determined to be better than the feedback value at point X1. Thus, the binary algorithms would keep the I-value for point X2 and invert the MSB of the Q-value to proceed to point X3.
At point X3, assuming the feedback value is determined to be better at point X3 than at point X2, in theFBA2000, the second MSB of the I-value would be inverted. This bit inversion would cause the algorithm to proceed from point X3 to point A, which is further away from optimal point C and thus, would have an inferior feedback value to that of point C. In the binary correction algorithm, the feedback value would be tested at both points A and B by increasing or decreasing the second MSB of the I-value by a value of “1” and thus, affecting the MSB. Because point B is closer to the optimal point C, point B would result in a better feedback value than point A and the BCA would continue from point B rather than point X3. Thus, the BCA can be more accurate than the fast binary algorithm. However, the BCA may require more iterations and more hardware in certain implementations.
FIG. 22 is a flow chart depicting aminstep algorithm2200 for canceling noise and/or interference, in accordance with certain exemplary embodiments. Theexemplary MSA2200 can provide fine tuning to the noise cancellation, for example after one of the binary algorithms has been executed. TheMSA2200 can follow changes in the coupling channel between an interferer/noise source (e.g., power amplifier110) and thevictim receiver135. For a given step size (e.g., 1 LSB to 7 LSB resolution), noise and/or interference cancellation can be achieved by incrementing (plus step size) or decrementing (minus step size) I-values and Q-values sequentially. In certain exemplary embodiments, the incrementing or decrementing stops at maximum or minimum values for the appropriate I-value or Q-value (e.g., range criteria). In certain exemplary embodiments, theMSA2200 runs for a given number of iterations or time period and can be interrupted by a user. I-values and Q-values each oscillate around an desirable value or follow changes in coupling channel.
Referring toFIGS. 1,2, and22, inblock2205, thecontroller235 selects a first I-value and a first Q-value for operating theHIPCF canceller130. Inblock2210, theHIPCF canceller130 applies the first I-value and the first Q-value to the I/Q modulator230.
Inblock2215, thereceiver135 provides a feedback signal having a feedback value to thecontroller235. The feedback value may be a SNR, a RSSI, a Carrier to Noise Ratio (C/N), a Repeater Amplifier Gain, a PER, a BER, an Error Vector Magnitude, a Noise Floor Level, an Adjacent Channel Power Ratio, or an Adjacent Channel Leakage Ratio, etc. After obtaining the feedback value from thereceiver135, thecontroller235 stores the feedback value in memory.
Inblock2220, thecontroller235 increments the I-value by a given step size (e.g., 1 LSB) and transmits the updated I-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated I-value to the I/Q modulator230. Thecontroller235 also obtains an updated feedback value from thereceiver135.
Inblock2225, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. Thecontroller235 stores the better feedback value and sets the I-value to the I-value that resulted in the better feedback value. Thecontroller235 also applies the I-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2230, thecontroller235 increments the Q-value by a given step size (e.g., one LSB) and transmits the updated Q-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated Q-value to the I/Q modulator230. Thecontroller235 also obtains an updated feedback value from thereceiver135.
Inblock2235, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. Thecontroller235 stores the better feedback value and sets the Q-value to the Q-value that resulted in the better feedback value. Thecontroller235 also applies the Q-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2240, thecontroller235 decrements the I-value by a given step size (e.g., one LSB) and transmits the updated I-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated I-value to the I/Q modulator230. Thecontroller235 also obtains an updated feedback value from thereceiver135.
Inblock2245, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. Thecontroller235 stores the better feedback value and sets the I-value to the I-value that resulted in the better feedback value. Thecontroller235 also applies the I-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2250, thecontroller235 decrements the Q-value by a given step size (e.g., one LSB) and transmits the updated Q-value to theHIPCF canceller130. In response, theHIPCF canceller130 applies the updated Q-value to the I/Q modulator230. Thecontroller235 also obtains an updated feedback value from thereceiver135.
Inblock2255, thecontroller235 compares the updated feedback value to the stored feedback value to determine which of the two feedback values is better based on the polarity defined in thealgorithm control layer1730. Thecontroller235 stores the better feedback value and sets the Q-value to the Q-value that resulted in the better feedback value. Thecontroller235 also applies the Q-value that resulted in the better feedback value to theHIPCF canceller130.
Inblock2260, thecontroller235 conducts an inquiry to determine whether to continue repeatingblocks2220 through2255. In certain exemplary embodiments, the determination is based on a time period. If the time period has expired, then thecontroller235 determines not to continue. In certain exemplary embodiments, the determination is based on the sensitivity of thereceiver135 or based on the feedback value obtained inblock2255. In certain exemplary embodiments, the determination is based on the number of iterations executed. If thecontroller235 determines to continue repeating blocks2220-2255, then the “Yes” branch is followed back toblock2220. Otherwise, the “No” branch is followed to block2265. Inblock2265, thecontroller235 operates theHIPCF canceller130 using the final selected I-value and Q-value.
In certain exemplary embodiments, the decision to change from an increment in I-value or Q-value to a decrement is based upon whether the previous iteration rejected the new feedback value, i.e. the new feedback value was not preferred over the previous feedback value.
Although theFBA2000, theBCA2100, and theMSA2200 have been discussed above in terms of a changing sequence of IQIQIQ, theFBA2000, theBCA2100, and theMSA2200 could also be implemented using other sequences, including IIQQIIQQ, and IIIQQQIIIQQQ, for example.
The BSA can be executed when signal conditions are poor (e.g., acceptable start I- and Q-values are not available), or the victim receiver baseband ICs have limited accuracy for BER or SNR as the feedback value. In such an implementation, the BSA can be executed to determine a start I-value and a start Q-value for the algorithms discussed above (i.e., theFBA2000, theBCA2100, or theMSA2200.FIG. 23 depicts anI-Q plane2300 having 16 sub-regions with feedback values that are pseudorandom. The BSA can evaluate the feedback for multiple different I and Q pre-samples (e.g., from a lookup table) and select the pre-sample having the best feedback value. After the best pre-sample is determined, the BSA can transition to either theFBA2000, theBCA2100, or theMSA2200 and use the I-value and Q-value for the pre-sample as a starting point for the algorithm.
There are several methods for implementing the BSA. In one method, the I and Q values associated with the best feedback value are selected from a number of samples (e.g., 4 or 16) with preset I and Q values. In the case of 10-bit I and Q values, four samples of feedback values may be taken from the following locations in the I and Q plane:
I=(0xFF, 0x2FF, 0xFF, 0x2FF)
Q=(0x2FF, 0x2FF, 0xFF, 0xFF)
In the case of 10-bit I and Q values, sixteen samples of feedback values may be taken from the following locations in the I and Q plane:
I=(0x80, 0x80, 0x80, 0x80, 0x180, 0x180, 0x180, 0x180, 0x280, 0x280, 0x280, 0x280, 0x380, 0x380, 0x380, 0x380)
Q=0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380, 0x80, 0x180, 0x280, 0x380)
The above locations are exemplary rather than limiting and many other locations are feasible without departing from the scope and spirit of the present invention.
A second method for implementing the BSA includes obtaining feedback values at each of four (or other number) preset I and Q points. The maximum and minimum feedback values of the obtained feedback values can be identified. A feedback threshold is determined by either a) averaging the minimum and maximum feedback values, or b) adding a user selected offset value to the minimum feedback value. After determining the feedback threshold, the BSA can evaluate the feedback values for I and Q points proximal the best field out of the four I and Q points. For example, the BSA can use a user specified step size to explore I and Q points proximal the best of the four I and Q points. The BSA can terminate when one sample feedback meets or exceeds the feedback threshold. The BSA can then transition to theMSA2200.
The DSA uses an isosceles triangle approximation with two equal and opposite slopes for approximating a noise funnel curve.FIG. 24 is agraph2400 depicting a receivesignal quality indicator2405 plotted versus I or Q values resulting from an implementation of a DSA, in accordance with certain exemplary embodiments. The DSA can select four points (X1-X4) along a noise funnel curve formed by the receivesignal quality indicator2405 and compute a vertex, which is close to cancellation point C. The vertex can be computed using point-slope form of a linear equation. Once the vertex is found, the DSA can transition to theMSA2200, using the vertex as starting I and Q values.
FIG. 25 is a flow chart depicting aDSA2500 for canceling noise and/or interference, in accordance with certain exemplary embodiments.FIG. 26 is agraph2600 depicting acurve2605 of receive signal quality indicator plotted versus either an I or Q axis (against I and Q axes ifFIG. 26 is plotted in three dimensions) resulting from an implementation of theDSA2500 ofFIG. 25, in accordance with certain exemplary embodiments. Theexemplary DSA2500 uses an isosceles triangle approximation with two equal and opposite slopes for a noise funnel curve formed by the receiversignal quality indicator2605. Referring toFIGS. 25 and 26, inblock2505, thecontroller235 selects a number of samples of I-values and/or Q-values along the I or Q axis. For example, thecontroller235 may select four samples. In certain exemplary embodiments, thecontroller235 uses a BSA to select the location for the samples of I-values and/or Q-values.
Inblock2510, thecontroller235 communicates the samples to the I/Q modulator230 and the I/Q modulator applies each of the samples one at a time. Inblock2520, thecontroller235 obtains a feedback value, such as a “receive signal quality indicator,” for each of the applied samples and stores each feedback value and the corresponding sample I and Q values in thememory device760. In certain exemplary embodiments, thecontroller235 receives a “receive signal quality indicator” for each sample from thereceiver135.
Inblock2520, thecontroller235 compares the stored feedback values and identifies the better feedback value. For example, inFIG. 26, thecontroller235 identifies point X1 as resulting in the better feedback value. Let point X1 have an I and Q value of (I1, Q1) and a feedback value of Y1.
Inblock2525, with a preset step size, “STEP,” (e.g., STEP=most significant bit (MSB) of the I-value or Q-value or the MSB/2 or the MSB/4) thecontroller235 selects another two points around point X1 by varying the I-value. For example, thecontroller235 may select points X2 (e.g., I1+STEP, Q1) and X3 (e.g., I1−STEP, Q1). Thecontroller235 communicates the samples X2 and X3 to the I/Q modulator230 and the I/Q modulator230 applies the settings for the samples X2 and X3 one at a time. For each sample, thecontroller235 receives a feedback value, for example from thereceiver135. Let the feedback value for X2 be Y+ and the feedback value for X3 be Y−.
Inblock2530, thecontroller235 computes another sample point based on dual slope. In certain exemplary embodiments, thecontroller235 computes another sample using SLOPE=(Y+−Y1)/STEP. This equation represents the slope of astraight line2610 connecting points X2 and X1. Anotherstraight line2615 is illustrated inFIG. 26 extending from point X3 and having a slope opposite theline2610. Thelines2610 and2615 intersect atpoint2620.
Inblock2530, the controller computes the next I-value forpoint2620 using: I2=I1−STEP*(Y+−Y−)/(Y+−Y1). Inblock2535, the controller communicates I and Q values of (I2, Q1) to the I/Q modulator230 and the I/Q modulator230 applies the I and Q values. Inblock2540, thecontroller235 receives a feedback value for (I2, Q1) and stores the feedback value in thememory device760. Let the feedback value for (I2, Q1) be Y2.
In block2545, with the preset step size, “STEP,” thecontroller235 selects another two points around point X1 by varying the Q-value from point (I2, Q1). For example, thecontroller235 may select points (I2, Q1+STEP) and (I2, Q1−STEP). Thecontroller235 communicates the samples to the I/Q modulator230 and the I/Q modulator230 applies the settings for the samples one at a time. For each sample, thecontroller235 receives a feedback value. Let the feedback value for (I2, Q1+STEP) be Y+ and the feedback value for (I2, Q1−STEP) be Y−.
Inblock2550, thecontroller235 computes:
Q2=Q1−STEP*(Y+−Y−)/(Y+−Y2). Inblock2555, thecontroller235 communicates I and Q values of (I2, Q2) to the I/Q modulator230 and the I/Q modulator230 applies the I and Q values. Inblock2560, thecontroller235 receives a feedback value for (I2, Q2) and stores the feedback value in thememory device760. Let the feedback value for (I2, Q2) be Y3.
Inblock2565, thecontroller235 reduces the size of STEP. In this exemplary embodiment, the size of STEP is halved. However, other (e.g., less conservative) reduction sizes are also feasible. Inblock2570, thecontroller235 conducts an inquiry to determine whether the size of STEP is less than a threshold, “STEPEND.” If the size of STEP is less than STEPEND, then theDSA2500 proceeds to block2580, where thecontroller235 initiates an MSA (e.g., MSA2200) using (I2, Q2) as a starting point. If the size of STEP is not less than STEPEND, then themethod2500 proceeds to block2575. Inblock2575, thecontroller235 assigns the I2, Q2, and Y2 values to I1, Q1, and Y1, respectively. Afterblock2575, theDSA2500 returns to block2525.
Theexemplary DSA2500 can be particularly useful when there are local preferred cancellation points with one global preferred cancellation point. The local preferred cancellation points refer to I and Q values where their feedback values are “locally” preferred. For example, an MSA, such asMSA2200, would not jump outside the area proximal to the local preferred cancellation point. Implementing theDSA2500 for upper bits, thecontroller235 could avoid getting stuck with those local preferred cancellation points, while theMSA2200 could finely tune to find the globally preferred cancellation point.
FIG. 27 is a flow chart depicting aTSA2700 for canceling noise and/or interference, in accordance with certain exemplary embodiments.FIG. 28 is agraph2800 depicting cancellation points along anI-Q plane2801 evaluated in an implementation of the TSA ofFIG. 27, in accordance with certain exemplary embodiments. Referring toFIGS. 27 and 28, inblock2705, thecontroller235 selects a number (e.g., 4) of samples in theI-Q plane2801. In certain exemplary embodiments, thecontroller235 uses the BSA to select the location in theI-Q plane2801 for the samples.
Inblock2710, thecontroller235 communicates the settings for the selected samples to the I/Q modulator230 and the I/Q modulator230 applies the settings for each sample one at a time. Inblock2715, thecontroller235 receives, for each sample, a feedback value (e.g., from the receiver135) and stores the feedback value and its corresponding setting in thememory device760. Inblock2720, thecontroller235 compares the feedback value and identifies the better or preferred feedback value. Let X1 inFIG. 28 be the sample resulting in the preferred feedback value.
Inblock2725, with a predetermined step size, “STEP,” (e.g., STEP=MSB/2 or MSB/4) thecontroller235 selects another four samples proximal to X1. For example, thecontroller235 may select (I1+STEP, Q1), (I1−STEP, Q1), (I1, Q1+STEP), and (I1, Q1−STEP). Thecontroller235 communicates the four settings to the I/Q modulator230 and the I/Q modulator230 applies the settings for each sample one at a time. Thecontroller235 receives a feedback value for each sample and stores the feedback value for each sample and the settings for each sample in thememory device760. Thecontroller235 compares the feedback values for the four samples and identifies the preferred feedback value. Let X2 inFIG. 28 be the sample resulting in the preferred feedback value.
Inblock2730, thecontroller235 reduces the size of STEP. In this exemplary embodiment, the size of STEP is halved. Other size reductions are also feasible. Inblock2735, thecontroller235 conducts an inquiry to determine whether the size of STEP is less than a threshold, “STEPEND.” If the size of STEP is less than STEPEND, then theTSA2700 proceeds to block2755, where thecontroller235 uses the setting (In+1, Qn+1) to control the I/Q modulator230. If only one iteration of the TSA is performed, then thecontroller235 uses the settings for the sample corresponding to the preferred feedback value inblock2725 to control the I/Q modulator230. If the size of STEP is not less than STEPEND, then theTSA2700 proceeds to block2740.
Inblock2740, thecontroller235 selects another four samples proximal to the sample having the best stored feedback value. If it is the first iteration, the sample is X2 with (I2, Q2). This sample is designated as Xn asblock2740 may be executed multiple times. For example, thecontroller235 selects samples (In+STEP, Qn), (In−STEP, Qn), (In, Qn+STEP), (In, Qn−STEP). Thecontroller235 communicates the four settings to the I/Q modulator230 and the I/Q modulator230 applies the settings for each sample one at a time. Thecontroller235 receives a feedback value for each sample and stores the feedback value for each sample and the settings for each sample in thememory device760. Inblock2745, thecontroller235 compares the feedback values for the four samples and identifies the preferred feedback value. Inblock2750, thecontroller235 reduces the size of STEP and the TSA returns to block2735.FIG. 28 illustrates theTSA2700 employing four iterations, represented by points X1-X4, that identifies a preferred cancellation point2815 in theI-Q plane2801.
Theexemplary TSA2700 can be particularly useful when searching for an improved cancellation point and corresponding I/Q setting based on a previously preferred cancellation point, for example in response to a change in temperature. In such scenarios, theblock2705 can be adapted to use the previous preferred I/Q setting rather than selecting four samples. TheTSA2700 can narrow the field of search to the area in theI-Q plane2801 near the previously preferred cancellation point.
Individual algorithms (e.g., BSA, FBA, BCA, MSA, DSA, and TSA) discussed above may be implemented as a standalone algorithm to decide acceptable I and Q values. Or, multiple ones of the algorithms can be employed together to increase the speed of the evaluation and attain a desired accuracy. For example, the BSA can be executed to determine either the first MSB or first MSB and second MSB of both I and Q values. Following the BSA, the FBA or BCA can be executed to determine the middle few bits of both I and Q values. Finally, the MSA can be executed to finely tune both I and Q values to achieve a better feedback value and thus, better noise or interference cancellation.
Multiple iterations of the algorithms can be executed and/or the algorithms can be executed for longer periods of time to achieve better results. In certain exemplary embodiments, algorithms used for fine tuning (e.g., MSA and TSA) are employed in an always “on” mode where thecontroller150 continues to execute the algorithms while the noise canceller is in normal operation. This enables thecontroller150 to adjust the settings of the noise canceller to account for environmental changes, such as changes in temperature or operating conditions. In addition, noise cancellers operating in parallel can each execute one or more of the algorithms simultaneously or sequentially.
FIG. 29 is a flow chart depicting amethod2900 for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, such as thecommunication system100, in accordance with certain exemplary embodiments. For example, thecommunication system100 may include, in alternative embodiments, twoHIPCF cancellers130 in parallel.
Inblock2905, a control device, such as thecontroller235 of one of twoHIPCF canceller130, arranges the (I, Q) settings for the two cancellers in a sequence. For example, this sequence may be arranged as: (IninQnqn . . . I0i0Q0q0) with In . . . I0 and Qn . . . Q0 designating (I,Q) settings for a first canceller and in . . . i0 and qn . . . q0 designating IQ settings for a second canceller. The control device can then treat the two cancellers as a single canceller having the arranged sequence.
Inblock2910, the control device executes one or more of the cancellation algorithms discussed above (e.g., BSA, FBA, BCA, MSA, DSA, or TSA) using the sequence to determine a preferred cancellation setting for the cancellers. Inblock2915, the control device stores the preferred cancellation settings in memory.
FIG. 30 is a flow chart depicting analternative method3000 for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, in accordance with certain exemplary embodiments. Inblock3005, a control device, such as thecontroller235 of one of the two noise cancellers, finds a preferred cancellation point for one of the two noise cancellers while the settings for the second of the two noise cancellers remain unchanged. One of the cancellation algorithms discussed above (e.g., BSA, FBA, BCA, MSA, DSA, or TSA) can be used to find the preferred noise cancellation point for the first noise canceller.
Inblock3010, the control device finds a preferred cancellation point for the second noise canceller using one or more of the cancellation algorithms (e.g., BSA, FBA, BCA, MSA, DSA, or TSA) while the settings for the first noise canceller remain unchanged at the preferred cancellation point found during execution ofblock3005. Inblock3015, with both cancellers operating using their respective preferred cancellation points, the control device obtains a feedback value resulting from the two noise cancellers. Inblock3020, the control device compares the obtained feedback value to a preset threshold value. If the feedback value is better than the threshold or themethod3000 has ran for more than a preset number of iterations, themethod3000 proceeds to block3025. Otherwise, the method returns to block3005 with the current (I, Q) settings for both cancellers as starting values for the algorithm(s). Inblock3025, the control device stores the settings for the two noise cancellers and controls the noise cancellers using the settings.
FIG. 31 is a flow chart depicting analternative method3100 for finding a preferred noise cancellation point for two noise cancellers disposed in a communication system, in accordance with certain exemplary embodiments. Thismethod3100 addresses implantations where two noise cancellers are used to increase cancellation bandwidth.
Inblock3105, a control device, such as thecontroller235 of one of the two noise cancellers, finds a preferred cancellation setting (e.g., (I, Q) settings) for the first of the two noise cancellers based on a feedback value for a lower portion of bandwidth while the second noise canceller is turned off. Inblock3110, the control device stores the preferred noise cancellation setting for the first noise canceller.
Inblock3115, the control device finds a preferred cancellation setting (e.g., (I, Q) settings) for the second of the noise cancellers based on a feedback value for an upper portion of bandwidth while the first noise canceller is turned off. Inblock3120, the control device stores the preferred noise cancellation setting for the second noise canceller.
Inblock3125, the control device turns both noise cancellers on and applies the respective preferred cancellation setting to each of the two noise cancellers. Inblock3130, the control device executes an MSA for one step on the first noise canceller for the lower portion of the bandwidth. Inblock3135, the control device executes an MSA for one step on the second noise canceller for the upper portion of the bandwidth.
Inblock3140, the control device obtains a feedback value for the noise cancellers and compares the feedback value to a preset value. If the feedback value is greater than the preset value or ifblocks3130 and3135 have been executed for more than a preset number of iterations, themethod3100 proceeds to block3145. Otherwise, themethod3100 returns to block3130. Inblock3145, the control device stores the final settings in memory and controls the noise cancellers using the final settings. Although themethods2900,3000,3100 are depicted and described in terms of determining preferred cancellation points for two noise cancellers, eachmethod2900,3000,3100 could also be employed to determine preferred cancellation points for any number of noise cancellers. For example, themethods2900,3000,3100 could be employed to find preferred cancellation points for three or more noise cancellers arranged in parallel. Although themethods2900,3000, and3100 are depicted to find the preferred or improved cancellation points for two noise cancellers, eachmethod2900,3000,3100 could also be employed to find the preferred or improved cancellation points for more than two noise cancellers, for example three or more noise cancellers.
In summary, a communication system in accordance with certain exemplary embodiments of the present invention can comprise a transmitter that communicates information at a first frequency, a receiver that receives communication signals at a second frequency that may be the same or near the first frequency, and an interference suppression device that cancels, corrects, addresses, or compensates for interference, EMI, noise, spurs, or other unwanted spectral components imposed onto the receiver by signals transmitted by the transmitter. The interference suppression device can be coupled to a transmit path of the transmitter (e.g., at the output of the transmitter's power amplifier) to obtain a sample of the transmitted signals. The interference compensation circuit can include a plurality of filters, such as band-pass filters, that block or suppress signals outside the frequency band of the receiver while passing noise or other interference signals within the frequency band of the receiver. The interference compensation circuit also can include an I/Q modulator that generates an interference compensation signal using the signal output by the filters. This interference compensation signal can have an amplitude the same as or close to the amplitude of the noise and a phase shift of 180 degrees relative to interference. These parameters are tuned in using a “receive signal quality indicator” feedback from the victim receiver. The interference compensation signal generated by the I/Q modulator is applied to a receive path of the receiver to cancel or suppress the interference imposed on the receiver by the transmitted signals.
The communication systems described herein can be embodied in various communication devices, including cellular telephones, mobile computers, PDAs, personal navigation devices (e.g., GPS devices), or any other communication device comprising two or more communication elements. For example, the communication system can be embodied in a smartphone having a LTE/CDMA/GSM transceiver and a mobile TV tuner. Another example is a smartphone having a GSM/PCS/DCS/W-CDMA transceiver and a GPS receiver. Yet another example includes a notebook computer having a WLAN transceiver and a WiMAX or Bluetooth transceiver.
In a mobile device embodiment, the two or more communication elements may communicate via two or more antennas with little spatial separation. Thus, signals transmitted by the two or more communication elements may impose interference on each other. To suppress or cancel this interference, a HIPCF canceller as described above can be employed in each communication direction. That is, a first HIPCF canceller can cancel or suppress interference imposed on a first of the two or more communication elements by a second of the two or more communication elements, while a second HIPCF canceller cancels or suppresses interference imposed on the second of the two or more communication elements by the first of the two or more communication elements. Certain components of both HIPCF cancellers can be fabricated on a single integrated circuit or on multiple integrated circuits, such as one or more CMOS circuits.
Embodiments of the invention can be used with computer hardware and software that perform the methods and processing functions described above. As will be appreciated by those skilled in the art, the systems, methods, and procedures described herein can be embodied in a programmable computer, computer executable software, or digital circuitry. The software can be stored on computer readable media. For example, computer readable media can include a floppy disk, RAM, ROM, hard disk, removable media, flash memory, memory stick, optical media, magneto-optical media, CD-ROM, etc. Digital circuitry can include integrated circuits, gate arrays, building block logic, field programmable gate arrays (“FPGA”), etc.
Although specific embodiments of the invention have been described above in detail, the description is merely for purposes of illustration. It should be appreciated, therefore, that many aspects of the invention were described above by way of example only and are not intended as required or essential elements of the invention unless explicitly stated otherwise. Various modifications of, and equivalent acts corresponding to, the disclosed aspects of the exemplary embodiments, in addition to those described above, can be made by a person of ordinary skill in the art, having the benefit of the present disclosure, without departing from the spirit and scope of the invention defined in the following claim(s), the scope of which is to be accorded the broadest interpretation so as to encompass such modifications and equivalent structures.